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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / acbeec3d376cb17b627a674dae049934d15c57e6 / drivers / clk / tegra / clk-tegra210.c
  1. acbeec3 clk: tegra: Remove tegra_pmc_clk_init along with clk ids by Sowjanya Komatineni · 5 years ago
  2. c9e28c2 clk: tegra: Remove CLK_M_DIV fixed clocks by Sowjanya Komatineni · 5 years ago
  3. 2b50e49 clk: tegra: Add Tegra OSC to clock lookup by Sowjanya Komatineni · 5 years ago
  4. 9a85eb4 clk: tegra: Add support for OSC_DIV fixed clocks by Sowjanya Komatineni · 5 years ago
  5. 07b293c clk: tegra: Fix build error without CONFIG_PM_SLEEP by YueHaibing · 5 years ago
  6. 535f296d clk: tegra: Add suspend and resume support on Tegra210 by Sowjanya Komatineni · 5 years ago
  7. f68cbb3 clk: tegra: Use fence_udelay() during PLLU init by Sowjanya Komatineni · 5 years ago
  8. 05308d7 clk: tegra: Reimplement SOR clocks on Tegra210 by Thierry Reding · 6 years ago
  9. da8d1a3 clk: tegra: Rename sor0_lvds to sor0_out by Thierry Reding · 5 years ago
  10. 991a051 clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC by Thierry Reding · 6 years ago
  11. 916f562 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 5 years ago
  12. 556e2f6 Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 6 years ago
  13. e3527dc clk: tegra: Do not enable PLL_RE_VCO on Tegra210 by Thierry Reding · 6 years ago
  14. c1139d2 clk: tegra: Warn if an enabled PLL is in IDDQ by Thierry Reding · 6 years ago
  15. 2067507 clk: tegra: Do not warn unnecessarily by Thierry Reding · 6 years ago
  16. 0d34dfb clk: tegra210: fix PLLU and PLLU_OUT1 by JC Kuo · 6 years ago
  17. 9caec66 clk: tegra210: Fix default rates for HDA clocks by Jon Hunter · 6 years ago
  18. 9952f69 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 by Thomas Gleixner · 6 years ago
  19. 5834fd7 clk: core: replace clk_{readl,writel} with {readl,writel} by Jonas Gorski · 6 years ago
  20. 845d782 clk: tegra: Fix maximum audio sync clock for Tegra124/210 by Jon Hunter · 6 years ago
  21. c8da78e clk: tegra210: Include size.h for compilation ease by Stephen Boyd · 6 years ago
  22. a4dbbce clk: tegra: Fixes for MBIST work around by Joseph Lo · 6 years ago
  23. c76a69e clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks by Peter De-Schrijver · 6 years ago
  24. 5d79711 clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20 by Dmitry Osipenko · 7 years ago
  25. 2dcabf0 clk: tegra: Mark HCLK, SCLK and EMC as critical by Dmitry Osipenko · 7 years ago
  26. e403d00 clk: tegra: MBIST work around for Tegra210 by Peter De Schrijver · 7 years ago
  27. 89e423c clk: tegra: Add la clock for Tegra210 by Peter De Schrijver · 7 years ago
  28. 22ef01a clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init() by Nicolin Chen · 7 years ago
  29. bc2e4d2 clk: tegra: Fix sor1_out clock implementation by Thierry Reding · 7 years ago
  30. 7157c69 clk: tegra: Fix Tegra210 PLLU initialization by Alex Frid · 7 years ago
  31. 71422db clk: tegra: Correct Tegra210 UTMIPLL poweron delay by Alex Frid · 7 years ago
  32. ac99afe clk: tegra: Re-factor T210 PLLX registration by Alex Frid · 7 years ago
  33. 1934ffd clk: tegra: don't warn for pll_d2 defaults unnecessarily by Peter De Schrijver · 7 years ago
  34. a851ea2 clk: tegra: Fix T210 effective NDIV calculation by Alex Frid · 7 years ago
  35. e34e69c clk: tegra210: remove non-existing VFIR clock by Peter De Schrijver · 7 years ago
  36. 030999f clk: tegra: disable SSC for PLL_D2 by Peter De Schrijver · 7 years ago
  37. 1116d5a clk: tegra: Don't reset PLL-CX if it is already enabled by Jon Hunter · 8 years ago
  38. 88da44c clk: tegra: Add missing Tegra210 clocks by Peter De Schrijver · 8 years ago
  39. bea1baa clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on by Peter De Schrijver · 8 years ago
  40. 59af78d clk: tegra: Add SATA seq input control by Peter De Schrijver · 8 years ago
  41. 68d724c clk: tegra: Add Tegra210 special resets by Peter De Schrijver · 8 years ago
  42. e745f99 clk: tegra: Rework pll_u by Peter De Schrijver · 8 years ago
  43. 3843832 clk: tegra: Handle UTMIPLL IDDQ by Peter De Schrijver · 8 years ago
  44. 24c3ebe clk: tegra: Add aclk by Peter De Schrijver · 8 years ago
  45. 6cfc8bc clk: tegra: Define Tegra210 DMIC clocks by Peter De Schrijver · 8 years ago
  46. 319af79 clk: tegra: Define Tegra210 DMIC sync clocks by Peter De Schrijver · 8 years ago
  47. bfa3483 clk: tegra: Add CEC clock by Peter De Schrijver · 8 years ago
  48. ef6ed2b clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation by Peter De Schrijver · 8 years ago
  49. 8dce89a1 clk: tegra: Don't warn for PLL defaults unnecessarily by Peter De Schrijver · 8 years ago
  50. 8809eea clk: tegra: Remove non-existing pll_m_out1 clock by Peter De Schrijver · 8 years ago
  51. 34ac2c2 clk: tegra: Fix ISP clock modelling by Peter De Schrijver · 8 years ago
  52. 9326947 clk: tegra: Fix pll_a1 iddq register, add pll_a1 by Peter De Schrijver · 8 years ago
  53. 15d68e8 clk: tegra: Initialize UTMI PLL when enabling PLLU by Andrew Bresticker · 9 years ago
  54. 74d3ba0 clk: tegra: Micro-optimize Tegra210 clock setup by Thierry Reding · 9 years ago
  55. 2e34c2a clk: tegra: Make sor_safe the parent of dpaux and dpaux1 by Thierry Reding · 9 years ago
  56. e452b81 clk: tegra: Enable sor1 and sor1_src on Tegra210 by Thierry Reding · 9 years ago
  57. e2f7165 clk: tegra: Disable spread spectrum on pll_d2 by Thierry Reding · 9 years ago
  58. eddb65e clk: tegra: Fixup post dividers on Tegra210 by Thierry Reding · 9 years ago
  59. 287980e remove lots of IS_ERR_VALUE abuses by Arnd Bergmann · 9 years ago
  60. 926655f clk: tegra: Fix pllre Tegra210 and add pll_re_out1 by Rhyland Klein · 9 years ago
  61. a91bb60 clk: tegra: Add sor_safe clock by Thierry Reding · 10 years ago
  62. eede711 clk: tegra: dpaux and dpaux1 are fixed factor clocks by Thierry Reding · 10 years ago
  63. 98c4b36 clk: tegra: Add dpaux1 clock by Thierry Reding · 10 years ago
  64. 3358d2d clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs by Andrew Bresticker · 10 years ago
  65. fd360e2 clk: tegra: Fix sparse warnings for functions not declared as static by Jon Hunter · 9 years ago
  66. d9e6579 clk: tegra: Fix sparse warning for pll_m by Jon Hunter · 9 years ago
  67. 2d5b6cf clk: tegra: Use definition for pll_u override bit by Jon Hunter · 9 years ago
  68. 0649c32 clk: tegra: Fix warning caused by pll_u failing to lock by Jon Hunter · 9 years ago
  69. 4f8d444 clk: tegra: Fix clock sources for Tegra210 EMC by Jon Hunter · 9 years ago
  70. 2956994 clk: tegra: Add the APB2APE audio clock on Tegra210 by Jon Hunter · 9 years ago
  71. 3dad5c5 clk: tegra: Fix pllx dyn step calculation by Rhyland Klein · 9 years ago
  72. 474f2ba clk: tegra: Fix naming of MISC registers by Rhyland Klein · 9 years ago
  73. 1405011 clk: tegra: Remove improper flags for lock_enable by Rhyland Klein · 9 years ago
  74. 6b301a0 clk: tegra: Add support for Tegra210 clocks by Rhyland Klein · 10 years ago