| commit | 030999fe514d2d6dbabf0ed6727f4c493082d99d | [log] [tgz] |
|---|---|---|
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | Tue Jul 25 13:34:04 2017 +0300 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Wed Aug 23 15:58:56 2017 -0700 |
| tree | c240ba3e3f5e96792641f032b8e313fd56ac55ed | |
| parent | 04434cfa2b2032eae52c197ea184844dd76a329d [diff] |
clk: tegra: disable SSC for PLL_D2 PLLD2 is used for HDMI which does not allow Spread Spectrum clocking. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>