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Thomas Gleixner457c8992019-05-19 13:08:55 +01001// SPDX-License-Identifier: GPL-2.0-only
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
3 * Dynamic DMA mapping support.
4 *
Jan Beulich563aaf02007-02-05 18:51:25 -08005 * This implementation is a fallback for platforms that do not support
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * I/O TLBs (aka DMA address translation hardware).
7 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
8 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
9 * Copyright (C) 2000, 2003 Hewlett-Packard Co
10 * David Mosberger-Tang <davidm@hpl.hp.com>
11 *
12 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
13 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
14 * unnecessary i-cache flushing.
John W. Linville569c8bf2005-09-29 14:45:24 -070015 * 04/07/.. ak Better overflow handling. Assorted fixes.
16 * 05/09/10 linville Add support for syncing ranges, support syncing for
17 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
Becky Brucefb05a372008-12-22 10:26:09 -080018 * 08/12/11 beckyb Add highmem support
Linus Torvalds1da177e2005-04-16 15:20:36 -070019 */
20
Kees Cook7d63fb32018-07-10 16:22:22 -070021#define pr_fmt(fmt) "software IO TLB: " fmt
22
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <linux/cache.h>
Christoph Hellwigea8c64a2018-01-10 16:21:13 +010024#include <linux/dma-direct.h>
Christoph Hellwig9f4df962020-09-22 15:36:11 +020025#include <linux/dma-map-ops.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/mm.h>
Paul Gortmaker8bc3bcc2011-11-16 21:29:17 -050027#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <linux/spinlock.h>
29#include <linux/string.h>
Ian Campbell0016fde2008-12-16 12:17:27 -080030#include <linux/swiotlb.h>
Becky Brucefb05a372008-12-22 10:26:09 -080031#include <linux/pfn.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#include <linux/types.h>
33#include <linux/ctype.h>
Jeremy Fitzhardingeef9b1892008-12-16 12:17:33 -080034#include <linux/highmem.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090035#include <linux/gfp.h>
Christoph Hellwig84be4562015-05-01 12:46:15 +020036#include <linux/scatterlist.h>
Tom Lendackye9d1d2b2021-09-08 17:58:39 -050037#include <linux/cc_platform.h>
Christoph Hellwige7de6c72018-03-19 11:38:23 +010038#include <linux/set_memory.h>
Dongli Zhang71602fe2019-01-18 15:10:27 +080039#ifdef CONFIG_DEBUG_FS
40#include <linux/debugfs.h>
41#endif
Claire Chang0b84e4f2021-06-19 11:40:41 +080042#ifdef CONFIG_DMA_RESTRICTED_POOL
43#include <linux/io.h>
44#include <linux/of.h>
45#include <linux/of_fdt.h>
46#include <linux/of_reserved_mem.h>
47#include <linux/slab.h>
48#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070049
50#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <asm/dma.h>
52
53#include <linux/init.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070054#include <linux/memblock.h>
FUJITA Tomonoria8522502008-04-29 00:59:36 -070055#include <linux/iommu-helper.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070056
Thierry Redingce5be5a2013-10-23 13:32:04 +020057#define CREATE_TRACE_POINTS
Zoltan Kiss2b2b6142013-09-04 21:11:05 +010058#include <trace/events/swiotlb.h>
59
Alex Williamson0b9afed2005-09-06 11:20:49 -060060#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
61
62/*
63 * Minimum IO TLB size to bother booting with. Systems with mainly
64 * 64bit capable cards will only lightly use the swiotlb. If we can't
65 * allocate a contiguous 1MB, we're probably in trouble anyway.
66 */
67#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
68
Claire Chang73f62092021-03-18 17:14:22 +010069#define INVALID_PHYS_ADDR (~(phys_addr_t)0)
70
Geert Uytterhoevenae7871b2016-12-16 14:28:41 +010071enum swiotlb_force swiotlb_force;
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Will Deacon463e8622021-07-20 14:38:24 +010073struct io_tlb_mem io_tlb_default_mem;
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
75/*
Konrad Rzeszutek Wilk7453c542016-12-20 10:02:02 -050076 * Max segment that we can provide which (if pages are contingous) will
77 * not be bounced (unless SWIOTLB_FORCE is set).
78 */
Andy Shevchenkob51e6272020-09-02 20:31:05 +030079static unsigned int max_segment;
Konrad Rzeszutek Wilk7453c542016-12-20 10:02:02 -050080
Christoph Hellwig2d299602021-03-18 17:14:23 +010081static unsigned long default_nslabs = IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT;
82
Linus Torvalds1da177e2005-04-16 15:20:36 -070083static int __init
84setup_io_tlb_npages(char *str)
85{
86 if (isdigit(*str)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 /* avoid tail segment of size < IO_TLB_SEGSIZE */
Christoph Hellwig2d299602021-03-18 17:14:23 +010088 default_nslabs =
89 ALIGN(simple_strtoul(str, &str, 0), IO_TLB_SEGSIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 }
91 if (*str == ',')
92 ++str;
Florian Fainelli2726bf32021-03-22 18:53:49 -070093 if (!strcmp(str, "force"))
Geert Uytterhoevenae7871b2016-12-16 14:28:41 +010094 swiotlb_force = SWIOTLB_FORCE;
Florian Fainelli2726bf32021-03-22 18:53:49 -070095 else if (!strcmp(str, "noforce"))
Geert Uytterhoevenfff5d992016-12-16 14:28:42 +010096 swiotlb_force = SWIOTLB_NO_FORCE;
FUJITA Tomonorib18485e2009-11-12 00:03:28 +090097
Yinghai Luc729de82013-04-15 22:23:45 -070098 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070099}
Yinghai Luc729de82013-04-15 22:23:45 -0700100early_param("swiotlb", setup_io_tlb_npages);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
Konrad Rzeszutek Wilk7453c542016-12-20 10:02:02 -0500102unsigned int swiotlb_max_segment(void)
103{
Will Deacon463e8622021-07-20 14:38:24 +0100104 return io_tlb_default_mem.nslabs ? max_segment : 0;
Konrad Rzeszutek Wilk7453c542016-12-20 10:02:02 -0500105}
106EXPORT_SYMBOL_GPL(swiotlb_max_segment);
107
108void swiotlb_set_max_segment(unsigned int val)
109{
110 if (swiotlb_force == SWIOTLB_FORCE)
111 max_segment = 1;
112 else
113 max_segment = rounddown(val, PAGE_SIZE);
114}
115
Yinghai Luc729de82013-04-15 22:23:45 -0700116unsigned long swiotlb_size_or_default(void)
117{
Christoph Hellwig2d299602021-03-18 17:14:23 +0100118 return default_nslabs << IO_TLB_SHIFT;
Yinghai Luc729de82013-04-15 22:23:45 -0700119}
120
Christoph Hellwig2d299602021-03-18 17:14:23 +0100121void __init swiotlb_adjust_size(unsigned long size)
Ashish Kalrae9988792020-12-10 01:25:15 +0000122{
Ashish Kalrae9988792020-12-10 01:25:15 +0000123 /*
124 * If swiotlb parameter has not been specified, give a chance to
125 * architectures such as those supporting memory encryption to
126 * adjust/expand SWIOTLB size for their use.
127 */
Christoph Hellwigdfc06b32021-04-29 08:28:59 +0200128 if (default_nslabs != IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT)
129 return;
Christoph Hellwig2d299602021-03-18 17:14:23 +0100130 size = ALIGN(size, IO_TLB_SIZE);
131 default_nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
132 pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20);
Ashish Kalrae9988792020-12-10 01:25:15 +0000133}
134
FUJITA Tomonoriad32e8c2009-11-10 19:46:19 +0900135void swiotlb_print_info(void)
Ian Campbell2e5b2b82008-12-16 12:17:34 -0800136{
Will Deacon463e8622021-07-20 14:38:24 +0100137 struct io_tlb_mem *mem = &io_tlb_default_mem;
Ian Campbell2e5b2b82008-12-16 12:17:34 -0800138
Will Deacon463e8622021-07-20 14:38:24 +0100139 if (!mem->nslabs) {
Kees Cook7d63fb32018-07-10 16:22:22 -0700140 pr_warn("No low mem\n");
Yinghai Luac2cbab2013-01-24 12:20:16 -0800141 return;
142 }
143
Claire Chang73f62092021-03-18 17:14:22 +0100144 pr_info("mapped [mem %pa-%pa] (%luMB)\n", &mem->start, &mem->end,
Christoph Hellwig2d299602021-03-18 17:14:23 +0100145 (mem->nslabs << IO_TLB_SHIFT) >> 20);
Ian Campbell2e5b2b82008-12-16 12:17:34 -0800146}
147
Christoph Hellwigc7fbeca2021-02-04 10:11:20 +0100148static inline unsigned long io_tlb_offset(unsigned long val)
149{
150 return val & (IO_TLB_SEGSIZE - 1);
151}
152
Christoph Hellwigc32a77fd2021-02-05 11:19:34 +0100153static inline unsigned long nr_slots(u64 val)
154{
155 return DIV_ROUND_UP(val, IO_TLB_SIZE);
156}
157
Tom Lendackyc7753202017-07-17 16:10:21 -0500158/*
159 * Early SWIOTLB allocation may be too early to allow an architecture to
160 * perform the desired operations. This function allows the architecture to
161 * call SWIOTLB when the operations are possible. It needs to be called
162 * before the SWIOTLB memory is used.
163 */
164void __init swiotlb_update_mem_attributes(void)
165{
Will Deacon463e8622021-07-20 14:38:24 +0100166 struct io_tlb_mem *mem = &io_tlb_default_mem;
Tom Lendackyc7753202017-07-17 16:10:21 -0500167 void *vaddr;
168 unsigned long bytes;
169
Will Deacon463e8622021-07-20 14:38:24 +0100170 if (!mem->nslabs || mem->late_alloc)
Tom Lendackyc7753202017-07-17 16:10:21 -0500171 return;
Claire Chang73f62092021-03-18 17:14:22 +0100172 vaddr = phys_to_virt(mem->start);
173 bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT);
Christoph Hellwige7de6c72018-03-19 11:38:23 +0100174 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
Tom Lendackyc7753202017-07-17 16:10:21 -0500175 memset(vaddr, 0, bytes);
Tom Lendackyc7753202017-07-17 16:10:21 -0500176}
177
Claire Chang0a655792021-06-19 11:40:32 +0800178static void swiotlb_init_io_tlb_mem(struct io_tlb_mem *mem, phys_addr_t start,
179 unsigned long nslabs, bool late_alloc)
180{
181 void *vaddr = phys_to_virt(start);
182 unsigned long bytes = nslabs << IO_TLB_SHIFT, i;
183
184 mem->nslabs = nslabs;
185 mem->start = start;
186 mem->end = mem->start + bytes;
187 mem->index = 0;
188 mem->late_alloc = late_alloc;
Claire Chang903cd0f2021-06-24 23:55:20 +0800189
190 if (swiotlb_force == SWIOTLB_FORCE)
191 mem->force_bounce = true;
192
Claire Chang0a655792021-06-19 11:40:32 +0800193 spin_lock_init(&mem->lock);
194 for (i = 0; i < mem->nslabs; i++) {
195 mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
196 mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
197 mem->slots[i].alloc_size = 0;
198 }
199 memset(vaddr, 0, bytes);
200}
201
Yinghai Luac2cbab2013-01-24 12:20:16 -0800202int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203{
Will Deacon463e8622021-07-20 14:38:24 +0100204 struct io_tlb_mem *mem = &io_tlb_default_mem;
Mike Rapoporta0bf8422019-03-11 23:30:26 -0700205 size_t alloc_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206
Florian Fainelli2726bf32021-03-22 18:53:49 -0700207 if (swiotlb_force == SWIOTLB_NO_FORCE)
208 return 0;
209
Christoph Hellwig5d0538b2021-03-01 08:44:31 +0100210 /* protect against double initialization */
Will Deacon463e8622021-07-20 14:38:24 +0100211 if (WARN_ON_ONCE(mem->nslabs))
Christoph Hellwig5d0538b2021-03-01 08:44:31 +0100212 return -ENOMEM;
213
Will Deacon463e8622021-07-20 14:38:24 +0100214 alloc_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), nslabs));
215 mem->slots = memblock_alloc(alloc_size, PAGE_SIZE);
216 if (!mem->slots)
Christoph Hellwig2d299602021-03-18 17:14:23 +0100217 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
218 __func__, alloc_size, PAGE_SIZE);
Claire Chang0a655792021-06-19 11:40:32 +0800219
220 swiotlb_init_io_tlb_mem(mem, __pa(tlb), nslabs, false);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221
FUJITA Tomonoriad32e8c2009-11-10 19:46:19 +0900222 if (verbose)
223 swiotlb_print_info();
Claire Chang73f62092021-03-18 17:14:22 +0100224 swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT);
Yinghai Luac2cbab2013-01-24 12:20:16 -0800225 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226}
227
FUJITA Tomonoriabbceff2010-05-10 15:15:12 -0400228/*
229 * Statically reserve bounce buffer space and initialize bounce buffer data
230 * structures for the software IO TLB used to implement the DMA API.
231 */
Yinghai Luac2cbab2013-01-24 12:20:16 -0800232void __init
233swiotlb_init(int verbose)
FUJITA Tomonoriabbceff2010-05-10 15:15:12 -0400234{
Christoph Hellwig2d299602021-03-18 17:14:23 +0100235 size_t bytes = PAGE_ALIGN(default_nslabs << IO_TLB_SHIFT);
236 void *tlb;
FUJITA Tomonoriabbceff2010-05-10 15:15:12 -0400237
Florian Fainelli2726bf32021-03-22 18:53:49 -0700238 if (swiotlb_force == SWIOTLB_NO_FORCE)
239 return;
240
Yinghai Luac2cbab2013-01-24 12:20:16 -0800241 /* Get IO TLB memory from the low pages */
Christoph Hellwig2d299602021-03-18 17:14:23 +0100242 tlb = memblock_alloc_low(bytes, PAGE_SIZE);
243 if (!tlb)
244 goto fail;
245 if (swiotlb_init_with_tbl(tlb, default_nslabs, verbose))
246 goto fail_free_mem;
247 return;
FUJITA Tomonoriabbceff2010-05-10 15:15:12 -0400248
Christoph Hellwig2d299602021-03-18 17:14:23 +0100249fail_free_mem:
Mike Rapoport4421cca2021-11-05 13:43:22 -0700250 memblock_free(tlb, bytes);
Christoph Hellwig2d299602021-03-18 17:14:23 +0100251fail:
Kees Cook7d63fb32018-07-10 16:22:22 -0700252 pr_warn("Cannot allocate buffer");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253}
254
Alex Williamson0b9afed2005-09-06 11:20:49 -0600255/*
256 * Systems with larger DMA zones (those that don't support ISA) can
257 * initialize the swiotlb later using the slab allocator if needed.
258 * This should be just like above, but with some error catching.
259 */
260int
Jan Beulich563aaf02007-02-05 18:51:25 -0800261swiotlb_late_init_with_default_size(size_t default_size)
Alex Williamson0b9afed2005-09-06 11:20:49 -0600262{
Christoph Hellwig2d299602021-03-18 17:14:23 +0100263 unsigned long nslabs =
264 ALIGN(default_size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
265 unsigned long bytes;
Alexander Duyckff7204a2012-10-15 10:19:28 -0700266 unsigned char *vstart = NULL;
Alex Williamson0b9afed2005-09-06 11:20:49 -0600267 unsigned int order;
Konrad Rzeszutek Wilk74838b72012-07-27 20:55:27 -0400268 int rc = 0;
Alex Williamson0b9afed2005-09-06 11:20:49 -0600269
Florian Fainelli2726bf32021-03-22 18:53:49 -0700270 if (swiotlb_force == SWIOTLB_NO_FORCE)
271 return 0;
272
Alex Williamson0b9afed2005-09-06 11:20:49 -0600273 /*
274 * Get IO TLB memory from the low pages
275 */
Christoph Hellwig2d299602021-03-18 17:14:23 +0100276 order = get_order(nslabs << IO_TLB_SHIFT);
277 nslabs = SLABS_PER_PAGE << order;
278 bytes = nslabs << IO_TLB_SHIFT;
Alex Williamson0b9afed2005-09-06 11:20:49 -0600279
280 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
Alexander Duyckff7204a2012-10-15 10:19:28 -0700281 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
282 order);
283 if (vstart)
Alex Williamson0b9afed2005-09-06 11:20:49 -0600284 break;
285 order--;
286 }
287
Christoph Hellwig2d299602021-03-18 17:14:23 +0100288 if (!vstart)
Konrad Rzeszutek Wilk74838b72012-07-27 20:55:27 -0400289 return -ENOMEM;
Christoph Hellwig2d299602021-03-18 17:14:23 +0100290
Jan Beulich563aaf02007-02-05 18:51:25 -0800291 if (order != get_order(bytes)) {
Kees Cook7d63fb32018-07-10 16:22:22 -0700292 pr_warn("only able to allocate %ld MB\n",
293 (PAGE_SIZE << order) >> 20);
Christoph Hellwig2d299602021-03-18 17:14:23 +0100294 nslabs = SLABS_PER_PAGE << order;
Alex Williamson0b9afed2005-09-06 11:20:49 -0600295 }
Christoph Hellwig2d299602021-03-18 17:14:23 +0100296 rc = swiotlb_late_init_with_tbl(vstart, nslabs);
Konrad Rzeszutek Wilk74838b72012-07-27 20:55:27 -0400297 if (rc)
Alexander Duyckff7204a2012-10-15 10:19:28 -0700298 free_pages((unsigned long)vstart, order);
Konrad Rzeszutek Wilk7453c542016-12-20 10:02:02 -0500299
Konrad Rzeszutek Wilk74838b72012-07-27 20:55:27 -0400300 return rc;
301}
302
303int
304swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
305{
Will Deacon463e8622021-07-20 14:38:24 +0100306 struct io_tlb_mem *mem = &io_tlb_default_mem;
Claire Chang0a655792021-06-19 11:40:32 +0800307 unsigned long bytes = nslabs << IO_TLB_SHIFT;
Konrad Rzeszutek Wilk74838b72012-07-27 20:55:27 -0400308
Florian Fainelli2726bf32021-03-22 18:53:49 -0700309 if (swiotlb_force == SWIOTLB_NO_FORCE)
310 return 0;
311
Christoph Hellwig5d0538b2021-03-01 08:44:31 +0100312 /* protect against double initialization */
Will Deacon463e8622021-07-20 14:38:24 +0100313 if (WARN_ON_ONCE(mem->nslabs))
Christoph Hellwig5d0538b2021-03-01 08:44:31 +0100314 return -ENOMEM;
315
Will Deacon463e8622021-07-20 14:38:24 +0100316 mem->slots = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
317 get_order(array_size(sizeof(*mem->slots), nslabs)));
318 if (!mem->slots)
Christoph Hellwig2d299602021-03-18 17:14:23 +0100319 return -ENOMEM;
Konrad Rzeszutek Wilk74838b72012-07-27 20:55:27 -0400320
Christoph Hellwige7de6c72018-03-19 11:38:23 +0100321 set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
Claire Chang0a655792021-06-19 11:40:32 +0800322 swiotlb_init_io_tlb_mem(mem, virt_to_phys(tlb), nslabs, true);
Alex Williamson0b9afed2005-09-06 11:20:49 -0600323
FUJITA Tomonoriad32e8c2009-11-10 19:46:19 +0900324 swiotlb_print_info();
Claire Chang73f62092021-03-18 17:14:22 +0100325 swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT);
Alex Williamson0b9afed2005-09-06 11:20:49 -0600326 return 0;
Alex Williamson0b9afed2005-09-06 11:20:49 -0600327}
328
Christoph Hellwig7f2c8bb2017-12-23 14:14:54 +0100329void __init swiotlb_exit(void)
FUJITA Tomonori5740afd2009-11-10 19:46:18 +0900330{
Will Deacon463e8622021-07-20 14:38:24 +0100331 struct io_tlb_mem *mem = &io_tlb_default_mem;
Will Deaconad6c0022021-07-20 14:38:26 +0100332 unsigned long tbl_vaddr;
333 size_t tbl_size, slots_size;
Claire Chang73f62092021-03-18 17:14:22 +0100334
Will Deacon463e8622021-07-20 14:38:24 +0100335 if (!mem->nslabs)
FUJITA Tomonori5740afd2009-11-10 19:46:18 +0900336 return;
337
Will Deacon1efd3fc2021-07-20 14:38:25 +0100338 pr_info("tearing down default memory pool\n");
Will Deaconad6c0022021-07-20 14:38:26 +0100339 tbl_vaddr = (unsigned long)phys_to_virt(mem->start);
340 tbl_size = PAGE_ALIGN(mem->end - mem->start);
341 slots_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), mem->nslabs));
342
343 set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT);
344 if (mem->late_alloc) {
345 free_pages(tbl_vaddr, get_order(tbl_size));
346 free_pages((unsigned long)mem->slots, get_order(slots_size));
347 } else {
348 memblock_free_late(mem->start, tbl_size);
349 memblock_free_late(__pa(mem->slots), slots_size);
350 }
351
Will Deacon463e8622021-07-20 14:38:24 +0100352 memset(mem, 0, sizeof(*mem));
FUJITA Tomonori5740afd2009-11-10 19:46:18 +0900353}
354
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355/*
Bumyong Lee5f894682021-05-10 18:10:04 +0900356 * Return the offset into a iotlb slot required to keep the device happy.
357 */
358static unsigned int swiotlb_align_offset(struct device *dev, u64 addr)
359{
360 return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1);
361}
362
363/*
Dongli Zhang6442ca22019-01-18 15:10:26 +0800364 * Bounce: copy the swiotlb buffer from or back to the original dma location
Becky Brucefb05a372008-12-22 10:26:09 -0800365 */
Christoph Hellwig2bdba622021-03-01 08:44:25 +0100366static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size,
367 enum dma_data_direction dir)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368{
Claire Chang69031f52021-06-19 11:40:34 +0800369 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
Claire Chang73f62092021-03-18 17:14:22 +0100370 int index = (tlb_addr - mem->start) >> IO_TLB_SHIFT;
Christoph Hellwig2d299602021-03-18 17:14:23 +0100371 phys_addr_t orig_addr = mem->slots[index].orig_addr;
372 size_t alloc_size = mem->slots[index].alloc_size;
Alexander Duyckaf51a9f2012-10-15 10:19:55 -0700373 unsigned long pfn = PFN_DOWN(orig_addr);
374 unsigned char *vaddr = phys_to_virt(tlb_addr);
Dominique Martinet868c9dd2021-07-07 14:12:54 +0900375 unsigned int tlb_offset, orig_addr_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376
Christoph Hellwig2bdba622021-03-01 08:44:25 +0100377 if (orig_addr == INVALID_PHYS_ADDR)
378 return;
379
Dominique Martinet868c9dd2021-07-07 14:12:54 +0900380 tlb_offset = tlb_addr & (IO_TLB_SIZE - 1);
381 orig_addr_offset = swiotlb_align_offset(dev, orig_addr);
382 if (tlb_offset < orig_addr_offset) {
383 dev_WARN_ONCE(dev, 1,
384 "Access before mapping start detected. orig offset %u, requested offset %u.\n",
385 orig_addr_offset, tlb_offset);
386 return;
387 }
388
389 tlb_offset -= orig_addr_offset;
390 if (tlb_offset > alloc_size) {
391 dev_WARN_ONCE(dev, 1,
392 "Buffer overflow detected. Allocation size: %zu. Mapping size: %zu+%u.\n",
393 alloc_size, size, tlb_offset);
394 return;
395 }
Bumyong Lee5f894682021-05-10 18:10:04 +0900396
397 orig_addr += tlb_offset;
398 alloc_size -= tlb_offset;
399
Christoph Hellwig2bdba622021-03-01 08:44:25 +0100400 if (size > alloc_size) {
401 dev_WARN_ONCE(dev, 1,
402 "Buffer overflow detected. Allocation size: %zu. Mapping size: %zu.\n",
403 alloc_size, size);
404 size = alloc_size;
405 }
406
Becky Brucefb05a372008-12-22 10:26:09 -0800407 if (PageHighMem(pfn_to_page(pfn))) {
408 /* The buffer does not have a mapping. Map it in and copy */
Alexander Duyckaf51a9f2012-10-15 10:19:55 -0700409 unsigned int offset = orig_addr & ~PAGE_MASK;
Becky Brucefb05a372008-12-22 10:26:09 -0800410 char *buffer;
411 unsigned int sz = 0;
412 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413
Becky Brucefb05a372008-12-22 10:26:09 -0800414 while (size) {
Becky Bruce67131ad2009-04-08 09:09:16 -0500415 sz = min_t(size_t, PAGE_SIZE - offset, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416
Becky Brucefb05a372008-12-22 10:26:09 -0800417 local_irq_save(flags);
Cong Wangc3eede82011-11-25 23:14:39 +0800418 buffer = kmap_atomic(pfn_to_page(pfn));
Becky Brucefb05a372008-12-22 10:26:09 -0800419 if (dir == DMA_TO_DEVICE)
Alexander Duyckaf51a9f2012-10-15 10:19:55 -0700420 memcpy(vaddr, buffer + offset, sz);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421 else
Alexander Duyckaf51a9f2012-10-15 10:19:55 -0700422 memcpy(buffer + offset, vaddr, sz);
Cong Wangc3eede82011-11-25 23:14:39 +0800423 kunmap_atomic(buffer);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424 local_irq_restore(flags);
Becky Brucefb05a372008-12-22 10:26:09 -0800425
426 size -= sz;
427 pfn++;
Alexander Duyckaf51a9f2012-10-15 10:19:55 -0700428 vaddr += sz;
Becky Brucefb05a372008-12-22 10:26:09 -0800429 offset = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 }
Alexander Duyckaf51a9f2012-10-15 10:19:55 -0700431 } else if (dir == DMA_TO_DEVICE) {
432 memcpy(vaddr, phys_to_virt(orig_addr), size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 } else {
Alexander Duyckaf51a9f2012-10-15 10:19:55 -0700434 memcpy(phys_to_virt(orig_addr), vaddr, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 }
436}
437
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100438#define slot_addr(start, idx) ((start) + ((idx) << IO_TLB_SHIFT))
439
440/*
441 * Carefully handle integer overflow which can occur when boundary_mask == ~0UL.
442 */
443static inline unsigned long get_max_slots(unsigned long boundary_mask)
444{
445 if (boundary_mask == ~0UL)
446 return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
447 return nr_slots(boundary_mask + 1);
448}
449
Claire Chang73f62092021-03-18 17:14:22 +0100450static unsigned int wrap_index(struct io_tlb_mem *mem, unsigned int index)
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100451{
Claire Chang73f62092021-03-18 17:14:22 +0100452 if (index >= mem->nslabs)
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100453 return 0;
454 return index;
455}
456
457/*
458 * Find a suitable number of IO TLB entries size that will fit this request and
459 * allocate a buffer from that IO TLB pool.
460 */
Claire Chang36f7b2f2021-06-24 23:55:21 +0800461static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr,
David Stevense81e99b2021-09-29 11:32:59 +0900462 size_t alloc_size, unsigned int alloc_align_mask)
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100463{
Claire Chang69031f52021-06-19 11:40:34 +0800464 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100465 unsigned long boundary_mask = dma_get_seg_boundary(dev);
466 dma_addr_t tbl_dma_addr =
Claire Chang73f62092021-03-18 17:14:22 +0100467 phys_to_dma_unencrypted(dev, mem->start) & boundary_mask;
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100468 unsigned long max_slots = get_max_slots(boundary_mask);
Christoph Hellwig1f221a02021-02-22 14:39:44 -0500469 unsigned int iotlb_align_mask =
470 dma_get_min_align_mask(dev) & ~(IO_TLB_SIZE - 1);
471 unsigned int nslots = nr_slots(alloc_size), stride;
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100472 unsigned int index, wrap, count = 0, i;
Claire Chang36f7b2f2021-06-24 23:55:21 +0800473 unsigned int offset = swiotlb_align_offset(dev, orig_addr);
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100474 unsigned long flags;
475
476 BUG_ON(!nslots);
477
478 /*
Christoph Hellwig1f221a02021-02-22 14:39:44 -0500479 * For mappings with an alignment requirement don't bother looping to
480 * unaligned slots once we found an aligned one. For allocations of
481 * PAGE_SIZE or larger only look for page aligned allocations.
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100482 */
Christoph Hellwig1f221a02021-02-22 14:39:44 -0500483 stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1;
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100484 if (alloc_size >= PAGE_SIZE)
Christoph Hellwig1f221a02021-02-22 14:39:44 -0500485 stride = max(stride, stride << (PAGE_SHIFT - IO_TLB_SHIFT));
David Stevense81e99b2021-09-29 11:32:59 +0900486 stride = max(stride, (alloc_align_mask >> IO_TLB_SHIFT) + 1);
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100487
Claire Chang73f62092021-03-18 17:14:22 +0100488 spin_lock_irqsave(&mem->lock, flags);
489 if (unlikely(nslots > mem->nslabs - mem->used))
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100490 goto not_found;
491
Claire Chang73f62092021-03-18 17:14:22 +0100492 index = wrap = wrap_index(mem, ALIGN(mem->index, stride));
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100493 do {
Claire Changf4111e32021-06-19 11:40:40 +0800494 if (orig_addr &&
495 (slot_addr(tbl_dma_addr, index) & iotlb_align_mask) !=
496 (orig_addr & iotlb_align_mask)) {
Claire Chang73f62092021-03-18 17:14:22 +0100497 index = wrap_index(mem, index + 1);
Christoph Hellwig1f221a02021-02-22 14:39:44 -0500498 continue;
499 }
500
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100501 /*
502 * If we find a slot that indicates we have 'nslots' number of
503 * contiguous buffers, we allocate the buffers from that slot
504 * and mark the entries as '0' indicating unavailable.
505 */
506 if (!iommu_is_span_boundary(index, nslots,
507 nr_slots(tbl_dma_addr),
508 max_slots)) {
Christoph Hellwig2d299602021-03-18 17:14:23 +0100509 if (mem->slots[index].list >= nslots)
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100510 goto found;
511 }
Claire Chang73f62092021-03-18 17:14:22 +0100512 index = wrap_index(mem, index + stride);
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100513 } while (index != wrap);
514
515not_found:
Claire Chang73f62092021-03-18 17:14:22 +0100516 spin_unlock_irqrestore(&mem->lock, flags);
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100517 return -1;
518
519found:
Claire Chang36f7b2f2021-06-24 23:55:21 +0800520 for (i = index; i < index + nslots; i++) {
Christoph Hellwig2d299602021-03-18 17:14:23 +0100521 mem->slots[i].list = 0;
Claire Chang36f7b2f2021-06-24 23:55:21 +0800522 mem->slots[i].alloc_size =
523 alloc_size - (offset + ((i - index) << IO_TLB_SHIFT));
524 }
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100525 for (i = index - 1;
526 io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 &&
Christoph Hellwig2d299602021-03-18 17:14:23 +0100527 mem->slots[i].list; i--)
528 mem->slots[i].list = ++count;
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100529
530 /*
531 * Update the indices to avoid searching in the next round.
532 */
Claire Chang73f62092021-03-18 17:14:22 +0100533 if (index + nslots < mem->nslabs)
534 mem->index = index + nslots;
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100535 else
Claire Chang73f62092021-03-18 17:14:22 +0100536 mem->index = 0;
537 mem->used += nslots;
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100538
Claire Chang73f62092021-03-18 17:14:22 +0100539 spin_unlock_irqrestore(&mem->lock, flags);
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100540 return index;
541}
542
543phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
Christoph Hellwigfc0021a2020-10-23 08:33:09 +0200544 size_t mapping_size, size_t alloc_size,
David Stevense81e99b2021-09-29 11:32:59 +0900545 unsigned int alloc_align_mask, enum dma_data_direction dir,
546 unsigned long attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547{
Claire Chang69031f52021-06-19 11:40:34 +0800548 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
Christoph Hellwig1f221a02021-02-22 14:39:44 -0500549 unsigned int offset = swiotlb_align_offset(dev, orig_addr);
Claire Chang95b079d2021-04-22 16:14:53 +0800550 unsigned int i;
551 int index;
Alexander Duycke05ed4d2012-10-15 10:19:39 -0700552 phys_addr_t tlb_addr;
FUJITA Tomonori681cc5c2008-02-04 22:28:16 -0800553
Christoph Hellwig2d299602021-03-18 17:14:23 +0100554 if (!mem)
Yinghai Luac2cbab2013-01-24 12:20:16 -0800555 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
556
Tom Lendackye9d1d2b2021-09-08 17:58:39 -0500557 if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
Thiago Jung Bauermann47e5d8f2019-08-06 01:49:15 -0300558 pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
Tom Lendacky648babb2017-07-17 16:10:22 -0500559
Lu Baolu3fc1ca02019-09-06 14:14:48 +0800560 if (mapping_size > alloc_size) {
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100561 dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
Lu Baolu3fc1ca02019-09-06 14:14:48 +0800562 mapping_size, alloc_size);
563 return (phys_addr_t)DMA_MAPPING_ERROR;
564 }
565
David Stevense81e99b2021-09-29 11:32:59 +0900566 index = swiotlb_find_slots(dev, orig_addr,
567 alloc_size + offset, alloc_align_mask);
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100568 if (index == -1) {
569 if (!(attrs & DMA_ATTR_NO_WARN))
570 dev_warn_ratelimited(dev,
571 "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
Claire Chang73f62092021-03-18 17:14:22 +0100572 alloc_size, mem->nslabs, mem->used);
Christoph Hellwig26a7e092021-02-04 11:08:35 +0100573 return (phys_addr_t)DMA_MAPPING_ERROR;
574 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575
576 /*
577 * Save away the mapping from the original address to the DMA address.
578 * This is needed when we sync the memory. Then we sync the buffer if
579 * needed.
580 */
Claire Chang36f7b2f2021-06-24 23:55:21 +0800581 for (i = 0; i < nr_slots(alloc_size + offset); i++)
Christoph Hellwig2d299602021-03-18 17:14:23 +0100582 mem->slots[index + i].orig_addr = slot_addr(orig_addr, i);
Claire Chang73f62092021-03-18 17:14:22 +0100583 tlb_addr = slot_addr(mem->start, index) + offset;
Alexander Duyck0443fa02016-11-02 07:13:02 -0400584 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
585 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
Christoph Hellwig2bdba622021-03-01 08:44:25 +0100586 swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_TO_DEVICE);
Alexander Duycke05ed4d2012-10-15 10:19:39 -0700587 return tlb_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588}
589
Claire Chang70347872021-06-19 11:40:39 +0800590static void swiotlb_release_slots(struct device *dev, phys_addr_t tlb_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700591{
Claire Chang70347872021-06-19 11:40:39 +0800592 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 unsigned long flags;
Claire Chang70347872021-06-19 11:40:39 +0800594 unsigned int offset = swiotlb_align_offset(dev, tlb_addr);
Claire Chang73f62092021-03-18 17:14:22 +0100595 int index = (tlb_addr - offset - mem->start) >> IO_TLB_SHIFT;
Christoph Hellwig2d299602021-03-18 17:14:23 +0100596 int nslots = nr_slots(mem->slots[index].alloc_size + offset);
Christoph Hellwig2bdba622021-03-01 08:44:25 +0100597 int count, i;
Martin Radevdaf95142021-01-12 16:07:29 +0100598
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600 * Return the buffer to the free list by setting the corresponding
André Goddard Rosaaf901ca2009-11-14 13:09:05 -0200601 * entries to indicate the number of contiguous entries available.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 * While returning the entries to the free list, we merge the entries
603 * with slots below and above the pool being returned.
604 */
Claire Chang73f62092021-03-18 17:14:22 +0100605 spin_lock_irqsave(&mem->lock, flags);
Christoph Hellwigca10d0f2021-02-04 10:13:40 +0100606 if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE))
Christoph Hellwig2d299602021-03-18 17:14:23 +0100607 count = mem->slots[index + nslots].list;
Christoph Hellwigca10d0f2021-02-04 10:13:40 +0100608 else
609 count = 0;
Dongli Zhang71602fe2019-01-18 15:10:27 +0800610
Christoph Hellwigca10d0f2021-02-04 10:13:40 +0100611 /*
612 * Step 1: return the slots to the free list, merging the slots with
613 * superceeding slots
614 */
615 for (i = index + nslots - 1; i >= index; i--) {
Christoph Hellwig2d299602021-03-18 17:14:23 +0100616 mem->slots[i].list = ++count;
617 mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
618 mem->slots[i].alloc_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 }
Christoph Hellwigca10d0f2021-02-04 10:13:40 +0100620
621 /*
622 * Step 2: merge the returned slots with the preceding slots, if
623 * available (non zero)
624 */
625 for (i = index - 1;
Christoph Hellwig2d299602021-03-18 17:14:23 +0100626 io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && mem->slots[i].list;
Christoph Hellwigca10d0f2021-02-04 10:13:40 +0100627 i--)
Christoph Hellwig2d299602021-03-18 17:14:23 +0100628 mem->slots[i].list = ++count;
Claire Chang73f62092021-03-18 17:14:22 +0100629 mem->used -= nslots;
630 spin_unlock_irqrestore(&mem->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631}
632
Claire Chang70347872021-06-19 11:40:39 +0800633/*
634 * tlb_addr is the physical address of the bounce buffer to unmap.
635 */
636void swiotlb_tbl_unmap_single(struct device *dev, phys_addr_t tlb_addr,
637 size_t mapping_size, enum dma_data_direction dir,
638 unsigned long attrs)
639{
640 /*
641 * First, sync the memory before unmapping the entry
642 */
643 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
644 (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
645 swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_FROM_DEVICE);
646
647 swiotlb_release_slots(dev, tlb_addr);
648}
649
Christoph Hellwig80808d22021-03-01 08:44:26 +0100650void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr,
651 size_t size, enum dma_data_direction dir)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652{
Christoph Hellwig80808d22021-03-01 08:44:26 +0100653 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
654 swiotlb_bounce(dev, tlb_addr, size, DMA_TO_DEVICE);
655 else
656 BUG_ON(dir != DMA_FROM_DEVICE);
657}
658
659void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr,
660 size_t size, enum dma_data_direction dir)
661{
662 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
663 swiotlb_bounce(dev, tlb_addr, size, DMA_FROM_DEVICE);
664 else
665 BUG_ON(dir != DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700666}
667
Christoph Hellwig55897af2018-12-03 11:43:54 +0100668/*
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100669 * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
Christoph Hellwig55897af2018-12-03 11:43:54 +0100670 * to the device copy the data into it as well.
671 */
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100672dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
673 enum dma_data_direction dir, unsigned long attrs)
Christoph Hellwigc4dae362018-08-20 16:21:10 +0200674{
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100675 phys_addr_t swiotlb_addr;
676 dma_addr_t dma_addr;
Christoph Hellwigc4dae362018-08-20 16:21:10 +0200677
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100678 trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size,
679 swiotlb_force);
Christoph Hellwigc4dae362018-08-20 16:21:10 +0200680
David Stevense81e99b2021-09-29 11:32:59 +0900681 swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, 0, dir,
Christoph Hellwigfc0021a2020-10-23 08:33:09 +0200682 attrs);
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100683 if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
684 return DMA_MAPPING_ERROR;
Christoph Hellwigc4dae362018-08-20 16:21:10 +0200685
686 /* Ensure that the address returned is DMA'ble */
Christoph Hellwig5ceda742020-08-17 17:34:03 +0200687 dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100688 if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
Christoph Hellwig29730732021-03-01 08:44:24 +0100689 swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir,
Christoph Hellwigc4dae362018-08-20 16:21:10 +0200690 attrs | DMA_ATTR_SKIP_CPU_SYNC);
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100691 dev_WARN_ONCE(dev, 1,
692 "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
693 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
694 return DMA_MAPPING_ERROR;
Christoph Hellwigc4dae362018-08-20 16:21:10 +0200695 }
696
Christoph Hellwig4a47cba2020-02-03 14:44:38 +0100697 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
698 arch_sync_dma_for_device(swiotlb_addr, size, dir);
699 return dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700}
701
Joerg Roedelabe420b2019-02-07 12:59:13 +0100702size_t swiotlb_max_mapping_size(struct device *dev)
703{
Christoph Hellwigb5d7ccb2021-02-05 11:18:40 +0100704 return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE;
Joerg Roedelabe420b2019-02-07 12:59:13 +0100705}
Joerg Roedel492366f2019-02-07 12:59:14 +0100706
Claire Chang6f2beb22021-06-19 11:40:36 +0800707bool is_swiotlb_active(struct device *dev)
Joerg Roedel492366f2019-02-07 12:59:14 +0100708{
Will Deacon463e8622021-07-20 14:38:24 +0100709 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
710
711 return mem && mem->nslabs;
Joerg Roedel492366f2019-02-07 12:59:14 +0100712}
Christoph Hellwig2cbc2772021-03-18 17:14:24 +0100713EXPORT_SYMBOL_GPL(is_swiotlb_active);
Linus Torvalds45ba8d52019-03-10 12:47:57 -0700714
Dongli Zhang71602fe2019-01-18 15:10:27 +0800715#ifdef CONFIG_DEBUG_FS
Claire Chang6e675a12021-06-19 11:40:33 +0800716static struct dentry *debugfs_dir;
Dongli Zhang71602fe2019-01-18 15:10:27 +0800717
Claire Chang6e675a12021-06-19 11:40:33 +0800718static void swiotlb_create_debugfs_files(struct io_tlb_mem *mem)
719{
720 debugfs_create_ulong("io_tlb_nslabs", 0400, mem->debugfs, &mem->nslabs);
721 debugfs_create_ulong("io_tlb_used", 0400, mem->debugfs, &mem->used);
722}
723
724static int __init swiotlb_create_default_debugfs(void)
Dongli Zhang71602fe2019-01-18 15:10:27 +0800725{
Will Deacon463e8622021-07-20 14:38:24 +0100726 struct io_tlb_mem *mem = &io_tlb_default_mem;
Dongli Zhang71602fe2019-01-18 15:10:27 +0800727
Claire Chang6e675a12021-06-19 11:40:33 +0800728 debugfs_dir = debugfs_create_dir("swiotlb", NULL);
Will Deacon463e8622021-07-20 14:38:24 +0100729 if (mem->nslabs) {
Claire Chang6e675a12021-06-19 11:40:33 +0800730 mem->debugfs = debugfs_dir;
731 swiotlb_create_debugfs_files(mem);
732 }
Dongli Zhang71602fe2019-01-18 15:10:27 +0800733 return 0;
Dongli Zhang71602fe2019-01-18 15:10:27 +0800734}
735
Claire Chang6e675a12021-06-19 11:40:33 +0800736late_initcall(swiotlb_create_default_debugfs);
Dongli Zhang71602fe2019-01-18 15:10:27 +0800737
738#endif
Claire Changf4111e32021-06-19 11:40:40 +0800739
740#ifdef CONFIG_DMA_RESTRICTED_POOL
Claire Chang09a4a792021-07-01 11:31:30 +0800741
742#ifdef CONFIG_DEBUG_FS
743static void rmem_swiotlb_debugfs_init(struct reserved_mem *rmem)
744{
745 struct io_tlb_mem *mem = rmem->priv;
746
747 mem->debugfs = debugfs_create_dir(rmem->name, debugfs_dir);
748 swiotlb_create_debugfs_files(mem);
749}
750#else
751static void rmem_swiotlb_debugfs_init(struct reserved_mem *rmem)
752{
753}
754#endif
755
Claire Changf4111e32021-06-19 11:40:40 +0800756struct page *swiotlb_alloc(struct device *dev, size_t size)
757{
758 struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
759 phys_addr_t tlb_addr;
760 int index;
761
762 if (!mem)
763 return NULL;
764
David Stevense81e99b2021-09-29 11:32:59 +0900765 index = swiotlb_find_slots(dev, 0, size, 0);
Claire Changf4111e32021-06-19 11:40:40 +0800766 if (index == -1)
767 return NULL;
768
769 tlb_addr = slot_addr(mem->start, index);
770
771 return pfn_to_page(PFN_DOWN(tlb_addr));
772}
773
774bool swiotlb_free(struct device *dev, struct page *page, size_t size)
775{
776 phys_addr_t tlb_addr = page_to_phys(page);
777
778 if (!is_swiotlb_buffer(dev, tlb_addr))
779 return false;
780
781 swiotlb_release_slots(dev, tlb_addr);
782
783 return true;
784}
785
Claire Chang0b84e4f2021-06-19 11:40:41 +0800786static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
787 struct device *dev)
788{
789 struct io_tlb_mem *mem = rmem->priv;
790 unsigned long nslabs = rmem->size >> IO_TLB_SHIFT;
791
792 /*
793 * Since multiple devices can share the same pool, the private data,
794 * io_tlb_mem struct, will be initialized by the first device attached
795 * to it.
796 */
797 if (!mem) {
Will Deacon463e8622021-07-20 14:38:24 +0100798 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
Claire Chang0b84e4f2021-06-19 11:40:41 +0800799 if (!mem)
800 return -ENOMEM;
801
Will Deacon463e8622021-07-20 14:38:24 +0100802 mem->slots = kzalloc(array_size(sizeof(*mem->slots), nslabs),
803 GFP_KERNEL);
804 if (!mem->slots) {
805 kfree(mem);
806 return -ENOMEM;
807 }
808
Claire Chang0b84e4f2021-06-19 11:40:41 +0800809 set_memory_decrypted((unsigned long)phys_to_virt(rmem->base),
810 rmem->size >> PAGE_SHIFT);
811 swiotlb_init_io_tlb_mem(mem, rmem->base, nslabs, false);
812 mem->force_bounce = true;
813 mem->for_alloc = true;
814
815 rmem->priv = mem;
816
Claire Chang09a4a792021-07-01 11:31:30 +0800817 rmem_swiotlb_debugfs_init(rmem);
Claire Chang0b84e4f2021-06-19 11:40:41 +0800818 }
819
820 dev->dma_io_tlb_mem = mem;
821
822 return 0;
823}
824
825static void rmem_swiotlb_device_release(struct reserved_mem *rmem,
826 struct device *dev)
827{
Will Deacon463e8622021-07-20 14:38:24 +0100828 dev->dma_io_tlb_mem = &io_tlb_default_mem;
Claire Chang0b84e4f2021-06-19 11:40:41 +0800829}
830
831static const struct reserved_mem_ops rmem_swiotlb_ops = {
832 .device_init = rmem_swiotlb_device_init,
833 .device_release = rmem_swiotlb_device_release,
834};
835
836static int __init rmem_swiotlb_setup(struct reserved_mem *rmem)
837{
838 unsigned long node = rmem->fdt_node;
839
840 if (of_get_flat_dt_prop(node, "reusable", NULL) ||
841 of_get_flat_dt_prop(node, "linux,cma-default", NULL) ||
842 of_get_flat_dt_prop(node, "linux,dma-default", NULL) ||
843 of_get_flat_dt_prop(node, "no-map", NULL))
844 return -EINVAL;
845
846 if (PageHighMem(pfn_to_page(PHYS_PFN(rmem->base)))) {
847 pr_err("Restricted DMA pool must be accessible within the linear mapping.");
848 return -EINVAL;
849 }
850
851 rmem->ops = &rmem_swiotlb_ops;
852 pr_info("Reserved memory: created restricted DMA pool at %pa, size %ld MiB\n",
853 &rmem->base, (unsigned long)rmem->size / SZ_1M);
854 return 0;
855}
856
857RESERVEDMEM_OF_DECLARE(dma, "restricted-dma-pool", rmem_swiotlb_setup);
Claire Changf4111e32021-06-19 11:40:40 +0800858#endif /* CONFIG_DMA_RESTRICTED_POOL */