Thomas Gleixner | 457c899 | 2019-05-19 13:08:55 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Dynamic DMA mapping support. |
| 4 | * |
Jan Beulich | 563aaf0 | 2007-02-05 18:51:25 -0800 | [diff] [blame] | 5 | * This implementation is a fallback for platforms that do not support |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * I/O TLBs (aka DMA address translation hardware). |
| 7 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> |
| 8 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> |
| 9 | * Copyright (C) 2000, 2003 Hewlett-Packard Co |
| 10 | * David Mosberger-Tang <davidm@hpl.hp.com> |
| 11 | * |
| 12 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. |
| 13 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid |
| 14 | * unnecessary i-cache flushing. |
John W. Linville | 569c8bf | 2005-09-29 14:45:24 -0700 | [diff] [blame] | 15 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
| 16 | * 05/09/10 linville Add support for syncing ranges, support syncing for |
| 17 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 18 | * 08/12/11 beckyb Add highmem support |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | */ |
| 20 | |
Kees Cook | 7d63fb3 | 2018-07-10 16:22:22 -0700 | [diff] [blame] | 21 | #define pr_fmt(fmt) "software IO TLB: " fmt |
| 22 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #include <linux/cache.h> |
Christoph Hellwig | ea8c64a | 2018-01-10 16:21:13 +0100 | [diff] [blame] | 24 | #include <linux/dma-direct.h> |
Christoph Hellwig | 9f4df96 | 2020-09-22 15:36:11 +0200 | [diff] [blame] | 25 | #include <linux/dma-map-ops.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <linux/mm.h> |
Paul Gortmaker | 8bc3bcc | 2011-11-16 21:29:17 -0500 | [diff] [blame] | 27 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <linux/spinlock.h> |
| 29 | #include <linux/string.h> |
Ian Campbell | 0016fde | 2008-12-16 12:17:27 -0800 | [diff] [blame] | 30 | #include <linux/swiotlb.h> |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 31 | #include <linux/pfn.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #include <linux/types.h> |
| 33 | #include <linux/ctype.h> |
Jeremy Fitzhardinge | ef9b189 | 2008-12-16 12:17:33 -0800 | [diff] [blame] | 34 | #include <linux/highmem.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 35 | #include <linux/gfp.h> |
Christoph Hellwig | 84be456 | 2015-05-01 12:46:15 +0200 | [diff] [blame] | 36 | #include <linux/scatterlist.h> |
Tom Lendacky | c775320 | 2017-07-17 16:10:21 -0500 | [diff] [blame] | 37 | #include <linux/mem_encrypt.h> |
Christoph Hellwig | e7de6c7 | 2018-03-19 11:38:23 +0100 | [diff] [blame] | 38 | #include <linux/set_memory.h> |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 39 | #ifdef CONFIG_DEBUG_FS |
| 40 | #include <linux/debugfs.h> |
| 41 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | |
| 43 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #include <asm/dma.h> |
| 45 | |
| 46 | #include <linux/init.h> |
Mike Rapoport | 57c8a66 | 2018-10-30 15:09:49 -0700 | [diff] [blame] | 47 | #include <linux/memblock.h> |
FUJITA Tomonori | a852250 | 2008-04-29 00:59:36 -0700 | [diff] [blame] | 48 | #include <linux/iommu-helper.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
Thierry Reding | ce5be5a | 2013-10-23 13:32:04 +0200 | [diff] [blame] | 50 | #define CREATE_TRACE_POINTS |
Zoltan Kiss | 2b2b614 | 2013-09-04 21:11:05 +0100 | [diff] [blame] | 51 | #include <trace/events/swiotlb.h> |
| 52 | |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 53 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
| 54 | |
| 55 | /* |
| 56 | * Minimum IO TLB size to bother booting with. Systems with mainly |
| 57 | * 64bit capable cards will only lightly use the swiotlb. If we can't |
| 58 | * allocate a contiguous 1MB, we're probably in trouble anyway. |
| 59 | */ |
| 60 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) |
| 61 | |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 62 | #define INVALID_PHYS_ADDR (~(phys_addr_t)0) |
| 63 | |
Geert Uytterhoeven | ae7871b | 2016-12-16 14:28:41 +0100 | [diff] [blame] | 64 | enum swiotlb_force swiotlb_force; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 66 | struct io_tlb_mem *io_tlb_default_mem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | |
| 68 | /* |
Konrad Rzeszutek Wilk | 7453c54 | 2016-12-20 10:02:02 -0500 | [diff] [blame] | 69 | * Max segment that we can provide which (if pages are contingous) will |
| 70 | * not be bounced (unless SWIOTLB_FORCE is set). |
| 71 | */ |
Andy Shevchenko | b51e627 | 2020-09-02 20:31:05 +0300 | [diff] [blame] | 72 | static unsigned int max_segment; |
Konrad Rzeszutek Wilk | 7453c54 | 2016-12-20 10:02:02 -0500 | [diff] [blame] | 73 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 74 | static unsigned long default_nslabs = IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT; |
| 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | static int __init |
| 77 | setup_io_tlb_npages(char *str) |
| 78 | { |
| 79 | if (isdigit(*str)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 81 | default_nslabs = |
| 82 | ALIGN(simple_strtoul(str, &str, 0), IO_TLB_SEGSIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | } |
| 84 | if (*str == ',') |
| 85 | ++str; |
Florian Fainelli | 2726bf3 | 2021-03-22 18:53:49 -0700 | [diff] [blame] | 86 | if (!strcmp(str, "force")) |
Geert Uytterhoeven | ae7871b | 2016-12-16 14:28:41 +0100 | [diff] [blame] | 87 | swiotlb_force = SWIOTLB_FORCE; |
Florian Fainelli | 2726bf3 | 2021-03-22 18:53:49 -0700 | [diff] [blame] | 88 | else if (!strcmp(str, "noforce")) |
Geert Uytterhoeven | fff5d99 | 2016-12-16 14:28:42 +0100 | [diff] [blame] | 89 | swiotlb_force = SWIOTLB_NO_FORCE; |
FUJITA Tomonori | b18485e | 2009-11-12 00:03:28 +0900 | [diff] [blame] | 90 | |
Yinghai Lu | c729de8 | 2013-04-15 22:23:45 -0700 | [diff] [blame] | 91 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | } |
Yinghai Lu | c729de8 | 2013-04-15 22:23:45 -0700 | [diff] [blame] | 93 | early_param("swiotlb", setup_io_tlb_npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
Konrad Rzeszutek Wilk | 7453c54 | 2016-12-20 10:02:02 -0500 | [diff] [blame] | 95 | unsigned int swiotlb_max_segment(void) |
| 96 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 97 | return io_tlb_default_mem ? max_segment : 0; |
Konrad Rzeszutek Wilk | 7453c54 | 2016-12-20 10:02:02 -0500 | [diff] [blame] | 98 | } |
| 99 | EXPORT_SYMBOL_GPL(swiotlb_max_segment); |
| 100 | |
| 101 | void swiotlb_set_max_segment(unsigned int val) |
| 102 | { |
| 103 | if (swiotlb_force == SWIOTLB_FORCE) |
| 104 | max_segment = 1; |
| 105 | else |
| 106 | max_segment = rounddown(val, PAGE_SIZE); |
| 107 | } |
| 108 | |
Yinghai Lu | c729de8 | 2013-04-15 22:23:45 -0700 | [diff] [blame] | 109 | unsigned long swiotlb_size_or_default(void) |
| 110 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 111 | return default_nslabs << IO_TLB_SHIFT; |
Yinghai Lu | c729de8 | 2013-04-15 22:23:45 -0700 | [diff] [blame] | 112 | } |
| 113 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 114 | void __init swiotlb_adjust_size(unsigned long size) |
Ashish Kalra | e998879 | 2020-12-10 01:25:15 +0000 | [diff] [blame] | 115 | { |
Ashish Kalra | e998879 | 2020-12-10 01:25:15 +0000 | [diff] [blame] | 116 | /* |
| 117 | * If swiotlb parameter has not been specified, give a chance to |
| 118 | * architectures such as those supporting memory encryption to |
| 119 | * adjust/expand SWIOTLB size for their use. |
| 120 | */ |
Christoph Hellwig | dfc06b3 | 2021-04-29 08:28:59 +0200 | [diff] [blame] | 121 | if (default_nslabs != IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT) |
| 122 | return; |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 123 | size = ALIGN(size, IO_TLB_SIZE); |
| 124 | default_nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE); |
| 125 | pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20); |
Ashish Kalra | e998879 | 2020-12-10 01:25:15 +0000 | [diff] [blame] | 126 | } |
| 127 | |
FUJITA Tomonori | ad32e8c | 2009-11-10 19:46:19 +0900 | [diff] [blame] | 128 | void swiotlb_print_info(void) |
Ian Campbell | 2e5b2b8 | 2008-12-16 12:17:34 -0800 | [diff] [blame] | 129 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 130 | struct io_tlb_mem *mem = io_tlb_default_mem; |
Ian Campbell | 2e5b2b8 | 2008-12-16 12:17:34 -0800 | [diff] [blame] | 131 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 132 | if (!mem) { |
Kees Cook | 7d63fb3 | 2018-07-10 16:22:22 -0700 | [diff] [blame] | 133 | pr_warn("No low mem\n"); |
Yinghai Lu | ac2cbab | 2013-01-24 12:20:16 -0800 | [diff] [blame] | 134 | return; |
| 135 | } |
| 136 | |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 137 | pr_info("mapped [mem %pa-%pa] (%luMB)\n", &mem->start, &mem->end, |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 138 | (mem->nslabs << IO_TLB_SHIFT) >> 20); |
Ian Campbell | 2e5b2b8 | 2008-12-16 12:17:34 -0800 | [diff] [blame] | 139 | } |
| 140 | |
Christoph Hellwig | c7fbeca | 2021-02-04 10:11:20 +0100 | [diff] [blame] | 141 | static inline unsigned long io_tlb_offset(unsigned long val) |
| 142 | { |
| 143 | return val & (IO_TLB_SEGSIZE - 1); |
| 144 | } |
| 145 | |
Christoph Hellwig | c32a77fd | 2021-02-05 11:19:34 +0100 | [diff] [blame] | 146 | static inline unsigned long nr_slots(u64 val) |
| 147 | { |
| 148 | return DIV_ROUND_UP(val, IO_TLB_SIZE); |
| 149 | } |
| 150 | |
Tom Lendacky | c775320 | 2017-07-17 16:10:21 -0500 | [diff] [blame] | 151 | /* |
| 152 | * Early SWIOTLB allocation may be too early to allow an architecture to |
| 153 | * perform the desired operations. This function allows the architecture to |
| 154 | * call SWIOTLB when the operations are possible. It needs to be called |
| 155 | * before the SWIOTLB memory is used. |
| 156 | */ |
| 157 | void __init swiotlb_update_mem_attributes(void) |
| 158 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 159 | struct io_tlb_mem *mem = io_tlb_default_mem; |
Tom Lendacky | c775320 | 2017-07-17 16:10:21 -0500 | [diff] [blame] | 160 | void *vaddr; |
| 161 | unsigned long bytes; |
| 162 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 163 | if (!mem || mem->late_alloc) |
Tom Lendacky | c775320 | 2017-07-17 16:10:21 -0500 | [diff] [blame] | 164 | return; |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 165 | vaddr = phys_to_virt(mem->start); |
| 166 | bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT); |
Christoph Hellwig | e7de6c7 | 2018-03-19 11:38:23 +0100 | [diff] [blame] | 167 | set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT); |
Tom Lendacky | c775320 | 2017-07-17 16:10:21 -0500 | [diff] [blame] | 168 | memset(vaddr, 0, bytes); |
Tom Lendacky | c775320 | 2017-07-17 16:10:21 -0500 | [diff] [blame] | 169 | } |
| 170 | |
Claire Chang | 0a65579 | 2021-06-19 11:40:32 +0800 | [diff] [blame] | 171 | static void swiotlb_init_io_tlb_mem(struct io_tlb_mem *mem, phys_addr_t start, |
| 172 | unsigned long nslabs, bool late_alloc) |
| 173 | { |
| 174 | void *vaddr = phys_to_virt(start); |
| 175 | unsigned long bytes = nslabs << IO_TLB_SHIFT, i; |
| 176 | |
| 177 | mem->nslabs = nslabs; |
| 178 | mem->start = start; |
| 179 | mem->end = mem->start + bytes; |
| 180 | mem->index = 0; |
| 181 | mem->late_alloc = late_alloc; |
Claire Chang | 903cd0f | 2021-06-24 23:55:20 +0800 | [diff] [blame] | 182 | |
| 183 | if (swiotlb_force == SWIOTLB_FORCE) |
| 184 | mem->force_bounce = true; |
| 185 | |
Claire Chang | 0a65579 | 2021-06-19 11:40:32 +0800 | [diff] [blame] | 186 | spin_lock_init(&mem->lock); |
| 187 | for (i = 0; i < mem->nslabs; i++) { |
| 188 | mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i); |
| 189 | mem->slots[i].orig_addr = INVALID_PHYS_ADDR; |
| 190 | mem->slots[i].alloc_size = 0; |
| 191 | } |
| 192 | memset(vaddr, 0, bytes); |
| 193 | } |
| 194 | |
Yinghai Lu | ac2cbab | 2013-01-24 12:20:16 -0800 | [diff] [blame] | 195 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 197 | struct io_tlb_mem *mem; |
Mike Rapoport | a0bf842 | 2019-03-11 23:30:26 -0700 | [diff] [blame] | 198 | size_t alloc_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | |
Florian Fainelli | 2726bf3 | 2021-03-22 18:53:49 -0700 | [diff] [blame] | 200 | if (swiotlb_force == SWIOTLB_NO_FORCE) |
| 201 | return 0; |
| 202 | |
Christoph Hellwig | 5d0538b | 2021-03-01 08:44:31 +0100 | [diff] [blame] | 203 | /* protect against double initialization */ |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 204 | if (WARN_ON_ONCE(io_tlb_default_mem)) |
Christoph Hellwig | 5d0538b | 2021-03-01 08:44:31 +0100 | [diff] [blame] | 205 | return -ENOMEM; |
| 206 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 207 | alloc_size = PAGE_ALIGN(struct_size(mem, slots, nslabs)); |
| 208 | mem = memblock_alloc(alloc_size, PAGE_SIZE); |
| 209 | if (!mem) |
| 210 | panic("%s: Failed to allocate %zu bytes align=0x%lx\n", |
| 211 | __func__, alloc_size, PAGE_SIZE); |
Claire Chang | 0a65579 | 2021-06-19 11:40:32 +0800 | [diff] [blame] | 212 | |
| 213 | swiotlb_init_io_tlb_mem(mem, __pa(tlb), nslabs, false); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 215 | io_tlb_default_mem = mem; |
FUJITA Tomonori | ad32e8c | 2009-11-10 19:46:19 +0900 | [diff] [blame] | 216 | if (verbose) |
| 217 | swiotlb_print_info(); |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 218 | swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT); |
Yinghai Lu | ac2cbab | 2013-01-24 12:20:16 -0800 | [diff] [blame] | 219 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | } |
| 221 | |
FUJITA Tomonori | abbceff | 2010-05-10 15:15:12 -0400 | [diff] [blame] | 222 | /* |
| 223 | * Statically reserve bounce buffer space and initialize bounce buffer data |
| 224 | * structures for the software IO TLB used to implement the DMA API. |
| 225 | */ |
Yinghai Lu | ac2cbab | 2013-01-24 12:20:16 -0800 | [diff] [blame] | 226 | void __init |
| 227 | swiotlb_init(int verbose) |
FUJITA Tomonori | abbceff | 2010-05-10 15:15:12 -0400 | [diff] [blame] | 228 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 229 | size_t bytes = PAGE_ALIGN(default_nslabs << IO_TLB_SHIFT); |
| 230 | void *tlb; |
FUJITA Tomonori | abbceff | 2010-05-10 15:15:12 -0400 | [diff] [blame] | 231 | |
Florian Fainelli | 2726bf3 | 2021-03-22 18:53:49 -0700 | [diff] [blame] | 232 | if (swiotlb_force == SWIOTLB_NO_FORCE) |
| 233 | return; |
| 234 | |
Yinghai Lu | ac2cbab | 2013-01-24 12:20:16 -0800 | [diff] [blame] | 235 | /* Get IO TLB memory from the low pages */ |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 236 | tlb = memblock_alloc_low(bytes, PAGE_SIZE); |
| 237 | if (!tlb) |
| 238 | goto fail; |
| 239 | if (swiotlb_init_with_tbl(tlb, default_nslabs, verbose)) |
| 240 | goto fail_free_mem; |
| 241 | return; |
FUJITA Tomonori | abbceff | 2010-05-10 15:15:12 -0400 | [diff] [blame] | 242 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 243 | fail_free_mem: |
| 244 | memblock_free_early(__pa(tlb), bytes); |
| 245 | fail: |
Kees Cook | 7d63fb3 | 2018-07-10 16:22:22 -0700 | [diff] [blame] | 246 | pr_warn("Cannot allocate buffer"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 247 | } |
| 248 | |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 249 | /* |
| 250 | * Systems with larger DMA zones (those that don't support ISA) can |
| 251 | * initialize the swiotlb later using the slab allocator if needed. |
| 252 | * This should be just like above, but with some error catching. |
| 253 | */ |
| 254 | int |
Jan Beulich | 563aaf0 | 2007-02-05 18:51:25 -0800 | [diff] [blame] | 255 | swiotlb_late_init_with_default_size(size_t default_size) |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 256 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 257 | unsigned long nslabs = |
| 258 | ALIGN(default_size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE); |
| 259 | unsigned long bytes; |
Alexander Duyck | ff7204a | 2012-10-15 10:19:28 -0700 | [diff] [blame] | 260 | unsigned char *vstart = NULL; |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 261 | unsigned int order; |
Konrad Rzeszutek Wilk | 74838b7 | 2012-07-27 20:55:27 -0400 | [diff] [blame] | 262 | int rc = 0; |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 263 | |
Florian Fainelli | 2726bf3 | 2021-03-22 18:53:49 -0700 | [diff] [blame] | 264 | if (swiotlb_force == SWIOTLB_NO_FORCE) |
| 265 | return 0; |
| 266 | |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 267 | /* |
| 268 | * Get IO TLB memory from the low pages |
| 269 | */ |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 270 | order = get_order(nslabs << IO_TLB_SHIFT); |
| 271 | nslabs = SLABS_PER_PAGE << order; |
| 272 | bytes = nslabs << IO_TLB_SHIFT; |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 273 | |
| 274 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { |
Alexander Duyck | ff7204a | 2012-10-15 10:19:28 -0700 | [diff] [blame] | 275 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
| 276 | order); |
| 277 | if (vstart) |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 278 | break; |
| 279 | order--; |
| 280 | } |
| 281 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 282 | if (!vstart) |
Konrad Rzeszutek Wilk | 74838b7 | 2012-07-27 20:55:27 -0400 | [diff] [blame] | 283 | return -ENOMEM; |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 284 | |
Jan Beulich | 563aaf0 | 2007-02-05 18:51:25 -0800 | [diff] [blame] | 285 | if (order != get_order(bytes)) { |
Kees Cook | 7d63fb3 | 2018-07-10 16:22:22 -0700 | [diff] [blame] | 286 | pr_warn("only able to allocate %ld MB\n", |
| 287 | (PAGE_SIZE << order) >> 20); |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 288 | nslabs = SLABS_PER_PAGE << order; |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 289 | } |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 290 | rc = swiotlb_late_init_with_tbl(vstart, nslabs); |
Konrad Rzeszutek Wilk | 74838b7 | 2012-07-27 20:55:27 -0400 | [diff] [blame] | 291 | if (rc) |
Alexander Duyck | ff7204a | 2012-10-15 10:19:28 -0700 | [diff] [blame] | 292 | free_pages((unsigned long)vstart, order); |
Konrad Rzeszutek Wilk | 7453c54 | 2016-12-20 10:02:02 -0500 | [diff] [blame] | 293 | |
Konrad Rzeszutek Wilk | 74838b7 | 2012-07-27 20:55:27 -0400 | [diff] [blame] | 294 | return rc; |
| 295 | } |
| 296 | |
| 297 | int |
| 298 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) |
| 299 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 300 | struct io_tlb_mem *mem; |
Claire Chang | 0a65579 | 2021-06-19 11:40:32 +0800 | [diff] [blame] | 301 | unsigned long bytes = nslabs << IO_TLB_SHIFT; |
Konrad Rzeszutek Wilk | 74838b7 | 2012-07-27 20:55:27 -0400 | [diff] [blame] | 302 | |
Florian Fainelli | 2726bf3 | 2021-03-22 18:53:49 -0700 | [diff] [blame] | 303 | if (swiotlb_force == SWIOTLB_NO_FORCE) |
| 304 | return 0; |
| 305 | |
Christoph Hellwig | 5d0538b | 2021-03-01 08:44:31 +0100 | [diff] [blame] | 306 | /* protect against double initialization */ |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 307 | if (WARN_ON_ONCE(io_tlb_default_mem)) |
Christoph Hellwig | 5d0538b | 2021-03-01 08:44:31 +0100 | [diff] [blame] | 308 | return -ENOMEM; |
| 309 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 310 | mem = (void *)__get_free_pages(GFP_KERNEL, |
| 311 | get_order(struct_size(mem, slots, nslabs))); |
| 312 | if (!mem) |
| 313 | return -ENOMEM; |
Konrad Rzeszutek Wilk | 74838b7 | 2012-07-27 20:55:27 -0400 | [diff] [blame] | 314 | |
Claire Chang | 0a65579 | 2021-06-19 11:40:32 +0800 | [diff] [blame] | 315 | memset(mem, 0, sizeof(*mem)); |
Christoph Hellwig | e7de6c7 | 2018-03-19 11:38:23 +0100 | [diff] [blame] | 316 | set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT); |
Claire Chang | 0a65579 | 2021-06-19 11:40:32 +0800 | [diff] [blame] | 317 | swiotlb_init_io_tlb_mem(mem, virt_to_phys(tlb), nslabs, true); |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 318 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 319 | io_tlb_default_mem = mem; |
FUJITA Tomonori | ad32e8c | 2009-11-10 19:46:19 +0900 | [diff] [blame] | 320 | swiotlb_print_info(); |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 321 | swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT); |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 322 | return 0; |
Alex Williamson | 0b9afed | 2005-09-06 11:20:49 -0600 | [diff] [blame] | 323 | } |
| 324 | |
Christoph Hellwig | 7f2c8bb | 2017-12-23 14:14:54 +0100 | [diff] [blame] | 325 | void __init swiotlb_exit(void) |
FUJITA Tomonori | 5740afd | 2009-11-10 19:46:18 +0900 | [diff] [blame] | 326 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 327 | struct io_tlb_mem *mem = io_tlb_default_mem; |
| 328 | size_t size; |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 329 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 330 | if (!mem) |
FUJITA Tomonori | 5740afd | 2009-11-10 19:46:18 +0900 | [diff] [blame] | 331 | return; |
| 332 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 333 | size = struct_size(mem, slots, mem->nslabs); |
| 334 | if (mem->late_alloc) |
| 335 | free_pages((unsigned long)mem, get_order(size)); |
| 336 | else |
| 337 | memblock_free_late(__pa(mem), PAGE_ALIGN(size)); |
| 338 | io_tlb_default_mem = NULL; |
FUJITA Tomonori | 5740afd | 2009-11-10 19:46:18 +0900 | [diff] [blame] | 339 | } |
| 340 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | /* |
Bumyong Lee | 5f89468 | 2021-05-10 18:10:04 +0900 | [diff] [blame] | 342 | * Return the offset into a iotlb slot required to keep the device happy. |
| 343 | */ |
| 344 | static unsigned int swiotlb_align_offset(struct device *dev, u64 addr) |
| 345 | { |
| 346 | return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1); |
| 347 | } |
| 348 | |
| 349 | /* |
Dongli Zhang | 6442ca2 | 2019-01-18 15:10:26 +0800 | [diff] [blame] | 350 | * Bounce: copy the swiotlb buffer from or back to the original dma location |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 351 | */ |
Christoph Hellwig | 2bdba62 | 2021-03-01 08:44:25 +0100 | [diff] [blame] | 352 | static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size, |
| 353 | enum dma_data_direction dir) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 354 | { |
Claire Chang | 69031f5 | 2021-06-19 11:40:34 +0800 | [diff] [blame] | 355 | struct io_tlb_mem *mem = dev->dma_io_tlb_mem; |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 356 | int index = (tlb_addr - mem->start) >> IO_TLB_SHIFT; |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 357 | phys_addr_t orig_addr = mem->slots[index].orig_addr; |
| 358 | size_t alloc_size = mem->slots[index].alloc_size; |
Alexander Duyck | af51a9f | 2012-10-15 10:19:55 -0700 | [diff] [blame] | 359 | unsigned long pfn = PFN_DOWN(orig_addr); |
| 360 | unsigned char *vaddr = phys_to_virt(tlb_addr); |
Bumyong Lee | 5f89468 | 2021-05-10 18:10:04 +0900 | [diff] [blame] | 361 | unsigned int tlb_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | |
Christoph Hellwig | 2bdba62 | 2021-03-01 08:44:25 +0100 | [diff] [blame] | 363 | if (orig_addr == INVALID_PHYS_ADDR) |
| 364 | return; |
| 365 | |
Bumyong Lee | 5f89468 | 2021-05-10 18:10:04 +0900 | [diff] [blame] | 366 | tlb_offset = (tlb_addr & (IO_TLB_SIZE - 1)) - |
| 367 | swiotlb_align_offset(dev, orig_addr); |
| 368 | |
| 369 | orig_addr += tlb_offset; |
| 370 | alloc_size -= tlb_offset; |
| 371 | |
Christoph Hellwig | 2bdba62 | 2021-03-01 08:44:25 +0100 | [diff] [blame] | 372 | if (size > alloc_size) { |
| 373 | dev_WARN_ONCE(dev, 1, |
| 374 | "Buffer overflow detected. Allocation size: %zu. Mapping size: %zu.\n", |
| 375 | alloc_size, size); |
| 376 | size = alloc_size; |
| 377 | } |
| 378 | |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 379 | if (PageHighMem(pfn_to_page(pfn))) { |
| 380 | /* The buffer does not have a mapping. Map it in and copy */ |
Alexander Duyck | af51a9f | 2012-10-15 10:19:55 -0700 | [diff] [blame] | 381 | unsigned int offset = orig_addr & ~PAGE_MASK; |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 382 | char *buffer; |
| 383 | unsigned int sz = 0; |
| 384 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 386 | while (size) { |
Becky Bruce | 67131ad | 2009-04-08 09:09:16 -0500 | [diff] [blame] | 387 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 389 | local_irq_save(flags); |
Cong Wang | c3eede8 | 2011-11-25 23:14:39 +0800 | [diff] [blame] | 390 | buffer = kmap_atomic(pfn_to_page(pfn)); |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 391 | if (dir == DMA_TO_DEVICE) |
Alexander Duyck | af51a9f | 2012-10-15 10:19:55 -0700 | [diff] [blame] | 392 | memcpy(vaddr, buffer + offset, sz); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | else |
Alexander Duyck | af51a9f | 2012-10-15 10:19:55 -0700 | [diff] [blame] | 394 | memcpy(buffer + offset, vaddr, sz); |
Cong Wang | c3eede8 | 2011-11-25 23:14:39 +0800 | [diff] [blame] | 395 | kunmap_atomic(buffer); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | local_irq_restore(flags); |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 397 | |
| 398 | size -= sz; |
| 399 | pfn++; |
Alexander Duyck | af51a9f | 2012-10-15 10:19:55 -0700 | [diff] [blame] | 400 | vaddr += sz; |
Becky Bruce | fb05a37 | 2008-12-22 10:26:09 -0800 | [diff] [blame] | 401 | offset = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | } |
Alexander Duyck | af51a9f | 2012-10-15 10:19:55 -0700 | [diff] [blame] | 403 | } else if (dir == DMA_TO_DEVICE) { |
| 404 | memcpy(vaddr, phys_to_virt(orig_addr), size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | } else { |
Alexander Duyck | af51a9f | 2012-10-15 10:19:55 -0700 | [diff] [blame] | 406 | memcpy(phys_to_virt(orig_addr), vaddr, size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 407 | } |
| 408 | } |
| 409 | |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 410 | #define slot_addr(start, idx) ((start) + ((idx) << IO_TLB_SHIFT)) |
| 411 | |
| 412 | /* |
| 413 | * Carefully handle integer overflow which can occur when boundary_mask == ~0UL. |
| 414 | */ |
| 415 | static inline unsigned long get_max_slots(unsigned long boundary_mask) |
| 416 | { |
| 417 | if (boundary_mask == ~0UL) |
| 418 | return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); |
| 419 | return nr_slots(boundary_mask + 1); |
| 420 | } |
| 421 | |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 422 | static unsigned int wrap_index(struct io_tlb_mem *mem, unsigned int index) |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 423 | { |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 424 | if (index >= mem->nslabs) |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 425 | return 0; |
| 426 | return index; |
| 427 | } |
| 428 | |
| 429 | /* |
| 430 | * Find a suitable number of IO TLB entries size that will fit this request and |
| 431 | * allocate a buffer from that IO TLB pool. |
| 432 | */ |
Claire Chang | 36f7b2f | 2021-06-24 23:55:21 +0800 | [diff] [blame] | 433 | static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr, |
| 434 | size_t alloc_size) |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 435 | { |
Claire Chang | 69031f5 | 2021-06-19 11:40:34 +0800 | [diff] [blame] | 436 | struct io_tlb_mem *mem = dev->dma_io_tlb_mem; |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 437 | unsigned long boundary_mask = dma_get_seg_boundary(dev); |
| 438 | dma_addr_t tbl_dma_addr = |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 439 | phys_to_dma_unencrypted(dev, mem->start) & boundary_mask; |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 440 | unsigned long max_slots = get_max_slots(boundary_mask); |
Christoph Hellwig | 1f221a0 | 2021-02-22 14:39:44 -0500 | [diff] [blame] | 441 | unsigned int iotlb_align_mask = |
| 442 | dma_get_min_align_mask(dev) & ~(IO_TLB_SIZE - 1); |
| 443 | unsigned int nslots = nr_slots(alloc_size), stride; |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 444 | unsigned int index, wrap, count = 0, i; |
Claire Chang | 36f7b2f | 2021-06-24 23:55:21 +0800 | [diff] [blame] | 445 | unsigned int offset = swiotlb_align_offset(dev, orig_addr); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 446 | unsigned long flags; |
| 447 | |
| 448 | BUG_ON(!nslots); |
| 449 | |
| 450 | /* |
Christoph Hellwig | 1f221a0 | 2021-02-22 14:39:44 -0500 | [diff] [blame] | 451 | * For mappings with an alignment requirement don't bother looping to |
| 452 | * unaligned slots once we found an aligned one. For allocations of |
| 453 | * PAGE_SIZE or larger only look for page aligned allocations. |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 454 | */ |
Christoph Hellwig | 1f221a0 | 2021-02-22 14:39:44 -0500 | [diff] [blame] | 455 | stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1; |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 456 | if (alloc_size >= PAGE_SIZE) |
Christoph Hellwig | 1f221a0 | 2021-02-22 14:39:44 -0500 | [diff] [blame] | 457 | stride = max(stride, stride << (PAGE_SHIFT - IO_TLB_SHIFT)); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 458 | |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 459 | spin_lock_irqsave(&mem->lock, flags); |
| 460 | if (unlikely(nslots > mem->nslabs - mem->used)) |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 461 | goto not_found; |
| 462 | |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 463 | index = wrap = wrap_index(mem, ALIGN(mem->index, stride)); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 464 | do { |
Claire Chang | f4111e3 | 2021-06-19 11:40:40 +0800 | [diff] [blame^] | 465 | if (orig_addr && |
| 466 | (slot_addr(tbl_dma_addr, index) & iotlb_align_mask) != |
| 467 | (orig_addr & iotlb_align_mask)) { |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 468 | index = wrap_index(mem, index + 1); |
Christoph Hellwig | 1f221a0 | 2021-02-22 14:39:44 -0500 | [diff] [blame] | 469 | continue; |
| 470 | } |
| 471 | |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 472 | /* |
| 473 | * If we find a slot that indicates we have 'nslots' number of |
| 474 | * contiguous buffers, we allocate the buffers from that slot |
| 475 | * and mark the entries as '0' indicating unavailable. |
| 476 | */ |
| 477 | if (!iommu_is_span_boundary(index, nslots, |
| 478 | nr_slots(tbl_dma_addr), |
| 479 | max_slots)) { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 480 | if (mem->slots[index].list >= nslots) |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 481 | goto found; |
| 482 | } |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 483 | index = wrap_index(mem, index + stride); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 484 | } while (index != wrap); |
| 485 | |
| 486 | not_found: |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 487 | spin_unlock_irqrestore(&mem->lock, flags); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 488 | return -1; |
| 489 | |
| 490 | found: |
Claire Chang | 36f7b2f | 2021-06-24 23:55:21 +0800 | [diff] [blame] | 491 | for (i = index; i < index + nslots; i++) { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 492 | mem->slots[i].list = 0; |
Claire Chang | 36f7b2f | 2021-06-24 23:55:21 +0800 | [diff] [blame] | 493 | mem->slots[i].alloc_size = |
| 494 | alloc_size - (offset + ((i - index) << IO_TLB_SHIFT)); |
| 495 | } |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 496 | for (i = index - 1; |
| 497 | io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 498 | mem->slots[i].list; i--) |
| 499 | mem->slots[i].list = ++count; |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 500 | |
| 501 | /* |
| 502 | * Update the indices to avoid searching in the next round. |
| 503 | */ |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 504 | if (index + nslots < mem->nslabs) |
| 505 | mem->index = index + nslots; |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 506 | else |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 507 | mem->index = 0; |
| 508 | mem->used += nslots; |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 509 | |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 510 | spin_unlock_irqrestore(&mem->lock, flags); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 511 | return index; |
| 512 | } |
| 513 | |
| 514 | phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr, |
Christoph Hellwig | fc0021a | 2020-10-23 08:33:09 +0200 | [diff] [blame] | 515 | size_t mapping_size, size_t alloc_size, |
| 516 | enum dma_data_direction dir, unsigned long attrs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | { |
Claire Chang | 69031f5 | 2021-06-19 11:40:34 +0800 | [diff] [blame] | 518 | struct io_tlb_mem *mem = dev->dma_io_tlb_mem; |
Christoph Hellwig | 1f221a0 | 2021-02-22 14:39:44 -0500 | [diff] [blame] | 519 | unsigned int offset = swiotlb_align_offset(dev, orig_addr); |
Claire Chang | 95b079d | 2021-04-22 16:14:53 +0800 | [diff] [blame] | 520 | unsigned int i; |
| 521 | int index; |
Alexander Duyck | e05ed4d | 2012-10-15 10:19:39 -0700 | [diff] [blame] | 522 | phys_addr_t tlb_addr; |
FUJITA Tomonori | 681cc5c | 2008-02-04 22:28:16 -0800 | [diff] [blame] | 523 | |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 524 | if (!mem) |
Yinghai Lu | ac2cbab | 2013-01-24 12:20:16 -0800 | [diff] [blame] | 525 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); |
| 526 | |
Tom Lendacky | d7b417f | 2017-10-20 09:30:53 -0500 | [diff] [blame] | 527 | if (mem_encrypt_active()) |
Thiago Jung Bauermann | 47e5d8f | 2019-08-06 01:49:15 -0300 | [diff] [blame] | 528 | pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n"); |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 529 | |
Lu Baolu | 3fc1ca0 | 2019-09-06 14:14:48 +0800 | [diff] [blame] | 530 | if (mapping_size > alloc_size) { |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 531 | dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)", |
Lu Baolu | 3fc1ca0 | 2019-09-06 14:14:48 +0800 | [diff] [blame] | 532 | mapping_size, alloc_size); |
| 533 | return (phys_addr_t)DMA_MAPPING_ERROR; |
| 534 | } |
| 535 | |
Claire Chang | 36f7b2f | 2021-06-24 23:55:21 +0800 | [diff] [blame] | 536 | index = swiotlb_find_slots(dev, orig_addr, alloc_size + offset); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 537 | if (index == -1) { |
| 538 | if (!(attrs & DMA_ATTR_NO_WARN)) |
| 539 | dev_warn_ratelimited(dev, |
| 540 | "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n", |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 541 | alloc_size, mem->nslabs, mem->used); |
Christoph Hellwig | 26a7e09 | 2021-02-04 11:08:35 +0100 | [diff] [blame] | 542 | return (phys_addr_t)DMA_MAPPING_ERROR; |
| 543 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | |
| 545 | /* |
| 546 | * Save away the mapping from the original address to the DMA address. |
| 547 | * This is needed when we sync the memory. Then we sync the buffer if |
| 548 | * needed. |
| 549 | */ |
Claire Chang | 36f7b2f | 2021-06-24 23:55:21 +0800 | [diff] [blame] | 550 | for (i = 0; i < nr_slots(alloc_size + offset); i++) |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 551 | mem->slots[index + i].orig_addr = slot_addr(orig_addr, i); |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 552 | tlb_addr = slot_addr(mem->start, index) + offset; |
Alexander Duyck | 0443fa0 | 2016-11-02 07:13:02 -0400 | [diff] [blame] | 553 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
| 554 | (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) |
Christoph Hellwig | 2bdba62 | 2021-03-01 08:44:25 +0100 | [diff] [blame] | 555 | swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_TO_DEVICE); |
Alexander Duyck | e05ed4d | 2012-10-15 10:19:39 -0700 | [diff] [blame] | 556 | return tlb_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | } |
| 558 | |
Claire Chang | 7034787 | 2021-06-19 11:40:39 +0800 | [diff] [blame] | 559 | static void swiotlb_release_slots(struct device *dev, phys_addr_t tlb_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | { |
Claire Chang | 7034787 | 2021-06-19 11:40:39 +0800 | [diff] [blame] | 561 | struct io_tlb_mem *mem = dev->dma_io_tlb_mem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | unsigned long flags; |
Claire Chang | 7034787 | 2021-06-19 11:40:39 +0800 | [diff] [blame] | 563 | unsigned int offset = swiotlb_align_offset(dev, tlb_addr); |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 564 | int index = (tlb_addr - offset - mem->start) >> IO_TLB_SHIFT; |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 565 | int nslots = nr_slots(mem->slots[index].alloc_size + offset); |
Christoph Hellwig | 2bdba62 | 2021-03-01 08:44:25 +0100 | [diff] [blame] | 566 | int count, i; |
Martin Radev | daf9514 | 2021-01-12 16:07:29 +0100 | [diff] [blame] | 567 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | * Return the buffer to the free list by setting the corresponding |
André Goddard Rosa | af901ca | 2009-11-14 13:09:05 -0200 | [diff] [blame] | 570 | * entries to indicate the number of contiguous entries available. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 571 | * While returning the entries to the free list, we merge the entries |
| 572 | * with slots below and above the pool being returned. |
| 573 | */ |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 574 | spin_lock_irqsave(&mem->lock, flags); |
Christoph Hellwig | ca10d0f | 2021-02-04 10:13:40 +0100 | [diff] [blame] | 575 | if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE)) |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 576 | count = mem->slots[index + nslots].list; |
Christoph Hellwig | ca10d0f | 2021-02-04 10:13:40 +0100 | [diff] [blame] | 577 | else |
| 578 | count = 0; |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 579 | |
Christoph Hellwig | ca10d0f | 2021-02-04 10:13:40 +0100 | [diff] [blame] | 580 | /* |
| 581 | * Step 1: return the slots to the free list, merging the slots with |
| 582 | * superceeding slots |
| 583 | */ |
| 584 | for (i = index + nslots - 1; i >= index; i--) { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 585 | mem->slots[i].list = ++count; |
| 586 | mem->slots[i].orig_addr = INVALID_PHYS_ADDR; |
| 587 | mem->slots[i].alloc_size = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 588 | } |
Christoph Hellwig | ca10d0f | 2021-02-04 10:13:40 +0100 | [diff] [blame] | 589 | |
| 590 | /* |
| 591 | * Step 2: merge the returned slots with the preceding slots, if |
| 592 | * available (non zero) |
| 593 | */ |
| 594 | for (i = index - 1; |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 595 | io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && mem->slots[i].list; |
Christoph Hellwig | ca10d0f | 2021-02-04 10:13:40 +0100 | [diff] [blame] | 596 | i--) |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 597 | mem->slots[i].list = ++count; |
Claire Chang | 73f6209 | 2021-03-18 17:14:22 +0100 | [diff] [blame] | 598 | mem->used -= nslots; |
| 599 | spin_unlock_irqrestore(&mem->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | } |
| 601 | |
Claire Chang | 7034787 | 2021-06-19 11:40:39 +0800 | [diff] [blame] | 602 | /* |
| 603 | * tlb_addr is the physical address of the bounce buffer to unmap. |
| 604 | */ |
| 605 | void swiotlb_tbl_unmap_single(struct device *dev, phys_addr_t tlb_addr, |
| 606 | size_t mapping_size, enum dma_data_direction dir, |
| 607 | unsigned long attrs) |
| 608 | { |
| 609 | /* |
| 610 | * First, sync the memory before unmapping the entry |
| 611 | */ |
| 612 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
| 613 | (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) |
| 614 | swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_FROM_DEVICE); |
| 615 | |
| 616 | swiotlb_release_slots(dev, tlb_addr); |
| 617 | } |
| 618 | |
Christoph Hellwig | 80808d2 | 2021-03-01 08:44:26 +0100 | [diff] [blame] | 619 | void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr, |
| 620 | size_t size, enum dma_data_direction dir) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | { |
Christoph Hellwig | 80808d2 | 2021-03-01 08:44:26 +0100 | [diff] [blame] | 622 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
| 623 | swiotlb_bounce(dev, tlb_addr, size, DMA_TO_DEVICE); |
| 624 | else |
| 625 | BUG_ON(dir != DMA_FROM_DEVICE); |
| 626 | } |
| 627 | |
| 628 | void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr, |
| 629 | size_t size, enum dma_data_direction dir) |
| 630 | { |
| 631 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
| 632 | swiotlb_bounce(dev, tlb_addr, size, DMA_FROM_DEVICE); |
| 633 | else |
| 634 | BUG_ON(dir != DMA_TO_DEVICE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | } |
| 636 | |
Christoph Hellwig | 55897af | 2018-12-03 11:43:54 +0100 | [diff] [blame] | 637 | /* |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 638 | * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing |
Christoph Hellwig | 55897af | 2018-12-03 11:43:54 +0100 | [diff] [blame] | 639 | * to the device copy the data into it as well. |
| 640 | */ |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 641 | dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size, |
| 642 | enum dma_data_direction dir, unsigned long attrs) |
Christoph Hellwig | c4dae36 | 2018-08-20 16:21:10 +0200 | [diff] [blame] | 643 | { |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 644 | phys_addr_t swiotlb_addr; |
| 645 | dma_addr_t dma_addr; |
Christoph Hellwig | c4dae36 | 2018-08-20 16:21:10 +0200 | [diff] [blame] | 646 | |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 647 | trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size, |
| 648 | swiotlb_force); |
Christoph Hellwig | c4dae36 | 2018-08-20 16:21:10 +0200 | [diff] [blame] | 649 | |
Christoph Hellwig | fc0021a | 2020-10-23 08:33:09 +0200 | [diff] [blame] | 650 | swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, dir, |
| 651 | attrs); |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 652 | if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR) |
| 653 | return DMA_MAPPING_ERROR; |
Christoph Hellwig | c4dae36 | 2018-08-20 16:21:10 +0200 | [diff] [blame] | 654 | |
| 655 | /* Ensure that the address returned is DMA'ble */ |
Christoph Hellwig | 5ceda74 | 2020-08-17 17:34:03 +0200 | [diff] [blame] | 656 | dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr); |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 657 | if (unlikely(!dma_capable(dev, dma_addr, size, true))) { |
Christoph Hellwig | 2973073 | 2021-03-01 08:44:24 +0100 | [diff] [blame] | 658 | swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir, |
Christoph Hellwig | c4dae36 | 2018-08-20 16:21:10 +0200 | [diff] [blame] | 659 | attrs | DMA_ATTR_SKIP_CPU_SYNC); |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 660 | dev_WARN_ONCE(dev, 1, |
| 661 | "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n", |
| 662 | &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit); |
| 663 | return DMA_MAPPING_ERROR; |
Christoph Hellwig | c4dae36 | 2018-08-20 16:21:10 +0200 | [diff] [blame] | 664 | } |
| 665 | |
Christoph Hellwig | 4a47cba | 2020-02-03 14:44:38 +0100 | [diff] [blame] | 666 | if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) |
| 667 | arch_sync_dma_for_device(swiotlb_addr, size, dir); |
| 668 | return dma_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 669 | } |
| 670 | |
Joerg Roedel | abe420b | 2019-02-07 12:59:13 +0100 | [diff] [blame] | 671 | size_t swiotlb_max_mapping_size(struct device *dev) |
| 672 | { |
Christoph Hellwig | b5d7ccb | 2021-02-05 11:18:40 +0100 | [diff] [blame] | 673 | return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE; |
Joerg Roedel | abe420b | 2019-02-07 12:59:13 +0100 | [diff] [blame] | 674 | } |
Joerg Roedel | 492366f | 2019-02-07 12:59:14 +0100 | [diff] [blame] | 675 | |
Claire Chang | 6f2beb2 | 2021-06-19 11:40:36 +0800 | [diff] [blame] | 676 | bool is_swiotlb_active(struct device *dev) |
Joerg Roedel | 492366f | 2019-02-07 12:59:14 +0100 | [diff] [blame] | 677 | { |
Claire Chang | 6f2beb2 | 2021-06-19 11:40:36 +0800 | [diff] [blame] | 678 | return dev->dma_io_tlb_mem != NULL; |
Joerg Roedel | 492366f | 2019-02-07 12:59:14 +0100 | [diff] [blame] | 679 | } |
Christoph Hellwig | 2cbc277 | 2021-03-18 17:14:24 +0100 | [diff] [blame] | 680 | EXPORT_SYMBOL_GPL(is_swiotlb_active); |
Linus Torvalds | 45ba8d5 | 2019-03-10 12:47:57 -0700 | [diff] [blame] | 681 | |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 682 | #ifdef CONFIG_DEBUG_FS |
Claire Chang | 6e675a1 | 2021-06-19 11:40:33 +0800 | [diff] [blame] | 683 | static struct dentry *debugfs_dir; |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 684 | |
Claire Chang | 6e675a1 | 2021-06-19 11:40:33 +0800 | [diff] [blame] | 685 | static void swiotlb_create_debugfs_files(struct io_tlb_mem *mem) |
| 686 | { |
| 687 | debugfs_create_ulong("io_tlb_nslabs", 0400, mem->debugfs, &mem->nslabs); |
| 688 | debugfs_create_ulong("io_tlb_used", 0400, mem->debugfs, &mem->used); |
| 689 | } |
| 690 | |
| 691 | static int __init swiotlb_create_default_debugfs(void) |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 692 | { |
Christoph Hellwig | 2d29960 | 2021-03-18 17:14:23 +0100 | [diff] [blame] | 693 | struct io_tlb_mem *mem = io_tlb_default_mem; |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 694 | |
Claire Chang | 6e675a1 | 2021-06-19 11:40:33 +0800 | [diff] [blame] | 695 | debugfs_dir = debugfs_create_dir("swiotlb", NULL); |
| 696 | if (mem) { |
| 697 | mem->debugfs = debugfs_dir; |
| 698 | swiotlb_create_debugfs_files(mem); |
| 699 | } |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 700 | return 0; |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 701 | } |
| 702 | |
Claire Chang | 6e675a1 | 2021-06-19 11:40:33 +0800 | [diff] [blame] | 703 | late_initcall(swiotlb_create_default_debugfs); |
Dongli Zhang | 71602fe | 2019-01-18 15:10:27 +0800 | [diff] [blame] | 704 | |
| 705 | #endif |
Claire Chang | f4111e3 | 2021-06-19 11:40:40 +0800 | [diff] [blame^] | 706 | |
| 707 | #ifdef CONFIG_DMA_RESTRICTED_POOL |
| 708 | struct page *swiotlb_alloc(struct device *dev, size_t size) |
| 709 | { |
| 710 | struct io_tlb_mem *mem = dev->dma_io_tlb_mem; |
| 711 | phys_addr_t tlb_addr; |
| 712 | int index; |
| 713 | |
| 714 | if (!mem) |
| 715 | return NULL; |
| 716 | |
| 717 | index = swiotlb_find_slots(dev, 0, size); |
| 718 | if (index == -1) |
| 719 | return NULL; |
| 720 | |
| 721 | tlb_addr = slot_addr(mem->start, index); |
| 722 | |
| 723 | return pfn_to_page(PFN_DOWN(tlb_addr)); |
| 724 | } |
| 725 | |
| 726 | bool swiotlb_free(struct device *dev, struct page *page, size_t size) |
| 727 | { |
| 728 | phys_addr_t tlb_addr = page_to_phys(page); |
| 729 | |
| 730 | if (!is_swiotlb_buffer(dev, tlb_addr)) |
| 731 | return false; |
| 732 | |
| 733 | swiotlb_release_slots(dev, tlb_addr); |
| 734 | |
| 735 | return true; |
| 736 | } |
| 737 | |
| 738 | #endif /* CONFIG_DMA_RESTRICTED_POOL */ |