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Paul Walmsley7b9487a2019-04-30 13:50:58 -07001# SPDX-License-Identifier: GPL-2.0
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +01002
Stephen Boydbc8c9452020-04-08 23:44:16 -07003config HAVE_CLK
4 bool
5 help
6 The <linux/clk.h> calls support software clock gating and
7 thus are a key power management tool on many systems.
8
Shawn Guo5c77f562011-12-20 14:46:38 +08009config HAVE_CLK_PREPARE
10 bool
11
Stephen Boydbbd7ffd2020-04-08 23:44:13 -070012config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000013 bool
Stephen Boydbbd7ffd2020-04-08 23:44:13 -070014 select HAVE_CLK
15 help
16 Select this option when the clock API in <linux/clk.h> is implemented
17 by platform/architecture code. This method is deprecated. Modern
18 code should select COMMON_CLK instead and not define a custom
19 'struct clk'.
20
21menuconfig COMMON_CLK
22 bool "Common Clock Framework"
23 depends on !HAVE_LEGACY_CLK
Mike Turquetteb24764902012-03-15 23:11:19 -070024 select HAVE_CLK_PREPARE
Arnd Bergmann2f4574d2021-05-31 11:48:49 +020025 select HAVE_CLK
Pranith Kumar83fe27e2014-12-05 11:24:45 -050026 select SRCU
Andy Shevchenko07775912015-09-22 18:54:11 +030027 select RATIONAL
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +090028 help
Mike Turquetteb24764902012-03-15 23:11:19 -070029 The common clock framework is a single definition of struct
30 clk, useful across many platforms, as well as an
31 implementation of the clock API in include/linux/clk.h.
32 Architectures utilizing the common struct clk should select
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000033 this option.
Mike Turquetteb24764902012-03-15 23:11:19 -070034
Stephen Boydbbd7ffd2020-04-08 23:44:13 -070035if COMMON_CLK
Mike Turquetteb24764902012-03-15 23:11:19 -070036
Mark Brownf05259a2012-05-17 10:04:57 +010037config COMMON_CLK_WM831X
38 tristate "Clock driver for WM831x/2x PMICs"
39 depends on MFD_WM831X
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +090040 help
Krzysztof Kozlowski333d2d12019-11-21 04:18:55 +010041 Supports the clocking subsystem of the WM831x/2x series of
Masanari Iidafe4e4372014-10-17 00:09:24 +090042 PMICs from Wolfson Microelectronics.
Mark Brownf05259a2012-05-17 10:04:57 +010043
Pawel Moll5ee2b872013-09-17 17:16:15 +010044source "drivers/clk/versatile/Kconfig"
Linus Walleijf9a6aa42012-08-06 18:32:08 +020045
Eugeniy Paltsevdaeeb432017-08-25 20:39:14 +030046config CLK_HSDK
47 bool "PLL Driver for HSDK platform"
Geert Uytterhoevenf6bade62020-08-07 11:43:51 +020048 depends on ARC_SOC_HSDK || COMPILE_TEST
Geert Uytterhoevenbd8548d2020-08-03 10:48:35 +020049 depends on HAS_IOMEM
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +090050 help
Eugeniy Paltsevdaeeb432017-08-25 20:39:14 +030051 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
52 control.
53
Liam Beguin3bc61cf2021-04-22 20:40:55 -040054config LMK04832
55 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
Stephen Boyd97a1c5c2021-06-28 23:07:50 -070056 depends on SPI
Liam Beguin3bc61cf2021-04-22 20:40:55 -040057 select REGMAP_SPI
58 help
59 Say yes here to build support for Texas Instruments' LMK04832 Ultra
60 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
61
Jonghwa Lee73118e62012-08-28 17:54:28 +090062config COMMON_CLK_MAX77686
Laxman Dewangan5a227cd2016-06-17 16:21:07 +053063 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
Krzysztof Kozlowski9c1b3052016-10-02 22:58:14 +020064 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +090065 help
Laxman Dewangan5a227cd2016-06-17 16:21:07 +053066 This driver supports Maxim 77620/77686/77802 crystal oscillator
67 clock.
Javier Martinez Canillas83ccf162014-08-18 10:33:03 +020068
Daniel Mack33f51042018-07-06 20:53:03 +020069config COMMON_CLK_MAX9485
70 tristate "Maxim 9485 Programmable Clock Generator"
71 depends on I2C
72 help
73 This driver supports Maxim 9485 Programmable Audio Clock Generator
74
Chris Zhong038b8922014-10-13 15:52:44 -070075config COMMON_CLK_RK808
Tony Xie8ed144012019-06-21 06:34:55 -040076 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
Chris Zhong038b8922014-10-13 15:52:44 -070077 depends on MFD_RK808
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +090078 help
Tony Xie8ed144012019-06-21 06:34:55 -040079 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
80 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
81 Clkout1 is always on, Clkout2 can off by control register.
Chris Zhong038b8922014-10-13 15:52:44 -070082
Daniel Lezcanob68adc22017-04-17 19:19:25 +020083config COMMON_CLK_HI655X
Riku Voipio3a49afb2018-03-12 12:49:45 +020084 tristate "Clock driver for Hi655x" if EXPERT
85 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
86 depends on REGMAP
87 default MFD_HI655X_PMIC
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +090088 help
Daniel Lezcanob68adc22017-04-17 19:19:25 +020089 This driver supports the hi655x PMIC clock. This
90 multi-function device has one fixed-rate oscillator, clocked
91 at 32KHz.
92
Sudeep Holla6d6a1d82017-06-13 17:19:36 +010093config COMMON_CLK_SCMI
94 tristate "Clock driver controlled via SCMI interface"
95 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +090096 help
Sudeep Holla6d6a1d82017-06-13 17:19:36 +010097 This driver provides support for clocks that are controlled
98 by firmware that implements the SCMI interface.
99
100 This driver uses SCMI Message Protocol to interact with the
101 firmware providing all the clock controls.
102
Sudeep Hollacd52c2a2015-03-30 10:59:52 +0100103config COMMON_CLK_SCPI
104 tristate "Clock driver controlled via SCPI interface"
105 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900106 help
Sudeep Hollacd52c2a2015-03-30 10:59:52 +0100107 This driver provides support for clocks that are controlled
108 by firmware that implements the SCPI interface.
109
110 This driver uses SCPI Message Protocol to interact with the
111 firmware providing all the clock controls.
112
Mike Looijmans3044a862019-05-17 15:23:52 +0200113config COMMON_CLK_SI5341
114 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
115 depends on I2C
116 select REGMAP_I2C
117 help
118 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
119 generators. Not all features of these chips are currently supported
120 by the driver, in particular it only supports XTAL input. The chip can
121 be pre-programmed to support other configurations and features not yet
122 implemented in the driver.
123
Sebastian Hesselbarth9abd5f02013-04-11 21:42:29 +0200124config COMMON_CLK_SI5351
125 tristate "Clock driver for SiLabs 5351A/B/C"
126 depends on I2C
127 select REGMAP_I2C
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900128 help
Sebastian Hesselbarth9abd5f02013-04-11 21:42:29 +0200129 This driver supports Silicon Labs 5351A/B/C programmable clock
130 generators.
131
Mike Looijmans8ce20e62015-10-02 09:15:29 +0200132config COMMON_CLK_SI514
133 tristate "Clock driver for SiLabs 514 devices"
134 depends on I2C
135 depends on OF
136 select REGMAP_I2C
137 help
Mike Looijmans8ce20e62015-10-02 09:15:29 +0200138 This driver supports the Silicon Labs 514 programmable clock
139 generator.
140
Mike Looijmans953cc3e2018-03-20 09:15:41 +0100141config COMMON_CLK_SI544
142 tristate "Clock driver for SiLabs 544 devices"
143 depends on I2C
144 select REGMAP_I2C
145 help
Mike Looijmans953cc3e2018-03-20 09:15:41 +0100146 This driver supports the Silicon Labs 544 programmable clock
147 generator.
148
Soren Brinkmann1459c832013-09-21 16:40:39 -0700149config COMMON_CLK_SI570
150 tristate "Clock driver for SiLabs 570 and compatible devices"
151 depends on I2C
152 depends on OF
153 select REGMAP_I2C
154 help
Soren Brinkmann1459c832013-09-21 16:40:39 -0700155 This driver supports Silicon Labs 570/571/598/599 programmable
156 clock generators.
157
Manivannan Sadhasivam1ab46012019-11-15 21:59:00 +0530158config COMMON_CLK_BM1880
159 bool "Clock driver for Bitmain BM1880 SoC"
160 depends on ARCH_BITMAIN || COMPILE_TEST
161 default ARCH_BITMAIN
162 help
163 This driver supports the clocks on Bitmain BM1880 SoC.
164
Mike Looijmansc7d5a46b2015-11-03 12:55:54 +0100165config COMMON_CLK_CDCE706
166 tristate "Clock driver for TI CDCE706 clock synthesizer"
167 depends on I2C
168 select REGMAP_I2C
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900169 help
Mike Looijmansc7d5a46b2015-11-03 12:55:54 +0100170 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
171
Hans de Goedeff5f87c2021-12-03 11:28:49 +0100172config COMMON_CLK_TPS68470
173 tristate "Clock Driver for TI TPS68470 PMIC"
174 depends on I2C
175 depends on INTEL_SKL_INT3472 || COMPILE_TEST
176 select REGMAP_I2C
177 help
178 This driver supports the clocks provided by the TPS68470 PMIC.
179
Mike Looijmans19fbbbb2015-06-03 07:25:19 +0200180config COMMON_CLK_CDCE925
Akinobu Mita55081242017-01-01 03:04:36 +0900181 tristate "Clock driver for TI CDCE913/925/937/949 devices"
Mike Looijmans19fbbbb2015-06-03 07:25:19 +0200182 depends on I2C
183 depends on OF
184 select REGMAP_I2C
185 help
Akinobu Mita55081242017-01-01 03:04:36 +0900186 This driver supports the TI CDCE913/925/937/949 programmable clock
187 synthesizer. Each chip has different number of PLLs and outputs.
188 For example, the CDCE925 contains two PLLs with spread-spectrum
189 clocking support and five output dividers. The driver only supports
190 the following setup, and uses a fixed setting for the output muxes.
Mike Looijmans19fbbbb2015-06-03 07:25:19 +0200191 Y1 is derived from the input clock
192 Y2 and Y3 derive from PLL1
193 Y4 and Y5 derive from PLL2
194 Given a target output frequency, the driver will set the PLL and
195 divider to best approximate the desired output.
196
Kuninori Morimoto64dfbe22015-11-10 01:15:09 +0000197config COMMON_CLK_CS2000_CP
198 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
199 depends on I2C
200 help
201 If you say yes here you get support for the CS2000 clock multiplier.
202
Michael Wallefcf77be2020-11-08 19:51:11 +0100203config COMMON_CLK_FSL_FLEXSPI
204 tristate "Clock driver for FlexSPI on Layerscape SoCs"
205 depends on ARCH_LAYERSCAPE || COMPILE_TEST
206 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
207 help
208 On Layerscape SoCs there is a special clock for the FlexSPI
209 interface.
210
Michael Walle9cd10202020-01-03 00:11:01 +0100211config COMMON_CLK_FSL_SAI
212 bool "Clock driver for BCLK of Freescale SAI cores"
213 depends on ARCH_LAYERSCAPE || COMPILE_TEST
214 help
215 This driver supports the Freescale SAI (Synchronous Audio Interface)
216 to be used as a generic clock output. Some SoCs have restrictions
217 regarding the possible pin multiplexer settings. Eg. on some SoCs
218 two SAI interfaces can only be enabled together. If just one is
219 needed, the BCLK pin of the second one can be used as general
220 purpose clock output. Ideally, it can be used to drive an audio
221 codec (sometimes known as MCLK).
222
Linus Walleij846423f2017-06-21 09:59:52 +0200223config COMMON_CLK_GEMINI
224 bool "Clock driver for Cortina Systems Gemini SoC"
225 depends on ARCH_GEMINI || COMPILE_TEST
226 select MFD_SYSCON
227 select RESET_CONTROLLER
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900228 help
Linus Walleij846423f2017-06-21 09:59:52 +0200229 This driver supports the SoC clocks on the Cortina Systems Gemini
230 platform, also known as SL3516 or CS3516.
231
Kavyasree Kotagiri54104ee2021-11-03 11:49:35 +0530232config COMMON_CLK_LAN966X
233 bool "Generic Clock Controller driver for LAN966X SoC"
234 help
235 This driver provides support for Generic Clock Controller(GCK) on
236 LAN966X SoC. GCK generates and supplies clock to various peripherals
237 within the SoC.
238
Joel Stanley5eda5d72017-12-22 13:15:18 +1030239config COMMON_CLK_ASPEED
240 bool "Clock driver for Aspeed BMC SoCs"
241 depends on ARCH_ASPEED || COMPILE_TEST
242 default ARCH_ASPEED
243 select MFD_SYSCON
244 select RESET_CONTROLLER
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900245 help
Joel Stanley5eda5d72017-12-22 13:15:18 +1030246 This driver supports the SoC clocks on the Aspeed BMC platforms.
247
248 The G4 and G5 series, including the ast2400 and ast2500, are supported
249 by this driver.
250
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +0530251config COMMON_CLK_S2MPS11
Krzysztof Kozlowskie8b60a42014-05-21 13:23:01 +0200252 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
Krzysztof Kozlowski9c1b3052016-10-02 22:58:14 +0200253 depends on MFD_SEC_CORE || COMPILE_TEST
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900254 help
Krzysztof Kozlowskie8b60a42014-05-21 13:23:01 +0200255 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
256 clock. These multi-function devices have two (S2MPS14) or three
257 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +0530258
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300259config CLK_TWL6040
260 tristate "External McPDM functional clock from twl6040"
261 depends on TWL6040_CORE
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900262 help
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300263 Enable the external functional clock support on OMAP4+ platforms for
264 McPDM. McPDM module is using the external bit clock on the McPDM bus
265 as functional clock.
266
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +0100267config COMMON_CLK_AXI_CLKGEN
268 tristate "AXI clkgen driver"
Alexandru Ardelean324a8102021-02-01 17:12:42 +0200269 depends on HAS_IOMEM || COMPILE_TEST
270 depends on OF
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +0100271 help
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +0100272 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
273 FPGAs. It is commonly used in Analog Devices' reference designs.
274
Tang Yuantian93a17c02015-01-15 14:03:41 +0800275config CLK_QORIQ
276 bool "Clock driver for Freescale QorIQ platforms"
Geert Uytterhoevenb8bcece2020-11-10 16:47:50 +0100277 depends on OF
278 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900279 help
Tang Yuantian93a17c02015-01-15 14:03:41 +0800280 This adds the clock driver support for Freescale QorIQ platforms
281 using common clock framework.
Tang Yuantian555eae92013-04-09 16:46:26 +0800282
Wen Hed37010a2019-12-13 16:34:02 +0800283config CLK_LS1028A_PLLDIG
284 tristate "Clock driver for LS1028A Display output"
285 depends on ARCH_LAYERSCAPE || COMPILE_TEST
286 default ARCH_LAYERSCAPE
287 help
288 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
289 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
290 features of the PLL are currently supported by the driver. By default,
291 configured bypass mode with this PLL.
292
Loc Ho308964c2013-06-26 11:56:09 -0600293config COMMON_CLK_XGENE
294 bool "Clock driver for APM XGene SoC"
Marc Gonzalezce9a1042019-06-12 17:03:56 +0200295 default ARCH_XGENE
Javier Martinez Canillas4a7748c2015-10-13 16:18:18 +0200296 depends on ARM64 || COMPILE_TEST
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900297 help
Christophe JAILLET4fe02fe2020-05-03 21:03:27 +0200298 Support for the APM X-Gene SoC reference, PLL, and device clocks.
Loc Ho308964c2013-06-26 11:56:09 -0600299
Charles Keepax76c54782019-03-19 13:37:00 +0000300config COMMON_CLK_LOCHNAGAR
301 tristate "Cirrus Logic Lochnagar clock driver"
302 depends on MFD_LOCHNAGAR
303 help
304 This driver supports the clocking features of the Cirrus Logic
305 Lochnagar audio development board.
306
Vladimir Zapolskiyf7c82a62015-12-06 12:45:57 +0200307config COMMON_CLK_NXP
308 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
309 select REGMAP_MMIO if ARCH_LPC32XX
Ezequiel Garcia72ad6792016-05-16 12:45:36 -0300310 select MFD_SYSCON if ARCH_LPC18XX
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900311 help
Vladimir Zapolskiyf7c82a62015-12-06 12:45:57 +0200312 Support for clock providers on NXP platforms.
313
Peter Ujfalusi942d1d62014-06-27 09:01:11 +0300314config COMMON_CLK_PALMAS
315 tristate "Clock driver for TI Palmas devices"
316 depends on MFD_PALMAS
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900317 help
Peter Ujfalusi942d1d62014-06-27 09:01:11 +0300318 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
319 using common clock framework.
320
Philipp Zabel9a74ccd2015-02-13 20:18:52 +0100321config COMMON_CLK_PWM
322 tristate "Clock driver for PWMs used as clock outputs"
323 depends on PWM
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900324 help
Philipp Zabel9a74ccd2015-02-13 20:18:52 +0100325 Adapter driver so that any PWM output can be (mis)used as clock signal
326 at 50% duty cycle.
327
Robert Jarzmik98d147f2014-10-01 23:39:29 +0200328config COMMON_CLK_PXA
329 def_bool COMMON_CLK && ARCH_PXA
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900330 help
Mike Looijmans048c58b2015-11-03 12:55:53 +0100331 Support for the Marvell PXA SoC.
Robert Jarzmik98d147f2014-10-01 23:39:29 +0200332
Purna Chandra Mandalce6e1182016-05-13 13:22:40 +0530333config COMMON_CLK_PIC32
334 def_bool COMMON_CLK && MACH_PIC32
335
Neil Armstrong0bbd72b2016-04-18 12:01:35 +0200336config COMMON_CLK_OXNAS
337 bool "Clock driver for the OXNAS SoC Family"
Jean Delvare821f9942016-07-07 09:18:44 +0200338 depends on ARCH_OXNAS || COMPILE_TEST
Neil Armstrong0bbd72b2016-04-18 12:01:35 +0200339 select MFD_SYSCON
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900340 help
Neil Armstrong0bbd72b2016-04-18 12:01:35 +0200341 Support for the OXNAS SoC Family clocks.
342
Marek Vasut3e1aec4e2017-01-12 02:03:24 +0100343config COMMON_CLK_VC5
Marek Vasutdbf6b162017-07-09 15:28:14 +0200344 tristate "Clock driver for IDT VersaClock 5,6 devices"
Marek Vasut3e1aec4e2017-01-12 02:03:24 +0100345 depends on I2C
346 depends on OF
347 select REGMAP_I2C
348 help
Marek Vasutdbf6b162017-07-09 15:28:14 +0200349 This driver supports the IDT VersaClock 5 and VersaClock 6
350 programmable clock generators.
Marek Vasut3e1aec4e2017-01-12 02:03:24 +0100351
Gabriel Fernandez9bee94e2018-03-08 17:53:55 +0100352config COMMON_CLK_STM32MP157
353 def_bool COMMON_CLK && MACH_STM32MP157
354 help
Gabriel Fernandez9bee94e2018-03-08 17:53:55 +0100355 Support for stm32mp157 SoC family clocks
356
Benjamin Gaignardda32d352018-03-12 10:32:48 +0100357config COMMON_CLK_STM32F
Gabriel Fernandez9a160602018-05-03 08:40:09 +0200358 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
Benjamin Gaignardda32d352018-03-12 10:32:48 +0100359 help
Benjamin Gaignardda32d352018-03-12 10:32:48 +0100360 Support for stm32f4 and stm32f7 SoC families clocks
361
362config COMMON_CLK_STM32H7
Gabriel Fernandez9a160602018-05-03 08:40:09 +0200363 def_bool COMMON_CLK && MACH_STM32H743
Benjamin Gaignardda32d352018-03-12 10:32:48 +0100364 help
Benjamin Gaignardda32d352018-03-12 10:32:48 +0100365 Support for stm32h7 SoC family clocks
366
Lubomir Rintela9372a52019-05-16 08:19:37 +0200367config COMMON_CLK_MMP2
368 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
369 help
370 Support for Marvell MMP2 and MMP3 SoC clocks
371
Lubomir Rintel725262d2020-05-20 00:41:51 +0200372config COMMON_CLK_MMP2_AUDIO
373 tristate "Clock driver for MMP2 Audio subsystem"
374 depends on COMMON_CLK_MMP2 || COMPILE_TEST
375 help
376 This driver supports clocks for Audio subsystem on MMP2 SoC.
377
Matti Vaittinen2e622462018-12-07 12:01:44 +0200378config COMMON_CLK_BD718XX
Matti Vaittinenae866de2020-01-20 15:44:19 +0200379 tristate "Clock driver for 32K clk gates on ROHM PMICs"
Matti Vaittinenfa5b6542021-05-25 13:15:10 +0300380 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
Matti Vaittinen2e622462018-12-07 12:01:44 +0200381 help
Matti Vaittinenfa5b6542021-05-25 13:15:10 +0300382 This driver supports ROHM BD71837, BD71847, BD71850, BD71815
383 and BD71828 PMICs clock gates.
Matti Vaittinen2e622462018-12-07 12:01:44 +0200384
Jan Kotas50cc4ca2018-12-13 12:49:29 +0000385config COMMON_CLK_FIXED_MMIO
386 bool "Clock driver for Memory Mapped Fixed values"
387 depends on COMMON_CLK && OF
388 help
389 Support for Memory Mapped IO Fixed clocks
390
Damien Le Moalc6ca7612021-02-10 14:02:14 +0900391config COMMON_CLK_K210
392 bool "Clock driver for the Canaan Kendryte K210 SoC"
393 depends on OF && RISCV && SOC_CANAAN
394 default SOC_CANAAN
395 help
396 Support for the Canaan Kendryte K210 RISC-V SoC clocks.
397
Manivannan Sadhasivam3495e292018-03-26 23:08:57 +0530398source "drivers/clk/actions/Kconfig"
Paul Walmsley7b9487a2019-04-30 13:50:58 -0700399source "drivers/clk/analogbits/Kconfig"
Serge Seminb7d950b2020-05-27 01:20:55 +0300400source "drivers/clk/baikal-t1/Kconfig"
Stephen Boyd64a12c52015-05-14 17:38:21 -0700401source "drivers/clk/bcm/Kconfig"
Bintian Wang72ea4862015-05-29 10:08:38 +0800402source "drivers/clk/hisilicon/Kconfig"
Paul Burton6b0fd6c2017-06-17 13:52:47 -0700403source "drivers/clk/imgtec/Kconfig"
Aisheng Dong3a48d912018-12-13 15:42:50 +0000404source "drivers/clk/imx/Kconfig"
Paul Cercueil0880fb82018-08-23 15:17:41 +0200405source "drivers/clk/ingenic/Kconfig"
Tero Kristob745c072017-06-13 10:09:27 +0300406source "drivers/clk/keystone/Kconfig"
James Liao2886c842016-08-19 13:34:49 +0800407source "drivers/clk/mediatek/Kconfig"
Michael Turquettecb7c47d2016-05-23 14:29:13 -0700408source "drivers/clk/meson/Kconfig"
Daniel Palmerbef7a782021-02-11 14:22:03 +0900409source "drivers/clk/mstar/Kconfig"
Sebastian Hesselbarth97fa4cf2012-11-17 15:22:22 +0100410source "drivers/clk/mvebu/Kconfig"
Jiaxun Yang90429202021-07-23 10:25:37 +0800411source "drivers/clk/pistachio/Kconfig"
James Liaob9e65eb2016-01-28 16:58:57 +0800412source "drivers/clk/qcom/Kconfig"
Sergio Paracuellos48df7a22021-04-10 07:50:56 +0200413source "drivers/clk/ralink/Kconfig"
Geert Uytterhoevena5bd7f72016-04-13 11:08:42 +0200414source "drivers/clk/renesas/Kconfig"
Elaine Zhang4d98ed12020-09-14 10:23:04 +0800415source "drivers/clk/rockchip/Kconfig"
Pankaj Dubey4ce9b85e2014-05-08 13:07:08 +0900416source "drivers/clk/samsung/Kconfig"
Paul Walmsley30b8e272019-04-30 13:51:00 -0700417source "drivers/clk/sifive/Kconfig"
Krzysztof Kozlowski3b218ba2021-03-11 16:25:31 +0100418source "drivers/clk/socfpga/Kconfig"
Chunyan Zhangd41f59f2017-12-07 20:57:05 +0800419source "drivers/clk/sprd/Kconfig"
Geert Uytterhoeven4210be62021-06-01 15:57:52 +0200420source "drivers/clk/starfive/Kconfig"
Maxime Ripard49c726d2019-03-19 15:37:59 +0100421source "drivers/clk/sunxi/Kconfig"
Maxime Ripard1d80c142016-06-29 21:05:23 +0200422source "drivers/clk/sunxi-ng/Kconfig"
Thierry Reding31b52ba2015-04-01 09:10:58 +0200423source "drivers/clk/tegra/Kconfig"
Tony Lindgren21330492016-02-26 09:35:05 -0800424source "drivers/clk/ti/Kconfig"
Masahiro Yamada734d82f2016-09-16 16:40:03 +0900425source "drivers/clk/uniphier/Kconfig"
Nobuhiro Iwamatsub4cbe602021-10-25 12:10:37 +0900426source "drivers/clk/visconti/Kconfig"
Rahul Tanward058fd92020-04-17 13:54:47 +0800427source "drivers/clk/x86/Kconfig"
Michael Trettera2fe7ba2021-01-21 08:16:59 +0100428source "drivers/clk/xilinx/Kconfig"
Jolly Shah3fde0e12018-10-08 11:21:46 -0700429source "drivers/clk/zynqmp/Kconfig"
James Liaob9e65eb2016-01-28 16:58:57 +0800430
Stephen Boydbbd7ffd2020-04-08 23:44:13 -0700431endif