blob: ea1aa5283e8ed9215537594a33a243d47b363e25 [file] [log] [blame]
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +02001/*
2 * Copyright (c) 2011-2014, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#ifndef _NVME_H
15#define _NVME_H
16
17#include <linux/nvme.h>
Christoph Hellwiga6a51492017-10-18 16:59:25 +020018#include <linux/cdev.h>
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +020019#include <linux/pci.h>
20#include <linux/kref.h>
21#include <linux/blk-mq.h>
Matias Bjørlingb0b4e092016-09-16 14:25:07 +020022#include <linux/lightnvm.h>
Scott Bauera98e58e52017-02-03 12:50:32 -070023#include <linux/sed-opal.h>
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +020024
Marc Olson8ae4e442017-09-06 17:23:56 -070025extern unsigned int nvme_io_timeout;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +020026#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
27
Marc Olson8ae4e442017-09-06 17:23:56 -070028extern unsigned int admin_timeout;
Christoph Hellwig21d34712015-11-26 09:08:36 +010029#define ADMIN_TIMEOUT (admin_timeout * HZ)
30
Sagi Grimberg038bd4c2016-06-13 16:45:28 +020031#define NVME_DEFAULT_KATO 5
32#define NVME_KATO_GRACE 10
33
Sagi Grimberg9a6327d2017-06-07 20:31:55 +020034extern struct workqueue_struct *nvme_wq;
35
Matias Bjørlingca064082015-10-29 17:57:29 +090036enum {
37 NVME_NS_LBA = 0,
38 NVME_NS_LIGHTNVM = 1,
39};
40
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +020041/*
Christoph Hellwig106198e2015-11-26 10:07:41 +010042 * List of workarounds for devices that required behavior not specified in
43 * the standard.
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +020044 */
Christoph Hellwig106198e2015-11-26 10:07:41 +010045enum nvme_quirks {
46 /*
47 * Prefers I/O aligned to a stripe size specified in a vendor
48 * specific Identify field.
49 */
50 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
Keith Busch540c8012015-10-22 15:45:06 -060051
52 /*
53 * The controller doesn't handle Identify value others than 0 or 1
54 * correctly.
55 */
56 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
Keith Busch08095e72016-03-04 13:15:17 -070057
58 /*
Christoph Hellwige850fd12017-04-05 19:21:13 +020059 * The controller deterministically returns O's on reads to
60 * logical blocks that deallocate was called on.
Keith Busch08095e72016-03-04 13:15:17 -070061 */
Christoph Hellwige850fd12017-04-05 19:21:13 +020062 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
Guilherme G. Piccoli54adc012016-06-14 18:22:41 -030063
64 /*
65 * The controller needs a delay before starts checking the device
66 * readiness, which is done by reading the NVME_CSTS_RDY bit.
67 */
68 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
Andy Lutomirskic5552fd2017-02-07 10:08:45 -080069
70 /*
71 * APST should not be used.
72 */
73 NVME_QUIRK_NO_APST = (1 << 4),
Andy Lutomirskiff5350a2017-04-20 13:37:55 -070074
75 /*
76 * The deepest sleep state should not be used.
77 */
78 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
Christoph Hellwig608cc4b2017-09-06 11:45:24 +020079
80 /*
81 * Supports the LighNVM command set if indicated in vs[1].
82 */
83 NVME_QUIRK_LIGHTNVM = (1 << 6),
Christoph Hellwig106198e2015-11-26 10:07:41 +010084};
85
Christoph Hellwigd49187e2016-11-10 07:32:33 -080086/*
87 * Common request structure for NVMe passthrough. All drivers must have
88 * this structure as the first member of their request-private data.
89 */
90struct nvme_request {
91 struct nvme_command *cmd;
92 union nvme_result result;
Christoph Hellwig44e44b22017-04-05 19:18:11 +020093 u8 retries;
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +020094 u8 flags;
95 u16 status;
96};
97
Christoph Hellwig32acab32017-11-02 12:59:30 +010098/*
99 * Mark a bio as coming in through the mpath node.
100 */
101#define REQ_NVME_MPATH REQ_DRV
102
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200103enum {
104 NVME_REQ_CANCELLED = (1 << 0),
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800105};
106
107static inline struct nvme_request *nvme_req(struct request *req)
108{
109 return blk_mq_rq_to_pdu(req);
110}
111
Guilherme G. Piccoli54adc012016-06-14 18:22:41 -0300112/* The below value is the specific amount of delay needed before checking
113 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
114 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
115 * found empirically.
116 */
Jeff Lien8c97eec2017-11-21 10:44:37 -0600117#define NVME_QUIRK_DELAY_AMOUNT 2300
Guilherme G. Piccoli54adc012016-06-14 18:22:41 -0300118
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200119enum nvme_ctrl_state {
120 NVME_CTRL_NEW,
121 NVME_CTRL_LIVE,
122 NVME_CTRL_RESETTING,
Christoph Hellwigdef61ec2016-07-06 21:55:49 +0900123 NVME_CTRL_RECONNECTING,
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200124 NVME_CTRL_DELETING,
Keith Busch0ff9d4e2016-05-12 08:37:14 -0600125 NVME_CTRL_DEAD,
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200126};
127
Christoph Hellwig1c63dc62015-11-26 10:06:56 +0100128struct nvme_ctrl {
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200129 enum nvme_ctrl_state state;
Andy Lutomirskibd4da3a2017-02-22 13:32:36 -0700130 bool identified;
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200131 spinlock_t lock;
Christoph Hellwig1c63dc62015-11-26 10:06:56 +0100132 const struct nvme_ctrl_ops *ops;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200133 struct request_queue *admin_q;
Christoph Hellwig07bfcd02016-06-13 16:45:26 +0200134 struct request_queue *connect_q;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200135 struct device *dev;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200136 int instance;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +0100137 struct blk_mq_tag_set *tagset;
Sagi Grimberg34b6c232017-07-10 09:22:29 +0300138 struct blk_mq_tag_set *admin_tagset;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +0100139 struct list_head namespaces;
Christoph Hellwig69d3b8a2015-12-24 15:27:00 +0100140 struct mutex namespaces_mutex;
Christoph Hellwigd22524a2017-10-18 13:25:42 +0200141 struct device ctrl_device;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +0100142 struct device *device; /* char device */
Christoph Hellwiga6a51492017-10-18 16:59:25 +0200143 struct cdev cdev;
Christoph Hellwigd86c4d82017-06-15 15:41:08 +0200144 struct work_struct reset_work;
Christoph Hellwigc5017e82017-10-29 10:44:29 +0200145 struct work_struct delete_work;
Christoph Hellwig1c63dc62015-11-26 10:06:56 +0100146
Christoph Hellwigab9e00c2017-11-09 13:48:55 +0100147 struct nvme_subsystem *subsys;
148 struct list_head subsys_entry;
149
Christoph Hellwig4f1244c2017-02-17 13:59:39 +0100150 struct opal_dev *opal_dev;
Scott Bauera98e58e52017-02-03 12:50:32 -0700151
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200152 char name[12];
Christoph Hellwig76e39142016-04-16 14:57:58 -0400153 u16 cntlid;
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +0100154
155 u32 ctrl_config;
Arnav Dawnb6dccf72017-07-12 16:10:40 +0530156 u16 mtfa;
Sagi Grimbergd858e5f2017-04-24 10:58:29 +0300157 u32 queue_count;
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +0100158
Sagi Grimberg20d0dfe2017-06-27 22:16:38 +0300159 u64 cap;
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +0100160 u32 page_size;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200161 u32 max_hw_sectors;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200162 u16 oncs;
Scott Bauer8a9ae522017-02-17 13:59:40 +0100163 u16 oacs;
Jens Axboef5d11842017-06-27 12:03:06 -0600164 u16 nssa;
165 u16 nr_streams;
Christoph Hellwig6bf25d12015-11-20 09:36:44 +0100166 atomic_t abort_limit;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200167 u8 vwc;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +0100168 u32 vs;
Christoph Hellwig07bfcd02016-06-13 16:45:26 +0200169 u32 sgls;
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200170 u16 kas;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -0800171 u8 npss;
172 u8 apsta;
Keith Busche3d78742017-11-07 15:13:14 -0700173 u32 aen_result;
Martin K. Petersen07fbd322017-08-25 19:14:50 -0400174 unsigned int shutdown_timeout;
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200175 unsigned int kato;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +0100176 bool subsystem;
Christoph Hellwig106198e2015-11-26 10:07:41 +0100177 unsigned long quirks;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -0800178 struct nvme_id_power_state psd[32];
Keith Busch84fef622017-11-07 10:28:32 -0700179 struct nvme_effects_log *effects;
Christoph Hellwig5955be22016-04-26 13:51:59 +0200180 struct work_struct scan_work;
Christoph Hellwigf866fc422016-04-26 13:52:00 +0200181 struct work_struct async_event_work;
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200182 struct delayed_work ka_work;
Arnav Dawnb6dccf72017-07-12 16:10:40 +0530183 struct work_struct fw_act_work;
Christoph Hellwig07bfcd02016-06-13 16:45:26 +0200184
Andy Lutomirskic5552fd2017-02-07 10:08:45 -0800185 /* Power saving configuration */
186 u64 ps_max_latency_us;
Kai-Heng Feng76a5af82017-06-26 16:39:54 -0400187 bool apst_enabled;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -0800188
Christoph Hellwig044a9df2017-09-11 12:09:28 -0400189 /* PCIe only: */
Christoph Hellwigfe6d53c2017-05-12 17:16:10 +0200190 u32 hmpre;
191 u32 hmmin;
Christoph Hellwig044a9df2017-09-11 12:09:28 -0400192 u32 hmminds;
193 u16 hmmaxd;
Christoph Hellwigfe6d53c2017-05-12 17:16:10 +0200194
Christoph Hellwig07bfcd02016-06-13 16:45:26 +0200195 /* Fabrics only */
196 u16 sqsize;
197 u32 ioccsz;
198 u32 iorcsz;
199 u16 icdoff;
200 u16 maxcmd;
Sagi Grimbergfdf9dfa2017-05-04 13:33:15 +0300201 int nr_reconnects;
Christoph Hellwig07bfcd02016-06-13 16:45:26 +0200202 struct nvmf_ctrl_options *opts;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200203};
204
Christoph Hellwigab9e00c2017-11-09 13:48:55 +0100205struct nvme_subsystem {
206 int instance;
207 struct device dev;
208 /*
209 * Because we unregister the device on the last put we need
210 * a separate refcount.
211 */
212 struct kref ref;
213 struct list_head entry;
214 struct mutex lock;
215 struct list_head ctrls;
Christoph Hellwiged754e52017-11-09 13:50:43 +0100216 struct list_head nsheads;
Christoph Hellwigab9e00c2017-11-09 13:48:55 +0100217 char subnqn[NVMF_NQN_SIZE];
218 char serial[20];
219 char model[40];
220 char firmware_rev[8];
221 u8 cmic;
222 u16 vendor_id;
Christoph Hellwiged754e52017-11-09 13:50:43 +0100223 struct ida ns_ida;
Christoph Hellwigab9e00c2017-11-09 13:48:55 +0100224};
225
Christoph Hellwig002fab02017-11-09 13:50:16 +0100226/*
227 * Container structure for uniqueue namespace identifiers.
228 */
229struct nvme_ns_ids {
230 u8 eui64[8];
231 u8 nguid[16];
232 uuid_t uuid;
233};
234
Christoph Hellwiged754e52017-11-09 13:50:43 +0100235/*
236 * Anchor structure for namespaces. There is one for each namespace in a
237 * NVMe subsystem that any of our controllers can see, and the namespace
238 * structure for each controller is chained of it. For private namespaces
239 * there is a 1:1 relation to our namespace structures, that is ->list
240 * only ever has a single entry for private namespaces.
241 */
242struct nvme_ns_head {
Christoph Hellwig32acab32017-11-02 12:59:30 +0100243#ifdef CONFIG_NVME_MULTIPATH
244 struct gendisk *disk;
245 struct nvme_ns __rcu *current_path;
246 struct bio_list requeue_list;
247 spinlock_t requeue_lock;
248 struct work_struct requeue_work;
249#endif
Christoph Hellwiged754e52017-11-09 13:50:43 +0100250 struct list_head list;
251 struct srcu_struct srcu;
252 struct nvme_subsystem *subsys;
253 unsigned ns_id;
254 struct nvme_ns_ids ids;
255 struct list_head entry;
256 struct kref ref;
257 int instance;
258};
259
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200260struct nvme_ns {
261 struct list_head list;
262
Christoph Hellwig1c63dc62015-11-26 10:06:56 +0100263 struct nvme_ctrl *ctrl;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200264 struct request_queue *queue;
265 struct gendisk *disk;
Christoph Hellwiged754e52017-11-09 13:50:43 +0100266 struct list_head siblings;
Matias Bjørlingb0b4e092016-09-16 14:25:07 +0200267 struct nvm_dev *ndev;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200268 struct kref kref;
Christoph Hellwiged754e52017-11-09 13:50:43 +0100269 struct nvme_ns_head *head;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200270
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200271 int lba_shift;
272 u16 ms;
Jens Axboef5d11842017-06-27 12:03:06 -0600273 u16 sgs;
274 u32 sws;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200275 bool ext;
276 u8 pi_type;
Keith Busch646017a2016-02-24 09:15:54 -0700277 unsigned long flags;
Keith Busch646017a2016-02-24 09:15:54 -0700278#define NVME_NS_REMOVING 0
Keith Busch69d9a992016-02-24 09:15:56 -0700279#define NVME_NS_DEAD 1
Christoph Hellwig57eeaf82017-08-16 15:47:37 +0200280 u16 noiob;
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200281};
282
Christoph Hellwig1c63dc62015-11-26 10:06:56 +0100283struct nvme_ctrl_ops {
Ming Lin1a353d82016-06-13 16:45:24 +0200284 const char *name;
Sagi Grimberge439bb12016-02-10 10:03:29 -0800285 struct module *module;
Christoph Hellwigd3d5b872017-05-20 15:14:44 +0200286 unsigned int flags;
287#define NVME_F_FABRICS (1 << 0)
Christoph Hellwigc81bfba2017-05-20 15:14:45 +0200288#define NVME_F_METADATA_SUPPORTED (1 << 1)
Christoph Hellwig1c63dc62015-11-26 10:06:56 +0100289 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +0100290 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
Christoph Hellwig7fd89302015-11-28 15:37:52 +0100291 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100292 void (*free_ctrl)(struct nvme_ctrl *ctrl);
Keith Buschad22c352017-11-07 15:13:12 -0700293 void (*submit_async_event)(struct nvme_ctrl *ctrl);
Christoph Hellwigc5017e82017-10-29 10:44:29 +0200294 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
Ming Lin1a353d82016-06-13 16:45:24 +0200295 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
Sagi Grimberg31b84462017-10-11 12:53:07 +0300296 int (*reinit_request)(void *data, struct request *rq);
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200297};
298
Christoph Hellwig1c63dc62015-11-26 10:06:56 +0100299static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
300{
301 u32 val = 0;
302
303 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
304 return false;
305 return val & NVME_CSTS_RDY;
306}
307
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +0100308static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
309{
310 if (!ctrl->subsystem)
311 return -ENOTTY;
312 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
313}
314
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200315static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
316{
317 return (sector >> (ns->lba_shift - 9));
318}
319
Ming Lin69042422016-04-25 14:33:20 -0700320static inline void nvme_cleanup_cmd(struct request *req)
321{
Christoph Hellwigf9d03f92016-12-08 15:20:32 -0700322 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
323 kfree(page_address(req->special_vec.bv_page) +
324 req->special_vec.bv_offset);
325 }
Ming Lin69042422016-04-25 14:33:20 -0700326}
327
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200328static inline void nvme_end_request(struct request *req, __le16 status,
329 union nvme_result result)
Christoph Hellwig15a190f72015-10-16 07:58:39 +0200330{
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200331 struct nvme_request *rq = nvme_req(req);
332
333 rq->status = le16_to_cpu(status) >> 1;
334 rq->result = result;
Christoph Hellwig08e00292017-04-20 16:03:09 +0200335 blk_mq_complete_request(req);
Christoph Hellwig15a190f72015-10-16 07:58:39 +0200336}
337
Christoph Hellwigd22524a2017-10-18 13:25:42 +0200338static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
339{
340 get_device(ctrl->device);
341}
342
343static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
344{
345 put_device(ctrl->device);
346}
347
Christoph Hellwig77f02a72017-03-30 13:41:32 +0200348void nvme_complete_rq(struct request *req);
Ming Linc55a2fd2016-05-18 14:05:02 -0700349void nvme_cancel_request(struct request *req, void *data, bool reserved);
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200350bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
351 enum nvme_ctrl_state new_state);
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +0100352int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
353int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
354int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +0100355int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
356 const struct nvme_ctrl_ops *ops, unsigned long quirks);
Keith Busch53029b02015-11-28 15:41:02 +0100357void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
Sagi Grimbergd09f2b42017-07-02 10:56:43 +0300358void nvme_start_ctrl(struct nvme_ctrl *ctrl);
359void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100360void nvme_put_ctrl(struct nvme_ctrl *ctrl);
Christoph Hellwig7fd89302015-11-28 15:37:52 +0100361int nvme_init_identify(struct nvme_ctrl *ctrl);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +0100362
Christoph Hellwig5955be22016-04-26 13:51:59 +0200363void nvme_queue_scan(struct nvme_ctrl *ctrl);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +0100364void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100365
Christoph Hellwig4f1244c2017-02-17 13:59:39 +0100366int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
367 bool send);
Scott Bauera98e58e52017-02-03 12:50:32 -0700368
Christoph Hellwig7bf58532016-11-10 07:32:34 -0800369void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
370 union nvme_result *res);
Christoph Hellwigf866fc422016-04-26 13:52:00 +0200371
Keith Busch25646262016-01-04 09:10:57 -0700372void nvme_stop_queues(struct nvme_ctrl *ctrl);
373void nvme_start_queues(struct nvme_ctrl *ctrl);
Keith Busch69d9a992016-02-24 09:15:56 -0700374void nvme_kill_queues(struct nvme_ctrl *ctrl);
Keith Busch302ad8c2017-03-01 14:22:12 -0500375void nvme_unfreeze(struct nvme_ctrl *ctrl);
376void nvme_wait_freeze(struct nvme_ctrl *ctrl);
377void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
378void nvme_start_freeze(struct nvme_ctrl *ctrl);
Sagi Grimberg31b84462017-10-11 12:53:07 +0300379int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set);
Sagi Grimberg363c9aa2015-12-24 15:26:59 +0100380
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200381#define NVME_QID_ANY -1
Christoph Hellwig41609822015-11-20 09:00:02 +0100382struct request *nvme_alloc_request(struct request_queue *q,
Bart Van Assche9a95e4e2017-11-09 10:49:59 -0800383 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200384blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
Ming Lin8093f7c2016-04-12 13:10:14 -0600385 struct nvme_command *cmd);
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200386int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
387 void *buf, unsigned bufflen);
388int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800389 union nvme_result *result, void *buffer, unsigned bufflen,
Bart Van Assche9a95e4e2017-11-09 10:49:59 -0800390 unsigned timeout, int qid, int at_head,
391 blk_mq_req_flags_t flags);
Christoph Hellwig9a0be7a2015-11-26 11:09:06 +0100392int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200393void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
394void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
Christoph Hellwigd86c4d82017-06-15 15:41:08 +0200395int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
Christoph Hellwigc5017e82017-10-29 10:44:29 +0200396int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
397int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200398
Christoph Hellwig5b85b822017-11-09 13:51:03 +0100399extern const struct attribute_group nvme_ns_id_attr_group;
Christoph Hellwig32acab32017-11-02 12:59:30 +0100400extern const struct block_device_operations nvme_ns_head_ops;
401
402#ifdef CONFIG_NVME_MULTIPATH
403void nvme_failover_req(struct request *req);
404bool nvme_req_needs_failover(struct request *req);
405void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
406int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
407void nvme_mpath_add_disk(struct nvme_ns_head *head);
Hannes Reineckee9a48032017-11-09 17:57:06 +0100408void nvme_mpath_add_disk_links(struct nvme_ns *ns);
Christoph Hellwig32acab32017-11-02 12:59:30 +0100409void nvme_mpath_remove_disk(struct nvme_ns_head *head);
Hannes Reineckee9a48032017-11-09 17:57:06 +0100410void nvme_mpath_remove_disk_links(struct nvme_ns *ns);
Christoph Hellwig32acab32017-11-02 12:59:30 +0100411
412static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
413{
414 struct nvme_ns_head *head = ns->head;
415
416 if (head && ns == srcu_dereference(head->current_path, &head->srcu))
417 rcu_assign_pointer(head->current_path, NULL);
418}
419struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
420#else
421static inline void nvme_failover_req(struct request *req)
422{
423}
424static inline bool nvme_req_needs_failover(struct request *req)
425{
426 return false;
427}
428static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
429{
430}
431static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
432 struct nvme_ns_head *head)
433{
434 return 0;
435}
436static inline void nvme_mpath_add_disk(struct nvme_ns_head *head)
437{
438}
439static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
440{
441}
Hannes Reineckee9a48032017-11-09 17:57:06 +0100442static inline void nvme_mpath_add_disk_links(struct nvme_ns *ns)
443{
444}
445static inline void nvme_mpath_remove_disk_links(struct nvme_ns *ns)
446{
447}
Christoph Hellwig32acab32017-11-02 12:59:30 +0100448static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
449{
450}
451#endif /* CONFIG_NVME_MULTIPATH */
452
Keith Buschc4699e72015-11-28 16:49:22 +0100453#ifdef CONFIG_NVM
Matias Bjørling3dc87dd2016-11-28 22:38:53 +0100454int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
Matias Bjørlingb0b4e092016-09-16 14:25:07 +0200455void nvme_nvm_unregister(struct nvme_ns *ns);
Matias Bjørling3dc87dd2016-11-28 22:38:53 +0100456int nvme_nvm_register_sysfs(struct nvme_ns *ns);
457void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
Matias Bjørling84d4add2017-01-31 13:17:16 +0100458int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
Keith Buschc4699e72015-11-28 16:49:22 +0100459#else
Matias Bjørlingb0b4e092016-09-16 14:25:07 +0200460static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
Matias Bjørling3dc87dd2016-11-28 22:38:53 +0100461 int node)
Keith Buschc4699e72015-11-28 16:49:22 +0100462{
463 return 0;
464}
465
Matias Bjørlingb0b4e092016-09-16 14:25:07 +0200466static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
Matias Bjørling3dc87dd2016-11-28 22:38:53 +0100467static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
468{
469 return 0;
470}
471static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
Matias Bjørling84d4add2017-01-31 13:17:16 +0100472static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
473 unsigned long arg)
474{
475 return -ENOTTY;
476}
Matias Bjørling3dc87dd2016-11-28 22:38:53 +0100477#endif /* CONFIG_NVM */
478
Simon A. F. Lund40267ef2016-09-16 14:25:08 +0200479static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
480{
481 return dev_to_disk(dev)->private_data;
482}
Matias Bjørlingca064082015-10-29 17:57:29 +0900483
Christoph Hellwig5bae7f72015-11-28 15:39:07 +0100484int __init nvme_core_init(void);
485void nvme_core_exit(void);
486
Christoph Hellwigf11bb3e2015-10-03 15:46:41 +0200487#endif /* _NVME_H */