Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* Copyright (c) 2018, Intel Corporation. */ |
| 3 | |
| 4 | #ifndef _ICE_H_ |
| 5 | #define _ICE_H_ |
| 6 | |
| 7 | #include <linux/types.h> |
| 8 | #include <linux/errno.h> |
| 9 | #include <linux/kernel.h> |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/netdevice.h> |
| 12 | #include <linux/compiler.h> |
Anirudh Venkataramanan | dc49c77 | 2018-03-20 07:58:09 -0700 | [diff] [blame] | 13 | #include <linux/etherdevice.h> |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 14 | #include <linux/skbuff.h> |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 15 | #include <linux/cpumask.h> |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 16 | #include <linux/rtnetlink.h> |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 17 | #include <linux/if_vlan.h> |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 18 | #include <linux/dma-mapping.h> |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 19 | #include <linux/pci.h> |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 20 | #include <linux/workqueue.h> |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 21 | #include <linux/aer.h> |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 22 | #include <linux/interrupt.h> |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 23 | #include <linux/ethtool.h> |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 24 | #include <linux/timer.h> |
Anirudh Venkataramanan | 7ec59ee | 2018-03-20 07:58:06 -0700 | [diff] [blame] | 25 | #include <linux/delay.h> |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 26 | #include <linux/bitmap.h> |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 27 | #include <linux/log2.h> |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 28 | #include <linux/ip.h> |
Anirudh Venkataramanan | cf909e1 | 2018-12-19 10:03:32 -0800 | [diff] [blame] | 29 | #include <linux/sctp.h> |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 30 | #include <linux/ipv6.h> |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 31 | #include <linux/if_bridge.h> |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 32 | #include <linux/avf/virtchnl.h> |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 33 | #include <net/ipv6.h> |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 34 | #include "ice_devids.h" |
| 35 | #include "ice_type.h" |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 36 | #include "ice_txrx.h" |
Anirudh Venkataramanan | 37b6f64 | 2019-02-28 15:24:22 -0800 | [diff] [blame] | 37 | #include "ice_dcb.h" |
Anirudh Venkataramanan | 9c20346 | 2018-03-20 07:58:08 -0700 | [diff] [blame] | 38 | #include "ice_switch.h" |
Anirudh Venkataramanan | f31e4b6 | 2018-03-20 07:58:07 -0700 | [diff] [blame] | 39 | #include "ice_common.h" |
Anirudh Venkataramanan | 9c20346 | 2018-03-20 07:58:08 -0700 | [diff] [blame] | 40 | #include "ice_sched.h" |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 41 | #include "ice_virtchnl_pf.h" |
Anirudh Venkataramanan | 007676b | 2018-09-19 17:42:57 -0700 | [diff] [blame] | 42 | #include "ice_sriov.h" |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 43 | |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 44 | extern const char ice_drv_ver[]; |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 45 | #define ICE_BAR0 0 |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 46 | #define ICE_REQ_DESC_MULTIPLE 32 |
Preethi Banala | 8be92a7 | 2019-04-16 10:34:56 -0700 | [diff] [blame] | 47 | #define ICE_MIN_NUM_DESC 64 |
Bruce Allan | 3b6bf29 | 2018-09-19 17:23:11 -0700 | [diff] [blame] | 48 | #define ICE_MAX_NUM_DESC 8160 |
Brett Creeley | 1aec6e1 | 2019-04-16 10:30:41 -0700 | [diff] [blame] | 49 | #define ICE_DFLT_MIN_RX_DESC 512 |
| 50 | /* if the default number of Rx descriptors between ICE_MAX_NUM_DESC and the |
| 51 | * number of descriptors to fill up an entire page is greater than or equal to |
| 52 | * ICE_DFLT_MIN_RX_DESC set it based on page size, otherwise set it to |
| 53 | * ICE_DFLT_MIN_RX_DESC |
Brett Creeley | ad71b25 | 2019-02-08 12:50:59 -0800 | [diff] [blame] | 54 | */ |
Brett Creeley | 1aec6e1 | 2019-04-16 10:30:41 -0700 | [diff] [blame] | 55 | #define ICE_DFLT_NUM_RX_DESC \ |
| 56 | min_t(u16, ICE_MAX_NUM_DESC, \ |
| 57 | max_t(u16, ALIGN(PAGE_SIZE / sizeof(union ice_32byte_rx_desc), \ |
| 58 | ICE_REQ_DESC_MULTIPLE), \ |
| 59 | ICE_DFLT_MIN_RX_DESC)) |
| 60 | /* set default number of Tx descriptors to the minimum between ICE_MAX_NUM_DESC |
| 61 | * and the number of descriptors to fill up an entire page |
| 62 | */ |
Brett Creeley | ad71b25 | 2019-02-08 12:50:59 -0800 | [diff] [blame] | 63 | #define ICE_DFLT_NUM_TX_DESC min_t(u16, ICE_MAX_NUM_DESC, \ |
| 64 | ALIGN(PAGE_SIZE / \ |
| 65 | sizeof(struct ice_tx_desc), \ |
| 66 | ICE_REQ_DESC_MULTIPLE)) |
| 67 | |
Anirudh Venkataramanan | 5513b92 | 2018-03-20 07:58:17 -0700 | [diff] [blame] | 68 | #define ICE_DFLT_TRAFFIC_CLASS BIT(0) |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 69 | #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 70 | #define ICE_ETHTOOL_FWVER_LEN 32 |
Anirudh Venkataramanan | f31e4b6 | 2018-03-20 07:58:07 -0700 | [diff] [blame] | 71 | #define ICE_AQ_LEN 64 |
Brett Creeley | 1183621 | 2019-07-25 01:55:38 -0700 | [diff] [blame] | 72 | #define ICE_MBXSQ_LEN 64 |
| 73 | #define ICE_MBXRQ_LEN 512 |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 74 | #define ICE_MIN_MSIX 2 |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 75 | #define ICE_NO_VSI 0xffff |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 76 | #define ICE_VSI_MAP_CONTIG 0 |
| 77 | #define ICE_VSI_MAP_SCATTER 1 |
| 78 | #define ICE_MAX_SCATTER_TXQS 16 |
| 79 | #define ICE_MAX_SCATTER_RXQS 16 |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 80 | #define ICE_Q_WAIT_RETRY_LIMIT 10 |
| 81 | #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 82 | #define ICE_MAX_LG_RSS_QS 256 |
| 83 | #define ICE_MAX_SMALL_RSS_QS 8 |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 84 | #define ICE_RES_VALID_BIT 0x8000 |
| 85 | #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 86 | #define ICE_INVAL_Q_INDEX 0xffff |
Anirudh Venkataramanan | 0f9d502 | 2018-08-09 06:29:50 -0700 | [diff] [blame] | 87 | #define ICE_INVAL_VFID 256 |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 88 | |
Anirudh Venkataramanan | afd9d4a | 2018-10-26 10:40:51 -0700 | [diff] [blame] | 89 | #define ICE_MAX_RESET_WAIT 20 |
| 90 | |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 91 | #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) |
| 92 | |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 93 | #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) |
| 94 | |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 95 | #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \ |
Maciej Fijalkowski | 5ed5d31 | 2019-02-08 12:50:29 -0800 | [diff] [blame] | 96 | (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2))) |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 97 | |
| 98 | #define ICE_UP_TABLE_TRANSLATE(val, i) \ |
| 99 | (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ |
| 100 | ICE_AQ_VSI_UP_TABLE_UP##i##_M) |
| 101 | |
Anirudh Venkataramanan | 2b245cb | 2018-03-20 07:58:14 -0700 | [diff] [blame] | 102 | #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 103 | #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 104 | #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 105 | |
Anirudh Venkataramanan | 0b28b70 | 2018-03-20 07:58:18 -0700 | [diff] [blame] | 106 | /* Macro for each VSI in a PF */ |
| 107 | #define ice_for_each_vsi(pf, i) \ |
| 108 | for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) |
| 109 | |
Anirudh Venkataramanan | d337f2a | 2018-10-26 11:44:47 -0700 | [diff] [blame] | 110 | /* Macros for each Tx/Rx ring in a VSI */ |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 111 | #define ice_for_each_txq(vsi, i) \ |
| 112 | for ((i) = 0; (i) < (vsi)->num_txq; (i)++) |
| 113 | |
| 114 | #define ice_for_each_rxq(vsi, i) \ |
| 115 | for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) |
| 116 | |
Anirudh Venkataramanan | d337f2a | 2018-10-26 11:44:47 -0700 | [diff] [blame] | 117 | /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ |
Jacob Keller | f8ba7db | 2018-08-09 06:28:54 -0700 | [diff] [blame] | 118 | #define ice_for_each_alloc_txq(vsi, i) \ |
| 119 | for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) |
| 120 | |
| 121 | #define ice_for_each_alloc_rxq(vsi, i) \ |
| 122 | for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) |
| 123 | |
Brett Creeley | 67fe64d | 2018-12-19 10:03:30 -0800 | [diff] [blame] | 124 | #define ice_for_each_q_vector(vsi, i) \ |
| 125 | for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) |
| 126 | |
Akeem G Abodunrin | 5eda8af | 2019-02-26 16:35:14 -0800 | [diff] [blame] | 127 | #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ |
| 128 | ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) |
| 129 | |
| 130 | #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ |
| 131 | ICE_PROMISC_MCAST_TX | \ |
| 132 | ICE_PROMISC_UCAST_RX | \ |
| 133 | ICE_PROMISC_MCAST_RX | \ |
| 134 | ICE_PROMISC_VLAN_TX | \ |
| 135 | ICE_PROMISC_VLAN_RX) |
| 136 | |
| 137 | #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) |
| 138 | |
| 139 | #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ |
| 140 | ICE_PROMISC_MCAST_RX | \ |
| 141 | ICE_PROMISC_VLAN_TX | \ |
| 142 | ICE_PROMISC_VLAN_RX) |
| 143 | |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 144 | struct ice_tc_info { |
| 145 | u16 qoffset; |
Usha Ketineni | c5a2a4a | 2018-10-26 11:44:35 -0700 | [diff] [blame] | 146 | u16 qcount_tx; |
| 147 | u16 qcount_rx; |
| 148 | u8 netdev_tc; |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 149 | }; |
| 150 | |
| 151 | struct ice_tc_cfg { |
| 152 | u8 numtc; /* Total number of enabled TCs */ |
Anirudh Venkataramanan | f9867df | 2019-02-19 15:04:13 -0800 | [diff] [blame] | 153 | u8 ena_tc; /* Tx map */ |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 154 | struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; |
| 155 | }; |
| 156 | |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 157 | struct ice_res_tracker { |
| 158 | u16 num_entries; |
Brett Creeley | cbe66bf | 2019-04-16 10:30:44 -0700 | [diff] [blame] | 159 | u16 end; |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 160 | u16 list[1]; |
| 161 | }; |
| 162 | |
Anirudh Venkataramanan | 03f7a98 | 2018-12-19 10:03:27 -0800 | [diff] [blame] | 163 | struct ice_qs_cfg { |
Anirudh Venkataramanan | 94c4441 | 2019-02-19 15:04:12 -0800 | [diff] [blame] | 164 | struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ |
Anirudh Venkataramanan | 03f7a98 | 2018-12-19 10:03:27 -0800 | [diff] [blame] | 165 | unsigned long *pf_map; |
| 166 | unsigned long pf_map_size; |
| 167 | unsigned int q_count; |
| 168 | unsigned int scatter_count; |
| 169 | u16 *vsi_map; |
| 170 | u16 vsi_map_offset; |
| 171 | u8 mapping_mode; |
| 172 | }; |
| 173 | |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 174 | struct ice_sw { |
| 175 | struct ice_pf *pf; |
| 176 | u16 sw_id; /* switch ID for this switch */ |
| 177 | u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ |
| 178 | }; |
| 179 | |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 180 | enum ice_state { |
Anirudh Venkataramanan | 0e674ae | 2019-04-16 10:30:43 -0700 | [diff] [blame] | 181 | __ICE_TESTING, |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 182 | __ICE_DOWN, |
Anirudh Venkataramanan | 0b28b70 | 2018-03-20 07:58:18 -0700 | [diff] [blame] | 183 | __ICE_NEEDS_RESTART, |
Anirudh Venkataramanan | 0f9d502 | 2018-08-09 06:29:50 -0700 | [diff] [blame] | 184 | __ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ |
Dave Ertman | 5df7e45 | 2018-09-19 17:23:11 -0700 | [diff] [blame] | 185 | __ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 186 | __ICE_PFR_REQ, /* set by driver and peers */ |
Anirudh Venkataramanan | 0b28b70 | 2018-03-20 07:58:18 -0700 | [diff] [blame] | 187 | __ICE_CORER_REQ, /* set by driver and peers */ |
| 188 | __ICE_GLOBR_REQ, /* set by driver and peers */ |
| 189 | __ICE_CORER_RECV, /* set by OICR handler */ |
| 190 | __ICE_GLOBR_RECV, /* set by OICR handler */ |
| 191 | __ICE_EMPR_RECV, /* set by OICR handler */ |
| 192 | __ICE_SUSPENDED, /* set on module remove path */ |
| 193 | __ICE_RESET_FAILED, /* set by reset/rebuild */ |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 194 | /* When checking for the PF to be in a nominal operating state, the |
| 195 | * bits that are grouped at the beginning of the list need to be |
Anirudh Venkataramanan | df17b7e | 2018-10-26 11:44:46 -0700 | [diff] [blame] | 196 | * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will |
| 197 | * be checked. If you need to add a bit into consideration for nominal |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 198 | * operating state, it must be added before |
Anirudh Venkataramanan | df17b7e | 2018-10-26 11:44:46 -0700 | [diff] [blame] | 199 | * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 200 | * without appropriate consideration. |
| 201 | */ |
| 202 | __ICE_STATE_NOMINAL_CHECK_BITS, |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 203 | __ICE_ADMINQ_EVENT_PENDING, |
Anirudh Venkataramanan | 75d2b25 | 2018-09-19 17:42:54 -0700 | [diff] [blame] | 204 | __ICE_MAILBOXQ_EVENT_PENDING, |
Sudheer Mogilappagari | b3969fd | 2018-08-09 06:29:53 -0700 | [diff] [blame] | 205 | __ICE_MDD_EVENT_PENDING, |
Anirudh Venkataramanan | 007676b | 2018-09-19 17:42:57 -0700 | [diff] [blame] | 206 | __ICE_VFLR_EVENT_PENDING, |
Anirudh Venkataramanan | e94d447 | 2018-03-20 07:58:19 -0700 | [diff] [blame] | 207 | __ICE_FLTR_OVERFLOW_PROMISC, |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 208 | __ICE_VF_DIS, |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 209 | __ICE_CFG_BUSY, |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 210 | __ICE_SERVICE_SCHED, |
Akeem G Abodunrin | 8d81fa5 | 2018-08-09 06:29:57 -0700 | [diff] [blame] | 211 | __ICE_SERVICE_DIS, |
Akeem G Abodunrin | d82dd83 | 2019-07-25 01:55:30 -0700 | [diff] [blame] | 212 | __ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 213 | __ICE_STATE_NBITS /* must be last */ |
| 214 | }; |
| 215 | |
Anirudh Venkataramanan | e94d447 | 2018-03-20 07:58:19 -0700 | [diff] [blame] | 216 | enum ice_vsi_flags { |
| 217 | ICE_VSI_FLAG_UMAC_FLTR_CHANGED, |
| 218 | ICE_VSI_FLAG_MMAC_FLTR_CHANGED, |
| 219 | ICE_VSI_FLAG_VLAN_FLTR_CHANGED, |
| 220 | ICE_VSI_FLAG_PROMISC_CHANGED, |
| 221 | ICE_VSI_FLAG_NBITS /* must be last */ |
| 222 | }; |
| 223 | |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 224 | /* struct that defines a VSI, associated with a dev */ |
| 225 | struct ice_vsi { |
| 226 | struct net_device *netdev; |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 227 | struct ice_sw *vsw; /* switch this VSI is on */ |
| 228 | struct ice_pf *back; /* back pointer to PF */ |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 229 | struct ice_port_info *port_info; /* back pointer to port_info */ |
Anirudh Venkataramanan | d337f2a | 2018-10-26 11:44:47 -0700 | [diff] [blame] | 230 | struct ice_ring **rx_rings; /* Rx ring array */ |
| 231 | struct ice_ring **tx_rings; /* Tx ring array */ |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 232 | struct ice_q_vector **q_vectors; /* q_vector array */ |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 233 | |
| 234 | irqreturn_t (*irq_handler)(int irq, void *data); |
| 235 | |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 236 | u64 tx_linearize; |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 237 | DECLARE_BITMAP(state, __ICE_STATE_NBITS); |
Anirudh Venkataramanan | e94d447 | 2018-03-20 07:58:19 -0700 | [diff] [blame] | 238 | DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS); |
Anirudh Venkataramanan | e94d447 | 2018-03-20 07:58:19 -0700 | [diff] [blame] | 239 | unsigned int current_netdev_flags; |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 240 | u32 tx_restart; |
| 241 | u32 tx_busy; |
| 242 | u32 rx_buf_failed; |
| 243 | u32 rx_page_failed; |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 244 | int num_q_vectors; |
Brett Creeley | cbe66bf | 2019-04-16 10:30:44 -0700 | [diff] [blame] | 245 | int base_vector; /* IRQ base for OS reserved vectors */ |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 246 | enum ice_vsi_type type; |
Anirudh Venkataramanan | df17b7e | 2018-10-26 11:44:46 -0700 | [diff] [blame] | 247 | u16 vsi_num; /* HW (absolute) index of this VSI */ |
| 248 | u16 idx; /* software index in pf->vsi[] */ |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 249 | |
Anirudh Venkataramanan | 8ede017 | 2018-09-19 17:42:56 -0700 | [diff] [blame] | 250 | s16 vf_id; /* VF ID for SR-IOV VSIs */ |
| 251 | |
Akeem G Abodunrin | d95276c | 2019-04-16 10:21:24 -0700 | [diff] [blame] | 252 | u16 ethtype; /* Ethernet protocol for pause frame */ |
| 253 | |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 254 | /* RSS config */ |
| 255 | u16 rss_table_size; /* HW RSS table size */ |
| 256 | u16 rss_size; /* Allocated RSS queues */ |
| 257 | u8 *rss_hkey_user; /* User configured hash keys */ |
| 258 | u8 *rss_lut_user; /* User configured lookup table entries */ |
| 259 | u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ |
| 260 | |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 261 | u16 max_frame; |
| 262 | u16 rx_buf_len; |
| 263 | |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 264 | struct ice_aqc_vsi_props info; /* VSI properties */ |
| 265 | |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 266 | /* VSI stats */ |
| 267 | struct rtnl_link_stats64 net_stats; |
| 268 | struct ice_eth_stats eth_stats; |
| 269 | struct ice_eth_stats eth_stats_prev; |
| 270 | |
Anirudh Venkataramanan | e94d447 | 2018-03-20 07:58:19 -0700 | [diff] [blame] | 271 | struct list_head tmp_sync_list; /* MAC filters to be synced */ |
| 272 | struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ |
| 273 | |
Jesse Brandeburg | 0ab54c5 | 2019-04-16 10:24:35 -0700 | [diff] [blame] | 274 | u8 irqs_ready:1; |
| 275 | u8 current_isup:1; /* Sync 'link up' logging */ |
| 276 | u8 stat_offsets_loaded:1; |
| 277 | u8 vlan_ena:1; |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 278 | |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 279 | /* queue information */ |
| 280 | u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ |
| 281 | u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ |
Anirudh Venkataramanan | 78b5713 | 2019-08-02 01:25:21 -0700 | [diff] [blame] | 282 | u16 *txq_map; /* index in pf->avail_txqs */ |
| 283 | u16 *rxq_map; /* index in pf->avail_rxqs */ |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 284 | u16 alloc_txq; /* Allocated Tx queues */ |
| 285 | u16 num_txq; /* Used Tx queues */ |
| 286 | u16 alloc_rxq; /* Allocated Rx queues */ |
| 287 | u16 num_rxq; /* Used Rx queues */ |
Brett Creeley | ad71b25 | 2019-02-08 12:50:59 -0800 | [diff] [blame] | 288 | u16 num_rx_desc; |
| 289 | u16 num_tx_desc; |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 290 | struct ice_tc_cfg tc_cfg; |
| 291 | } ____cacheline_internodealigned_in_smp; |
| 292 | |
| 293 | /* struct that defines an interrupt vector */ |
| 294 | struct ice_q_vector { |
| 295 | struct ice_vsi *vsi; |
Brett Creeley | 8244dd2 | 2019-02-19 15:04:05 -0800 | [diff] [blame] | 296 | |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 297 | u16 v_idx; /* index in the vsi->q_vector array. */ |
Brett Creeley | b07833a | 2019-02-28 15:25:59 -0800 | [diff] [blame] | 298 | u16 reg_idx; |
Anirudh Venkataramanan | d337f2a | 2018-10-26 11:44:47 -0700 | [diff] [blame] | 299 | u8 num_ring_rx; /* total number of Rx rings in vector */ |
Brett Creeley | 8244dd2 | 2019-02-19 15:04:05 -0800 | [diff] [blame] | 300 | u8 num_ring_tx; /* total number of Tx rings in vector */ |
| 301 | u8 itr_countdown; /* when 0 should adjust adaptive ITR */ |
Brett Creeley | 9e4ab4c | 2018-09-19 17:23:19 -0700 | [diff] [blame] | 302 | /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this |
| 303 | * value to the device |
| 304 | */ |
| 305 | u8 intrl; |
Brett Creeley | 8244dd2 | 2019-02-19 15:04:05 -0800 | [diff] [blame] | 306 | |
| 307 | struct napi_struct napi; |
| 308 | |
| 309 | struct ice_ring_container rx; |
| 310 | struct ice_ring_container tx; |
| 311 | |
| 312 | cpumask_t affinity_mask; |
| 313 | struct irq_affinity_notify affinity_notify; |
| 314 | |
| 315 | char name[ICE_INT_NAME_STR_LEN]; |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 316 | } ____cacheline_internodealigned_in_smp; |
| 317 | |
| 318 | enum ice_pf_flags { |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 319 | ICE_FLAG_FLTR_SYNC, |
| 320 | ICE_FLAG_RSS_ENA, |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 321 | ICE_FLAG_SRIOV_ENA, |
Anirudh Venkataramanan | 75d2b25 | 2018-09-19 17:42:54 -0700 | [diff] [blame] | 322 | ICE_FLAG_SRIOV_CAPABLE, |
Anirudh Venkataramanan | 37b6f64 | 2019-02-28 15:24:22 -0800 | [diff] [blame] | 323 | ICE_FLAG_DCB_CAPABLE, |
| 324 | ICE_FLAG_DCB_ENA, |
Bruce Allan | ab4ab73 | 2018-12-19 10:03:26 -0800 | [diff] [blame] | 325 | ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, |
Tony Nguyen | 6d59994 | 2019-06-26 02:20:17 -0700 | [diff] [blame] | 326 | ICE_FLAG_NO_MEDIA, |
Dave Ertman | 84a118a | 2019-07-29 02:04:50 -0700 | [diff] [blame] | 327 | ICE_FLAG_FW_LLDP_AGENT, |
Anirudh Venkataramanan | 3a257a1 | 2019-02-28 15:24:31 -0800 | [diff] [blame] | 328 | ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 329 | ICE_PF_FLAGS_NBITS /* must be last */ |
| 330 | }; |
| 331 | |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 332 | struct ice_pf { |
| 333 | struct pci_dev *pdev; |
Preethi Banala | eb0208e | 2018-09-19 17:23:16 -0700 | [diff] [blame] | 334 | |
| 335 | /* OS reserved IRQ details */ |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 336 | struct msix_entry *msix_entries; |
Brett Creeley | cbe66bf | 2019-04-16 10:30:44 -0700 | [diff] [blame] | 337 | struct ice_res_tracker *irq_tracker; |
| 338 | /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the |
| 339 | * number of MSIX vectors needed for all SR-IOV VFs from the number of |
| 340 | * MSIX vectors allowed on this PF. |
| 341 | */ |
| 342 | u16 sriov_base_vector; |
Preethi Banala | eb0208e | 2018-09-19 17:23:16 -0700 | [diff] [blame] | 343 | |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 344 | struct ice_vsi **vsi; /* VSIs created by the driver */ |
| 345 | struct ice_sw *first_sw; /* first switch created by firmware */ |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 346 | /* Virtchnl/SR-IOV config info */ |
| 347 | struct ice_vf *vf; |
| 348 | int num_alloc_vfs; /* actual number of VFs allocated */ |
Anirudh Venkataramanan | 75d2b25 | 2018-09-19 17:42:54 -0700 | [diff] [blame] | 349 | u16 num_vfs_supported; /* num VFs supported for this PF */ |
Anirudh Venkataramanan | ddf30f7 | 2018-09-19 17:42:55 -0700 | [diff] [blame] | 350 | u16 num_vf_qps; /* num queue pairs per VF */ |
| 351 | u16 num_vf_msix; /* num vectors per VF */ |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 352 | DECLARE_BITMAP(state, __ICE_STATE_NBITS); |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 353 | DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); |
Anirudh Venkataramanan | 78b5713 | 2019-08-02 01:25:21 -0700 | [diff] [blame] | 354 | unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ |
| 355 | unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 356 | unsigned long serv_tmr_period; |
| 357 | unsigned long serv_tmr_prev; |
| 358 | struct timer_list serv_tmr; |
| 359 | struct work_struct serv_task; |
| 360 | struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ |
| 361 | struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 362 | u32 msg_enable; |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 363 | u32 hw_csum_rx_error; |
Brett Creeley | cbe66bf | 2019-04-16 10:30:44 -0700 | [diff] [blame] | 364 | u32 oicr_idx; /* Other interrupt cause MSIX vector index */ |
Preethi Banala | eb0208e | 2018-09-19 17:23:16 -0700 | [diff] [blame] | 365 | u32 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ |
Anirudh Venkataramanan | 78b5713 | 2019-08-02 01:25:21 -0700 | [diff] [blame] | 366 | u16 max_pf_txqs; /* Total Tx queues PF wide */ |
| 367 | u16 max_pf_rxqs; /* Total Rx queues PF wide */ |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 368 | u32 num_lan_msix; /* Total MSIX vectors for base driver */ |
Anirudh Venkataramanan | f9867df | 2019-02-19 15:04:13 -0800 | [diff] [blame] | 369 | u16 num_lan_tx; /* num LAN Tx queues setup */ |
| 370 | u16 num_lan_rx; /* num LAN Rx queues setup */ |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 371 | u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ |
| 372 | u16 num_alloc_vsi; |
Anirudh Venkataramanan | 0b28b70 | 2018-03-20 07:58:18 -0700 | [diff] [blame] | 373 | u16 corer_count; /* Core reset count */ |
| 374 | u16 globr_count; /* Global reset count */ |
| 375 | u16 empr_count; /* EMP reset count */ |
| 376 | u16 pfr_count; /* PF reset count */ |
| 377 | |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 378 | struct ice_hw_port_stats stats; |
| 379 | struct ice_hw_port_stats stats_prev; |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 380 | struct ice_hw hw; |
Jesse Brandeburg | 0ab54c5 | 2019-04-16 10:24:35 -0700 | [diff] [blame] | 381 | u8 stat_prev_loaded:1; /* has previous stats been loaded */ |
Anirudh Venkataramanan | 7b9ffc7 | 2019-02-28 15:24:24 -0800 | [diff] [blame] | 382 | #ifdef CONFIG_DCB |
| 383 | u16 dcbx_cap; |
| 384 | #endif /* CONFIG_DCB */ |
Sudheer Mogilappagari | b3969fd | 2018-08-09 06:29:53 -0700 | [diff] [blame] | 385 | u32 tx_timeout_count; |
| 386 | unsigned long tx_timeout_last_recovery; |
| 387 | u32 tx_timeout_recovery_level; |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 388 | char int_name[ICE_INT_NAME_STR_LEN]; |
Anirudh Venkataramanan | 0e674ae | 2019-04-16 10:30:43 -0700 | [diff] [blame] | 389 | u32 sw_int_count; |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 390 | }; |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 391 | |
Anirudh Venkataramanan | 3a858ba | 2018-03-20 07:58:11 -0700 | [diff] [blame] | 392 | struct ice_netdev_priv { |
| 393 | struct ice_vsi *vsi; |
| 394 | }; |
| 395 | |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 396 | /** |
| 397 | * ice_irq_dynamic_ena - Enable default interrupt generation settings |
Anirudh Venkataramanan | f9867df | 2019-02-19 15:04:13 -0800 | [diff] [blame] | 398 | * @hw: pointer to HW struct |
| 399 | * @vsi: pointer to VSI struct, can be NULL |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 400 | * @q_vector: pointer to q_vector, can be NULL |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 401 | */ |
Bruce Allan | c8b7abd | 2019-02-26 16:35:11 -0800 | [diff] [blame] | 402 | static inline void |
| 403 | ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, |
| 404 | struct ice_q_vector *q_vector) |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 405 | { |
Brett Creeley | b07833a | 2019-02-28 15:25:59 -0800 | [diff] [blame] | 406 | u32 vector = (vsi && q_vector) ? q_vector->reg_idx : |
Brett Creeley | cbe66bf | 2019-04-16 10:30:44 -0700 | [diff] [blame] | 407 | ((struct ice_pf *)hw->back)->oicr_idx; |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 408 | int itr = ICE_ITR_NONE; |
| 409 | u32 val; |
| 410 | |
| 411 | /* clear the PBA here, as this function is meant to clean out all |
| 412 | * previous interrupts and enable the interrupt |
| 413 | */ |
| 414 | val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | |
| 415 | (itr << GLINT_DYN_CTL_ITR_INDX_S); |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 416 | if (vsi) |
| 417 | if (test_bit(__ICE_DOWN, vsi->state)) |
| 418 | return; |
Anirudh Venkataramanan | 940b61a | 2018-03-20 07:58:10 -0700 | [diff] [blame] | 419 | wr32(hw, GLINT_DYN_CTL(vector), val); |
| 420 | } |
Anirudh Venkataramanan | cdedef5 | 2018-03-20 07:58:13 -0700 | [diff] [blame] | 421 | |
Brett Creeley | c2a23e0 | 2019-02-28 15:26:01 -0800 | [diff] [blame] | 422 | /** |
Anirudh Venkataramanan | 208ff75 | 2019-08-08 07:39:33 -0700 | [diff] [blame] | 423 | * ice_get_main_vsi - Get the PF VSI |
| 424 | * @pf: PF instance |
| 425 | * |
| 426 | * returns pf->vsi[0], which by definition is the PF VSI |
Brett Creeley | c2a23e0 | 2019-02-28 15:26:01 -0800 | [diff] [blame] | 427 | */ |
Anirudh Venkataramanan | 208ff75 | 2019-08-08 07:39:33 -0700 | [diff] [blame] | 428 | static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) |
Brett Creeley | c2a23e0 | 2019-02-28 15:26:01 -0800 | [diff] [blame] | 429 | { |
Anirudh Venkataramanan | 208ff75 | 2019-08-08 07:39:33 -0700 | [diff] [blame] | 430 | if (pf->vsi) |
| 431 | return pf->vsi[0]; |
Brett Creeley | c2a23e0 | 2019-02-28 15:26:01 -0800 | [diff] [blame] | 432 | |
| 433 | return NULL; |
| 434 | } |
| 435 | |
Anirudh Venkataramanan | 0e674ae | 2019-04-16 10:30:43 -0700 | [diff] [blame] | 436 | int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); |
| 437 | int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 438 | void ice_set_ethtool_ops(struct net_device *netdev); |
Anirudh Venkataramanan | 8c24370 | 2019-09-03 01:31:06 -0700 | [diff] [blame^] | 439 | u16 ice_get_avail_txq_count(struct ice_pf *pf); |
| 440 | u16 ice_get_avail_rxq_count(struct ice_pf *pf); |
Bruce Allan | 5a4a867 | 2019-07-25 02:53:50 -0700 | [diff] [blame] | 441 | void ice_update_vsi_stats(struct ice_vsi *vsi); |
| 442 | void ice_update_pf_stats(struct ice_pf *pf); |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 443 | int ice_up(struct ice_vsi *vsi); |
| 444 | int ice_down(struct ice_vsi *vsi); |
Anirudh Venkataramanan | 0e674ae | 2019-04-16 10:30:43 -0700 | [diff] [blame] | 445 | int ice_vsi_cfg(struct ice_vsi *vsi); |
| 446 | struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 447 | int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); |
| 448 | int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); |
| 449 | void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); |
Anirudh Venkataramanan | fcea6f3 | 2018-03-20 07:58:16 -0700 | [diff] [blame] | 450 | void ice_print_link_msg(struct ice_vsi *vsi, bool isup); |
Anirudh Venkataramanan | 7b9ffc7 | 2019-02-28 15:24:24 -0800 | [diff] [blame] | 451 | #ifdef CONFIG_DCB |
| 452 | int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked); |
| 453 | void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked); |
| 454 | #endif /* CONFIG_DCB */ |
Anirudh Venkataramanan | 0e674ae | 2019-04-16 10:30:43 -0700 | [diff] [blame] | 455 | int ice_open(struct net_device *netdev); |
| 456 | int ice_stop(struct net_device *netdev); |
Anirudh Venkataramanan | d76a60b | 2018-03-20 07:58:15 -0700 | [diff] [blame] | 457 | |
Anirudh Venkataramanan | 837f08f | 2018-03-20 07:58:05 -0700 | [diff] [blame] | 458 | #endif /* _ICE_H_ */ |