Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 2 | /* |
Kumar Gala | 4c8d3d9 | 2005-11-13 16:06:30 -0800 | [diff] [blame] | 3 | * Modifications by Kumar Gala (galak@kernel.crashing.org) to support |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 4 | * E500 Book E processors. |
| 5 | * |
Kumar Gala | 78f6223 | 2010-05-13 14:38:21 -0500 | [diff] [blame] | 6 | * Copyright 2004,2010 Freescale Semiconductor, Inc. |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 7 | * |
| 8 | * This file contains the routines for initializing the MMU |
| 9 | * on the 4xx series of chips. |
| 10 | * -- paulus |
| 11 | * |
| 12 | * Derived from arch/ppc/mm/init.c: |
| 13 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 14 | * |
| 15 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) |
| 16 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) |
| 17 | * Copyright (C) 1996 Paul Mackerras |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 18 | * |
| 19 | * Derived from "arch/i386/mm/init.c" |
| 20 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 21 | */ |
| 22 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 23 | #include <linux/signal.h> |
| 24 | #include <linux/sched.h> |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/errno.h> |
| 27 | #include <linux/string.h> |
| 28 | #include <linux/types.h> |
| 29 | #include <linux/ptrace.h> |
| 30 | #include <linux/mman.h> |
| 31 | #include <linux/mm.h> |
| 32 | #include <linux/swap.h> |
| 33 | #include <linux/stddef.h> |
| 34 | #include <linux/vmalloc.h> |
| 35 | #include <linux/init.h> |
| 36 | #include <linux/delay.h> |
| 37 | #include <linux/highmem.h> |
Benjamin Herrenschmidt | e63075a | 2010-07-06 15:39:01 -0700 | [diff] [blame] | 38 | #include <linux/memblock.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 39 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 40 | #include <asm/prom.h> |
| 41 | #include <asm/io.h> |
| 42 | #include <asm/mmu_context.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 43 | #include <asm/mmu.h> |
Linus Torvalds | 7c0f6ba | 2016-12-24 11:46:01 -0800 | [diff] [blame] | 44 | #include <linux/uaccess.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 45 | #include <asm/smp.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 46 | #include <asm/machdep.h> |
| 47 | #include <asm/setup.h> |
Scott Wood | 28efc35 | 2013-10-11 19:22:38 -0500 | [diff] [blame] | 48 | #include <asm/paca.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 49 | |
Christophe Leroy | 9d9f2cc | 2019-03-29 09:59:59 +0000 | [diff] [blame] | 50 | #include <mm/mmu_decl.h> |
Kumar Gala | 99c62dd7 | 2008-04-16 05:52:21 +1000 | [diff] [blame] | 51 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 52 | unsigned int tlbcam_index; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 53 | |
Kumar Gala | 78f6223 | 2010-05-13 14:38:21 -0500 | [diff] [blame] | 54 | #define NUM_TLBCAMS (64) |
| 55 | struct tlbcam TLBCAM[NUM_TLBCAMS]; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 56 | |
| 57 | struct tlbcamrange { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 58 | unsigned long start; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 59 | unsigned long limit; |
| 60 | phys_addr_t phys; |
| 61 | } tlbcam_addrs[NUM_TLBCAMS]; |
| 62 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 63 | unsigned long tlbcam_sz(int idx) |
| 64 | { |
| 65 | return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1; |
| 66 | } |
| 67 | |
Christophe Leroy | 3084cdb | 2016-02-09 17:07:58 +0100 | [diff] [blame] | 68 | #ifdef CONFIG_FSL_BOOKE |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 69 | /* |
| 70 | * Return PA for this VA if it is mapped by a CAM, or 0 |
| 71 | */ |
Christophe Leroy | 3084cdb | 2016-02-09 17:07:58 +0100 | [diff] [blame] | 72 | phys_addr_t v_block_mapped(unsigned long va) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 73 | { |
| 74 | int b; |
| 75 | for (b = 0; b < tlbcam_index; ++b) |
| 76 | if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit) |
| 77 | return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start); |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | /* |
| 82 | * Return VA for a given PA or 0 if not mapped |
| 83 | */ |
Christophe Leroy | 3084cdb | 2016-02-09 17:07:58 +0100 | [diff] [blame] | 84 | unsigned long p_block_mapped(phys_addr_t pa) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 85 | { |
| 86 | int b; |
| 87 | for (b = 0; b < tlbcam_index; ++b) |
| 88 | if (pa >= tlbcam_addrs[b].phys |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 89 | && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 90 | +tlbcam_addrs[b].phys) |
| 91 | return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys); |
| 92 | return 0; |
| 93 | } |
Christophe Leroy | 3084cdb | 2016-02-09 17:07:58 +0100 | [diff] [blame] | 94 | #endif |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 95 | |
| 96 | /* |
Becky Bruce | d10ac37 | 2010-06-30 10:23:31 +0000 | [diff] [blame] | 97 | * Set up a variable-size TLB entry (tlbcam). The parameters are not checked; |
Becky Bruce | 4559424 | 2011-10-12 16:17:02 -0500 | [diff] [blame] | 98 | * in particular size must be a power of 4 between 4k and the max supported by |
| 99 | * an implementation; max may further be limited by what can be represented in |
| 100 | * an unsigned long (for example, 32-bit implementations cannot support a 4GB |
| 101 | * size). |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 102 | */ |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 103 | static void settlbcam(int index, unsigned long virt, phys_addr_t phys, |
| 104 | unsigned long size, unsigned long flags, unsigned int pid) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 105 | { |
Becky Bruce | 4559424 | 2011-10-12 16:17:02 -0500 | [diff] [blame] | 106 | unsigned int tsize; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 107 | |
Becky Bruce | 4559424 | 2011-10-12 16:17:02 -0500 | [diff] [blame] | 108 | tsize = __ilog2(size) - 10; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 109 | |
Scott Wood | c602320 | 2015-07-18 14:24:58 -0500 | [diff] [blame] | 110 | #if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 111 | if ((flags & _PAGE_NO_CACHE) == 0) |
| 112 | flags |= _PAGE_COHERENT; |
| 113 | #endif |
| 114 | |
| 115 | TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1); |
| 116 | TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid); |
| 117 | TLBCAM[index].MAS2 = virt & PAGE_MASK; |
| 118 | |
| 119 | TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0; |
| 120 | TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0; |
| 121 | TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0; |
| 122 | TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0; |
| 123 | TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0; |
| 124 | |
Christophe Leroy | 01116e6 | 2021-10-15 12:02:44 +0200 | [diff] [blame] | 125 | TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SR; |
Christophe Leroy | 01116e6 | 2021-10-15 12:02:44 +0200 | [diff] [blame] | 126 | TLBCAM[index].MAS3 |= (flags & _PAGE_RW) ? MAS3_SW : 0; |
Becky Bruce | e813734 | 2010-04-12 11:21:50 -0500 | [diff] [blame] | 127 | if (mmu_has_feature(MMU_FTR_BIG_PHYS)) |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 128 | TLBCAM[index].MAS7 = (u64)phys >> 32; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 129 | |
Paul Gortmaker | 92437d4 | 2010-09-24 12:44:52 -0400 | [diff] [blame] | 130 | /* Below is unlikely -- only for large user pages or similar */ |
Michael Ellerman | 7e1e63c | 2016-04-29 23:25:32 +1000 | [diff] [blame] | 131 | if (pte_user(__pte(flags))) { |
Christophe Leroy | 01116e6 | 2021-10-15 12:02:44 +0200 | [diff] [blame] | 132 | TLBCAM[index].MAS3 |= MAS3_UR; |
| 133 | TLBCAM[index].MAS3 |= (flags & _PAGE_EXEC) ? MAS3_UX : 0; |
| 134 | TLBCAM[index].MAS3 |= (flags & _PAGE_RW) ? MAS3_UW : 0; |
Christophe Leroy | 44c1450 | 2021-10-26 07:39:26 +0200 | [diff] [blame] | 135 | } else { |
| 136 | TLBCAM[index].MAS3 |= (flags & _PAGE_EXEC) ? MAS3_SX : 0; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 137 | } |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 138 | |
| 139 | tlbcam_addrs[index].start = virt; |
| 140 | tlbcam_addrs[index].limit = virt + size - 1; |
| 141 | tlbcam_addrs[index].phys = phys; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 142 | } |
| 143 | |
Kumar Gala | 1dc91c3 | 2011-09-16 10:39:59 -0500 | [diff] [blame] | 144 | unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, |
| 145 | phys_addr_t phys) |
| 146 | { |
Kumar Gala | f0b8b34 | 2012-01-05 12:37:16 -0600 | [diff] [blame] | 147 | unsigned int camsize = __ilog2(ram); |
| 148 | unsigned int align = __ffs(virt | phys); |
| 149 | unsigned long max_cam; |
Kumar Gala | 1dc91c3 | 2011-09-16 10:39:59 -0500 | [diff] [blame] | 150 | |
Kumar Gala | f0b8b34 | 2012-01-05 12:37:16 -0600 | [diff] [blame] | 151 | if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) { |
| 152 | /* Convert (4^max) kB to (2^max) bytes */ |
| 153 | max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10; |
| 154 | camsize &= ~1U; |
| 155 | align &= ~1U; |
| 156 | } else { |
| 157 | /* Convert (2^max) kB to (2^max) bytes */ |
| 158 | max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10; |
| 159 | } |
Kumar Gala | 1dc91c3 | 2011-09-16 10:39:59 -0500 | [diff] [blame] | 160 | |
| 161 | if (camsize > align) |
| 162 | camsize = align; |
| 163 | if (camsize > max_cam) |
| 164 | camsize = max_cam; |
| 165 | |
| 166 | return 1UL << camsize; |
| 167 | } |
| 168 | |
Kevin Hao | 813125d | 2013-12-24 15:12:09 +0800 | [diff] [blame] | 169 | static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt, |
Scott Wood | eba5de8 | 2015-10-06 22:48:10 -0500 | [diff] [blame] | 170 | unsigned long ram, int max_cam_idx, |
Christophe Leroy | 52bda69 | 2021-10-15 12:02:46 +0200 | [diff] [blame] | 171 | bool dryrun, bool init) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 172 | { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 173 | int i; |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 174 | unsigned long amount_mapped = 0; |
Christophe Leroy | 0b2859a | 2021-10-15 12:02:47 +0200 | [diff] [blame] | 175 | unsigned long boundary; |
| 176 | |
| 177 | if (strict_kernel_rwx_enabled()) |
| 178 | boundary = (unsigned long)(_sinittext - _stext); |
| 179 | else |
| 180 | boundary = ram; |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 181 | |
| 182 | /* Calculate CAM values */ |
Christophe Leroy | 0b2859a | 2021-10-15 12:02:47 +0200 | [diff] [blame] | 183 | for (i = 0; boundary && i < max_cam_idx; i++) { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 184 | unsigned long cam_sz; |
Christophe Leroy | d597004 | 2021-10-15 12:02:48 +0200 | [diff] [blame] | 185 | pgprot_t prot = init ? PAGE_KERNEL_X : PAGE_KERNEL_ROX; |
Christophe Leroy | 0b2859a | 2021-10-15 12:02:47 +0200 | [diff] [blame] | 186 | |
| 187 | cam_sz = calc_cam_sz(boundary, virt, phys); |
| 188 | if (!dryrun) |
| 189 | settlbcam(i, virt, phys, cam_sz, pgprot_val(prot), 0); |
| 190 | |
| 191 | boundary -= cam_sz; |
| 192 | amount_mapped += cam_sz; |
| 193 | virt += cam_sz; |
| 194 | phys += cam_sz; |
| 195 | } |
| 196 | for (ram -= amount_mapped; ram && i < max_cam_idx; i++) { |
| 197 | unsigned long cam_sz; |
Christophe Leroy | d597004 | 2021-10-15 12:02:48 +0200 | [diff] [blame] | 198 | pgprot_t prot = init ? PAGE_KERNEL_X : PAGE_KERNEL; |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 199 | |
Kumar Gala | 1dc91c3 | 2011-09-16 10:39:59 -0500 | [diff] [blame] | 200 | cam_sz = calc_cam_sz(ram, virt, phys); |
Scott Wood | eba5de8 | 2015-10-06 22:48:10 -0500 | [diff] [blame] | 201 | if (!dryrun) |
Christophe Leroy | 0b2859a | 2021-10-15 12:02:47 +0200 | [diff] [blame] | 202 | settlbcam(i, virt, phys, cam_sz, pgprot_val(prot), 0); |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 203 | |
| 204 | ram -= cam_sz; |
| 205 | amount_mapped += cam_sz; |
| 206 | virt += cam_sz; |
| 207 | phys += cam_sz; |
| 208 | } |
Scott Wood | d9e1831 | 2015-10-06 22:48:09 -0500 | [diff] [blame] | 209 | |
Scott Wood | eba5de8 | 2015-10-06 22:48:10 -0500 | [diff] [blame] | 210 | if (dryrun) |
| 211 | return amount_mapped; |
| 212 | |
Christophe Leroy | d597004 | 2021-10-15 12:02:48 +0200 | [diff] [blame] | 213 | if (init) { |
| 214 | loadcam_multi(0, i, max_cam_idx); |
| 215 | tlbcam_index = i; |
| 216 | } else { |
| 217 | loadcam_multi(0, i, 0); |
| 218 | WARN_ON(i > tlbcam_index); |
| 219 | } |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 220 | |
Scott Wood | 28efc35 | 2013-10-11 19:22:38 -0500 | [diff] [blame] | 221 | #ifdef CONFIG_PPC64 |
| 222 | get_paca()->tcd.esel_next = i; |
| 223 | get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY; |
| 224 | get_paca()->tcd.esel_first = i; |
| 225 | #endif |
| 226 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 227 | return amount_mapped; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 228 | } |
| 229 | |
Christophe Leroy | 52bda69 | 2021-10-15 12:02:46 +0200 | [diff] [blame] | 230 | unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, bool dryrun, bool init) |
Kevin Hao | 813125d | 2013-12-24 15:12:09 +0800 | [diff] [blame] | 231 | { |
| 232 | unsigned long virt = PAGE_OFFSET; |
| 233 | phys_addr_t phys = memstart_addr; |
| 234 | |
Christophe Leroy | 52bda69 | 2021-10-15 12:02:46 +0200 | [diff] [blame] | 235 | return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx, dryrun, init); |
Kevin Hao | 813125d | 2013-12-24 15:12:09 +0800 | [diff] [blame] | 236 | } |
| 237 | |
Kumar Gala | 55fd766 | 2009-10-16 18:48:40 -0500 | [diff] [blame] | 238 | #ifdef CONFIG_PPC32 |
| 239 | |
| 240 | #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS) |
| 241 | #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS" |
| 242 | #endif |
| 243 | |
Christophe Leroy | 14e609d | 2019-02-21 19:08:38 +0000 | [diff] [blame] | 244 | unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 245 | { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 246 | return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 247 | } |
| 248 | |
Christophe Leroy | 704dfe9 | 2020-08-14 05:56:27 +0000 | [diff] [blame] | 249 | void flush_instruction_cache(void) |
| 250 | { |
| 251 | unsigned long tmp; |
| 252 | |
Christophe Leroy | 39c8bf2 | 2020-11-17 05:07:58 +0000 | [diff] [blame] | 253 | tmp = mfspr(SPRN_L1CSR1); |
| 254 | tmp |= L1CSR1_ICFI | L1CSR1_ICLFR; |
| 255 | mtspr(SPRN_L1CSR1, tmp); |
Christophe Leroy | 704dfe9 | 2020-08-14 05:56:27 +0000 | [diff] [blame] | 256 | isync(); |
| 257 | } |
| 258 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 259 | /* |
| 260 | * MMU_init_hw does the chip-specific initialization of the MMU hardware. |
| 261 | */ |
| 262 | void __init MMU_init_hw(void) |
| 263 | { |
| 264 | flush_instruction_cache(); |
| 265 | } |
| 266 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 267 | void __init adjust_total_lowmem(void) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 268 | { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 269 | unsigned long ram; |
Trent Piepho | f88747e | 2008-12-08 19:34:57 -0800 | [diff] [blame] | 270 | int i; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 271 | |
Trent Piepho | f88747e | 2008-12-08 19:34:57 -0800 | [diff] [blame] | 272 | /* adjust lowmem size to __max_low_memory */ |
| 273 | ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 274 | |
Kevin Hao | 78a235e | 2013-12-24 15:12:07 +0800 | [diff] [blame] | 275 | i = switch_to_as1(); |
Christophe Leroy | 52bda69 | 2021-10-15 12:02:46 +0200 | [diff] [blame] | 276 | __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM, false, true); |
Kevin Hao | 0be7d969b | 2013-12-24 15:12:11 +0800 | [diff] [blame] | 277 | restore_to_as0(i, 0, 0, 1); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 278 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 279 | pr_info("Memory CAM mapping: "); |
| 280 | for (i = 0; i < tlbcam_index - 1; i++) |
| 281 | pr_cont("%lu/", tlbcam_sz(i) >> 20); |
| 282 | pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20, |
Kumar Gala | 96a8bac | 2009-02-12 09:39:23 -0600 | [diff] [blame] | 283 | (unsigned int)((total_lowmem - __max_low_memory) >> 20)); |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 284 | |
Benjamin Herrenschmidt | e63075a | 2010-07-06 15:39:01 -0700 | [diff] [blame] | 285 | memblock_set_current_limit(memstart_addr + __max_low_memory); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 286 | } |
Benjamin Herrenschmidt | cd3db0c | 2010-07-06 15:39:02 -0700 | [diff] [blame] | 287 | |
Christophe Leroy | d597004 | 2021-10-15 12:02:48 +0200 | [diff] [blame] | 288 | #ifdef CONFIG_STRICT_KERNEL_RWX |
| 289 | void mmu_mark_rodata_ro(void) |
| 290 | { |
| 291 | /* Everything is done in mmu_mark_initmem_nx() */ |
| 292 | } |
| 293 | #endif |
| 294 | |
| 295 | void mmu_mark_initmem_nx(void) |
| 296 | { |
| 297 | unsigned long remapped; |
| 298 | |
| 299 | if (!strict_kernel_rwx_enabled()) |
| 300 | return; |
| 301 | |
| 302 | remapped = map_mem_in_cams(__max_low_memory, CONFIG_LOWMEM_CAM_NUM, false, false); |
| 303 | |
| 304 | WARN_ON(__max_low_memory != remapped); |
| 305 | } |
| 306 | |
Benjamin Herrenschmidt | cd3db0c | 2010-07-06 15:39:02 -0700 | [diff] [blame] | 307 | void setup_initial_memory_limit(phys_addr_t first_memblock_base, |
| 308 | phys_addr_t first_memblock_size) |
| 309 | { |
| 310 | phys_addr_t limit = first_memblock_base + first_memblock_size; |
| 311 | |
| 312 | /* 64M mapped initially according to head_fsl_booke.S */ |
| 313 | memblock_set_current_limit(min_t(u64, limit, 0x04000000)); |
| 314 | } |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 315 | |
| 316 | #ifdef CONFIG_RELOCATABLE |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 317 | int __initdata is_second_reloc; |
| 318 | notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start) |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 319 | { |
Jason Yan | 2b0e86cc | 2019-09-20 17:45:40 +0800 | [diff] [blame] | 320 | unsigned long base = kernstart_virt_addr; |
| 321 | phys_addr_t size; |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 322 | |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 323 | kernstart_addr = start; |
| 324 | if (is_second_reloc) { |
| 325 | virt_phys_offset = PAGE_OFFSET - memstart_addr; |
Jason Yan | b396097 | 2019-09-20 17:45:42 +0800 | [diff] [blame] | 326 | kaslr_late_init(); |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 327 | return; |
| 328 | } |
| 329 | |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 330 | /* |
| 331 | * Relocatable kernel support based on processing of dynamic |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 332 | * relocation entries. Before we get the real memstart_addr, |
| 333 | * We will compute the virt_phys_offset like this: |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 334 | * virt_phys_offset = stext.run - kernstart_addr |
| 335 | * |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 336 | * stext.run = (KERNELBASE & ~0x3ffffff) + |
| 337 | * (kernstart_addr & 0x3ffffff) |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 338 | * When we relocate, we have : |
| 339 | * |
| 340 | * (kernstart_addr & 0x3ffffff) = (stext.run & 0x3ffffff) |
| 341 | * |
| 342 | * hence: |
| 343 | * virt_phys_offset = (KERNELBASE & ~0x3ffffff) - |
| 344 | * (kernstart_addr & ~0x3ffffff) |
| 345 | * |
| 346 | */ |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 347 | start &= ~0x3ffffff; |
| 348 | base &= ~0x3ffffff; |
| 349 | virt_phys_offset = base - start; |
Jason Yan | 2b0e86cc | 2019-09-20 17:45:40 +0800 | [diff] [blame] | 350 | early_get_first_memblock_info(__va(dt_ptr), &size); |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 351 | /* |
| 352 | * We now get the memstart_addr, then we should check if this |
| 353 | * address is the same as what the PAGE_OFFSET map to now. If |
| 354 | * not we have to change the map of PAGE_OFFSET to memstart_addr |
| 355 | * and do a second relocation. |
| 356 | */ |
| 357 | if (start != memstart_addr) { |
| 358 | int n; |
| 359 | long offset = start - memstart_addr; |
| 360 | |
| 361 | is_second_reloc = 1; |
| 362 | n = switch_to_as1(); |
| 363 | /* map a 64M area for the second relocation */ |
| 364 | if (memstart_addr > start) |
Scott Wood | eba5de8 | 2015-10-06 22:48:10 -0500 | [diff] [blame] | 365 | map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM, |
Christophe Leroy | 52bda69 | 2021-10-15 12:02:46 +0200 | [diff] [blame] | 366 | false, true); |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 367 | else |
| 368 | map_mem_in_cams_addr(start, PAGE_OFFSET + offset, |
Scott Wood | eba5de8 | 2015-10-06 22:48:10 -0500 | [diff] [blame] | 369 | 0x4000000, CONFIG_LOWMEM_CAM_NUM, |
Christophe Leroy | 52bda69 | 2021-10-15 12:02:46 +0200 | [diff] [blame] | 370 | false, true); |
Kevin Hao | 0be7d969b | 2013-12-24 15:12:11 +0800 | [diff] [blame] | 371 | restore_to_as0(n, offset, __va(dt_ptr), 1); |
Kevin Hao | 7d2471f | 2013-12-24 15:12:10 +0800 | [diff] [blame] | 372 | /* We should never reach here */ |
| 373 | panic("Relocation error"); |
| 374 | } |
Jason Yan | 2b0e86cc | 2019-09-20 17:45:40 +0800 | [diff] [blame] | 375 | |
| 376 | kaslr_early_init(__va(dt_ptr), size); |
Kevin Hao | dd18969 | 2013-12-24 15:12:06 +0800 | [diff] [blame] | 377 | } |
| 378 | #endif |
Kumar Gala | 55fd766 | 2009-10-16 18:48:40 -0500 | [diff] [blame] | 379 | #endif |