blob: 82104edca393b9b6662a18ef8ea0bdd8d3bb057d [file] [log] [blame]
Andy Fleming00db8182005-07-30 19:31:23 -04001/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000010 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
Andy Fleming00db8182005-07-30 19:31:23 -040012 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
Andy Fleming00db8182005-07-30 19:31:23 -040018#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010020#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040021#include <linux/errno.h>
22#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010023#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040024#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040033#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100036#include <linux/marvell_phy.h>
David Daneycf41a512010-11-19 12:13:18 +000037#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
Avinash Kumareea3b202013-09-30 09:36:44 +053039#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040040#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053041#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040042
David Daney27d916d2010-11-19 11:58:52 +000043#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020044#define MII_MARVELL_COPPER_PAGE 0x00
45#define MII_MARVELL_FIBER_PAGE 0x01
46#define MII_MARVELL_MSCR_PAGE 0x02
47#define MII_MARVELL_LED_PAGE 0x03
48#define MII_MARVELL_MISC_TEST_PAGE 0x06
49#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000050
Andy Fleming00db8182005-07-30 19:31:23 -040051#define MII_M1011_IEVENT 0x13
52#define MII_M1011_IEVENT_CLEAR 0x0000
53
54#define MII_M1011_IMASK 0x12
55#define MII_M1011_IMASK_INIT 0x6400
56#define MII_M1011_IMASK_CLEAR 0x0000
57
Andrew Lunnfecd5e92017-07-30 22:41:49 +020058#define MII_M1011_PHY_SCR 0x10
59#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60#define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
Andrew Lunn6ef05eb2017-07-30 22:41:50 +020061#define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
Andrew Lunnfecd5e92017-07-30 22:41:49 +020062#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060065
Andy Fleming76884672007-02-09 18:13:58 -060066#define MII_M1111_PHY_LED_CONTROL 0x18
67#define MII_M1111_PHY_LED_DIRECT 0x4100
68#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080069#define MII_M1111_PHY_EXT_CR 0x14
Andrew Lunn61111592017-07-30 22:41:46 +020070#define MII_M1111_RGMII_RX_DELAY BIT(7)
71#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080072#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030073
74#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030075#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050076#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020077#define MII_M1111_HWCFG_MODE_RTBI 0x7
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000078#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020079#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030082
Cyril Chemparathyc477d042010-08-02 09:44:53 +000083#define MII_88E1121_PHY_MSCR_REG 21
84#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Dan Carpenter5987feb2017-08-04 11:17:21 +030086#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000087
Andrew Lunn0b046802017-01-20 01:37:49 +010088#define MII_88E1121_MISC_TEST 0x1a
89#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96#define MII_88E1510_TEMP_SENSOR 0x1b
97#define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -070099#define MII_88E1318S_PHY_MSCR1_REG 16
100#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700101
Michael Stapelberg3871c382013-03-11 13:56:45 +0000102/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200103#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000104/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200105#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000106
107/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200108#define MII_88E1318S_PHY_LED_TCR 0x12
109#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
110#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
111#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000112
113/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200114#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
115#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
116#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000117
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200118#define MII_88E1318S_PHY_WOL_CTRL 0x10
119#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
120#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000121
Sergei Poselenov140bc922009-04-07 02:01:41 +0000122#define MII_88E1121_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000123#define MII_88E1121_PHY_LED_DEF 0x0030
Sergei Poselenov140bc922009-04-07 02:01:41 +0000124
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300125#define MII_M1011_PHY_STATUS 0x11
126#define MII_M1011_PHY_STATUS_1000 0x8000
127#define MII_M1011_PHY_STATUS_100 0x4000
128#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
129#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
130#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
131#define MII_M1011_PHY_STATUS_LINK 0x0400
132
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200133#define MII_88E3016_PHY_SPEC_CTRL 0x10
134#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
135#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600136
Stefan Roese930b37e2016-02-18 10:59:07 +0100137#define MII_88E1510_GEN_CTRL_REG_1 0x14
138#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
139#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
140#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
141
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200142#define LPA_FIBER_1000HALF 0x40
143#define LPA_FIBER_1000FULL 0x20
144
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200145#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200146#define LPA_PAUSE_ASYM_FIBER 0x100
147
148#define ADVERTISE_FIBER_1000HALF 0x40
149#define ADVERTISE_FIBER_1000FULL 0x20
150
151#define ADVERTISE_PAUSE_FIBER 0x180
152#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
153
154#define REGISTER_LINK_STATUS 0x400
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200155#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200156
Andy Fleming00db8182005-07-30 19:31:23 -0400157MODULE_DESCRIPTION("Marvell PHY driver");
158MODULE_AUTHOR("Andy Fleming");
159MODULE_LICENSE("GPL");
160
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100161struct marvell_hw_stat {
162 const char *string;
163 u8 page;
164 u8 reg;
165 u8 bits;
166};
167
168static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200169 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100170 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200171 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100172};
173
174struct marvell_priv {
175 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100176 char *hwmon_name;
177 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100178};
179
Andrew Lunn6427bb22017-05-17 03:26:03 +0200180static int marvell_get_page(struct phy_device *phydev)
181{
182 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
183}
184
185static int marvell_set_page(struct phy_device *phydev, int page)
186{
187 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
188}
189
Andrew Lunn53798322017-05-25 21:42:07 +0200190static int marvell_get_set_page(struct phy_device *phydev, int page)
191{
192 int oldpage = marvell_get_page(phydev);
193
194 if (oldpage < 0)
195 return oldpage;
196
197 if (page != oldpage)
198 return marvell_set_page(phydev, page);
199
200 return 0;
201}
202
Andy Fleming00db8182005-07-30 19:31:23 -0400203static int marvell_ack_interrupt(struct phy_device *phydev)
204{
205 int err;
206
207 /* Clear the interrupts by reading the reg */
208 err = phy_read(phydev, MII_M1011_IEVENT);
209
210 if (err < 0)
211 return err;
212
213 return 0;
214}
215
216static int marvell_config_intr(struct phy_device *phydev)
217{
218 int err;
219
Andy Fleming76884672007-02-09 18:13:58 -0600220 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200221 err = phy_write(phydev, MII_M1011_IMASK,
222 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400223 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400226
227 return err;
228}
229
David Thomson239aa552015-07-10 16:28:25 +1200230static int marvell_set_polarity(struct phy_device *phydev, int polarity)
231{
232 int reg;
233 int err;
234 int val;
235
236 /* get the current settings */
237 reg = phy_read(phydev, MII_M1011_PHY_SCR);
238 if (reg < 0)
239 return reg;
240
241 val = reg;
242 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
243 switch (polarity) {
244 case ETH_TP_MDI:
245 val |= MII_M1011_PHY_SCR_MDI;
246 break;
247 case ETH_TP_MDI_X:
248 val |= MII_M1011_PHY_SCR_MDI_X;
249 break;
250 case ETH_TP_MDI_AUTO:
251 case ETH_TP_MDI_INVALID:
252 default:
253 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
254 break;
255 }
256
257 if (val != reg) {
258 /* Set the new polarity value in the register */
259 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
260 if (err)
261 return err;
262 }
263
264 return 0;
265}
266
Andrew Lunn6ef05eb2017-07-30 22:41:50 +0200267static int marvell_set_downshift(struct phy_device *phydev, bool enable,
268 u8 retries)
269{
270 int reg;
271
272 reg = phy_read(phydev, MII_M1011_PHY_SCR);
273 if (reg < 0)
274 return reg;
275
276 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
277 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
278 if (enable)
279 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
280
281 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
282}
283
Andy Fleming00db8182005-07-30 19:31:23 -0400284static int marvell_config_aneg(struct phy_device *phydev)
285{
286 int err;
287
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600289 if (err < 0)
290 return err;
291
292 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
293 MII_M1111_PHY_LED_DIRECT);
294 if (err < 0)
295 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400296
297 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000298 if (err < 0)
299 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400300
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000301 if (phydev->autoneg != AUTONEG_ENABLE) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200302 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000303 * genphy_config_aneg() call above) must be followed by
304 * a software reset. Otherwise, the write has no effect.
305 */
Andrew Lunn34386342017-07-30 22:41:45 +0200306 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000307 if (err < 0)
308 return err;
309 }
310
311 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400312}
313
Andrew Lunnf2899782017-05-23 17:49:13 +0200314static int m88e1101_config_aneg(struct phy_device *phydev)
315{
316 int err;
317
318 /* This Marvell PHY has an errata which requires
319 * that certain registers get written in order
320 * to restart autonegotiation
321 */
Andrew Lunn34386342017-07-30 22:41:45 +0200322 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200323 if (err < 0)
324 return err;
325
326 err = phy_write(phydev, 0x1d, 0x1f);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1e, 0x200c);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1d, 0x5);
335 if (err < 0)
336 return err;
337
338 err = phy_write(phydev, 0x1e, 0);
339 if (err < 0)
340 return err;
341
342 err = phy_write(phydev, 0x1e, 0x100);
343 if (err < 0)
344 return err;
345
346 return marvell_config_aneg(phydev);
347}
348
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530349static int m88e1111_config_aneg(struct phy_device *phydev)
350{
351 int err;
352
353 /* The Marvell PHY has an errata which requires
354 * that certain registers get written in order
355 * to restart autonegotiation
356 */
Andrew Lunn34386342017-07-30 22:41:45 +0200357 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530358
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530359 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530360 if (err < 0)
361 return err;
362
363 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
364 MII_M1111_PHY_LED_DIRECT);
365 if (err < 0)
366 return err;
367
368 err = genphy_config_aneg(phydev);
369 if (err < 0)
370 return err;
371
372 if (phydev->autoneg != AUTONEG_ENABLE) {
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530373 /* A write to speed/duplex bits (that is performed by
374 * genphy_config_aneg() call above) must be followed by
375 * a software reset. Otherwise, the write has no effect.
376 */
Andrew Lunn34386342017-07-30 22:41:45 +0200377 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530378 if (err < 0)
379 return err;
380 }
381
382 return 0;
383}
384
David Daneycf41a512010-11-19 12:13:18 +0000385#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200386/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000387 * marvell,reg-init property stored in the of_node for the phydev.
388 *
389 * marvell,reg-init = <reg-page reg mask value>,...;
390 *
391 * There may be one or more sets of <reg-page reg mask value>:
392 *
393 * reg-page: which register bank to use.
394 * reg: the register.
395 * mask: if non-zero, ANDed with existing register value.
396 * value: ORed with the masked value and written to the regiser.
397 *
398 */
399static int marvell_of_reg_init(struct phy_device *phydev)
400{
401 const __be32 *paddr;
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100402 int len, i, saved_page, current_page, ret;
David Daneycf41a512010-11-19 12:13:18 +0000403
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100404 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000405 return 0;
406
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100407 paddr = of_get_property(phydev->mdio.dev.of_node,
408 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000409 if (!paddr || len < (4 * sizeof(*paddr)))
410 return 0;
411
Andrew Lunn6427bb22017-05-17 03:26:03 +0200412 saved_page = marvell_get_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000413 if (saved_page < 0)
414 return saved_page;
David Daneycf41a512010-11-19 12:13:18 +0000415 current_page = saved_page;
416
417 ret = 0;
418 len /= sizeof(*paddr);
419 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200420 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000421 u16 reg = be32_to_cpup(paddr + i + 1);
422 u16 mask = be32_to_cpup(paddr + i + 2);
423 u16 val_bits = be32_to_cpup(paddr + i + 3);
424 int val;
425
Andrew Lunn6427bb22017-05-17 03:26:03 +0200426 if (page != current_page) {
427 current_page = page;
428 ret = marvell_set_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000429 if (ret < 0)
430 goto err;
431 }
432
433 val = 0;
434 if (mask) {
435 val = phy_read(phydev, reg);
436 if (val < 0) {
437 ret = val;
438 goto err;
439 }
440 val &= mask;
441 }
442 val |= val_bits;
443
444 ret = phy_write(phydev, reg, val);
445 if (ret < 0)
446 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000447 }
448err:
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100449 if (current_page != saved_page) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200450 i = marvell_set_page(phydev, saved_page);
David Daneycf41a512010-11-19 12:13:18 +0000451 if (ret == 0)
452 ret = i;
453 }
454 return ret;
455}
456#else
457static int marvell_of_reg_init(struct phy_device *phydev)
458{
459 return 0;
460}
461#endif /* CONFIG_OF_MDIO */
462
Andrew Lunn864dc722017-07-30 22:41:48 +0200463static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000464{
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000465 int err, oldpage, mscr;
466
Andrew Lunn52295662017-05-25 21:42:08 +0200467 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200468 if (oldpage < 0)
469 return oldpage;
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000470
Andrew Lunn864dc722017-07-30 22:41:48 +0200471 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG);
472 if (mscr < 0) {
473 err = mscr;
474 goto out;
Arnaud Patardbe8c6482010-10-21 03:59:57 -0700475 }
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000476
Andrew Lunn864dc722017-07-30 22:41:48 +0200477 mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK;
478
479 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
480 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
481 MII_88E1121_PHY_MSCR_TX_DELAY);
482 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
483 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
484 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
485 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
486
487 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
488
489out:
Andrew Lunn6427bb22017-05-17 03:26:03 +0200490 marvell_set_page(phydev, oldpage);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000491
Andrew Lunn864dc722017-07-30 22:41:48 +0200492 return err;
493}
494
495static int m88e1121_config_aneg(struct phy_device *phydev)
496{
497 int err = 0;
498
499 if (phy_interface_is_rgmii(phydev)) {
500 err = m88e1121_config_aneg_rgmii_delays(phydev);
501 if (err)
502 return err;
503 }
504
Andrew Lunn34386342017-07-30 22:41:45 +0200505 err = genphy_soft_reset(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000506 if (err < 0)
507 return err;
508
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200509 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000510 if (err < 0)
511 return err;
512
Clemens Gruberfdecf362016-06-11 17:21:26 +0200513 return genphy_config_aneg(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000514}
515
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700516static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700517{
518 int err, oldpage, mscr;
519
Andrew Lunn52295662017-05-25 21:42:08 +0200520 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200521 if (oldpage < 0)
522 return oldpage;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700523
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700524 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
525 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700526
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700527 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700528 if (err < 0)
529 return err;
530
Andrew Lunn6427bb22017-05-17 03:26:03 +0200531 err = marvell_set_page(phydev, oldpage);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700532 if (err < 0)
533 return err;
534
535 return m88e1121_config_aneg(phydev);
536}
537
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200538/**
539 * ethtool_adv_to_fiber_adv_t
540 * @ethadv: the ethtool advertisement settings
541 *
542 * A small helper function that translates ethtool advertisement
543 * settings to phy autonegotiation advertisements for the
544 * MII_ADV register for fiber link.
545 */
546static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
547{
548 u32 result = 0;
549
550 if (ethadv & ADVERTISED_1000baseT_Half)
551 result |= ADVERTISE_FIBER_1000HALF;
552 if (ethadv & ADVERTISED_1000baseT_Full)
553 result |= ADVERTISE_FIBER_1000FULL;
554
555 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
556 result |= LPA_PAUSE_ASYM_FIBER;
557 else if (ethadv & ADVERTISE_PAUSE_CAP)
558 result |= (ADVERTISE_PAUSE_FIBER
559 & (~ADVERTISE_PAUSE_ASYM_FIBER));
560
561 return result;
562}
563
564/**
565 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
566 * @phydev: target phy_device struct
567 *
568 * Description: If auto-negotiation is enabled, we configure the
569 * advertising, and then restart auto-negotiation. If it is not
570 * enabled, then we write the BMCR. Adapted for fiber link in
571 * some Marvell's devices.
572 */
573static int marvell_config_aneg_fiber(struct phy_device *phydev)
574{
575 int changed = 0;
576 int err;
577 int adv, oldadv;
578 u32 advertise;
579
580 if (phydev->autoneg != AUTONEG_ENABLE)
581 return genphy_setup_forced(phydev);
582
583 /* Only allow advertising what this PHY supports */
584 phydev->advertising &= phydev->supported;
585 advertise = phydev->advertising;
586
587 /* Setup fiber advertisement */
588 adv = phy_read(phydev, MII_ADVERTISE);
589 if (adv < 0)
590 return adv;
591
592 oldadv = adv;
593 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
594 | LPA_PAUSE_FIBER);
595 adv |= ethtool_adv_to_fiber_adv_t(advertise);
596
597 if (adv != oldadv) {
598 err = phy_write(phydev, MII_ADVERTISE, adv);
599 if (err < 0)
600 return err;
601
602 changed = 1;
603 }
604
605 if (changed == 0) {
606 /* Advertisement hasn't changed, but maybe aneg was never on to
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200607 * begin with? Or maybe phy was isolated?
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200608 */
609 int ctl = phy_read(phydev, MII_BMCR);
610
611 if (ctl < 0)
612 return ctl;
613
614 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
615 changed = 1; /* do restart aneg */
616 }
617
618 /* Only restart aneg if we are advertising something different
619 * than we were before.
620 */
621 if (changed > 0)
622 changed = genphy_restart_aneg(phydev);
623
624 return changed;
625}
626
Michal Simek10e24caa2013-05-30 20:08:27 +0000627static int m88e1510_config_aneg(struct phy_device *phydev)
628{
629 int err;
630
Andrew Lunn52295662017-05-25 21:42:08 +0200631 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200632 if (err < 0)
633 goto error;
634
635 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000636 err = m88e1318_config_aneg(phydev);
637 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200638 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000639
Russell Kingde9c4e02017-12-13 09:22:03 +0000640 /* Do not touch the fiber page if we're in copper->sgmii mode */
641 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
642 return 0;
643
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200644 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200645 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200646 if (err < 0)
647 goto error;
648
649 err = marvell_config_aneg_fiber(phydev);
650 if (err < 0)
651 goto error;
652
Andrew Lunn52295662017-05-25 21:42:08 +0200653 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200654
655error:
Andrew Lunn52295662017-05-25 21:42:08 +0200656 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200657 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100658}
659
660static int marvell_config_init(struct phy_device *phydev)
661{
662 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000663 return marvell_of_reg_init(phydev);
664}
665
Michal Simek3da09a52013-05-30 20:08:26 +0000666static int m88e1116r_config_init(struct phy_device *phydev)
667{
Michal Simek3da09a52013-05-30 20:08:26 +0000668 int err;
669
Andrew Lunn34386342017-07-30 22:41:45 +0200670 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000671 if (err < 0)
672 return err;
673
674 mdelay(500);
675
Andrew Lunn52295662017-05-25 21:42:08 +0200676 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000677 if (err < 0)
678 return err;
679
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200680 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
681 if (err < 0)
682 return err;
683
Andrew Lunn6ef05eb2017-07-30 22:41:50 +0200684 err = marvell_set_downshift(phydev, true, 8);
Michal Simek3da09a52013-05-30 20:08:26 +0000685 if (err < 0)
686 return err;
687
Andrew Lunn14fc0ab2017-10-31 20:31:28 +0100688 if (phy_interface_is_rgmii(phydev)) {
689 err = m88e1121_config_aneg_rgmii_delays(phydev);
690 if (err < 0)
691 return err;
692 }
Michal Simek3da09a52013-05-30 20:08:26 +0000693
Andrew Lunn34386342017-07-30 22:41:45 +0200694 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000695 if (err < 0)
696 return err;
697
Clemens Gruber79be1a12016-02-15 23:46:45 +0100698 return marvell_config_init(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000699}
700
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200701static int m88e3016_config_init(struct phy_device *phydev)
702{
703 int reg;
704
705 /* Enable Scrambler and Auto-Crossover */
706 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
707 if (reg < 0)
708 return reg;
709
710 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
711 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
712
713 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
714 if (reg < 0)
715 return reg;
716
Clemens Gruber79be1a12016-02-15 23:46:45 +0100717 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200718}
719
Andrew Lunn865b813a2017-07-30 22:41:47 +0200720static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
721 u16 mode,
722 int fibre_copper_auto)
723{
724 int temp;
725
726 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
727 if (temp < 0)
728 return temp;
729
730 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
731 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
732 MII_M1111_HWCFG_FIBER_COPPER_RES);
733 temp |= mode;
734
735 if (fibre_copper_auto)
736 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
737
738 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
739}
740
Andrew Lunn61111592017-07-30 22:41:46 +0200741static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800742{
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300743 int temp;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300744
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200745 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
746 if (temp < 0)
747 return temp;
748
749 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunn61111592017-07-30 22:41:46 +0200750 temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200751 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
Andrew Lunn61111592017-07-30 22:41:46 +0200752 temp &= ~MII_M1111_RGMII_TX_DELAY;
753 temp |= MII_M1111_RGMII_RX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200754 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
Andrew Lunn61111592017-07-30 22:41:46 +0200755 temp &= ~MII_M1111_RGMII_RX_DELAY;
756 temp |= MII_M1111_RGMII_TX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200757 }
758
Andrew Lunn61111592017-07-30 22:41:46 +0200759 return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
760}
761
762static int m88e1111_config_init_rgmii(struct phy_device *phydev)
763{
764 int temp;
765 int err;
766
767 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200768 if (err < 0)
769 return err;
770
771 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
772 if (temp < 0)
773 return temp;
774
775 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
776
777 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
778 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
779 else
780 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
781
782 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
783}
784
785static int m88e1111_config_init_sgmii(struct phy_device *phydev)
786{
787 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200788
Andrew Lunn865b813a2017-07-30 22:41:47 +0200789 err = m88e1111_config_init_hwcfg_mode(
790 phydev,
791 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
792 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200793 if (err < 0)
794 return err;
795
796 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200797 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200798}
799
800static int m88e1111_config_init_rtbi(struct phy_device *phydev)
801{
Andrew Lunn61111592017-07-30 22:41:46 +0200802 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200803
Andrew Lunn61111592017-07-30 22:41:46 +0200804 err = m88e1111_config_init_rgmii_delays(phydev);
805 if (err)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200806 return err;
807
Andrew Lunn865b813a2017-07-30 22:41:47 +0200808 err = m88e1111_config_init_hwcfg_mode(
809 phydev,
810 MII_M1111_HWCFG_MODE_RTBI,
811 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200812 if (err < 0)
813 return err;
814
815 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200816 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200817 if (err < 0)
818 return err;
819
Andrew Lunn865b813a2017-07-30 22:41:47 +0200820 return m88e1111_config_init_hwcfg_mode(
821 phydev,
822 MII_M1111_HWCFG_MODE_RTBI,
823 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200824}
825
826static int m88e1111_config_init(struct phy_device *phydev)
827{
828 int err;
829
Florian Fainelli32a64162015-05-26 12:19:59 -0700830 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200831 err = m88e1111_config_init_rgmii(phydev);
832 if (err)
Kim Phillips895ee682007-06-05 18:46:47 +0800833 return err;
834 }
835
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500836 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200837 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800838 if (err < 0)
839 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500840 }
841
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000842 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200843 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000844 if (err < 0)
845 return err;
846 }
847
David Daneycf41a512010-11-19 12:13:18 +0000848 err = marvell_of_reg_init(phydev);
849 if (err < 0)
850 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000851
Andrew Lunn34386342017-07-30 22:41:45 +0200852 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800853}
854
Clemens Gruberfdecf362016-06-11 17:21:26 +0200855static int m88e1121_config_init(struct phy_device *phydev)
856{
857 int err, oldpage;
858
Andrew Lunn52295662017-05-25 21:42:08 +0200859 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200860 if (oldpage < 0)
861 return oldpage;
Clemens Gruberfdecf362016-06-11 17:21:26 +0200862
863 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
864 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
865 MII_88E1121_PHY_LED_DEF);
866 if (err < 0)
867 return err;
868
Andrew Lunn6427bb22017-05-17 03:26:03 +0200869 marvell_set_page(phydev, oldpage);
Clemens Gruberfdecf362016-06-11 17:21:26 +0200870
871 /* Set marvell,reg-init configuration from device tree */
872 return marvell_config_init(phydev);
873}
874
Clemens Gruber407353e2016-02-23 20:16:58 +0100875static int m88e1510_config_init(struct phy_device *phydev)
876{
877 int err;
878 int temp;
879
880 /* SGMII-to-Copper mode initialization */
881 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Russell King6623c0f2017-12-15 16:10:20 +0000882 u32 pause;
883
Clemens Gruber407353e2016-02-23 20:16:58 +0100884 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200885 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100886 if (err < 0)
887 return err;
888
889 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
890 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
891 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
892 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
893 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
894 if (err < 0)
895 return err;
896
897 /* PHY reset is necessary after changing MODE[2:0] */
898 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
899 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
900 if (err < 0)
901 return err;
902
903 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200904 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100905 if (err < 0)
906 return err;
Russell King6623c0f2017-12-15 16:10:20 +0000907
908 /* There appears to be a bug in the 88e1512 when used in
909 * SGMII to copper mode, where the AN advertisment register
910 * clears the pause bits each time a negotiation occurs.
911 * This means we can never be truely sure what was advertised,
912 * so disable Pause support.
913 */
914 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
915 phydev->supported &= ~pause;
916 phydev->advertising &= ~pause;
Clemens Gruber407353e2016-02-23 20:16:58 +0100917 }
918
Clemens Gruberfdecf362016-06-11 17:21:26 +0200919 return m88e1121_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100920}
921
Ron Madrid605f1962008-11-06 09:05:26 +0000922static int m88e1118_config_aneg(struct phy_device *phydev)
923{
924 int err;
925
Andrew Lunn34386342017-07-30 22:41:45 +0200926 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000927 if (err < 0)
928 return err;
929
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200930 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +0000931 if (err < 0)
932 return err;
933
934 err = genphy_config_aneg(phydev);
935 return 0;
936}
937
938static int m88e1118_config_init(struct phy_device *phydev)
939{
940 int err;
941
942 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200943 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000944 if (err < 0)
945 return err;
946
947 /* Enable 1000 Mbit */
948 err = phy_write(phydev, 0x15, 0x1070);
949 if (err < 0)
950 return err;
951
952 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200953 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000954 if (err < 0)
955 return err;
956
957 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +1000958 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
959 err = phy_write(phydev, 0x10, 0x1100);
960 else
961 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +0000962 if (err < 0)
963 return err;
964
David Daneycf41a512010-11-19 12:13:18 +0000965 err = marvell_of_reg_init(phydev);
966 if (err < 0)
967 return err;
968
Ron Madrid605f1962008-11-06 09:05:26 +0000969 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200970 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000971 if (err < 0)
972 return err;
973
Andrew Lunn34386342017-07-30 22:41:45 +0200974 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000975}
976
David Daney90600732010-11-19 11:58:53 +0000977static int m88e1149_config_init(struct phy_device *phydev)
978{
979 int err;
980
981 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200982 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +0000983 if (err < 0)
984 return err;
985
986 /* Enable 1000 Mbit */
987 err = phy_write(phydev, 0x15, 0x1048);
988 if (err < 0)
989 return err;
990
David Daneycf41a512010-11-19 12:13:18 +0000991 err = marvell_of_reg_init(phydev);
992 if (err < 0)
993 return err;
994
David Daney90600732010-11-19 11:58:53 +0000995 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200996 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +0000997 if (err < 0)
998 return err;
999
Andrew Lunn34386342017-07-30 22:41:45 +02001000 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +00001001}
1002
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001003static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1004{
Andrew Lunn61111592017-07-30 22:41:46 +02001005 int temp;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001006 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001007
Andrew Lunn61111592017-07-30 22:41:46 +02001008 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001009 if (err < 0)
1010 return err;
1011
1012 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1013 err = phy_write(phydev, 0x1d, 0x0012);
1014 if (err < 0)
1015 return err;
1016
1017 temp = phy_read(phydev, 0x1e);
1018 if (temp < 0)
1019 return temp;
1020
1021 temp &= 0xf03f;
1022 temp |= 2 << 9; /* 36 ohm */
1023 temp |= 2 << 6; /* 39 ohm */
1024
1025 err = phy_write(phydev, 0x1e, temp);
1026 if (err < 0)
1027 return err;
1028
1029 err = phy_write(phydev, 0x1d, 0x3);
1030 if (err < 0)
1031 return err;
1032
1033 err = phy_write(phydev, 0x1e, 0x8000);
1034 }
1035 return err;
1036}
1037
1038static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1039{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001040 return m88e1111_config_init_hwcfg_mode(
1041 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1042 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001043}
1044
Andy Fleming76884672007-02-09 18:13:58 -06001045static int m88e1145_config_init(struct phy_device *phydev)
1046{
1047 int err;
1048
1049 /* Take care of errata E0 & E1 */
1050 err = phy_write(phydev, 0x1d, 0x001b);
1051 if (err < 0)
1052 return err;
1053
1054 err = phy_write(phydev, 0x1e, 0x418f);
1055 if (err < 0)
1056 return err;
1057
1058 err = phy_write(phydev, 0x1d, 0x0016);
1059 if (err < 0)
1060 return err;
1061
1062 err = phy_write(phydev, 0x1e, 0xa2da);
1063 if (err < 0)
1064 return err;
1065
Kim Phillips895ee682007-06-05 18:46:47 +08001066 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001067 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001068 if (err < 0)
1069 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001070 }
1071
Viet Nga Daob0224172014-10-23 19:41:53 -07001072 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001073 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001074 if (err < 0)
1075 return err;
1076 }
1077
David Daneycf41a512010-11-19 12:13:18 +00001078 err = marvell_of_reg_init(phydev);
1079 if (err < 0)
1080 return err;
1081
Andy Fleming76884672007-02-09 18:13:58 -06001082 return 0;
1083}
Andy Fleming00db8182005-07-30 19:31:23 -04001084
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001085/**
1086 * fiber_lpa_to_ethtool_lpa_t
1087 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001088 *
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001089 * A small helper function that translates MII_LPA
1090 * bits to ethtool LP advertisement settings.
1091 */
1092static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1093{
1094 u32 result = 0;
1095
1096 if (lpa & LPA_FIBER_1000HALF)
1097 result |= ADVERTISED_1000baseT_Half;
1098 if (lpa & LPA_FIBER_1000FULL)
1099 result |= ADVERTISED_1000baseT_Full;
1100
1101 return result;
1102}
1103
1104/**
1105 * marvell_update_link - update link status in real time in @phydev
1106 * @phydev: target phy_device struct
1107 *
1108 * Description: Update the value in phydev->link to reflect the
1109 * current link value.
1110 */
1111static int marvell_update_link(struct phy_device *phydev, int fiber)
1112{
1113 int status;
1114
1115 /* Use the generic register for copper link, or specific
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001116 * register for fiber case
1117 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001118 if (fiber) {
1119 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1120 if (status < 0)
1121 return status;
1122
1123 if ((status & REGISTER_LINK_STATUS) == 0)
1124 phydev->link = 0;
1125 else
1126 phydev->link = 1;
1127 } else {
1128 return genphy_update_link(phydev);
1129 }
1130
1131 return 0;
1132}
1133
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001134static int marvell_read_status_page_an(struct phy_device *phydev,
1135 int fiber)
1136{
1137 int status;
1138 int lpa;
1139 int lpagb;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001140
1141 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1142 if (status < 0)
1143 return status;
1144
1145 lpa = phy_read(phydev, MII_LPA);
1146 if (lpa < 0)
1147 return lpa;
1148
1149 lpagb = phy_read(phydev, MII_STAT1000);
1150 if (lpagb < 0)
1151 return lpagb;
1152
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001153 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1154 phydev->duplex = DUPLEX_FULL;
1155 else
1156 phydev->duplex = DUPLEX_HALF;
1157
1158 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1159 phydev->pause = 0;
1160 phydev->asym_pause = 0;
1161
1162 switch (status) {
1163 case MII_M1011_PHY_STATUS_1000:
1164 phydev->speed = SPEED_1000;
1165 break;
1166
1167 case MII_M1011_PHY_STATUS_100:
1168 phydev->speed = SPEED_100;
1169 break;
1170
1171 default:
1172 phydev->speed = SPEED_10;
1173 break;
1174 }
1175
1176 if (!fiber) {
1177 phydev->lp_advertising =
1178 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1179 mii_lpa_to_ethtool_lpa_t(lpa);
1180
1181 if (phydev->duplex == DUPLEX_FULL) {
1182 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1183 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1184 }
1185 } else {
1186 /* The fiber link is only 1000M capable */
1187 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1188
1189 if (phydev->duplex == DUPLEX_FULL) {
1190 if (!(lpa & LPA_PAUSE_FIBER)) {
1191 phydev->pause = 0;
1192 phydev->asym_pause = 0;
1193 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1194 phydev->pause = 1;
1195 phydev->asym_pause = 1;
1196 } else {
1197 phydev->pause = 1;
1198 phydev->asym_pause = 0;
1199 }
1200 }
1201 }
1202 return 0;
1203}
1204
1205static int marvell_read_status_page_fixed(struct phy_device *phydev)
1206{
1207 int bmcr = phy_read(phydev, MII_BMCR);
1208
1209 if (bmcr < 0)
1210 return bmcr;
1211
1212 if (bmcr & BMCR_FULLDPLX)
1213 phydev->duplex = DUPLEX_FULL;
1214 else
1215 phydev->duplex = DUPLEX_HALF;
1216
1217 if (bmcr & BMCR_SPEED1000)
1218 phydev->speed = SPEED_1000;
1219 else if (bmcr & BMCR_SPEED100)
1220 phydev->speed = SPEED_100;
1221 else
1222 phydev->speed = SPEED_10;
1223
1224 phydev->pause = 0;
1225 phydev->asym_pause = 0;
1226 phydev->lp_advertising = 0;
1227
1228 return 0;
1229}
1230
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001231/* marvell_read_status_page
1232 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001233 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001234 * Check the link, then figure out the current state
1235 * by comparing what we advertise with what the link partner
1236 * advertises. Start by checking the gigabit possibilities,
1237 * then move on to 10/100.
1238 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001239static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001240{
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001241 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001242 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001243
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001244 /* Detect and update the link, but return if there
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001245 * was an error
1246 */
Andrew Lunn52295662017-05-25 21:42:08 +02001247 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001248 fiber = 1;
1249 else
1250 fiber = 0;
1251
1252 err = marvell_update_link(phydev, fiber);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001253 if (err)
1254 return err;
1255
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001256 if (phydev->autoneg == AUTONEG_ENABLE)
1257 err = marvell_read_status_page_an(phydev, fiber);
1258 else
1259 err = marvell_read_status_page_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001260
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001261 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001262}
1263
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001264/* marvell_read_status
1265 *
1266 * Some Marvell's phys have two modes: fiber and copper.
1267 * Both need status checked.
1268 * Description:
1269 * First, check the fiber link and status.
1270 * If the fiber link is down, check the copper link and status which
1271 * will be the default value if both link are down.
1272 */
1273static int marvell_read_status(struct phy_device *phydev)
1274{
1275 int err;
1276
1277 /* Check the fiber mode first */
Russell Kinga13c06522017-01-10 23:13:45 +00001278 if (phydev->supported & SUPPORTED_FIBRE &&
1279 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001280 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001281 if (err < 0)
1282 goto error;
1283
Andrew Lunn52295662017-05-25 21:42:08 +02001284 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001285 if (err < 0)
1286 goto error;
1287
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001288 /* If the fiber link is up, it is the selected and
1289 * used link. In this case, we need to stay in the
1290 * fiber page. Please to be careful about that, avoid
1291 * to restore Copper page in other functions which
1292 * could break the behaviour for some fiber phy like
1293 * 88E1512.
1294 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001295 if (phydev->link)
1296 return 0;
1297
1298 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001299 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001300 if (err < 0)
1301 goto error;
1302 }
1303
Andrew Lunn52295662017-05-25 21:42:08 +02001304 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001305
1306error:
Andrew Lunn52295662017-05-25 21:42:08 +02001307 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001308 return err;
1309}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001310
1311/* marvell_suspend
1312 *
1313 * Some Marvell's phys have two modes: fiber and copper.
1314 * Both need to be suspended
1315 */
1316static int marvell_suspend(struct phy_device *phydev)
1317{
1318 int err;
1319
1320 /* Suspend the fiber mode first */
1321 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001322 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001323 if (err < 0)
1324 goto error;
1325
1326 /* With the page set, use the generic suspend */
1327 err = genphy_suspend(phydev);
1328 if (err < 0)
1329 goto error;
1330
1331 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001332 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001333 if (err < 0)
1334 goto error;
1335 }
1336
1337 /* With the page set, use the generic suspend */
1338 return genphy_suspend(phydev);
1339
1340error:
Andrew Lunn52295662017-05-25 21:42:08 +02001341 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001342 return err;
1343}
1344
1345/* marvell_resume
1346 *
1347 * Some Marvell's phys have two modes: fiber and copper.
1348 * Both need to be resumed
1349 */
1350static int marvell_resume(struct phy_device *phydev)
1351{
1352 int err;
1353
1354 /* Resume the fiber mode first */
1355 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001356 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001357 if (err < 0)
1358 goto error;
1359
1360 /* With the page set, use the generic resume */
1361 err = genphy_resume(phydev);
1362 if (err < 0)
1363 goto error;
1364
1365 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001366 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001367 if (err < 0)
1368 goto error;
1369 }
1370
1371 /* With the page set, use the generic resume */
1372 return genphy_resume(phydev);
1373
1374error:
Andrew Lunn52295662017-05-25 21:42:08 +02001375 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001376 return err;
1377}
1378
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001379static int marvell_aneg_done(struct phy_device *phydev)
1380{
1381 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001382
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001383 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1384}
1385
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001386static int m88e1121_did_interrupt(struct phy_device *phydev)
1387{
1388 int imask;
1389
1390 imask = phy_read(phydev, MII_M1011_IEVENT);
1391
1392 if (imask & MII_M1011_IMASK_INIT)
1393 return 1;
1394
1395 return 0;
1396}
1397
Andrew Lunn23beb382017-05-17 03:26:04 +02001398static void m88e1318_get_wol(struct phy_device *phydev,
1399 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001400{
1401 wol->supported = WAKE_MAGIC;
1402 wol->wolopts = 0;
1403
Andrew Lunn52295662017-05-25 21:42:08 +02001404 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001405 return;
1406
1407 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1408 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1409 wol->wolopts |= WAKE_MAGIC;
1410
Andrew Lunn52295662017-05-25 21:42:08 +02001411 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001412 return;
1413}
1414
Andrew Lunn23beb382017-05-17 03:26:04 +02001415static int m88e1318_set_wol(struct phy_device *phydev,
1416 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001417{
1418 int err, oldpage, temp;
1419
Andrew Lunn6427bb22017-05-17 03:26:03 +02001420 oldpage = marvell_get_page(phydev);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001421
1422 if (wol->wolopts & WAKE_MAGIC) {
1423 /* Explicitly switch to page 0x00, just to be sure */
Andrew Lunn52295662017-05-25 21:42:08 +02001424 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001425 if (err < 0)
1426 return err;
1427
1428 /* Enable the WOL interrupt */
1429 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1430 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1431 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1432 if (err < 0)
1433 return err;
1434
Andrew Lunn52295662017-05-25 21:42:08 +02001435 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001436 if (err < 0)
1437 return err;
1438
1439 /* Setup LED[2] as interrupt pin (active low) */
1440 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1441 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1442 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1443 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1444 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1445 if (err < 0)
1446 return err;
1447
Andrew Lunn52295662017-05-25 21:42:08 +02001448 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001449 if (err < 0)
1450 return err;
1451
1452 /* Store the device address for the magic packet */
1453 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1454 ((phydev->attached_dev->dev_addr[5] << 8) |
1455 phydev->attached_dev->dev_addr[4]));
1456 if (err < 0)
1457 return err;
1458 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1459 ((phydev->attached_dev->dev_addr[3] << 8) |
1460 phydev->attached_dev->dev_addr[2]));
1461 if (err < 0)
1462 return err;
1463 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1464 ((phydev->attached_dev->dev_addr[1] << 8) |
1465 phydev->attached_dev->dev_addr[0]));
1466 if (err < 0)
1467 return err;
1468
1469 /* Clear WOL status and enable magic packet matching */
1470 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1471 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1472 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1473 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1474 if (err < 0)
1475 return err;
1476 } else {
Andrew Lunn52295662017-05-25 21:42:08 +02001477 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001478 if (err < 0)
1479 return err;
1480
1481 /* Clear WOL status and disable magic packet matching */
1482 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1483 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1484 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1485 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1486 if (err < 0)
1487 return err;
1488 }
1489
Andrew Lunn6427bb22017-05-17 03:26:03 +02001490 err = marvell_set_page(phydev, oldpage);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001491 if (err < 0)
1492 return err;
1493
1494 return 0;
1495}
1496
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001497static int marvell_get_sset_count(struct phy_device *phydev)
1498{
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001499 if (phydev->supported & SUPPORTED_FIBRE)
1500 return ARRAY_SIZE(marvell_hw_stats);
1501 else
1502 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001503}
1504
1505static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1506{
1507 int i;
1508
1509 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1510 memcpy(data + i * ETH_GSTRING_LEN,
1511 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1512 }
1513}
1514
1515#ifndef UINT64_MAX
Andrew Lunn8cf8b872017-07-30 22:41:44 +02001516#define UINT64_MAX (u64)(~((u64)0))
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001517#endif
1518static u64 marvell_get_stat(struct phy_device *phydev, int i)
1519{
1520 struct marvell_hw_stat stat = marvell_hw_stats[i];
1521 struct marvell_priv *priv = phydev->priv;
Andrew Lunn53798322017-05-25 21:42:07 +02001522 int oldpage, val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001523 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001524
Andrew Lunn53798322017-05-25 21:42:07 +02001525 oldpage = marvell_get_set_page(phydev, stat.page);
1526 if (oldpage < 0)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001527 return UINT64_MAX;
1528
1529 val = phy_read(phydev, stat.reg);
1530 if (val < 0) {
Andrew Lunn321b4d42016-02-20 00:35:29 +01001531 ret = UINT64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001532 } else {
1533 val = val & ((1 << stat.bits) - 1);
1534 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001535 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001536 }
1537
Andrew Lunn6427bb22017-05-17 03:26:03 +02001538 marvell_set_page(phydev, oldpage);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001539
Andrew Lunn321b4d42016-02-20 00:35:29 +01001540 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001541}
1542
1543static void marvell_get_stats(struct phy_device *phydev,
1544 struct ethtool_stats *stats, u64 *data)
1545{
1546 int i;
1547
1548 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1549 data[i] = marvell_get_stat(phydev, i);
1550}
1551
Andrew Lunn0b046802017-01-20 01:37:49 +01001552#ifdef CONFIG_HWMON
1553static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1554{
Andrew Lunn975b3882017-05-25 21:42:06 +02001555 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001556 int ret;
1557 int val;
1558
1559 *temp = 0;
1560
1561 mutex_lock(&phydev->lock);
1562
Andrew Lunn52295662017-05-25 21:42:08 +02001563 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001564 if (oldpage < 0) {
1565 mutex_unlock(&phydev->lock);
1566 return oldpage;
1567 }
1568
Andrew Lunn0b046802017-01-20 01:37:49 +01001569 /* Enable temperature sensor */
1570 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1571 if (ret < 0)
1572 goto error;
1573
1574 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1575 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1576 if (ret < 0)
1577 goto error;
1578
1579 /* Wait for temperature to stabilize */
1580 usleep_range(10000, 12000);
1581
1582 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1583 if (val < 0) {
1584 ret = val;
1585 goto error;
1586 }
1587
1588 /* Disable temperature sensor */
1589 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1590 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1591 if (ret < 0)
1592 goto error;
1593
1594 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1595
1596error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001597 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001598 mutex_unlock(&phydev->lock);
1599
1600 return ret;
1601}
1602
1603static int m88e1121_hwmon_read(struct device *dev,
1604 enum hwmon_sensor_types type,
1605 u32 attr, int channel, long *temp)
1606{
1607 struct phy_device *phydev = dev_get_drvdata(dev);
1608 int err;
1609
1610 switch (attr) {
1611 case hwmon_temp_input:
1612 err = m88e1121_get_temp(phydev, temp);
1613 break;
1614 default:
1615 return -EOPNOTSUPP;
1616 }
1617
1618 return err;
1619}
1620
1621static umode_t m88e1121_hwmon_is_visible(const void *data,
1622 enum hwmon_sensor_types type,
1623 u32 attr, int channel)
1624{
1625 if (type != hwmon_temp)
1626 return 0;
1627
1628 switch (attr) {
1629 case hwmon_temp_input:
1630 return 0444;
1631 default:
1632 return 0;
1633 }
1634}
1635
1636static u32 m88e1121_hwmon_chip_config[] = {
1637 HWMON_C_REGISTER_TZ,
1638 0
1639};
1640
1641static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1642 .type = hwmon_chip,
1643 .config = m88e1121_hwmon_chip_config,
1644};
1645
1646static u32 m88e1121_hwmon_temp_config[] = {
1647 HWMON_T_INPUT,
1648 0
1649};
1650
1651static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1652 .type = hwmon_temp,
1653 .config = m88e1121_hwmon_temp_config,
1654};
1655
1656static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1657 &m88e1121_hwmon_chip,
1658 &m88e1121_hwmon_temp,
1659 NULL
1660};
1661
1662static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1663 .is_visible = m88e1121_hwmon_is_visible,
1664 .read = m88e1121_hwmon_read,
1665};
1666
1667static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1668 .ops = &m88e1121_hwmon_hwmon_ops,
1669 .info = m88e1121_hwmon_info,
1670};
1671
1672static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1673{
Andrew Lunn975b3882017-05-25 21:42:06 +02001674 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001675 int ret;
1676
1677 *temp = 0;
1678
1679 mutex_lock(&phydev->lock);
1680
Andrew Lunn52295662017-05-25 21:42:08 +02001681 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001682 if (oldpage < 0) {
1683 mutex_unlock(&phydev->lock);
1684 return oldpage;
1685 }
1686
Andrew Lunn0b046802017-01-20 01:37:49 +01001687 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1688 if (ret < 0)
1689 goto error;
1690
1691 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1692
1693error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001694 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001695 mutex_unlock(&phydev->lock);
1696
1697 return ret;
1698}
1699
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001700static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001701{
Andrew Lunn975b3882017-05-25 21:42:06 +02001702 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001703 int ret;
1704
1705 *temp = 0;
1706
1707 mutex_lock(&phydev->lock);
Andrew Lunn53798322017-05-25 21:42:07 +02001708
Andrew Lunn52295662017-05-25 21:42:08 +02001709 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001710 if (oldpage < 0) {
1711 mutex_unlock(&phydev->lock);
1712 return oldpage;
1713 }
Andrew Lunn0b046802017-01-20 01:37:49 +01001714
Andrew Lunn0b046802017-01-20 01:37:49 +01001715 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1716 if (ret < 0)
1717 goto error;
1718
1719 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1720 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1721 /* convert to mC */
1722 *temp *= 1000;
1723
1724error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001725 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001726 mutex_unlock(&phydev->lock);
1727
1728 return ret;
1729}
1730
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001731static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001732{
Andrew Lunn975b3882017-05-25 21:42:06 +02001733 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001734 int ret;
1735
1736 mutex_lock(&phydev->lock);
1737
Andrew Lunn52295662017-05-25 21:42:08 +02001738 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001739 if (oldpage < 0) {
1740 mutex_unlock(&phydev->lock);
1741 return oldpage;
1742 }
1743
Andrew Lunn0b046802017-01-20 01:37:49 +01001744 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1745 if (ret < 0)
1746 goto error;
1747
1748 temp = temp / 1000;
1749 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1750 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1751 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1752 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1753
1754error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001755 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001756 mutex_unlock(&phydev->lock);
1757
1758 return ret;
1759}
1760
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001761static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001762{
Andrew Lunn975b3882017-05-25 21:42:06 +02001763 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001764 int ret;
1765
1766 *alarm = false;
1767
1768 mutex_lock(&phydev->lock);
1769
Andrew Lunn52295662017-05-25 21:42:08 +02001770 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001771 if (oldpage < 0) {
1772 mutex_unlock(&phydev->lock);
1773 return oldpage;
1774 }
1775
Andrew Lunn0b046802017-01-20 01:37:49 +01001776 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1777 if (ret < 0)
1778 goto error;
1779 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1780
1781error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001782 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001783 mutex_unlock(&phydev->lock);
1784
1785 return ret;
1786}
1787
1788static int m88e1510_hwmon_read(struct device *dev,
1789 enum hwmon_sensor_types type,
1790 u32 attr, int channel, long *temp)
1791{
1792 struct phy_device *phydev = dev_get_drvdata(dev);
1793 int err;
1794
1795 switch (attr) {
1796 case hwmon_temp_input:
1797 err = m88e1510_get_temp(phydev, temp);
1798 break;
1799 case hwmon_temp_crit:
1800 err = m88e1510_get_temp_critical(phydev, temp);
1801 break;
1802 case hwmon_temp_max_alarm:
1803 err = m88e1510_get_temp_alarm(phydev, temp);
1804 break;
1805 default:
1806 return -EOPNOTSUPP;
1807 }
1808
1809 return err;
1810}
1811
1812static int m88e1510_hwmon_write(struct device *dev,
1813 enum hwmon_sensor_types type,
1814 u32 attr, int channel, long temp)
1815{
1816 struct phy_device *phydev = dev_get_drvdata(dev);
1817 int err;
1818
1819 switch (attr) {
1820 case hwmon_temp_crit:
1821 err = m88e1510_set_temp_critical(phydev, temp);
1822 break;
1823 default:
1824 return -EOPNOTSUPP;
1825 }
1826 return err;
1827}
1828
1829static umode_t m88e1510_hwmon_is_visible(const void *data,
1830 enum hwmon_sensor_types type,
1831 u32 attr, int channel)
1832{
1833 if (type != hwmon_temp)
1834 return 0;
1835
1836 switch (attr) {
1837 case hwmon_temp_input:
1838 case hwmon_temp_max_alarm:
1839 return 0444;
1840 case hwmon_temp_crit:
1841 return 0644;
1842 default:
1843 return 0;
1844 }
1845}
1846
1847static u32 m88e1510_hwmon_temp_config[] = {
1848 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1849 0
1850};
1851
1852static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1853 .type = hwmon_temp,
1854 .config = m88e1510_hwmon_temp_config,
1855};
1856
1857static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1858 &m88e1121_hwmon_chip,
1859 &m88e1510_hwmon_temp,
1860 NULL
1861};
1862
1863static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1864 .is_visible = m88e1510_hwmon_is_visible,
1865 .read = m88e1510_hwmon_read,
1866 .write = m88e1510_hwmon_write,
1867};
1868
1869static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1870 .ops = &m88e1510_hwmon_hwmon_ops,
1871 .info = m88e1510_hwmon_info,
1872};
1873
1874static int marvell_hwmon_name(struct phy_device *phydev)
1875{
1876 struct marvell_priv *priv = phydev->priv;
1877 struct device *dev = &phydev->mdio.dev;
1878 const char *devname = dev_name(dev);
1879 size_t len = strlen(devname);
1880 int i, j;
1881
1882 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1883 if (!priv->hwmon_name)
1884 return -ENOMEM;
1885
1886 for (i = j = 0; i < len && devname[i]; i++) {
1887 if (isalnum(devname[i]))
1888 priv->hwmon_name[j++] = devname[i];
1889 }
1890
1891 return 0;
1892}
1893
1894static int marvell_hwmon_probe(struct phy_device *phydev,
1895 const struct hwmon_chip_info *chip)
1896{
1897 struct marvell_priv *priv = phydev->priv;
1898 struct device *dev = &phydev->mdio.dev;
1899 int err;
1900
1901 err = marvell_hwmon_name(phydev);
1902 if (err)
1903 return err;
1904
1905 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1906 dev, priv->hwmon_name, phydev, chip, NULL);
1907
1908 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1909}
1910
1911static int m88e1121_hwmon_probe(struct phy_device *phydev)
1912{
1913 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1914}
1915
1916static int m88e1510_hwmon_probe(struct phy_device *phydev)
1917{
1918 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1919}
1920#else
1921static int m88e1121_hwmon_probe(struct phy_device *phydev)
1922{
1923 return 0;
1924}
1925
1926static int m88e1510_hwmon_probe(struct phy_device *phydev)
1927{
1928 return 0;
1929}
1930#endif
1931
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001932static int marvell_probe(struct phy_device *phydev)
1933{
1934 struct marvell_priv *priv;
1935
Andrew Lunne5a03bf2016-01-06 20:11:16 +01001936 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001937 if (!priv)
1938 return -ENOMEM;
1939
1940 phydev->priv = priv;
1941
1942 return 0;
1943}
1944
Andrew Lunn0b046802017-01-20 01:37:49 +01001945static int m88e1121_probe(struct phy_device *phydev)
1946{
1947 int err;
1948
1949 err = marvell_probe(phydev);
1950 if (err)
1951 return err;
1952
1953 return m88e1121_hwmon_probe(phydev);
1954}
1955
1956static int m88e1510_probe(struct phy_device *phydev)
1957{
1958 int err;
1959
1960 err = marvell_probe(phydev);
1961 if (err)
1962 return err;
1963
1964 return m88e1510_hwmon_probe(phydev);
1965}
1966
Olof Johanssone5479232007-07-03 16:23:46 -05001967static struct phy_driver marvell_drivers[] = {
1968 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001969 .phy_id = MARVELL_PHY_ID_88E1101,
1970 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05001971 .name = "Marvell 88E1101",
1972 .features = PHY_GBIT_FEATURES,
1973 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01001974 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01001975 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02001976 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05001977 .read_status = &genphy_read_status,
1978 .ack_interrupt = &marvell_ack_interrupt,
1979 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001980 .resume = &genphy_resume,
1981 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001982 .get_sset_count = marvell_get_sset_count,
1983 .get_strings = marvell_get_strings,
1984 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05001985 },
1986 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001987 .phy_id = MARVELL_PHY_ID_88E1112,
1988 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05001989 .name = "Marvell 88E1112",
1990 .features = PHY_GBIT_FEATURES,
1991 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001992 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05001993 .config_init = &m88e1111_config_init,
1994 .config_aneg = &marvell_config_aneg,
1995 .read_status = &genphy_read_status,
1996 .ack_interrupt = &marvell_ack_interrupt,
1997 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001998 .resume = &genphy_resume,
1999 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002000 .get_sset_count = marvell_get_sset_count,
2001 .get_strings = marvell_get_strings,
2002 .get_stats = marvell_get_stats,
Olof Johansson85cfb532007-07-03 16:24:32 -05002003 },
2004 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002005 .phy_id = MARVELL_PHY_ID_88E1111,
2006 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002007 .name = "Marvell 88E1111",
2008 .features = PHY_GBIT_FEATURES,
2009 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002010 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002011 .config_init = &m88e1111_config_init,
Harini Katakam3ec0a0f2016-06-27 13:09:59 +05302012 .config_aneg = &m88e1111_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002013 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002014 .ack_interrupt = &marvell_ack_interrupt,
2015 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002016 .resume = &genphy_resume,
2017 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002018 .get_sset_count = marvell_get_sset_count,
2019 .get_strings = marvell_get_strings,
2020 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002021 },
2022 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002023 .phy_id = MARVELL_PHY_ID_88E1118,
2024 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002025 .name = "Marvell 88E1118",
2026 .features = PHY_GBIT_FEATURES,
2027 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002028 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002029 .config_init = &m88e1118_config_init,
2030 .config_aneg = &m88e1118_config_aneg,
2031 .read_status = &genphy_read_status,
2032 .ack_interrupt = &marvell_ack_interrupt,
2033 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002034 .resume = &genphy_resume,
2035 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002036 .get_sset_count = marvell_get_sset_count,
2037 .get_strings = marvell_get_strings,
2038 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002039 },
2040 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002041 .phy_id = MARVELL_PHY_ID_88E1121R,
2042 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002043 .name = "Marvell 88E1121R",
2044 .features = PHY_GBIT_FEATURES,
2045 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002046 .probe = &m88e1121_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002047 .config_init = &m88e1121_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002048 .config_aneg = &m88e1121_config_aneg,
2049 .read_status = &marvell_read_status,
2050 .ack_interrupt = &marvell_ack_interrupt,
2051 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002052 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002053 .resume = &genphy_resume,
2054 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002055 .get_sset_count = marvell_get_sset_count,
2056 .get_strings = marvell_get_strings,
2057 .get_stats = marvell_get_stats,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002058 },
2059 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002060 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002061 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002062 .name = "Marvell 88E1318S",
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002063 .features = PHY_GBIT_FEATURES,
2064 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002065 .probe = marvell_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002066 .config_init = &m88e1121_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002067 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002068 .read_status = &marvell_read_status,
2069 .ack_interrupt = &marvell_ack_interrupt,
2070 .config_intr = &marvell_config_intr,
2071 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002072 .get_wol = &m88e1318_get_wol,
2073 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002074 .resume = &genphy_resume,
2075 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002076 .get_sset_count = marvell_get_sset_count,
2077 .get_strings = marvell_get_strings,
2078 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002079 },
2080 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002081 .phy_id = MARVELL_PHY_ID_88E1145,
2082 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002083 .name = "Marvell 88E1145",
2084 .features = PHY_GBIT_FEATURES,
2085 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002086 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002087 .config_init = &m88e1145_config_init,
Zhao Qiangc5058732017-12-18 10:26:43 +08002088 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002089 .read_status = &genphy_read_status,
2090 .ack_interrupt = &marvell_ack_interrupt,
2091 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002092 .resume = &genphy_resume,
2093 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002094 .get_sset_count = marvell_get_sset_count,
2095 .get_strings = marvell_get_strings,
2096 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002097 },
2098 {
David Daney90600732010-11-19 11:58:53 +00002099 .phy_id = MARVELL_PHY_ID_88E1149R,
2100 .phy_id_mask = MARVELL_PHY_ID_MASK,
2101 .name = "Marvell 88E1149R",
2102 .features = PHY_GBIT_FEATURES,
2103 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002104 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002105 .config_init = &m88e1149_config_init,
2106 .config_aneg = &m88e1118_config_aneg,
2107 .read_status = &genphy_read_status,
2108 .ack_interrupt = &marvell_ack_interrupt,
2109 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002110 .resume = &genphy_resume,
2111 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002112 .get_sset_count = marvell_get_sset_count,
2113 .get_strings = marvell_get_strings,
2114 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002115 },
2116 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002117 .phy_id = MARVELL_PHY_ID_88E1240,
2118 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002119 .name = "Marvell 88E1240",
2120 .features = PHY_GBIT_FEATURES,
2121 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002122 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002123 .config_init = &m88e1111_config_init,
2124 .config_aneg = &marvell_config_aneg,
2125 .read_status = &genphy_read_status,
2126 .ack_interrupt = &marvell_ack_interrupt,
2127 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002128 .resume = &genphy_resume,
2129 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002130 .get_sset_count = marvell_get_sset_count,
2131 .get_strings = marvell_get_strings,
2132 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002133 },
Michal Simek3da09a52013-05-30 20:08:26 +00002134 {
2135 .phy_id = MARVELL_PHY_ID_88E1116R,
2136 .phy_id_mask = MARVELL_PHY_ID_MASK,
2137 .name = "Marvell 88E1116R",
2138 .features = PHY_GBIT_FEATURES,
2139 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002140 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002141 .config_init = &m88e1116r_config_init,
2142 .config_aneg = &genphy_config_aneg,
2143 .read_status = &genphy_read_status,
2144 .ack_interrupt = &marvell_ack_interrupt,
2145 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002146 .resume = &genphy_resume,
2147 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002148 .get_sset_count = marvell_get_sset_count,
2149 .get_strings = marvell_get_strings,
2150 .get_stats = marvell_get_stats,
Michal Simek3da09a52013-05-30 20:08:26 +00002151 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002152 {
2153 .phy_id = MARVELL_PHY_ID_88E1510,
2154 .phy_id_mask = MARVELL_PHY_ID_MASK,
2155 .name = "Marvell 88E1510",
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02002156 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
Arnd Bergmann18702412017-01-23 13:18:41 +01002157 .flags = PHY_HAS_INTERRUPT,
Andrew Lunn0b046802017-01-20 01:37:49 +01002158 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002159 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002160 .config_aneg = &m88e1510_config_aneg,
2161 .read_status = &marvell_read_status,
2162 .ack_interrupt = &marvell_ack_interrupt,
2163 .config_intr = &marvell_config_intr,
2164 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002165 .get_wol = &m88e1318_get_wol,
2166 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002167 .resume = &marvell_resume,
2168 .suspend = &marvell_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002169 .get_sset_count = marvell_get_sset_count,
2170 .get_strings = marvell_get_strings,
2171 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002172 .set_loopback = genphy_loopback,
Michal Simek10e24caa2013-05-30 20:08:27 +00002173 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002174 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002175 .phy_id = MARVELL_PHY_ID_88E1540,
2176 .phy_id_mask = MARVELL_PHY_ID_MASK,
2177 .name = "Marvell 88E1540",
2178 .features = PHY_GBIT_FEATURES,
2179 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002180 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002181 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002182 .config_aneg = &m88e1510_config_aneg,
2183 .read_status = &marvell_read_status,
2184 .ack_interrupt = &marvell_ack_interrupt,
2185 .config_intr = &marvell_config_intr,
2186 .did_interrupt = &m88e1121_did_interrupt,
2187 .resume = &genphy_resume,
2188 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002189 .get_sset_count = marvell_get_sset_count,
2190 .get_strings = marvell_get_strings,
2191 .get_stats = marvell_get_stats,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002192 },
2193 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002194 .phy_id = MARVELL_PHY_ID_88E1545,
2195 .phy_id_mask = MARVELL_PHY_ID_MASK,
2196 .name = "Marvell 88E1545",
2197 .probe = m88e1510_probe,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002198 .features = PHY_GBIT_FEATURES,
2199 .flags = PHY_HAS_INTERRUPT,
2200 .config_init = &marvell_config_init,
2201 .config_aneg = &m88e1510_config_aneg,
2202 .read_status = &marvell_read_status,
2203 .ack_interrupt = &marvell_ack_interrupt,
2204 .config_intr = &marvell_config_intr,
2205 .did_interrupt = &m88e1121_did_interrupt,
2206 .resume = &genphy_resume,
2207 .suspend = &genphy_suspend,
2208 .get_sset_count = marvell_get_sset_count,
2209 .get_strings = marvell_get_strings,
2210 .get_stats = marvell_get_stats,
2211 },
2212 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002213 .phy_id = MARVELL_PHY_ID_88E3016,
2214 .phy_id_mask = MARVELL_PHY_ID_MASK,
2215 .name = "Marvell 88E3016",
2216 .features = PHY_BASIC_FEATURES,
2217 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002218 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002219 .config_aneg = &genphy_config_aneg,
2220 .config_init = &m88e3016_config_init,
2221 .aneg_done = &marvell_aneg_done,
2222 .read_status = &marvell_read_status,
2223 .ack_interrupt = &marvell_ack_interrupt,
2224 .config_intr = &marvell_config_intr,
2225 .did_interrupt = &m88e1121_did_interrupt,
2226 .resume = &genphy_resume,
2227 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002228 .get_sset_count = marvell_get_sset_count,
2229 .get_strings = marvell_get_strings,
2230 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002231 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002232 {
2233 .phy_id = MARVELL_PHY_ID_88E6390,
2234 .phy_id_mask = MARVELL_PHY_ID_MASK,
2235 .name = "Marvell 88E6390",
2236 .features = PHY_GBIT_FEATURES,
2237 .flags = PHY_HAS_INTERRUPT,
2238 .probe = m88e1510_probe,
2239 .config_init = &marvell_config_init,
2240 .config_aneg = &m88e1510_config_aneg,
2241 .read_status = &marvell_read_status,
2242 .ack_interrupt = &marvell_ack_interrupt,
2243 .config_intr = &marvell_config_intr,
2244 .did_interrupt = &m88e1121_did_interrupt,
2245 .resume = &genphy_resume,
2246 .suspend = &genphy_suspend,
2247 .get_sset_count = marvell_get_sset_count,
2248 .get_strings = marvell_get_strings,
2249 .get_stats = marvell_get_stats,
2250 },
Andy Fleming00db8182005-07-30 19:31:23 -04002251};
2252
Johan Hovold50fd7152014-11-11 19:45:59 +01002253module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002254
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002255static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002256 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2257 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2258 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2259 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2260 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2261 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2262 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2263 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2264 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002265 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002266 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002267 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002268 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002269 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002270 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002271 { }
2272};
2273
2274MODULE_DEVICE_TABLE(mdio, marvell_tbl);