blob: ed338af61cddbc7f239db19c5bf2cfc28b2cf592 [file] [log] [blame]
Andy Fleming00db8182005-07-30 19:31:23 -04001/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000010 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
Andy Fleming00db8182005-07-30 19:31:23 -040012 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
Andy Fleming00db8182005-07-30 19:31:23 -040018#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010020#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040021#include <linux/errno.h>
22#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010023#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040024#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040033#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100036#include <linux/marvell_phy.h>
David Daneycf41a512010-11-19 12:13:18 +000037#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
Avinash Kumareea3b202013-09-30 09:36:44 +053039#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040040#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053041#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040042
David Daney27d916d2010-11-19 11:58:52 +000043#define MII_MARVELL_PHY_PAGE 22
44
Andy Fleming00db8182005-07-30 19:31:23 -040045#define MII_M1011_IEVENT 0x13
46#define MII_M1011_IEVENT_CLEAR 0x0000
47
48#define MII_M1011_IMASK 0x12
49#define MII_M1011_IMASK_INIT 0x6400
50#define MII_M1011_IMASK_CLEAR 0x0000
51
Andy Fleming76884672007-02-09 18:13:58 -060052#define MII_M1011_PHY_SCR 0x10
David Thomson239aa552015-07-10 16:28:25 +120053#define MII_M1011_PHY_SCR_MDI 0x0000
54#define MII_M1011_PHY_SCR_MDI_X 0x0020
Andy Fleming76884672007-02-09 18:13:58 -060055#define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
56
Viet Nga Daob0224172014-10-23 19:41:53 -070057#define MII_M1145_PHY_EXT_SR 0x1b
Andy Fleming76884672007-02-09 18:13:58 -060058#define MII_M1145_PHY_EXT_CR 0x14
59#define MII_M1145_RGMII_RX_DELAY 0x0080
60#define MII_M1145_RGMII_TX_DELAY 0x0002
Viet Nga Daob0224172014-10-23 19:41:53 -070061#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4
62#define MII_M1145_HWCFG_MODE_MASK 0xf
63#define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000
Andy Fleming76884672007-02-09 18:13:58 -060064
Vince Bridgers99d881f2014-10-26 14:22:24 -050065#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4
66#define MII_M1145_HWCFG_MODE_MASK 0xf
67#define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000
68
Andy Fleming76884672007-02-09 18:13:58 -060069#define MII_M1111_PHY_LED_CONTROL 0x18
70#define MII_M1111_PHY_LED_DIRECT 0x4100
71#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080072#define MII_M1111_PHY_EXT_CR 0x14
73#define MII_M1111_RX_DELAY 0x80
74#define MII_M1111_TX_DELAY 0x2
75#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030076
77#define MII_M1111_HWCFG_MODE_MASK 0xf
78#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
79#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050080#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000081#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030082#define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
83#define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
84
85#define MII_M1111_COPPER 0
86#define MII_M1111_FIBER 1
87
Cyril Chemparathyc477d042010-08-02 09:44:53 +000088#define MII_88E1121_PHY_MSCR_PAGE 2
89#define MII_88E1121_PHY_MSCR_REG 21
90#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
91#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
92#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4))
93
Andrew Lunn975b3882017-05-25 21:42:06 +020094#define MII_88E1121_MISC_TEST_PAGE 6
Andrew Lunn0b046802017-01-20 01:37:49 +010095#define MII_88E1121_MISC_TEST 0x1a
96#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
97#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
98#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
99#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
100#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
101#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
102
103#define MII_88E1510_TEMP_SENSOR 0x1b
104#define MII_88E1510_TEMP_SENSOR_MASK 0xff
105
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700106#define MII_88E1318S_PHY_MSCR1_REG 16
107#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700108
Michael Stapelberg3871c382013-03-11 13:56:45 +0000109/* Copper Specific Interrupt Enable Register */
110#define MII_88E1318S_PHY_CSIER 0x12
111/* WOL Event Interrupt Enable */
112#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
113
114/* LED Timer Control Register */
115#define MII_88E1318S_PHY_LED_PAGE 0x03
116#define MII_88E1318S_PHY_LED_TCR 0x12
117#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
118#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
119#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
120
121/* Magic Packet MAC address registers */
122#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
123#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
124#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
125
126#define MII_88E1318S_PHY_WOL_PAGE 0x11
127#define MII_88E1318S_PHY_WOL_CTRL 0x10
128#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
129#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
130
Sergei Poselenov140bc922009-04-07 02:01:41 +0000131#define MII_88E1121_PHY_LED_CTRL 16
132#define MII_88E1121_PHY_LED_PAGE 3
133#define MII_88E1121_PHY_LED_DEF 0x0030
Sergei Poselenov140bc922009-04-07 02:01:41 +0000134
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300135#define MII_M1011_PHY_STATUS 0x11
136#define MII_M1011_PHY_STATUS_1000 0x8000
137#define MII_M1011_PHY_STATUS_100 0x4000
138#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
139#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
140#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
141#define MII_M1011_PHY_STATUS_LINK 0x0400
142
Michal Simek3da09a52013-05-30 20:08:26 +0000143#define MII_M1116R_CONTROL_REG_MAC 21
144
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200145#define MII_88E3016_PHY_SPEC_CTRL 0x10
146#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
147#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600148
Stefan Roese930b37e2016-02-18 10:59:07 +0100149#define MII_88E1510_GEN_CTRL_REG_1 0x14
150#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
151#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
152#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
153
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200154#define LPA_FIBER_1000HALF 0x40
155#define LPA_FIBER_1000FULL 0x20
156
157#define LPA_PAUSE_FIBER 0x180
158#define LPA_PAUSE_ASYM_FIBER 0x100
159
160#define ADVERTISE_FIBER_1000HALF 0x40
161#define ADVERTISE_FIBER_1000FULL 0x20
162
163#define ADVERTISE_PAUSE_FIBER 0x180
164#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
165
166#define REGISTER_LINK_STATUS 0x400
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200167#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200168
Andy Fleming00db8182005-07-30 19:31:23 -0400169MODULE_DESCRIPTION("Marvell PHY driver");
170MODULE_AUTHOR("Andy Fleming");
171MODULE_LICENSE("GPL");
172
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100173struct marvell_hw_stat {
174 const char *string;
175 u8 page;
176 u8 reg;
177 u8 bits;
178};
179
180static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200181 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100182 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200183 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100184};
185
186struct marvell_priv {
187 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100188 char *hwmon_name;
189 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100190};
191
Andrew Lunn6427bb22017-05-17 03:26:03 +0200192static int marvell_get_page(struct phy_device *phydev)
193{
194 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
195}
196
197static int marvell_set_page(struct phy_device *phydev, int page)
198{
199 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
200}
201
Andrew Lunn53798322017-05-25 21:42:07 +0200202static int marvell_get_set_page(struct phy_device *phydev, int page)
203{
204 int oldpage = marvell_get_page(phydev);
205
206 if (oldpage < 0)
207 return oldpage;
208
209 if (page != oldpage)
210 return marvell_set_page(phydev, page);
211
212 return 0;
213}
214
Andy Fleming00db8182005-07-30 19:31:23 -0400215static int marvell_ack_interrupt(struct phy_device *phydev)
216{
217 int err;
218
219 /* Clear the interrupts by reading the reg */
220 err = phy_read(phydev, MII_M1011_IEVENT);
221
222 if (err < 0)
223 return err;
224
225 return 0;
226}
227
228static int marvell_config_intr(struct phy_device *phydev)
229{
230 int err;
231
Andy Fleming76884672007-02-09 18:13:58 -0600232 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200233 err = phy_write(phydev, MII_M1011_IMASK,
234 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400235 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200236 err = phy_write(phydev, MII_M1011_IMASK,
237 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400238
239 return err;
240}
241
David Thomson239aa552015-07-10 16:28:25 +1200242static int marvell_set_polarity(struct phy_device *phydev, int polarity)
243{
244 int reg;
245 int err;
246 int val;
247
248 /* get the current settings */
249 reg = phy_read(phydev, MII_M1011_PHY_SCR);
250 if (reg < 0)
251 return reg;
252
253 val = reg;
254 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
255 switch (polarity) {
256 case ETH_TP_MDI:
257 val |= MII_M1011_PHY_SCR_MDI;
258 break;
259 case ETH_TP_MDI_X:
260 val |= MII_M1011_PHY_SCR_MDI_X;
261 break;
262 case ETH_TP_MDI_AUTO:
263 case ETH_TP_MDI_INVALID:
264 default:
265 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
266 break;
267 }
268
269 if (val != reg) {
270 /* Set the new polarity value in the register */
271 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
272 if (err)
273 return err;
274 }
275
276 return 0;
277}
278
Andy Fleming00db8182005-07-30 19:31:23 -0400279static int marvell_config_aneg(struct phy_device *phydev)
280{
281 int err;
282
283 /* The Marvell PHY has an errata which requires
284 * that certain registers get written in order
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200285 * to restart autonegotiation
286 */
Andy Fleming00db8182005-07-30 19:31:23 -0400287 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
288
289 if (err < 0)
290 return err;
291
292 err = phy_write(phydev, 0x1d, 0x1f);
293 if (err < 0)
294 return err;
295
296 err = phy_write(phydev, 0x1e, 0x200c);
297 if (err < 0)
298 return err;
299
300 err = phy_write(phydev, 0x1d, 0x5);
301 if (err < 0)
302 return err;
303
304 err = phy_write(phydev, 0x1e, 0);
305 if (err < 0)
306 return err;
307
308 err = phy_write(phydev, 0x1e, 0x100);
309 if (err < 0)
310 return err;
311
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530312 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600313 if (err < 0)
314 return err;
315
316 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
317 MII_M1111_PHY_LED_DIRECT);
318 if (err < 0)
319 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400320
321 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000322 if (err < 0)
323 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400324
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000325 if (phydev->autoneg != AUTONEG_ENABLE) {
326 int bmcr;
327
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200328 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000329 * genphy_config_aneg() call above) must be followed by
330 * a software reset. Otherwise, the write has no effect.
331 */
332 bmcr = phy_read(phydev, MII_BMCR);
333 if (bmcr < 0)
334 return bmcr;
335
336 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
337 if (err < 0)
338 return err;
339 }
340
341 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400342}
343
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530344static int m88e1111_config_aneg(struct phy_device *phydev)
345{
346 int err;
347
348 /* The Marvell PHY has an errata which requires
349 * that certain registers get written in order
350 * to restart autonegotiation
351 */
352 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
353
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530354 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530355 if (err < 0)
356 return err;
357
358 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
359 MII_M1111_PHY_LED_DIRECT);
360 if (err < 0)
361 return err;
362
363 err = genphy_config_aneg(phydev);
364 if (err < 0)
365 return err;
366
367 if (phydev->autoneg != AUTONEG_ENABLE) {
368 int bmcr;
369
370 /* A write to speed/duplex bits (that is performed by
371 * genphy_config_aneg() call above) must be followed by
372 * a software reset. Otherwise, the write has no effect.
373 */
374 bmcr = phy_read(phydev, MII_BMCR);
375 if (bmcr < 0)
376 return bmcr;
377
378 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
379 if (err < 0)
380 return err;
381 }
382
383 return 0;
384}
385
David Daneycf41a512010-11-19 12:13:18 +0000386#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200387/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000388 * marvell,reg-init property stored in the of_node for the phydev.
389 *
390 * marvell,reg-init = <reg-page reg mask value>,...;
391 *
392 * There may be one or more sets of <reg-page reg mask value>:
393 *
394 * reg-page: which register bank to use.
395 * reg: the register.
396 * mask: if non-zero, ANDed with existing register value.
397 * value: ORed with the masked value and written to the regiser.
398 *
399 */
400static int marvell_of_reg_init(struct phy_device *phydev)
401{
402 const __be32 *paddr;
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100403 int len, i, saved_page, current_page, ret;
David Daneycf41a512010-11-19 12:13:18 +0000404
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100405 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000406 return 0;
407
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100408 paddr = of_get_property(phydev->mdio.dev.of_node,
409 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000410 if (!paddr || len < (4 * sizeof(*paddr)))
411 return 0;
412
Andrew Lunn6427bb22017-05-17 03:26:03 +0200413 saved_page = marvell_get_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000414 if (saved_page < 0)
415 return saved_page;
David Daneycf41a512010-11-19 12:13:18 +0000416 current_page = saved_page;
417
418 ret = 0;
419 len /= sizeof(*paddr);
420 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200421 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000422 u16 reg = be32_to_cpup(paddr + i + 1);
423 u16 mask = be32_to_cpup(paddr + i + 2);
424 u16 val_bits = be32_to_cpup(paddr + i + 3);
425 int val;
426
Andrew Lunn6427bb22017-05-17 03:26:03 +0200427 if (page != current_page) {
428 current_page = page;
429 ret = marvell_set_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000430 if (ret < 0)
431 goto err;
432 }
433
434 val = 0;
435 if (mask) {
436 val = phy_read(phydev, reg);
437 if (val < 0) {
438 ret = val;
439 goto err;
440 }
441 val &= mask;
442 }
443 val |= val_bits;
444
445 ret = phy_write(phydev, reg, val);
446 if (ret < 0)
447 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000448 }
449err:
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100450 if (current_page != saved_page) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200451 i = marvell_set_page(phydev, saved_page);
David Daneycf41a512010-11-19 12:13:18 +0000452 if (ret == 0)
453 ret = i;
454 }
455 return ret;
456}
457#else
458static int marvell_of_reg_init(struct phy_device *phydev)
459{
460 return 0;
461}
462#endif /* CONFIG_OF_MDIO */
463
Sergei Poselenov140bc922009-04-07 02:01:41 +0000464static int m88e1121_config_aneg(struct phy_device *phydev)
465{
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000466 int err, oldpage, mscr;
467
Andrew Lunn53798322017-05-25 21:42:07 +0200468 oldpage = marvell_get_set_page(phydev, MII_88E1121_PHY_MSCR_PAGE);
469 if (oldpage < 0)
470 return oldpage;
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000471
Florian Fainelli32a64162015-05-26 12:19:59 -0700472 if (phy_interface_is_rgmii(phydev)) {
Arnaud Patardbe8c6482010-10-21 03:59:57 -0700473 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
474 MII_88E1121_PHY_MSCR_DELAY_MASK;
475
476 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
477 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
478 MII_88E1121_PHY_MSCR_TX_DELAY);
479 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
480 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
481 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
482 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
483
484 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
485 if (err < 0)
486 return err;
487 }
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000488
Andrew Lunn6427bb22017-05-17 03:26:03 +0200489 marvell_set_page(phydev, oldpage);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000490
491 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
492 if (err < 0)
493 return err;
494
495 err = phy_write(phydev, MII_M1011_PHY_SCR,
496 MII_M1011_PHY_SCR_AUTO_CROSS);
497 if (err < 0)
498 return err;
499
Clemens Gruberfdecf362016-06-11 17:21:26 +0200500 return genphy_config_aneg(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000501}
502
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700503static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700504{
505 int err, oldpage, mscr;
506
Andrew Lunn53798322017-05-25 21:42:07 +0200507 oldpage = marvell_get_set_page(phydev, MII_88E1121_PHY_MSCR_PAGE);
508 if (oldpage < 0)
509 return oldpage;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700510
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700511 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
512 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700513
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700514 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700515 if (err < 0)
516 return err;
517
Andrew Lunn6427bb22017-05-17 03:26:03 +0200518 err = marvell_set_page(phydev, oldpage);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700519 if (err < 0)
520 return err;
521
522 return m88e1121_config_aneg(phydev);
523}
524
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200525/**
526 * ethtool_adv_to_fiber_adv_t
527 * @ethadv: the ethtool advertisement settings
528 *
529 * A small helper function that translates ethtool advertisement
530 * settings to phy autonegotiation advertisements for the
531 * MII_ADV register for fiber link.
532 */
533static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
534{
535 u32 result = 0;
536
537 if (ethadv & ADVERTISED_1000baseT_Half)
538 result |= ADVERTISE_FIBER_1000HALF;
539 if (ethadv & ADVERTISED_1000baseT_Full)
540 result |= ADVERTISE_FIBER_1000FULL;
541
542 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
543 result |= LPA_PAUSE_ASYM_FIBER;
544 else if (ethadv & ADVERTISE_PAUSE_CAP)
545 result |= (ADVERTISE_PAUSE_FIBER
546 & (~ADVERTISE_PAUSE_ASYM_FIBER));
547
548 return result;
549}
550
551/**
552 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
553 * @phydev: target phy_device struct
554 *
555 * Description: If auto-negotiation is enabled, we configure the
556 * advertising, and then restart auto-negotiation. If it is not
557 * enabled, then we write the BMCR. Adapted for fiber link in
558 * some Marvell's devices.
559 */
560static int marvell_config_aneg_fiber(struct phy_device *phydev)
561{
562 int changed = 0;
563 int err;
564 int adv, oldadv;
565 u32 advertise;
566
567 if (phydev->autoneg != AUTONEG_ENABLE)
568 return genphy_setup_forced(phydev);
569
570 /* Only allow advertising what this PHY supports */
571 phydev->advertising &= phydev->supported;
572 advertise = phydev->advertising;
573
574 /* Setup fiber advertisement */
575 adv = phy_read(phydev, MII_ADVERTISE);
576 if (adv < 0)
577 return adv;
578
579 oldadv = adv;
580 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
581 | LPA_PAUSE_FIBER);
582 adv |= ethtool_adv_to_fiber_adv_t(advertise);
583
584 if (adv != oldadv) {
585 err = phy_write(phydev, MII_ADVERTISE, adv);
586 if (err < 0)
587 return err;
588
589 changed = 1;
590 }
591
592 if (changed == 0) {
593 /* Advertisement hasn't changed, but maybe aneg was never on to
594 * begin with? Or maybe phy was isolated?
595 */
596 int ctl = phy_read(phydev, MII_BMCR);
597
598 if (ctl < 0)
599 return ctl;
600
601 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
602 changed = 1; /* do restart aneg */
603 }
604
605 /* Only restart aneg if we are advertising something different
606 * than we were before.
607 */
608 if (changed > 0)
609 changed = genphy_restart_aneg(phydev);
610
611 return changed;
612}
613
Michal Simek10e24caa2013-05-30 20:08:27 +0000614static int m88e1510_config_aneg(struct phy_device *phydev)
615{
616 int err;
617
Andrew Lunn6427bb22017-05-17 03:26:03 +0200618 err = marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200619 if (err < 0)
620 goto error;
621
622 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000623 err = m88e1318_config_aneg(phydev);
624 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200625 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000626
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200627 /* Then the fiber link */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200628 err = marvell_set_page(phydev, MII_M1111_FIBER);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200629 if (err < 0)
630 goto error;
631
632 err = marvell_config_aneg_fiber(phydev);
633 if (err < 0)
634 goto error;
635
Andrew Lunn6427bb22017-05-17 03:26:03 +0200636 return marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200637
638error:
Andrew Lunn6427bb22017-05-17 03:26:03 +0200639 marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200640 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100641}
642
643static int marvell_config_init(struct phy_device *phydev)
644{
645 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000646 return marvell_of_reg_init(phydev);
647}
648
Michal Simek3da09a52013-05-30 20:08:26 +0000649static int m88e1116r_config_init(struct phy_device *phydev)
650{
651 int temp;
652 int err;
653
654 temp = phy_read(phydev, MII_BMCR);
655 temp |= BMCR_RESET;
656 err = phy_write(phydev, MII_BMCR, temp);
657 if (err < 0)
658 return err;
659
660 mdelay(500);
661
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200662 err = marvell_set_page(phydev, MII_M1111_COPPER);
Michal Simek3da09a52013-05-30 20:08:26 +0000663 if (err < 0)
664 return err;
665
666 temp = phy_read(phydev, MII_M1011_PHY_SCR);
667 temp |= (7 << 12); /* max number of gigabit attempts */
668 temp |= (1 << 11); /* enable downshift */
669 temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
670 err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
671 if (err < 0)
672 return err;
673
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200674 err = marvell_set_page(phydev, MII_88E1121_PHY_MSCR_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000675 if (err < 0)
676 return err;
677 temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
678 temp |= (1 << 5);
679 temp |= (1 << 4);
680 err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
681 if (err < 0)
682 return err;
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200683 err = marvell_set_page(phydev, MII_M1111_COPPER);
Michal Simek3da09a52013-05-30 20:08:26 +0000684 if (err < 0)
685 return err;
686
687 temp = phy_read(phydev, MII_BMCR);
688 temp |= BMCR_RESET;
689 err = phy_write(phydev, MII_BMCR, temp);
690 if (err < 0)
691 return err;
692
693 mdelay(500);
694
Clemens Gruber79be1a12016-02-15 23:46:45 +0100695 return marvell_config_init(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000696}
697
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200698static int m88e3016_config_init(struct phy_device *phydev)
699{
700 int reg;
701
702 /* Enable Scrambler and Auto-Crossover */
703 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
704 if (reg < 0)
705 return reg;
706
707 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
708 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
709
710 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
711 if (reg < 0)
712 return reg;
713
Clemens Gruber79be1a12016-02-15 23:46:45 +0100714 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200715}
716
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200717static int m88e1111_config_init_rgmii(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800718{
719 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300720 int temp;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300721
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200722 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
723 if (temp < 0)
724 return temp;
725
726 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
727 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
728 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
729 temp &= ~MII_M1111_TX_DELAY;
730 temp |= MII_M1111_RX_DELAY;
731 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
732 temp &= ~MII_M1111_RX_DELAY;
733 temp |= MII_M1111_TX_DELAY;
734 }
735
736 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
737 if (err < 0)
738 return err;
739
740 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
741 if (temp < 0)
742 return temp;
743
744 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
745
746 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
747 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
748 else
749 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
750
751 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
752}
753
754static int m88e1111_config_init_sgmii(struct phy_device *phydev)
755{
756 int err;
757 int temp;
758
759 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
760 if (temp < 0)
761 return temp;
762
763 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
764 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
765 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
766
767 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
768 if (err < 0)
769 return err;
770
771 /* make sure copper is selected */
Andrew Lunn975b3882017-05-25 21:42:06 +0200772 return marvell_set_page(phydev, MII_M1111_COPPER);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200773}
774
775static int m88e1111_config_init_rtbi(struct phy_device *phydev)
776{
777 int err;
778 int temp;
779
780 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
781 if (temp < 0)
782 return temp;
783
784 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
785 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
786 if (err < 0)
787 return err;
788
789 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
790 if (temp < 0)
791 return temp;
792
793 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
794 MII_M1111_HWCFG_FIBER_COPPER_RES);
795 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
796
797 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
798 if (err < 0)
799 return err;
800
801 /* soft reset */
802 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
803 if (err < 0)
804 return err;
805
806 do
807 temp = phy_read(phydev, MII_BMCR);
808 while (temp & BMCR_RESET);
809
810 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
811 if (temp < 0)
812 return temp;
813
814 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
815 MII_M1111_HWCFG_FIBER_COPPER_RES);
816 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI |
817 MII_M1111_HWCFG_FIBER_COPPER_AUTO;
818
819 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
820}
821
822static int m88e1111_config_init(struct phy_device *phydev)
823{
824 int err;
825
Florian Fainelli32a64162015-05-26 12:19:59 -0700826 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200827 err = m88e1111_config_init_rgmii(phydev);
828 if (err)
Kim Phillips895ee682007-06-05 18:46:47 +0800829 return err;
830 }
831
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500832 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200833 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800834 if (err < 0)
835 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500836 }
837
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000838 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200839 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000840 if (err < 0)
841 return err;
842 }
843
David Daneycf41a512010-11-19 12:13:18 +0000844 err = marvell_of_reg_init(phydev);
845 if (err < 0)
846 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000847
Srinivas Kandagatlacc90cb32012-04-02 06:25:24 +0000848 return phy_write(phydev, MII_BMCR, BMCR_RESET);
Kim Phillips895ee682007-06-05 18:46:47 +0800849}
850
Clemens Gruberfdecf362016-06-11 17:21:26 +0200851static int m88e1121_config_init(struct phy_device *phydev)
852{
853 int err, oldpage;
854
Andrew Lunn53798322017-05-25 21:42:07 +0200855 oldpage = marvell_get_set_page(phydev, MII_88E1121_PHY_LED_PAGE);
856 if (oldpage < 0)
857 return oldpage;
Clemens Gruberfdecf362016-06-11 17:21:26 +0200858
859 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
860 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
861 MII_88E1121_PHY_LED_DEF);
862 if (err < 0)
863 return err;
864
Andrew Lunn6427bb22017-05-17 03:26:03 +0200865 marvell_set_page(phydev, oldpage);
Clemens Gruberfdecf362016-06-11 17:21:26 +0200866
867 /* Set marvell,reg-init configuration from device tree */
868 return marvell_config_init(phydev);
869}
870
Clemens Gruber407353e2016-02-23 20:16:58 +0100871static int m88e1510_config_init(struct phy_device *phydev)
872{
873 int err;
874 int temp;
875
876 /* SGMII-to-Copper mode initialization */
877 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
878 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200879 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100880 if (err < 0)
881 return err;
882
883 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
884 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
885 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
886 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
887 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
888 if (err < 0)
889 return err;
890
891 /* PHY reset is necessary after changing MODE[2:0] */
892 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
893 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
894 if (err < 0)
895 return err;
896
897 /* Reset page selection */
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200898 err = marvell_set_page(phydev, MII_M1111_COPPER);
Clemens Gruber407353e2016-02-23 20:16:58 +0100899 if (err < 0)
900 return err;
901 }
902
Clemens Gruberfdecf362016-06-11 17:21:26 +0200903 return m88e1121_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100904}
905
Ron Madrid605f1962008-11-06 09:05:26 +0000906static int m88e1118_config_aneg(struct phy_device *phydev)
907{
908 int err;
909
910 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
911 if (err < 0)
912 return err;
913
914 err = phy_write(phydev, MII_M1011_PHY_SCR,
915 MII_M1011_PHY_SCR_AUTO_CROSS);
916 if (err < 0)
917 return err;
918
919 err = genphy_config_aneg(phydev);
920 return 0;
921}
922
923static int m88e1118_config_init(struct phy_device *phydev)
924{
925 int err;
926
927 /* Change address */
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200928 err = marvell_set_page(phydev, MII_88E1121_PHY_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000929 if (err < 0)
930 return err;
931
932 /* Enable 1000 Mbit */
933 err = phy_write(phydev, 0x15, 0x1070);
934 if (err < 0)
935 return err;
936
937 /* Change address */
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200938 err = marvell_set_page(phydev, MII_88E1318S_PHY_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000939 if (err < 0)
940 return err;
941
942 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +1000943 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
944 err = phy_write(phydev, 0x10, 0x1100);
945 else
946 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +0000947 if (err < 0)
948 return err;
949
David Daneycf41a512010-11-19 12:13:18 +0000950 err = marvell_of_reg_init(phydev);
951 if (err < 0)
952 return err;
953
Ron Madrid605f1962008-11-06 09:05:26 +0000954 /* Reset address */
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200955 err = marvell_set_page(phydev, MII_M1111_COPPER);
Ron Madrid605f1962008-11-06 09:05:26 +0000956 if (err < 0)
957 return err;
958
Srinivas Kandagatlacc90cb32012-04-02 06:25:24 +0000959 return phy_write(phydev, MII_BMCR, BMCR_RESET);
Ron Madrid605f1962008-11-06 09:05:26 +0000960}
961
David Daney90600732010-11-19 11:58:53 +0000962static int m88e1149_config_init(struct phy_device *phydev)
963{
964 int err;
965
966 /* Change address */
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200967 err = marvell_set_page(phydev, MII_88E1121_PHY_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +0000968 if (err < 0)
969 return err;
970
971 /* Enable 1000 Mbit */
972 err = phy_write(phydev, 0x15, 0x1048);
973 if (err < 0)
974 return err;
975
David Daneycf41a512010-11-19 12:13:18 +0000976 err = marvell_of_reg_init(phydev);
977 if (err < 0)
978 return err;
979
David Daney90600732010-11-19 11:58:53 +0000980 /* Reset address */
Andrew Lunn3ea17bc2017-05-25 21:42:05 +0200981 err = marvell_set_page(phydev, MII_M1111_COPPER);
David Daney90600732010-11-19 11:58:53 +0000982 if (err < 0)
983 return err;
984
Srinivas Kandagatlacc90cb32012-04-02 06:25:24 +0000985 return phy_write(phydev, MII_BMCR, BMCR_RESET);
David Daney90600732010-11-19 11:58:53 +0000986}
987
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200988static int m88e1145_config_init_rgmii(struct phy_device *phydev)
989{
990 int err;
991 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
992
993 if (temp < 0)
994 return temp;
995
996 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
997
998 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
999 if (err < 0)
1000 return err;
1001
1002 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1003 err = phy_write(phydev, 0x1d, 0x0012);
1004 if (err < 0)
1005 return err;
1006
1007 temp = phy_read(phydev, 0x1e);
1008 if (temp < 0)
1009 return temp;
1010
1011 temp &= 0xf03f;
1012 temp |= 2 << 9; /* 36 ohm */
1013 temp |= 2 << 6; /* 39 ohm */
1014
1015 err = phy_write(phydev, 0x1e, temp);
1016 if (err < 0)
1017 return err;
1018
1019 err = phy_write(phydev, 0x1d, 0x3);
1020 if (err < 0)
1021 return err;
1022
1023 err = phy_write(phydev, 0x1e, 0x8000);
1024 }
1025 return err;
1026}
1027
1028static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1029{
1030 int temp = phy_read(phydev, MII_M1145_PHY_EXT_SR);
1031
1032 if (temp < 0)
1033 return temp;
1034
1035 temp &= ~MII_M1145_HWCFG_MODE_MASK;
1036 temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK;
1037 temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO;
1038
1039 return phy_write(phydev, MII_M1145_PHY_EXT_SR, temp);
1040}
1041
Andy Fleming76884672007-02-09 18:13:58 -06001042static int m88e1145_config_init(struct phy_device *phydev)
1043{
1044 int err;
1045
1046 /* Take care of errata E0 & E1 */
1047 err = phy_write(phydev, 0x1d, 0x001b);
1048 if (err < 0)
1049 return err;
1050
1051 err = phy_write(phydev, 0x1e, 0x418f);
1052 if (err < 0)
1053 return err;
1054
1055 err = phy_write(phydev, 0x1d, 0x0016);
1056 if (err < 0)
1057 return err;
1058
1059 err = phy_write(phydev, 0x1e, 0xa2da);
1060 if (err < 0)
1061 return err;
1062
Kim Phillips895ee682007-06-05 18:46:47 +08001063 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001064 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001065 if (err < 0)
1066 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001067 }
1068
Viet Nga Daob0224172014-10-23 19:41:53 -07001069 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001070 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001071 if (err < 0)
1072 return err;
1073 }
1074
David Daneycf41a512010-11-19 12:13:18 +00001075 err = marvell_of_reg_init(phydev);
1076 if (err < 0)
1077 return err;
1078
Andy Fleming76884672007-02-09 18:13:58 -06001079 return 0;
1080}
Andy Fleming00db8182005-07-30 19:31:23 -04001081
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001082/**
1083 * fiber_lpa_to_ethtool_lpa_t
1084 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001085 *
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001086 * A small helper function that translates MII_LPA
1087 * bits to ethtool LP advertisement settings.
1088 */
1089static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1090{
1091 u32 result = 0;
1092
1093 if (lpa & LPA_FIBER_1000HALF)
1094 result |= ADVERTISED_1000baseT_Half;
1095 if (lpa & LPA_FIBER_1000FULL)
1096 result |= ADVERTISED_1000baseT_Full;
1097
1098 return result;
1099}
1100
1101/**
1102 * marvell_update_link - update link status in real time in @phydev
1103 * @phydev: target phy_device struct
1104 *
1105 * Description: Update the value in phydev->link to reflect the
1106 * current link value.
1107 */
1108static int marvell_update_link(struct phy_device *phydev, int fiber)
1109{
1110 int status;
1111
1112 /* Use the generic register for copper link, or specific
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001113 * register for fiber case
1114 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001115 if (fiber) {
1116 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1117 if (status < 0)
1118 return status;
1119
1120 if ((status & REGISTER_LINK_STATUS) == 0)
1121 phydev->link = 0;
1122 else
1123 phydev->link = 1;
1124 } else {
1125 return genphy_update_link(phydev);
1126 }
1127
1128 return 0;
1129}
1130
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001131static int marvell_read_status_page_an(struct phy_device *phydev,
1132 int fiber)
1133{
1134 int status;
1135 int lpa;
1136 int lpagb;
1137 int adv;
1138
1139 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1140 if (status < 0)
1141 return status;
1142
1143 lpa = phy_read(phydev, MII_LPA);
1144 if (lpa < 0)
1145 return lpa;
1146
1147 lpagb = phy_read(phydev, MII_STAT1000);
1148 if (lpagb < 0)
1149 return lpagb;
1150
1151 adv = phy_read(phydev, MII_ADVERTISE);
1152 if (adv < 0)
1153 return adv;
1154
1155 lpa &= adv;
1156
1157 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1158 phydev->duplex = DUPLEX_FULL;
1159 else
1160 phydev->duplex = DUPLEX_HALF;
1161
1162 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1163 phydev->pause = 0;
1164 phydev->asym_pause = 0;
1165
1166 switch (status) {
1167 case MII_M1011_PHY_STATUS_1000:
1168 phydev->speed = SPEED_1000;
1169 break;
1170
1171 case MII_M1011_PHY_STATUS_100:
1172 phydev->speed = SPEED_100;
1173 break;
1174
1175 default:
1176 phydev->speed = SPEED_10;
1177 break;
1178 }
1179
1180 if (!fiber) {
1181 phydev->lp_advertising =
1182 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1183 mii_lpa_to_ethtool_lpa_t(lpa);
1184
1185 if (phydev->duplex == DUPLEX_FULL) {
1186 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1187 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1188 }
1189 } else {
1190 /* The fiber link is only 1000M capable */
1191 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1192
1193 if (phydev->duplex == DUPLEX_FULL) {
1194 if (!(lpa & LPA_PAUSE_FIBER)) {
1195 phydev->pause = 0;
1196 phydev->asym_pause = 0;
1197 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1198 phydev->pause = 1;
1199 phydev->asym_pause = 1;
1200 } else {
1201 phydev->pause = 1;
1202 phydev->asym_pause = 0;
1203 }
1204 }
1205 }
1206 return 0;
1207}
1208
1209static int marvell_read_status_page_fixed(struct phy_device *phydev)
1210{
1211 int bmcr = phy_read(phydev, MII_BMCR);
1212
1213 if (bmcr < 0)
1214 return bmcr;
1215
1216 if (bmcr & BMCR_FULLDPLX)
1217 phydev->duplex = DUPLEX_FULL;
1218 else
1219 phydev->duplex = DUPLEX_HALF;
1220
1221 if (bmcr & BMCR_SPEED1000)
1222 phydev->speed = SPEED_1000;
1223 else if (bmcr & BMCR_SPEED100)
1224 phydev->speed = SPEED_100;
1225 else
1226 phydev->speed = SPEED_10;
1227
1228 phydev->pause = 0;
1229 phydev->asym_pause = 0;
1230 phydev->lp_advertising = 0;
1231
1232 return 0;
1233}
1234
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001235/* marvell_read_status_page
1236 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001237 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001238 * Check the link, then figure out the current state
1239 * by comparing what we advertise with what the link partner
1240 * advertises. Start by checking the gigabit possibilities,
1241 * then move on to 10/100.
1242 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001243static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001244{
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001245 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001246 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001247
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001248 /* Detect and update the link, but return if there
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001249 * was an error
1250 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001251 if (page == MII_M1111_FIBER)
1252 fiber = 1;
1253 else
1254 fiber = 0;
1255
1256 err = marvell_update_link(phydev, fiber);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001257 if (err)
1258 return err;
1259
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001260 if (phydev->autoneg == AUTONEG_ENABLE)
1261 err = marvell_read_status_page_an(phydev, fiber);
1262 else
1263 err = marvell_read_status_page_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001264
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001265 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001266}
1267
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001268/* marvell_read_status
1269 *
1270 * Some Marvell's phys have two modes: fiber and copper.
1271 * Both need status checked.
1272 * Description:
1273 * First, check the fiber link and status.
1274 * If the fiber link is down, check the copper link and status which
1275 * will be the default value if both link are down.
1276 */
1277static int marvell_read_status(struct phy_device *phydev)
1278{
1279 int err;
1280
1281 /* Check the fiber mode first */
Russell Kinga13c06522017-01-10 23:13:45 +00001282 if (phydev->supported & SUPPORTED_FIBRE &&
1283 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn6427bb22017-05-17 03:26:03 +02001284 err = marvell_set_page(phydev, MII_M1111_FIBER);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001285 if (err < 0)
1286 goto error;
1287
1288 err = marvell_read_status_page(phydev, MII_M1111_FIBER);
1289 if (err < 0)
1290 goto error;
1291
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001292 /* If the fiber link is up, it is the selected and
1293 * used link. In this case, we need to stay in the
1294 * fiber page. Please to be careful about that, avoid
1295 * to restore Copper page in other functions which
1296 * could break the behaviour for some fiber phy like
1297 * 88E1512.
1298 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001299 if (phydev->link)
1300 return 0;
1301
1302 /* If fiber link is down, check and save copper mode state */
Andrew Lunn6427bb22017-05-17 03:26:03 +02001303 err = marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001304 if (err < 0)
1305 goto error;
1306 }
1307
1308 return marvell_read_status_page(phydev, MII_M1111_COPPER);
1309
1310error:
Andrew Lunn6427bb22017-05-17 03:26:03 +02001311 marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001312 return err;
1313}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001314
1315/* marvell_suspend
1316 *
1317 * Some Marvell's phys have two modes: fiber and copper.
1318 * Both need to be suspended
1319 */
1320static int marvell_suspend(struct phy_device *phydev)
1321{
1322 int err;
1323
1324 /* Suspend the fiber mode first */
1325 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn6427bb22017-05-17 03:26:03 +02001326 err = marvell_set_page(phydev, MII_M1111_FIBER);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001327 if (err < 0)
1328 goto error;
1329
1330 /* With the page set, use the generic suspend */
1331 err = genphy_suspend(phydev);
1332 if (err < 0)
1333 goto error;
1334
1335 /* Then, the copper link */
Andrew Lunn6427bb22017-05-17 03:26:03 +02001336 err = marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001337 if (err < 0)
1338 goto error;
1339 }
1340
1341 /* With the page set, use the generic suspend */
1342 return genphy_suspend(phydev);
1343
1344error:
Andrew Lunn6427bb22017-05-17 03:26:03 +02001345 marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001346 return err;
1347}
1348
1349/* marvell_resume
1350 *
1351 * Some Marvell's phys have two modes: fiber and copper.
1352 * Both need to be resumed
1353 */
1354static int marvell_resume(struct phy_device *phydev)
1355{
1356 int err;
1357
1358 /* Resume the fiber mode first */
1359 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn6427bb22017-05-17 03:26:03 +02001360 err = marvell_set_page(phydev, MII_M1111_FIBER);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001361 if (err < 0)
1362 goto error;
1363
1364 /* With the page set, use the generic resume */
1365 err = genphy_resume(phydev);
1366 if (err < 0)
1367 goto error;
1368
1369 /* Then, the copper link */
Andrew Lunn6427bb22017-05-17 03:26:03 +02001370 err = marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001371 if (err < 0)
1372 goto error;
1373 }
1374
1375 /* With the page set, use the generic resume */
1376 return genphy_resume(phydev);
1377
1378error:
Andrew Lunn6427bb22017-05-17 03:26:03 +02001379 marvell_set_page(phydev, MII_M1111_COPPER);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001380 return err;
1381}
1382
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001383static int marvell_aneg_done(struct phy_device *phydev)
1384{
1385 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001386
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001387 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1388}
1389
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001390static int m88e1121_did_interrupt(struct phy_device *phydev)
1391{
1392 int imask;
1393
1394 imask = phy_read(phydev, MII_M1011_IEVENT);
1395
1396 if (imask & MII_M1011_IMASK_INIT)
1397 return 1;
1398
1399 return 0;
1400}
1401
Andrew Lunn23beb382017-05-17 03:26:04 +02001402static void m88e1318_get_wol(struct phy_device *phydev,
1403 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001404{
1405 wol->supported = WAKE_MAGIC;
1406 wol->wolopts = 0;
1407
Andrew Lunn6427bb22017-05-17 03:26:03 +02001408 if (marvell_set_page(phydev, MII_88E1318S_PHY_WOL_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001409 return;
1410
1411 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1412 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1413 wol->wolopts |= WAKE_MAGIC;
1414
Andrew Lunn3ea17bc2017-05-25 21:42:05 +02001415 if (marvell_set_page(phydev, MII_M1111_COPPER) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001416 return;
1417}
1418
Andrew Lunn23beb382017-05-17 03:26:04 +02001419static int m88e1318_set_wol(struct phy_device *phydev,
1420 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001421{
1422 int err, oldpage, temp;
1423
Andrew Lunn6427bb22017-05-17 03:26:03 +02001424 oldpage = marvell_get_page(phydev);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001425
1426 if (wol->wolopts & WAKE_MAGIC) {
1427 /* Explicitly switch to page 0x00, just to be sure */
Andrew Lunn3ea17bc2017-05-25 21:42:05 +02001428 err = marvell_set_page(phydev, MII_M1111_COPPER);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001429 if (err < 0)
1430 return err;
1431
1432 /* Enable the WOL interrupt */
1433 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1434 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1435 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1436 if (err < 0)
1437 return err;
1438
Andrew Lunn6427bb22017-05-17 03:26:03 +02001439 err = marvell_set_page(phydev, MII_88E1318S_PHY_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001440 if (err < 0)
1441 return err;
1442
1443 /* Setup LED[2] as interrupt pin (active low) */
1444 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1445 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1446 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1447 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1448 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1449 if (err < 0)
1450 return err;
1451
Andrew Lunn6427bb22017-05-17 03:26:03 +02001452 err = marvell_set_page(phydev, MII_88E1318S_PHY_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001453 if (err < 0)
1454 return err;
1455
1456 /* Store the device address for the magic packet */
1457 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1458 ((phydev->attached_dev->dev_addr[5] << 8) |
1459 phydev->attached_dev->dev_addr[4]));
1460 if (err < 0)
1461 return err;
1462 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1463 ((phydev->attached_dev->dev_addr[3] << 8) |
1464 phydev->attached_dev->dev_addr[2]));
1465 if (err < 0)
1466 return err;
1467 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1468 ((phydev->attached_dev->dev_addr[1] << 8) |
1469 phydev->attached_dev->dev_addr[0]));
1470 if (err < 0)
1471 return err;
1472
1473 /* Clear WOL status and enable magic packet matching */
1474 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1475 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1476 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1477 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1478 if (err < 0)
1479 return err;
1480 } else {
Andrew Lunn6427bb22017-05-17 03:26:03 +02001481 err = marvell_set_page(phydev, MII_88E1318S_PHY_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001482 if (err < 0)
1483 return err;
1484
1485 /* Clear WOL status and disable magic packet matching */
1486 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1487 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1488 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1489 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1490 if (err < 0)
1491 return err;
1492 }
1493
Andrew Lunn6427bb22017-05-17 03:26:03 +02001494 err = marvell_set_page(phydev, oldpage);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001495 if (err < 0)
1496 return err;
1497
1498 return 0;
1499}
1500
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001501static int marvell_get_sset_count(struct phy_device *phydev)
1502{
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001503 if (phydev->supported & SUPPORTED_FIBRE)
1504 return ARRAY_SIZE(marvell_hw_stats);
1505 else
1506 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001507}
1508
1509static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1510{
1511 int i;
1512
1513 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1514 memcpy(data + i * ETH_GSTRING_LEN,
1515 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1516 }
1517}
1518
1519#ifndef UINT64_MAX
1520#define UINT64_MAX (u64)(~((u64)0))
1521#endif
1522static u64 marvell_get_stat(struct phy_device *phydev, int i)
1523{
1524 struct marvell_hw_stat stat = marvell_hw_stats[i];
1525 struct marvell_priv *priv = phydev->priv;
Andrew Lunn53798322017-05-25 21:42:07 +02001526 int oldpage, val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001527 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001528
Andrew Lunn53798322017-05-25 21:42:07 +02001529 oldpage = marvell_get_set_page(phydev, stat.page);
1530 if (oldpage < 0)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001531 return UINT64_MAX;
1532
1533 val = phy_read(phydev, stat.reg);
1534 if (val < 0) {
Andrew Lunn321b4d42016-02-20 00:35:29 +01001535 ret = UINT64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001536 } else {
1537 val = val & ((1 << stat.bits) - 1);
1538 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001539 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001540 }
1541
Andrew Lunn6427bb22017-05-17 03:26:03 +02001542 marvell_set_page(phydev, oldpage);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001543
Andrew Lunn321b4d42016-02-20 00:35:29 +01001544 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001545}
1546
1547static void marvell_get_stats(struct phy_device *phydev,
1548 struct ethtool_stats *stats, u64 *data)
1549{
1550 int i;
1551
1552 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1553 data[i] = marvell_get_stat(phydev, i);
1554}
1555
Andrew Lunn0b046802017-01-20 01:37:49 +01001556#ifdef CONFIG_HWMON
1557static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1558{
Andrew Lunn975b3882017-05-25 21:42:06 +02001559 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001560 int ret;
1561 int val;
1562
1563 *temp = 0;
1564
1565 mutex_lock(&phydev->lock);
1566
Andrew Lunn53798322017-05-25 21:42:07 +02001567 oldpage = marvell_get_set_page(phydev, MII_88E1121_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001568 if (oldpage < 0) {
1569 mutex_unlock(&phydev->lock);
1570 return oldpage;
1571 }
1572
Andrew Lunn0b046802017-01-20 01:37:49 +01001573 /* Enable temperature sensor */
1574 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1575 if (ret < 0)
1576 goto error;
1577
1578 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1579 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1580 if (ret < 0)
1581 goto error;
1582
1583 /* Wait for temperature to stabilize */
1584 usleep_range(10000, 12000);
1585
1586 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1587 if (val < 0) {
1588 ret = val;
1589 goto error;
1590 }
1591
1592 /* Disable temperature sensor */
1593 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1594 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1595 if (ret < 0)
1596 goto error;
1597
1598 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1599
1600error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001601 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001602 mutex_unlock(&phydev->lock);
1603
1604 return ret;
1605}
1606
1607static int m88e1121_hwmon_read(struct device *dev,
1608 enum hwmon_sensor_types type,
1609 u32 attr, int channel, long *temp)
1610{
1611 struct phy_device *phydev = dev_get_drvdata(dev);
1612 int err;
1613
1614 switch (attr) {
1615 case hwmon_temp_input:
1616 err = m88e1121_get_temp(phydev, temp);
1617 break;
1618 default:
1619 return -EOPNOTSUPP;
1620 }
1621
1622 return err;
1623}
1624
1625static umode_t m88e1121_hwmon_is_visible(const void *data,
1626 enum hwmon_sensor_types type,
1627 u32 attr, int channel)
1628{
1629 if (type != hwmon_temp)
1630 return 0;
1631
1632 switch (attr) {
1633 case hwmon_temp_input:
1634 return 0444;
1635 default:
1636 return 0;
1637 }
1638}
1639
1640static u32 m88e1121_hwmon_chip_config[] = {
1641 HWMON_C_REGISTER_TZ,
1642 0
1643};
1644
1645static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1646 .type = hwmon_chip,
1647 .config = m88e1121_hwmon_chip_config,
1648};
1649
1650static u32 m88e1121_hwmon_temp_config[] = {
1651 HWMON_T_INPUT,
1652 0
1653};
1654
1655static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1656 .type = hwmon_temp,
1657 .config = m88e1121_hwmon_temp_config,
1658};
1659
1660static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1661 &m88e1121_hwmon_chip,
1662 &m88e1121_hwmon_temp,
1663 NULL
1664};
1665
1666static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1667 .is_visible = m88e1121_hwmon_is_visible,
1668 .read = m88e1121_hwmon_read,
1669};
1670
1671static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1672 .ops = &m88e1121_hwmon_hwmon_ops,
1673 .info = m88e1121_hwmon_info,
1674};
1675
1676static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1677{
Andrew Lunn975b3882017-05-25 21:42:06 +02001678 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001679 int ret;
1680
1681 *temp = 0;
1682
1683 mutex_lock(&phydev->lock);
1684
Andrew Lunn53798322017-05-25 21:42:07 +02001685 oldpage = marvell_get_set_page(phydev, MII_88E1121_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001686 if (oldpage < 0) {
1687 mutex_unlock(&phydev->lock);
1688 return oldpage;
1689 }
1690
Andrew Lunn0b046802017-01-20 01:37:49 +01001691 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1692 if (ret < 0)
1693 goto error;
1694
1695 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1696
1697error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001698 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001699 mutex_unlock(&phydev->lock);
1700
1701 return ret;
1702}
1703
1704int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1705{
Andrew Lunn975b3882017-05-25 21:42:06 +02001706 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001707 int ret;
1708
1709 *temp = 0;
1710
1711 mutex_lock(&phydev->lock);
Andrew Lunn53798322017-05-25 21:42:07 +02001712
1713 oldpage = marvell_get_set_page(phydev, MII_88E1121_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001714 if (oldpage < 0) {
1715 mutex_unlock(&phydev->lock);
1716 return oldpage;
1717 }
Andrew Lunn0b046802017-01-20 01:37:49 +01001718
Andrew Lunn0b046802017-01-20 01:37:49 +01001719 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1720 if (ret < 0)
1721 goto error;
1722
1723 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1724 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1725 /* convert to mC */
1726 *temp *= 1000;
1727
1728error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001729 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001730 mutex_unlock(&phydev->lock);
1731
1732 return ret;
1733}
1734
1735int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1736{
Andrew Lunn975b3882017-05-25 21:42:06 +02001737 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001738 int ret;
1739
1740 mutex_lock(&phydev->lock);
1741
Andrew Lunn53798322017-05-25 21:42:07 +02001742 oldpage = marvell_get_set_page(phydev, MII_88E1121_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001743 if (oldpage < 0) {
1744 mutex_unlock(&phydev->lock);
1745 return oldpage;
1746 }
1747
Andrew Lunn0b046802017-01-20 01:37:49 +01001748 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1749 if (ret < 0)
1750 goto error;
1751
1752 temp = temp / 1000;
1753 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1754 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1755 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1756 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1757
1758error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001759 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001760 mutex_unlock(&phydev->lock);
1761
1762 return ret;
1763}
1764
1765int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1766{
Andrew Lunn975b3882017-05-25 21:42:06 +02001767 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001768 int ret;
1769
1770 *alarm = false;
1771
1772 mutex_lock(&phydev->lock);
1773
Andrew Lunn53798322017-05-25 21:42:07 +02001774 oldpage = marvell_get_set_page(phydev, MII_88E1121_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001775 if (oldpage < 0) {
1776 mutex_unlock(&phydev->lock);
1777 return oldpage;
1778 }
1779
Andrew Lunn0b046802017-01-20 01:37:49 +01001780 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1781 if (ret < 0)
1782 goto error;
1783 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1784
1785error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001786 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001787 mutex_unlock(&phydev->lock);
1788
1789 return ret;
1790}
1791
1792static int m88e1510_hwmon_read(struct device *dev,
1793 enum hwmon_sensor_types type,
1794 u32 attr, int channel, long *temp)
1795{
1796 struct phy_device *phydev = dev_get_drvdata(dev);
1797 int err;
1798
1799 switch (attr) {
1800 case hwmon_temp_input:
1801 err = m88e1510_get_temp(phydev, temp);
1802 break;
1803 case hwmon_temp_crit:
1804 err = m88e1510_get_temp_critical(phydev, temp);
1805 break;
1806 case hwmon_temp_max_alarm:
1807 err = m88e1510_get_temp_alarm(phydev, temp);
1808 break;
1809 default:
1810 return -EOPNOTSUPP;
1811 }
1812
1813 return err;
1814}
1815
1816static int m88e1510_hwmon_write(struct device *dev,
1817 enum hwmon_sensor_types type,
1818 u32 attr, int channel, long temp)
1819{
1820 struct phy_device *phydev = dev_get_drvdata(dev);
1821 int err;
1822
1823 switch (attr) {
1824 case hwmon_temp_crit:
1825 err = m88e1510_set_temp_critical(phydev, temp);
1826 break;
1827 default:
1828 return -EOPNOTSUPP;
1829 }
1830 return err;
1831}
1832
1833static umode_t m88e1510_hwmon_is_visible(const void *data,
1834 enum hwmon_sensor_types type,
1835 u32 attr, int channel)
1836{
1837 if (type != hwmon_temp)
1838 return 0;
1839
1840 switch (attr) {
1841 case hwmon_temp_input:
1842 case hwmon_temp_max_alarm:
1843 return 0444;
1844 case hwmon_temp_crit:
1845 return 0644;
1846 default:
1847 return 0;
1848 }
1849}
1850
1851static u32 m88e1510_hwmon_temp_config[] = {
1852 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1853 0
1854};
1855
1856static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1857 .type = hwmon_temp,
1858 .config = m88e1510_hwmon_temp_config,
1859};
1860
1861static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1862 &m88e1121_hwmon_chip,
1863 &m88e1510_hwmon_temp,
1864 NULL
1865};
1866
1867static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1868 .is_visible = m88e1510_hwmon_is_visible,
1869 .read = m88e1510_hwmon_read,
1870 .write = m88e1510_hwmon_write,
1871};
1872
1873static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1874 .ops = &m88e1510_hwmon_hwmon_ops,
1875 .info = m88e1510_hwmon_info,
1876};
1877
1878static int marvell_hwmon_name(struct phy_device *phydev)
1879{
1880 struct marvell_priv *priv = phydev->priv;
1881 struct device *dev = &phydev->mdio.dev;
1882 const char *devname = dev_name(dev);
1883 size_t len = strlen(devname);
1884 int i, j;
1885
1886 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1887 if (!priv->hwmon_name)
1888 return -ENOMEM;
1889
1890 for (i = j = 0; i < len && devname[i]; i++) {
1891 if (isalnum(devname[i]))
1892 priv->hwmon_name[j++] = devname[i];
1893 }
1894
1895 return 0;
1896}
1897
1898static int marvell_hwmon_probe(struct phy_device *phydev,
1899 const struct hwmon_chip_info *chip)
1900{
1901 struct marvell_priv *priv = phydev->priv;
1902 struct device *dev = &phydev->mdio.dev;
1903 int err;
1904
1905 err = marvell_hwmon_name(phydev);
1906 if (err)
1907 return err;
1908
1909 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1910 dev, priv->hwmon_name, phydev, chip, NULL);
1911
1912 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1913}
1914
1915static int m88e1121_hwmon_probe(struct phy_device *phydev)
1916{
1917 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1918}
1919
1920static int m88e1510_hwmon_probe(struct phy_device *phydev)
1921{
1922 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1923}
1924#else
1925static int m88e1121_hwmon_probe(struct phy_device *phydev)
1926{
1927 return 0;
1928}
1929
1930static int m88e1510_hwmon_probe(struct phy_device *phydev)
1931{
1932 return 0;
1933}
1934#endif
1935
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001936static int marvell_probe(struct phy_device *phydev)
1937{
1938 struct marvell_priv *priv;
1939
Andrew Lunne5a03bf2016-01-06 20:11:16 +01001940 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001941 if (!priv)
1942 return -ENOMEM;
1943
1944 phydev->priv = priv;
1945
1946 return 0;
1947}
1948
Andrew Lunn0b046802017-01-20 01:37:49 +01001949static int m88e1121_probe(struct phy_device *phydev)
1950{
1951 int err;
1952
1953 err = marvell_probe(phydev);
1954 if (err)
1955 return err;
1956
1957 return m88e1121_hwmon_probe(phydev);
1958}
1959
1960static int m88e1510_probe(struct phy_device *phydev)
1961{
1962 int err;
1963
1964 err = marvell_probe(phydev);
1965 if (err)
1966 return err;
1967
1968 return m88e1510_hwmon_probe(phydev);
1969}
1970
Olof Johanssone5479232007-07-03 16:23:46 -05001971static struct phy_driver marvell_drivers[] = {
1972 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001973 .phy_id = MARVELL_PHY_ID_88E1101,
1974 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05001975 .name = "Marvell 88E1101",
1976 .features = PHY_GBIT_FEATURES,
1977 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01001978 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01001979 .config_init = &marvell_config_init,
Olof Johanssone5479232007-07-03 16:23:46 -05001980 .config_aneg = &marvell_config_aneg,
1981 .read_status = &genphy_read_status,
1982 .ack_interrupt = &marvell_ack_interrupt,
1983 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001984 .resume = &genphy_resume,
1985 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001986 .get_sset_count = marvell_get_sset_count,
1987 .get_strings = marvell_get_strings,
1988 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05001989 },
1990 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001991 .phy_id = MARVELL_PHY_ID_88E1112,
1992 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05001993 .name = "Marvell 88E1112",
1994 .features = PHY_GBIT_FEATURES,
1995 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001996 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05001997 .config_init = &m88e1111_config_init,
1998 .config_aneg = &marvell_config_aneg,
1999 .read_status = &genphy_read_status,
2000 .ack_interrupt = &marvell_ack_interrupt,
2001 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002002 .resume = &genphy_resume,
2003 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002004 .get_sset_count = marvell_get_sset_count,
2005 .get_strings = marvell_get_strings,
2006 .get_stats = marvell_get_stats,
Olof Johansson85cfb532007-07-03 16:24:32 -05002007 },
2008 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002009 .phy_id = MARVELL_PHY_ID_88E1111,
2010 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002011 .name = "Marvell 88E1111",
2012 .features = PHY_GBIT_FEATURES,
2013 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002014 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002015 .config_init = &m88e1111_config_init,
Harini Katakam3ec0a0f2016-06-27 13:09:59 +05302016 .config_aneg = &m88e1111_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002017 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002018 .ack_interrupt = &marvell_ack_interrupt,
2019 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002020 .resume = &genphy_resume,
2021 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002022 .get_sset_count = marvell_get_sset_count,
2023 .get_strings = marvell_get_strings,
2024 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002025 },
2026 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002027 .phy_id = MARVELL_PHY_ID_88E1118,
2028 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002029 .name = "Marvell 88E1118",
2030 .features = PHY_GBIT_FEATURES,
2031 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002032 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002033 .config_init = &m88e1118_config_init,
2034 .config_aneg = &m88e1118_config_aneg,
2035 .read_status = &genphy_read_status,
2036 .ack_interrupt = &marvell_ack_interrupt,
2037 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002038 .resume = &genphy_resume,
2039 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002040 .get_sset_count = marvell_get_sset_count,
2041 .get_strings = marvell_get_strings,
2042 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002043 },
2044 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002045 .phy_id = MARVELL_PHY_ID_88E1121R,
2046 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002047 .name = "Marvell 88E1121R",
2048 .features = PHY_GBIT_FEATURES,
2049 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002050 .probe = &m88e1121_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002051 .config_init = &m88e1121_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002052 .config_aneg = &m88e1121_config_aneg,
2053 .read_status = &marvell_read_status,
2054 .ack_interrupt = &marvell_ack_interrupt,
2055 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002056 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002057 .resume = &genphy_resume,
2058 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002059 .get_sset_count = marvell_get_sset_count,
2060 .get_strings = marvell_get_strings,
2061 .get_stats = marvell_get_stats,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002062 },
2063 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002064 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002065 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002066 .name = "Marvell 88E1318S",
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002067 .features = PHY_GBIT_FEATURES,
2068 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002069 .probe = marvell_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002070 .config_init = &m88e1121_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002071 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002072 .read_status = &marvell_read_status,
2073 .ack_interrupt = &marvell_ack_interrupt,
2074 .config_intr = &marvell_config_intr,
2075 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002076 .get_wol = &m88e1318_get_wol,
2077 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002078 .resume = &genphy_resume,
2079 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002080 .get_sset_count = marvell_get_sset_count,
2081 .get_strings = marvell_get_strings,
2082 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002083 },
2084 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002085 .phy_id = MARVELL_PHY_ID_88E1145,
2086 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002087 .name = "Marvell 88E1145",
2088 .features = PHY_GBIT_FEATURES,
2089 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002090 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002091 .config_init = &m88e1145_config_init,
2092 .config_aneg = &marvell_config_aneg,
2093 .read_status = &genphy_read_status,
2094 .ack_interrupt = &marvell_ack_interrupt,
2095 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002096 .resume = &genphy_resume,
2097 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002098 .get_sset_count = marvell_get_sset_count,
2099 .get_strings = marvell_get_strings,
2100 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002101 },
2102 {
David Daney90600732010-11-19 11:58:53 +00002103 .phy_id = MARVELL_PHY_ID_88E1149R,
2104 .phy_id_mask = MARVELL_PHY_ID_MASK,
2105 .name = "Marvell 88E1149R",
2106 .features = PHY_GBIT_FEATURES,
2107 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002108 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002109 .config_init = &m88e1149_config_init,
2110 .config_aneg = &m88e1118_config_aneg,
2111 .read_status = &genphy_read_status,
2112 .ack_interrupt = &marvell_ack_interrupt,
2113 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002114 .resume = &genphy_resume,
2115 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002116 .get_sset_count = marvell_get_sset_count,
2117 .get_strings = marvell_get_strings,
2118 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002119 },
2120 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002121 .phy_id = MARVELL_PHY_ID_88E1240,
2122 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002123 .name = "Marvell 88E1240",
2124 .features = PHY_GBIT_FEATURES,
2125 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002126 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002127 .config_init = &m88e1111_config_init,
2128 .config_aneg = &marvell_config_aneg,
2129 .read_status = &genphy_read_status,
2130 .ack_interrupt = &marvell_ack_interrupt,
2131 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002132 .resume = &genphy_resume,
2133 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002134 .get_sset_count = marvell_get_sset_count,
2135 .get_strings = marvell_get_strings,
2136 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002137 },
Michal Simek3da09a52013-05-30 20:08:26 +00002138 {
2139 .phy_id = MARVELL_PHY_ID_88E1116R,
2140 .phy_id_mask = MARVELL_PHY_ID_MASK,
2141 .name = "Marvell 88E1116R",
2142 .features = PHY_GBIT_FEATURES,
2143 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002144 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002145 .config_init = &m88e1116r_config_init,
2146 .config_aneg = &genphy_config_aneg,
2147 .read_status = &genphy_read_status,
2148 .ack_interrupt = &marvell_ack_interrupt,
2149 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002150 .resume = &genphy_resume,
2151 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002152 .get_sset_count = marvell_get_sset_count,
2153 .get_strings = marvell_get_strings,
2154 .get_stats = marvell_get_stats,
Michal Simek3da09a52013-05-30 20:08:26 +00002155 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002156 {
2157 .phy_id = MARVELL_PHY_ID_88E1510,
2158 .phy_id_mask = MARVELL_PHY_ID_MASK,
2159 .name = "Marvell 88E1510",
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02002160 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
Arnd Bergmann18702412017-01-23 13:18:41 +01002161 .flags = PHY_HAS_INTERRUPT,
Andrew Lunn0b046802017-01-20 01:37:49 +01002162 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002163 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002164 .config_aneg = &m88e1510_config_aneg,
2165 .read_status = &marvell_read_status,
2166 .ack_interrupt = &marvell_ack_interrupt,
2167 .config_intr = &marvell_config_intr,
2168 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002169 .get_wol = &m88e1318_get_wol,
2170 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002171 .resume = &marvell_resume,
2172 .suspend = &marvell_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002173 .get_sset_count = marvell_get_sset_count,
2174 .get_strings = marvell_get_strings,
2175 .get_stats = marvell_get_stats,
Michal Simek10e24caa2013-05-30 20:08:27 +00002176 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002177 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002178 .phy_id = MARVELL_PHY_ID_88E1540,
2179 .phy_id_mask = MARVELL_PHY_ID_MASK,
2180 .name = "Marvell 88E1540",
2181 .features = PHY_GBIT_FEATURES,
2182 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002183 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002184 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002185 .config_aneg = &m88e1510_config_aneg,
2186 .read_status = &marvell_read_status,
2187 .ack_interrupt = &marvell_ack_interrupt,
2188 .config_intr = &marvell_config_intr,
2189 .did_interrupt = &m88e1121_did_interrupt,
2190 .resume = &genphy_resume,
2191 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002192 .get_sset_count = marvell_get_sset_count,
2193 .get_strings = marvell_get_strings,
2194 .get_stats = marvell_get_stats,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002195 },
2196 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002197 .phy_id = MARVELL_PHY_ID_88E1545,
2198 .phy_id_mask = MARVELL_PHY_ID_MASK,
2199 .name = "Marvell 88E1545",
2200 .probe = m88e1510_probe,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002201 .features = PHY_GBIT_FEATURES,
2202 .flags = PHY_HAS_INTERRUPT,
2203 .config_init = &marvell_config_init,
2204 .config_aneg = &m88e1510_config_aneg,
2205 .read_status = &marvell_read_status,
2206 .ack_interrupt = &marvell_ack_interrupt,
2207 .config_intr = &marvell_config_intr,
2208 .did_interrupt = &m88e1121_did_interrupt,
2209 .resume = &genphy_resume,
2210 .suspend = &genphy_suspend,
2211 .get_sset_count = marvell_get_sset_count,
2212 .get_strings = marvell_get_strings,
2213 .get_stats = marvell_get_stats,
2214 },
2215 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002216 .phy_id = MARVELL_PHY_ID_88E3016,
2217 .phy_id_mask = MARVELL_PHY_ID_MASK,
2218 .name = "Marvell 88E3016",
2219 .features = PHY_BASIC_FEATURES,
2220 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002221 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002222 .config_aneg = &genphy_config_aneg,
2223 .config_init = &m88e3016_config_init,
2224 .aneg_done = &marvell_aneg_done,
2225 .read_status = &marvell_read_status,
2226 .ack_interrupt = &marvell_ack_interrupt,
2227 .config_intr = &marvell_config_intr,
2228 .did_interrupt = &m88e1121_did_interrupt,
2229 .resume = &genphy_resume,
2230 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002231 .get_sset_count = marvell_get_sset_count,
2232 .get_strings = marvell_get_strings,
2233 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002234 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002235 {
2236 .phy_id = MARVELL_PHY_ID_88E6390,
2237 .phy_id_mask = MARVELL_PHY_ID_MASK,
2238 .name = "Marvell 88E6390",
2239 .features = PHY_GBIT_FEATURES,
2240 .flags = PHY_HAS_INTERRUPT,
2241 .probe = m88e1510_probe,
2242 .config_init = &marvell_config_init,
2243 .config_aneg = &m88e1510_config_aneg,
2244 .read_status = &marvell_read_status,
2245 .ack_interrupt = &marvell_ack_interrupt,
2246 .config_intr = &marvell_config_intr,
2247 .did_interrupt = &m88e1121_did_interrupt,
2248 .resume = &genphy_resume,
2249 .suspend = &genphy_suspend,
2250 .get_sset_count = marvell_get_sset_count,
2251 .get_strings = marvell_get_strings,
2252 .get_stats = marvell_get_stats,
2253 },
Andy Fleming00db8182005-07-30 19:31:23 -04002254};
2255
Johan Hovold50fd7152014-11-11 19:45:59 +01002256module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002257
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002258static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002259 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2260 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2261 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2262 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2263 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2264 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2265 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2266 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2267 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002268 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002269 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002270 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002271 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002272 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002273 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002274 { }
2275};
2276
2277MODULE_DEVICE_TABLE(mdio, marvell_tbl);