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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Stanley Chu49615ba2019-09-16 23:56:50 +080091/* default delay of autosuspend: 2000 ms */
92#define RPM_AUTOSUSPEND_DELAY_MS 2000
93
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030094#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
95 ({ \
96 int _ret; \
97 if (_on) \
98 _ret = ufshcd_enable_vreg(_dev, _vreg); \
99 else \
100 _ret = ufshcd_disable_vreg(_dev, _vreg); \
101 _ret; \
102 })
103
Tomas Winklerba809172018-06-14 11:14:09 +0300104#define ufshcd_hex_dump(prefix_str, buf, len) do { \
105 size_t __len = (len); \
106 print_hex_dump(KERN_ERR, prefix_str, \
107 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
108 16, 4, buf, __len, false); \
109} while (0)
110
111int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
112 const char *prefix)
113{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100114 u32 *regs;
115 size_t pos;
116
117 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
118 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300119
Can Guocddaeba2019-11-14 22:09:27 -0800120 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300121 if (!regs)
122 return -ENOMEM;
123
Marc Gonzalezd6724752019-01-22 18:29:22 +0100124 for (pos = 0; pos < len; pos += 4)
125 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
126
Tomas Winklerba809172018-06-14 11:14:09 +0300127 ufshcd_hex_dump(prefix, regs, len);
128 kfree(regs);
129
130 return 0;
131}
132EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800133
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530134enum {
135 UFSHCD_MAX_CHANNEL = 0,
136 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530137 UFSHCD_CMD_PER_LUN = 32,
138 UFSHCD_CAN_QUEUE = 32,
139};
140
141/* UFSHCD states */
142enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_STATE_RESET,
144 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530145 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800146 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530147};
148
149/* UFSHCD error handling flags */
150enum {
151 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530152};
153
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530154/* UFSHCD UIC layer error flags */
155enum {
156 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200157 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
158 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
159 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
160 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
161 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530162};
163
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530164#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300165 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530166#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300167 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530168#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300169 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300171#define ufshcd_set_ufs_dev_active(h) \
172 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
173#define ufshcd_set_ufs_dev_sleep(h) \
174 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
175#define ufshcd_set_ufs_dev_poweroff(h) \
176 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
177#define ufshcd_is_ufs_dev_active(h) \
178 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
179#define ufshcd_is_ufs_dev_sleep(h) \
180 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
181#define ufshcd_is_ufs_dev_poweroff(h) \
182 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
183
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200184struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300185 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
188 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
189 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
190 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
191};
192
193static inline enum ufs_dev_pwr_mode
194ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
195{
196 return ufs_pm_lvl_states[lvl].dev_state;
197}
198
199static inline enum uic_link_state
200ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
201{
202 return ufs_pm_lvl_states[lvl].link_state;
203}
204
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800205static inline enum ufs_pm_level
206ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
207 enum uic_link_state link_state)
208{
209 enum ufs_pm_level lvl;
210
211 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
212 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
213 (ufs_pm_lvl_states[lvl].link_state == link_state))
214 return lvl;
215 }
216
217 /* if no match found, return the level 0 */
218 return UFS_PM_LVL_0;
219}
220
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221static struct ufs_dev_fix ufs_fixups[] = {
222 /* UFS cards deviations table */
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800225 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
227 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
230 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
231 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
232 UFS_DEVICE_QUIRK_PA_TACTIVATE),
233 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
234 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800235 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
236 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800237 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
238 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800239
240 END_FIX
241};
242
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800243static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530244static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530245static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800246static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530247static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300248static void ufshcd_hba_exit(struct ufs_hba *hba);
249static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300250static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
251 bool skip_ref_clk);
252static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
253static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
254static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300255static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300256static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800257static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
258static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800259static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800260static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300261static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300262static int ufshcd_change_power_mode(struct ufs_hba *hba,
263 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200264static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
265{
266 return tag >= 0 && tag < hba->nutrs;
267}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300268
Can Guo5231d382019-12-05 02:14:46 +0000269static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300270{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300271 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000272 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300273 hba->is_irq_enabled = true;
274 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300275}
276
277static inline void ufshcd_disable_irq(struct ufs_hba *hba)
278{
279 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000280 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300281 hba->is_irq_enabled = false;
282 }
283}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530284
Subhash Jadavani38135532018-05-03 16:37:18 +0530285static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
286{
287 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
288 scsi_unblock_requests(hba->host);
289}
290
291static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
292{
293 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
294 scsi_block_requests(hba->host);
295}
296
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300297static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
298 const char *str)
299{
300 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
301
302 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
303}
304
305static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
306 const char *str)
307{
308 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
309
310 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
311}
312
313static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
314 const char *str)
315{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300316 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300317 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300318
Christoph Hellwig391e3882018-10-07 17:30:32 +0300319 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
320 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300321}
322
Lee Susman1a07f2d2016-12-22 18:42:03 -0800323static void ufshcd_add_command_trace(struct ufs_hba *hba,
324 unsigned int tag, const char *str)
325{
326 sector_t lba = -1;
327 u8 opcode = 0;
328 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300329 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800330 struct scsi_cmnd *cmd = lrbp->cmd;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800331 int transfer_len = -1;
332
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300333 if (!trace_ufshcd_command_enabled()) {
334 /* trace UPIU W/O tracing command */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800335 if (cmd)
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300336 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800337 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300338 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800339
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800340 if (cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300341 /* trace UPIU also */
342 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800343 opcode = cmd->cmnd[0];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800344 if ((opcode == READ_10) || (opcode == WRITE_10)) {
345 /*
346 * Currently we only fully trace read(10) and write(10)
347 * commands
348 */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800349 if (cmd->request && cmd->request->bio)
350 lba = cmd->request->bio->bi_iter.bi_sector;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800351 transfer_len = be32_to_cpu(
352 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
353 }
354 }
355
356 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
357 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
358 trace_ufshcd_command(dev_name(hba->dev), str, tag,
359 doorbell, transfer_len, intr, lba, opcode);
360}
361
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800362static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
363{
364 struct ufs_clk_info *clki;
365 struct list_head *head = &hba->clk_list_head;
366
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300367 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800368 return;
369
370 list_for_each_entry(clki, head, list) {
371 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
372 clki->max_freq)
373 dev_err(hba->dev, "clk: %s, rate: %u\n",
374 clki->name, clki->curr_freq);
375 }
376}
377
Stanley Chu48d5b972019-07-10 21:38:18 +0800378static void ufshcd_print_err_hist(struct ufs_hba *hba,
379 struct ufs_err_reg_hist *err_hist,
380 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800381{
382 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800383 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800384
Stanley Chu48d5b972019-07-10 21:38:18 +0800385 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
386 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800387
Stanley Chu645728a2020-01-04 22:26:06 +0800388 if (err_hist->tstamp[p] == 0)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800389 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800390 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800391 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800392 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800393 }
Stanley Chu27752642019-01-28 22:04:26 +0800394
395 if (!found)
Stanley Chufd1fb4d2020-01-04 22:26:08 +0800396 dev_err(hba->dev, "No record of %s\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800397}
398
Dolev Raviv66cc8202016-12-22 18:39:42 -0800399static void ufshcd_print_host_regs(struct ufs_hba *hba)
400{
Tomas Winklerba809172018-06-14 11:14:09 +0300401 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800402 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
403 hba->ufs_version, hba->capabilities);
404 dev_err(hba->dev,
405 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
406 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800407 dev_err(hba->dev,
408 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
409 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
410 hba->ufs_stats.hibern8_exit_cnt);
411
Stanley Chu48d5b972019-07-10 21:38:18 +0800412 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
413 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
414 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
415 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
416 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800417 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
418 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800419 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
420 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
421 "link_startup_fail");
422 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
423 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
424 "suspend_fail");
425 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
426 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
427 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800428
429 ufshcd_print_clk_freqs(hba);
430
Stanley Chu7c486d912019-12-24 21:01:06 +0800431 ufshcd_vops_dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800432}
433
434static
435void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
436{
437 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800438 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800439 int tag;
440
441 for_each_set_bit(tag, &bitmap, hba->nutrs) {
442 lrbp = &hba->lrb[tag];
443
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800444 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
445 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800446 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
447 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800448 dev_err(hba->dev,
449 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
450 tag, (u64)lrbp->utrd_dma_addr);
451
Dolev Raviv66cc8202016-12-22 18:39:42 -0800452 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
453 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800454 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
455 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800456 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
457 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800458 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
459 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800460 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
461 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800462
Gilad Broner7fabb772017-02-03 16:56:50 -0800463 prdt_length = le16_to_cpu(
464 lrbp->utr_descriptor_ptr->prd_table_length);
465 dev_err(hba->dev,
466 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
467 tag, prdt_length,
468 (u64)lrbp->ucd_prdt_dma_addr);
469
470 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800471 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800472 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800473 }
474}
475
476static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
477{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800478 int tag;
479
480 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300481 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
482
Dolev Raviv66cc8202016-12-22 18:39:42 -0800483 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300484 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800485 }
486}
487
Gilad Broner6ba65582017-02-03 16:57:28 -0800488static void ufshcd_print_host_state(struct ufs_hba *hba)
489{
490 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800491 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
492 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800493 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
494 hba->saved_err, hba->saved_uic_err);
495 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
496 hba->curr_dev_pwr_mode, hba->uic_link_state);
497 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
498 hba->pm_op_in_progress, hba->is_sys_suspended);
499 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
500 hba->auto_bkops_enabled, hba->host->host_self_blocked);
501 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
502 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
503 hba->eh_flags, hba->req_abort_count);
504 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
505 hba->capabilities, hba->caps);
506 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
507 hba->dev_quirks);
508}
509
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800510/**
511 * ufshcd_print_pwr_info - print power params as saved in hba
512 * power info
513 * @hba: per-adapter instance
514 */
515static void ufshcd_print_pwr_info(struct ufs_hba *hba)
516{
517 static const char * const names[] = {
518 "INVALID MODE",
519 "FAST MODE",
520 "SLOW_MODE",
521 "INVALID MODE",
522 "FASTAUTO_MODE",
523 "SLOWAUTO_MODE",
524 "INVALID MODE",
525 };
526
527 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
528 __func__,
529 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
530 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
531 names[hba->pwr_info.pwr_rx],
532 names[hba->pwr_info.pwr_tx],
533 hba->pwr_info.hs_rate);
534}
535
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530536/*
537 * ufshcd_wait_for_register - wait for register value to change
538 * @hba - per-adapter interface
539 * @reg - mmio register offset
540 * @mask - mask to apply to read register value
541 * @val - wait condition
542 * @interval_us - polling interval in microsecs
543 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200544 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530545 *
546 * Returns -ETIMEDOUT on error, zero on success
547 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200548int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
549 u32 val, unsigned long interval_us,
550 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530551{
552 int err = 0;
553 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
554
555 /* ignore bits that we don't intend to wait on */
556 val = val & mask;
557
558 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200559 if (can_sleep)
560 usleep_range(interval_us, interval_us + 50);
561 else
562 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530563 if (time_after(jiffies, timeout)) {
564 if ((ufshcd_readl(hba, reg) & mask) != val)
565 err = -ETIMEDOUT;
566 break;
567 }
568 }
569
570 return err;
571}
572
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530573/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530574 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800575 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530576 *
577 * Returns interrupt bit mask per version
578 */
579static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
580{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800581 u32 intr_mask = 0;
582
583 switch (hba->ufs_version) {
584 case UFSHCI_VERSION_10:
585 intr_mask = INTERRUPT_MASK_ALL_VER_10;
586 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800587 case UFSHCI_VERSION_11:
588 case UFSHCI_VERSION_20:
589 intr_mask = INTERRUPT_MASK_ALL_VER_11;
590 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800591 case UFSHCI_VERSION_21:
592 default:
593 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200594 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800595 }
596
597 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530598}
599
600/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530601 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800602 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530603 *
604 * Returns UFSHCI version supported by the controller
605 */
606static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
607{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200608 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
609 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300610
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530611 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530612}
613
614/**
615 * ufshcd_is_device_present - Check if any device connected to
616 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300617 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530618 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300619 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530620 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300621static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530622{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300623 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300624 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530625}
626
627/**
628 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800629 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530630 *
631 * This function is used to get the OCS field from UTRD
632 * Returns the OCS field in the UTRD
633 */
634static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
635{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530636 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530637}
638
639/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530640 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
641 * @hba: per adapter instance
642 * @pos: position of the bit to be cleared
643 */
644static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
645{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530646 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
647 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
648 else
649 ufshcd_writel(hba, ~(1 << pos),
650 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
651}
652
653/**
654 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
655 * @hba: per adapter instance
656 * @pos: position of the bit to be cleared
657 */
658static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
659{
660 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
661 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
662 else
663 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530664}
665
666/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200667 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
668 * @hba: per adapter instance
669 * @tag: position of the bit to be cleared
670 */
671static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
672{
673 __clear_bit(tag, &hba->outstanding_reqs);
674}
675
676/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530677 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
678 * @reg: Register value of host controller status
679 *
680 * Returns integer, 0 on Success and positive value if failed
681 */
682static inline int ufshcd_get_lists_status(u32 reg)
683{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300684 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530685}
686
687/**
688 * ufshcd_get_uic_cmd_result - Get the UIC command result
689 * @hba: Pointer to adapter instance
690 *
691 * This function gets the result of UIC command completion
692 * Returns 0 on success, non zero value on error
693 */
694static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
695{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530696 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530697 MASK_UIC_COMMAND_RESULT;
698}
699
700/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530701 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
702 * @hba: Pointer to adapter instance
703 *
704 * This function gets UIC command argument3
705 * Returns 0 on success, non zero value on error
706 */
707static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
708{
709 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
710}
711
712/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530713 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530714 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530715 */
716static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530717ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530718{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530719 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530720}
721
722/**
723 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
724 * @ucd_rsp_ptr: pointer to response UPIU
725 *
726 * This function gets the response status and scsi_status from response UPIU
727 * Returns the response result code.
728 */
729static inline int
730ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
731{
732 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
733}
734
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530735/*
736 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
737 * from response UPIU
738 * @ucd_rsp_ptr: pointer to response UPIU
739 *
740 * Return the data segment length.
741 */
742static inline unsigned int
743ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
744{
745 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
746 MASK_RSP_UPIU_DATA_SEG_LEN;
747}
748
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530749/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530750 * ufshcd_is_exception_event - Check if the device raised an exception event
751 * @ucd_rsp_ptr: pointer to response UPIU
752 *
753 * The function checks if the device raised an exception event indicated in
754 * the Device Information field of response UPIU.
755 *
756 * Returns true if exception is raised, false otherwise.
757 */
758static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
759{
760 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
761 MASK_RSP_EXCEPTION_EVENT ? true : false;
762}
763
764/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530765 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530766 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530767 */
768static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530769ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530770{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530771 ufshcd_writel(hba, INT_AGGR_ENABLE |
772 INT_AGGR_COUNTER_AND_TIMER_RESET,
773 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
774}
775
776/**
777 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
778 * @hba: per adapter instance
779 * @cnt: Interrupt aggregation counter threshold
780 * @tmout: Interrupt aggregation timeout value
781 */
782static inline void
783ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
784{
785 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
786 INT_AGGR_COUNTER_THLD_VAL(cnt) |
787 INT_AGGR_TIMEOUT_VAL(tmout),
788 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530789}
790
791/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300792 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
793 * @hba: per adapter instance
794 */
795static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
796{
797 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
798}
799
800/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530801 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
802 * When run-stop registers are set to 1, it indicates the
803 * host controller that it can process the requests
804 * @hba: per adapter instance
805 */
806static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
807{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530808 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
809 REG_UTP_TASK_REQ_LIST_RUN_STOP);
810 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
811 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530812}
813
814/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530815 * ufshcd_hba_start - Start controller initialization sequence
816 * @hba: per adapter instance
817 */
818static inline void ufshcd_hba_start(struct ufs_hba *hba)
819{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530820 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530821}
822
823/**
824 * ufshcd_is_hba_active - Get controller state
825 * @hba: per adapter instance
826 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300827 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530828 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300829static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530830{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300831 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
832 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530833}
834
Yaniv Gardi37113102016-03-10 17:37:16 +0200835u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
836{
837 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
838 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
839 (hba->ufs_version == UFSHCI_VERSION_11))
840 return UFS_UNIPRO_VER_1_41;
841 else
842 return UFS_UNIPRO_VER_1_6;
843}
844EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
845
846static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
847{
848 /*
849 * If both host and device support UniPro ver1.6 or later, PA layer
850 * parameters tuning happens during link startup itself.
851 *
852 * We can manually tune PA layer parameters if either host or device
853 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
854 * logic simple, we will only do manual tuning if local unipro version
855 * doesn't support ver1.6 or later.
856 */
857 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
858 return true;
859 else
860 return false;
861}
862
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800863static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
864{
865 int ret = 0;
866 struct ufs_clk_info *clki;
867 struct list_head *head = &hba->clk_list_head;
868 ktime_t start = ktime_get();
869 bool clk_state_changed = false;
870
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300871 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800872 goto out;
873
874 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
875 if (ret)
876 return ret;
877
878 list_for_each_entry(clki, head, list) {
879 if (!IS_ERR_OR_NULL(clki->clk)) {
880 if (scale_up && clki->max_freq) {
881 if (clki->curr_freq == clki->max_freq)
882 continue;
883
884 clk_state_changed = true;
885 ret = clk_set_rate(clki->clk, clki->max_freq);
886 if (ret) {
887 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
888 __func__, clki->name,
889 clki->max_freq, ret);
890 break;
891 }
892 trace_ufshcd_clk_scaling(dev_name(hba->dev),
893 "scaled up", clki->name,
894 clki->curr_freq,
895 clki->max_freq);
896
897 clki->curr_freq = clki->max_freq;
898
899 } else if (!scale_up && clki->min_freq) {
900 if (clki->curr_freq == clki->min_freq)
901 continue;
902
903 clk_state_changed = true;
904 ret = clk_set_rate(clki->clk, clki->min_freq);
905 if (ret) {
906 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
907 __func__, clki->name,
908 clki->min_freq, ret);
909 break;
910 }
911 trace_ufshcd_clk_scaling(dev_name(hba->dev),
912 "scaled down", clki->name,
913 clki->curr_freq,
914 clki->min_freq);
915 clki->curr_freq = clki->min_freq;
916 }
917 }
918 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
919 clki->name, clk_get_rate(clki->clk));
920 }
921
922 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
923
924out:
925 if (clk_state_changed)
926 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
927 (scale_up ? "up" : "down"),
928 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
929 return ret;
930}
931
932/**
933 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
934 * @hba: per adapter instance
935 * @scale_up: True if scaling up and false if scaling down
936 *
937 * Returns true if scaling is required, false otherwise.
938 */
939static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
940 bool scale_up)
941{
942 struct ufs_clk_info *clki;
943 struct list_head *head = &hba->clk_list_head;
944
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300945 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800946 return false;
947
948 list_for_each_entry(clki, head, list) {
949 if (!IS_ERR_OR_NULL(clki->clk)) {
950 if (scale_up && clki->max_freq) {
951 if (clki->curr_freq == clki->max_freq)
952 continue;
953 return true;
954 } else if (!scale_up && clki->min_freq) {
955 if (clki->curr_freq == clki->min_freq)
956 continue;
957 return true;
958 }
959 }
960 }
961
962 return false;
963}
964
965static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
966 u64 wait_timeout_us)
967{
968 unsigned long flags;
969 int ret = 0;
970 u32 tm_doorbell;
971 u32 tr_doorbell;
972 bool timeout = false, do_last_check = false;
973 ktime_t start;
974
975 ufshcd_hold(hba, false);
976 spin_lock_irqsave(hba->host->host_lock, flags);
977 /*
978 * Wait for all the outstanding tasks/transfer requests.
979 * Verify by checking the doorbell registers are clear.
980 */
981 start = ktime_get();
982 do {
983 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
984 ret = -EBUSY;
985 goto out;
986 }
987
988 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
989 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
990 if (!tm_doorbell && !tr_doorbell) {
991 timeout = false;
992 break;
993 } else if (do_last_check) {
994 break;
995 }
996
997 spin_unlock_irqrestore(hba->host->host_lock, flags);
998 schedule();
999 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1000 wait_timeout_us) {
1001 timeout = true;
1002 /*
1003 * We might have scheduled out for long time so make
1004 * sure to check if doorbells are cleared by this time
1005 * or not.
1006 */
1007 do_last_check = true;
1008 }
1009 spin_lock_irqsave(hba->host->host_lock, flags);
1010 } while (tm_doorbell || tr_doorbell);
1011
1012 if (timeout) {
1013 dev_err(hba->dev,
1014 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1015 __func__, tm_doorbell, tr_doorbell);
1016 ret = -EBUSY;
1017 }
1018out:
1019 spin_unlock_irqrestore(hba->host->host_lock, flags);
1020 ufshcd_release(hba);
1021 return ret;
1022}
1023
1024/**
1025 * ufshcd_scale_gear - scale up/down UFS gear
1026 * @hba: per adapter instance
1027 * @scale_up: True for scaling up gear and false for scaling down
1028 *
1029 * Returns 0 for success,
1030 * Returns -EBUSY if scaling can't happen at this time
1031 * Returns non-zero for any other errors
1032 */
1033static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1034{
1035 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1036 int ret = 0;
1037 struct ufs_pa_layer_attr new_pwr_info;
1038
1039 if (scale_up) {
1040 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1041 sizeof(struct ufs_pa_layer_attr));
1042 } else {
1043 memcpy(&new_pwr_info, &hba->pwr_info,
1044 sizeof(struct ufs_pa_layer_attr));
1045
1046 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1047 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1048 /* save the current power mode */
1049 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1050 &hba->pwr_info,
1051 sizeof(struct ufs_pa_layer_attr));
1052
1053 /* scale down gear */
1054 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1055 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1056 }
1057 }
1058
1059 /* check if the power mode needs to be changed or not? */
1060 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1061
1062 if (ret)
1063 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1064 __func__, ret,
1065 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1066 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1067
1068 return ret;
1069}
1070
1071static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1072{
1073 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1074 int ret = 0;
1075 /*
1076 * make sure that there are no outstanding requests when
1077 * clock scaling is in progress
1078 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301079 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001080 down_write(&hba->clk_scaling_lock);
1081 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1082 ret = -EBUSY;
1083 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301084 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001085 }
1086
1087 return ret;
1088}
1089
1090static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1091{
1092 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301093 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001094}
1095
1096/**
1097 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1098 * @hba: per adapter instance
1099 * @scale_up: True for scaling up and false for scalin down
1100 *
1101 * Returns 0 for success,
1102 * Returns -EBUSY if scaling can't happen at this time
1103 * Returns non-zero for any other errors
1104 */
1105static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1106{
1107 int ret = 0;
1108
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001109 /* let's not get into low power until clock scaling is completed */
1110 ufshcd_hold(hba, false);
1111
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001112 ret = ufshcd_clock_scaling_prepare(hba);
1113 if (ret)
1114 return ret;
1115
1116 /* scale down the gear before scaling down clocks */
1117 if (!scale_up) {
1118 ret = ufshcd_scale_gear(hba, false);
1119 if (ret)
1120 goto out;
1121 }
1122
1123 ret = ufshcd_scale_clks(hba, scale_up);
1124 if (ret) {
1125 if (!scale_up)
1126 ufshcd_scale_gear(hba, true);
1127 goto out;
1128 }
1129
1130 /* scale up the gear after scaling up clocks */
1131 if (scale_up) {
1132 ret = ufshcd_scale_gear(hba, true);
1133 if (ret) {
1134 ufshcd_scale_clks(hba, false);
1135 goto out;
1136 }
1137 }
1138
1139 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1140
1141out:
1142 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001143 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001144 return ret;
1145}
1146
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001147static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1148{
1149 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1150 clk_scaling.suspend_work);
1151 unsigned long irq_flags;
1152
1153 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1154 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1155 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1156 return;
1157 }
1158 hba->clk_scaling.is_suspended = true;
1159 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1160
1161 __ufshcd_suspend_clkscaling(hba);
1162}
1163
1164static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1165{
1166 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1167 clk_scaling.resume_work);
1168 unsigned long irq_flags;
1169
1170 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1171 if (!hba->clk_scaling.is_suspended) {
1172 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1173 return;
1174 }
1175 hba->clk_scaling.is_suspended = false;
1176 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1177
1178 devfreq_resume_device(hba->devfreq);
1179}
1180
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001181static int ufshcd_devfreq_target(struct device *dev,
1182 unsigned long *freq, u32 flags)
1183{
1184 int ret = 0;
1185 struct ufs_hba *hba = dev_get_drvdata(dev);
1186 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001187 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001188 struct list_head *clk_list = &hba->clk_list_head;
1189 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001190 unsigned long irq_flags;
1191
1192 if (!ufshcd_is_clkscaling_supported(hba))
1193 return -EINVAL;
1194
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001195 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1196 if (ufshcd_eh_in_progress(hba)) {
1197 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1198 return 0;
1199 }
1200
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001201 if (!hba->clk_scaling.active_reqs)
1202 sched_clk_scaling_suspend_work = true;
1203
Bjorn Andersson092b4552018-05-17 23:26:37 -07001204 if (list_empty(clk_list)) {
1205 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1206 goto out;
1207 }
1208
1209 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1210 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001211 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1212 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1213 ret = 0;
1214 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001215 }
1216 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1217
1218 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001219 ret = ufshcd_devfreq_scale(hba, scale_up);
1220
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001221 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1222 (scale_up ? "up" : "down"),
1223 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1224
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001225out:
1226 if (sched_clk_scaling_suspend_work)
1227 queue_work(hba->clk_scaling.workq,
1228 &hba->clk_scaling.suspend_work);
1229
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001230 return ret;
1231}
1232
Bart Van Assche7252a362019-12-09 10:13:08 -08001233static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1234{
1235 int *busy = priv;
1236
1237 WARN_ON_ONCE(reserved);
1238 (*busy)++;
1239 return false;
1240}
1241
1242/* Whether or not any tag is in use by a request that is in progress. */
1243static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1244{
1245 struct request_queue *q = hba->cmd_queue;
1246 int busy = 0;
1247
1248 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1249 return busy;
1250}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001251
1252static int ufshcd_devfreq_get_dev_status(struct device *dev,
1253 struct devfreq_dev_status *stat)
1254{
1255 struct ufs_hba *hba = dev_get_drvdata(dev);
1256 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1257 unsigned long flags;
1258
1259 if (!ufshcd_is_clkscaling_supported(hba))
1260 return -EINVAL;
1261
1262 memset(stat, 0, sizeof(*stat));
1263
1264 spin_lock_irqsave(hba->host->host_lock, flags);
1265 if (!scaling->window_start_t)
1266 goto start_window;
1267
1268 if (scaling->is_busy_started)
1269 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1270 scaling->busy_start_t));
1271
1272 stat->total_time = jiffies_to_usecs((long)jiffies -
1273 (long)scaling->window_start_t);
1274 stat->busy_time = scaling->tot_busy_t;
1275start_window:
1276 scaling->window_start_t = jiffies;
1277 scaling->tot_busy_t = 0;
1278
1279 if (hba->outstanding_reqs) {
1280 scaling->busy_start_t = ktime_get();
1281 scaling->is_busy_started = true;
1282 } else {
1283 scaling->busy_start_t = 0;
1284 scaling->is_busy_started = false;
1285 }
1286 spin_unlock_irqrestore(hba->host->host_lock, flags);
1287 return 0;
1288}
1289
1290static struct devfreq_dev_profile ufs_devfreq_profile = {
1291 .polling_ms = 100,
1292 .target = ufshcd_devfreq_target,
1293 .get_dev_status = ufshcd_devfreq_get_dev_status,
1294};
1295
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001296static int ufshcd_devfreq_init(struct ufs_hba *hba)
1297{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001298 struct list_head *clk_list = &hba->clk_list_head;
1299 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001300 struct devfreq *devfreq;
1301 int ret;
1302
Bjorn Andersson092b4552018-05-17 23:26:37 -07001303 /* Skip devfreq if we don't have any clocks in the list */
1304 if (list_empty(clk_list))
1305 return 0;
1306
1307 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1308 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1309 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1310
1311 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001312 &ufs_devfreq_profile,
1313 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1314 NULL);
1315 if (IS_ERR(devfreq)) {
1316 ret = PTR_ERR(devfreq);
1317 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001318
1319 dev_pm_opp_remove(hba->dev, clki->min_freq);
1320 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001321 return ret;
1322 }
1323
1324 hba->devfreq = devfreq;
1325
1326 return 0;
1327}
1328
Bjorn Andersson092b4552018-05-17 23:26:37 -07001329static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1330{
1331 struct list_head *clk_list = &hba->clk_list_head;
1332 struct ufs_clk_info *clki;
1333
1334 if (!hba->devfreq)
1335 return;
1336
1337 devfreq_remove_device(hba->devfreq);
1338 hba->devfreq = NULL;
1339
1340 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1341 dev_pm_opp_remove(hba->dev, clki->min_freq);
1342 dev_pm_opp_remove(hba->dev, clki->max_freq);
1343}
1344
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001345static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1346{
1347 unsigned long flags;
1348
1349 devfreq_suspend_device(hba->devfreq);
1350 spin_lock_irqsave(hba->host->host_lock, flags);
1351 hba->clk_scaling.window_start_t = 0;
1352 spin_unlock_irqrestore(hba->host->host_lock, flags);
1353}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001354
Gilad Bronera5082532016-10-17 17:10:00 -07001355static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1356{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001357 unsigned long flags;
1358 bool suspend = false;
1359
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001360 if (!ufshcd_is_clkscaling_supported(hba))
1361 return;
1362
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001363 spin_lock_irqsave(hba->host->host_lock, flags);
1364 if (!hba->clk_scaling.is_suspended) {
1365 suspend = true;
1366 hba->clk_scaling.is_suspended = true;
1367 }
1368 spin_unlock_irqrestore(hba->host->host_lock, flags);
1369
1370 if (suspend)
1371 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001372}
1373
1374static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1375{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001376 unsigned long flags;
1377 bool resume = false;
1378
1379 if (!ufshcd_is_clkscaling_supported(hba))
1380 return;
1381
1382 spin_lock_irqsave(hba->host->host_lock, flags);
1383 if (hba->clk_scaling.is_suspended) {
1384 resume = true;
1385 hba->clk_scaling.is_suspended = false;
1386 }
1387 spin_unlock_irqrestore(hba->host->host_lock, flags);
1388
1389 if (resume)
1390 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001391}
1392
1393static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1394 struct device_attribute *attr, char *buf)
1395{
1396 struct ufs_hba *hba = dev_get_drvdata(dev);
1397
1398 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1399}
1400
1401static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1402 struct device_attribute *attr, const char *buf, size_t count)
1403{
1404 struct ufs_hba *hba = dev_get_drvdata(dev);
1405 u32 value;
1406 int err;
1407
1408 if (kstrtou32(buf, 0, &value))
1409 return -EINVAL;
1410
1411 value = !!value;
1412 if (value == hba->clk_scaling.is_allowed)
1413 goto out;
1414
1415 pm_runtime_get_sync(hba->dev);
1416 ufshcd_hold(hba, false);
1417
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001418 cancel_work_sync(&hba->clk_scaling.suspend_work);
1419 cancel_work_sync(&hba->clk_scaling.resume_work);
1420
1421 hba->clk_scaling.is_allowed = value;
1422
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001423 if (value) {
1424 ufshcd_resume_clkscaling(hba);
1425 } else {
1426 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001427 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001428 if (err)
1429 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1430 __func__, err);
1431 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001432
1433 ufshcd_release(hba);
1434 pm_runtime_put_sync(hba->dev);
1435out:
1436 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001437}
1438
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001439static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1440{
1441 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1442 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1443 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1444 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1445 hba->clk_scaling.enable_attr.attr.mode = 0644;
1446 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1447 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1448}
1449
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001450static void ufshcd_ungate_work(struct work_struct *work)
1451{
1452 int ret;
1453 unsigned long flags;
1454 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1455 clk_gating.ungate_work);
1456
1457 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1458
1459 spin_lock_irqsave(hba->host->host_lock, flags);
1460 if (hba->clk_gating.state == CLKS_ON) {
1461 spin_unlock_irqrestore(hba->host->host_lock, flags);
1462 goto unblock_reqs;
1463 }
1464
1465 spin_unlock_irqrestore(hba->host->host_lock, flags);
1466 ufshcd_setup_clocks(hba, true);
1467
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001468 ufshcd_enable_irq(hba);
1469
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001470 /* Exit from hibern8 */
1471 if (ufshcd_can_hibern8_during_gating(hba)) {
1472 /* Prevent gating in this path */
1473 hba->clk_gating.is_suspended = true;
1474 if (ufshcd_is_link_hibern8(hba)) {
1475 ret = ufshcd_uic_hibern8_exit(hba);
1476 if (ret)
1477 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1478 __func__, ret);
1479 else
1480 ufshcd_set_link_active(hba);
1481 }
1482 hba->clk_gating.is_suspended = false;
1483 }
1484unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301485 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001486}
1487
1488/**
1489 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1490 * Also, exit from hibern8 mode and set the link as active.
1491 * @hba: per adapter instance
1492 * @async: This indicates whether caller should ungate clocks asynchronously.
1493 */
1494int ufshcd_hold(struct ufs_hba *hba, bool async)
1495{
1496 int rc = 0;
1497 unsigned long flags;
1498
1499 if (!ufshcd_is_clkgating_allowed(hba))
1500 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001501 spin_lock_irqsave(hba->host->host_lock, flags);
1502 hba->clk_gating.active_reqs++;
1503
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001504 if (ufshcd_eh_in_progress(hba)) {
1505 spin_unlock_irqrestore(hba->host->host_lock, flags);
1506 return 0;
1507 }
1508
Sahitya Tummala856b3482014-09-25 15:32:34 +03001509start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001510 switch (hba->clk_gating.state) {
1511 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001512 /*
1513 * Wait for the ungate work to complete if in progress.
1514 * Though the clocks may be in ON state, the link could
1515 * still be in hibner8 state if hibern8 is allowed
1516 * during clock gating.
1517 * Make sure we exit hibern8 state also in addition to
1518 * clocks being ON.
1519 */
1520 if (ufshcd_can_hibern8_during_gating(hba) &&
1521 ufshcd_is_link_hibern8(hba)) {
1522 spin_unlock_irqrestore(hba->host->host_lock, flags);
1523 flush_work(&hba->clk_gating.ungate_work);
1524 spin_lock_irqsave(hba->host->host_lock, flags);
1525 goto start;
1526 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001527 break;
1528 case REQ_CLKS_OFF:
1529 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1530 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001531 trace_ufshcd_clk_gating(dev_name(hba->dev),
1532 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001533 break;
1534 }
1535 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001536 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001537 * currently running. Hence, fall through to cancel gating
1538 * work and to enable clocks.
1539 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001540 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001541 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301542 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001543 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001544 trace_ufshcd_clk_gating(dev_name(hba->dev),
1545 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301546 queue_work(hba->clk_gating.clk_gating_workq,
1547 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001548 /*
1549 * fall through to check if we should wait for this
1550 * work to be done or not.
1551 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001552 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001553 case REQ_CLKS_ON:
1554 if (async) {
1555 rc = -EAGAIN;
1556 hba->clk_gating.active_reqs--;
1557 break;
1558 }
1559
1560 spin_unlock_irqrestore(hba->host->host_lock, flags);
1561 flush_work(&hba->clk_gating.ungate_work);
1562 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001563 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001564 goto start;
1565 default:
1566 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1567 __func__, hba->clk_gating.state);
1568 break;
1569 }
1570 spin_unlock_irqrestore(hba->host->host_lock, flags);
1571out:
1572 return rc;
1573}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001574EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001575
1576static void ufshcd_gate_work(struct work_struct *work)
1577{
1578 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1579 clk_gating.gate_work.work);
1580 unsigned long flags;
1581
1582 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001583 /*
1584 * In case you are here to cancel this work the gating state
1585 * would be marked as REQ_CLKS_ON. In this case save time by
1586 * skipping the gating work and exit after changing the clock
1587 * state to CLKS_ON.
1588 */
1589 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001590 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001591 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001592 trace_ufshcd_clk_gating(dev_name(hba->dev),
1593 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001594 goto rel_lock;
1595 }
1596
1597 if (hba->clk_gating.active_reqs
1598 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001599 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001600 || hba->active_uic_cmd || hba->uic_async_done)
1601 goto rel_lock;
1602
1603 spin_unlock_irqrestore(hba->host->host_lock, flags);
1604
1605 /* put the link into hibern8 mode before turning off clocks */
1606 if (ufshcd_can_hibern8_during_gating(hba)) {
1607 if (ufshcd_uic_hibern8_enter(hba)) {
1608 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001609 trace_ufshcd_clk_gating(dev_name(hba->dev),
1610 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001611 goto out;
1612 }
1613 ufshcd_set_link_hibern8(hba);
1614 }
1615
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001616 ufshcd_disable_irq(hba);
1617
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001618 if (!ufshcd_is_link_active(hba))
1619 ufshcd_setup_clocks(hba, false);
1620 else
1621 /* If link is active, device ref_clk can't be switched off */
1622 __ufshcd_setup_clocks(hba, false, true);
1623
1624 /*
1625 * In case you are here to cancel this work the gating state
1626 * would be marked as REQ_CLKS_ON. In this case keep the state
1627 * as REQ_CLKS_ON which would anyway imply that clocks are off
1628 * and a request to turn them on is pending. By doing this way,
1629 * we keep the state machine in tact and this would ultimately
1630 * prevent from doing cancel work multiple times when there are
1631 * new requests arriving before the current cancel work is done.
1632 */
1633 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001634 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001635 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001636 trace_ufshcd_clk_gating(dev_name(hba->dev),
1637 hba->clk_gating.state);
1638 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001639rel_lock:
1640 spin_unlock_irqrestore(hba->host->host_lock, flags);
1641out:
1642 return;
1643}
1644
1645/* host lock must be held before calling this variant */
1646static void __ufshcd_release(struct ufs_hba *hba)
1647{
1648 if (!ufshcd_is_clkgating_allowed(hba))
1649 return;
1650
1651 hba->clk_gating.active_reqs--;
1652
1653 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1654 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001655 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001656 || hba->active_uic_cmd || hba->uic_async_done
1657 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001658 return;
1659
1660 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001661 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001662 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1663 &hba->clk_gating.gate_work,
1664 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001665}
1666
1667void ufshcd_release(struct ufs_hba *hba)
1668{
1669 unsigned long flags;
1670
1671 spin_lock_irqsave(hba->host->host_lock, flags);
1672 __ufshcd_release(hba);
1673 spin_unlock_irqrestore(hba->host->host_lock, flags);
1674}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001675EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001676
1677static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1678 struct device_attribute *attr, char *buf)
1679{
1680 struct ufs_hba *hba = dev_get_drvdata(dev);
1681
1682 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1683}
1684
1685static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1686 struct device_attribute *attr, const char *buf, size_t count)
1687{
1688 struct ufs_hba *hba = dev_get_drvdata(dev);
1689 unsigned long flags, value;
1690
1691 if (kstrtoul(buf, 0, &value))
1692 return -EINVAL;
1693
1694 spin_lock_irqsave(hba->host->host_lock, flags);
1695 hba->clk_gating.delay_ms = value;
1696 spin_unlock_irqrestore(hba->host->host_lock, flags);
1697 return count;
1698}
1699
Sahitya Tummalab4274112016-12-22 18:40:39 -08001700static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1701 struct device_attribute *attr, char *buf)
1702{
1703 struct ufs_hba *hba = dev_get_drvdata(dev);
1704
1705 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1706}
1707
1708static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1709 struct device_attribute *attr, const char *buf, size_t count)
1710{
1711 struct ufs_hba *hba = dev_get_drvdata(dev);
1712 unsigned long flags;
1713 u32 value;
1714
1715 if (kstrtou32(buf, 0, &value))
1716 return -EINVAL;
1717
1718 value = !!value;
1719 if (value == hba->clk_gating.is_enabled)
1720 goto out;
1721
1722 if (value) {
1723 ufshcd_release(hba);
1724 } else {
1725 spin_lock_irqsave(hba->host->host_lock, flags);
1726 hba->clk_gating.active_reqs++;
1727 spin_unlock_irqrestore(hba->host->host_lock, flags);
1728 }
1729
1730 hba->clk_gating.is_enabled = value;
1731out:
1732 return count;
1733}
1734
Vivek Gautameebcc192018-08-07 23:17:39 +05301735static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1736{
1737 char wq_name[sizeof("ufs_clkscaling_00")];
1738
1739 if (!ufshcd_is_clkscaling_supported(hba))
1740 return;
1741
1742 INIT_WORK(&hba->clk_scaling.suspend_work,
1743 ufshcd_clk_scaling_suspend_work);
1744 INIT_WORK(&hba->clk_scaling.resume_work,
1745 ufshcd_clk_scaling_resume_work);
1746
1747 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1748 hba->host->host_no);
1749 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1750
1751 ufshcd_clkscaling_init_sysfs(hba);
1752}
1753
1754static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1755{
1756 if (!ufshcd_is_clkscaling_supported(hba))
1757 return;
1758
1759 destroy_workqueue(hba->clk_scaling.workq);
1760 ufshcd_devfreq_remove(hba);
1761}
1762
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001763static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1764{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301765 char wq_name[sizeof("ufs_clk_gating_00")];
1766
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001767 if (!ufshcd_is_clkgating_allowed(hba))
1768 return;
1769
1770 hba->clk_gating.delay_ms = 150;
1771 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1772 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1773
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301774 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1775 hba->host->host_no);
1776 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1777 WQ_MEM_RECLAIM);
1778
Sahitya Tummalab4274112016-12-22 18:40:39 -08001779 hba->clk_gating.is_enabled = true;
1780
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001781 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1782 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1783 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1784 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001785 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001786 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1787 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001788
1789 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1790 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1791 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1792 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1793 hba->clk_gating.enable_attr.attr.mode = 0644;
1794 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1795 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001796}
1797
1798static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1799{
1800 if (!ufshcd_is_clkgating_allowed(hba))
1801 return;
1802 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001803 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001804 cancel_work_sync(&hba->clk_gating.ungate_work);
1805 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301806 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001807}
1808
Sahitya Tummala856b3482014-09-25 15:32:34 +03001809/* Must be called with host lock acquired */
1810static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1811{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001812 bool queue_resume_work = false;
1813
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001814 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001815 return;
1816
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001817 if (!hba->clk_scaling.active_reqs++)
1818 queue_resume_work = true;
1819
1820 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1821 return;
1822
1823 if (queue_resume_work)
1824 queue_work(hba->clk_scaling.workq,
1825 &hba->clk_scaling.resume_work);
1826
1827 if (!hba->clk_scaling.window_start_t) {
1828 hba->clk_scaling.window_start_t = jiffies;
1829 hba->clk_scaling.tot_busy_t = 0;
1830 hba->clk_scaling.is_busy_started = false;
1831 }
1832
Sahitya Tummala856b3482014-09-25 15:32:34 +03001833 if (!hba->clk_scaling.is_busy_started) {
1834 hba->clk_scaling.busy_start_t = ktime_get();
1835 hba->clk_scaling.is_busy_started = true;
1836 }
1837}
1838
1839static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1840{
1841 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1842
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001843 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001844 return;
1845
1846 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1847 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1848 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001849 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001850 scaling->is_busy_started = false;
1851 }
1852}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301853/**
1854 * ufshcd_send_command - Send SCSI or device management commands
1855 * @hba: per adapter instance
1856 * @task_tag: Task tag of the command
1857 */
1858static inline
1859void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1860{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001861 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001862 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Bart Van Asscheeacf36f2019-12-24 14:02:46 -08001863 ufshcd_add_command_trace(hba, task_tag, "send");
Sahitya Tummala856b3482014-09-25 15:32:34 +03001864 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301865 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301866 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001867 /* Make sure that doorbell is committed immediately */
1868 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301869}
1870
1871/**
1872 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001873 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301874 */
1875static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1876{
1877 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301878 if (lrbp->sense_buffer &&
1879 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001880 int len_to_copy;
1881
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301882 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001883 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001884
Avri Altman09a5a242018-11-22 20:04:56 +02001885 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1886 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301887 }
1888}
1889
1890/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301891 * ufshcd_copy_query_response() - Copy the Query Response and the data
1892 * descriptor
1893 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001894 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301895 */
1896static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001897int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301898{
1899 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1900
Dolev Raviv68078d52013-07-30 00:35:58 +05301901 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301902
Dolev Raviv68078d52013-07-30 00:35:58 +05301903 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001904 if (hba->dev_cmd.query.descriptor &&
1905 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001906 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301907 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001908 u16 resp_len;
1909 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301910
1911 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001912 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301913 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001914 buf_len = be16_to_cpu(
1915 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001916 if (likely(buf_len >= resp_len)) {
1917 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1918 } else {
1919 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01001920 "%s: rsp size %d is bigger than buffer size %d",
1921 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001922 return -EINVAL;
1923 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301924 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001925
1926 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301927}
1928
1929/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301930 * ufshcd_hba_capabilities - Read controller capabilities
1931 * @hba: per adapter instance
1932 */
1933static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1934{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301935 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301936
1937 /* nutrs and nutmrs are 0 based values */
1938 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1939 hba->nutmrs =
1940 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1941}
1942
1943/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301944 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1945 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301946 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301947 * Return true on success, else false
1948 */
1949static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1950{
1951 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1952 return true;
1953 else
1954 return false;
1955}
1956
1957/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301958 * ufshcd_get_upmcrs - Get the power mode change request status
1959 * @hba: Pointer to adapter instance
1960 *
1961 * This function gets the UPMCRS field of HCS register
1962 * Returns value of UPMCRS field
1963 */
1964static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1965{
1966 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1967}
1968
1969/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301970 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1971 * @hba: per adapter instance
1972 * @uic_cmd: UIC command
1973 *
1974 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301975 */
1976static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301977ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301978{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301979 WARN_ON(hba->active_uic_cmd);
1980
1981 hba->active_uic_cmd = uic_cmd;
1982
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301983 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301984 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1985 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1986 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301987
1988 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301989 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301990 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301991}
1992
1993/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301994 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1995 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001996 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301997 *
1998 * Must be called with mutex held.
1999 * Returns 0 only if success.
2000 */
2001static int
2002ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2003{
2004 int ret;
2005 unsigned long flags;
2006
2007 if (wait_for_completion_timeout(&uic_cmd->done,
2008 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2009 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2010 else
2011 ret = -ETIMEDOUT;
2012
2013 spin_lock_irqsave(hba->host->host_lock, flags);
2014 hba->active_uic_cmd = NULL;
2015 spin_unlock_irqrestore(hba->host->host_lock, flags);
2016
2017 return ret;
2018}
2019
2020/**
2021 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2022 * @hba: per adapter instance
2023 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002024 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302025 *
2026 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002027 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302028 * Returns 0 only if success.
2029 */
2030static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002031__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2032 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302033{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302034 if (!ufshcd_ready_for_uic_cmd(hba)) {
2035 dev_err(hba->dev,
2036 "Controller not ready to accept UIC commands\n");
2037 return -EIO;
2038 }
2039
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002040 if (completion)
2041 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302042
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302043 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302044
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002045 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302046}
2047
2048/**
2049 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2050 * @hba: per adapter instance
2051 * @uic_cmd: UIC command
2052 *
2053 * Returns 0 only if success.
2054 */
Avri Altmane77044c52018-10-07 17:30:39 +03002055int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302056{
2057 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002058 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302059
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002060 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302061 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002062 ufshcd_add_delay_before_dme_cmd(hba);
2063
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002064 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002065 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002066 spin_unlock_irqrestore(hba->host->host_lock, flags);
2067 if (!ret)
2068 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2069
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302070 mutex_unlock(&hba->uic_cmd_mutex);
2071
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002072 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302073 return ret;
2074}
2075
2076/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302077 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002078 * @hba: per adapter instance
2079 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302080 *
2081 * Returns 0 in case of success, non-zero value in case of failure
2082 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002083static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302084{
2085 struct ufshcd_sg_entry *prd_table;
2086 struct scatterlist *sg;
2087 struct scsi_cmnd *cmd;
2088 int sg_segments;
2089 int i;
2090
2091 cmd = lrbp->cmd;
2092 sg_segments = scsi_dma_map(cmd);
2093 if (sg_segments < 0)
2094 return sg_segments;
2095
2096 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002097 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2098 lrbp->utr_descriptor_ptr->prd_table_length =
2099 cpu_to_le16((u16)(sg_segments *
2100 sizeof(struct ufshcd_sg_entry)));
2101 else
2102 lrbp->utr_descriptor_ptr->prd_table_length =
2103 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302104
2105 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2106
2107 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2108 prd_table[i].size =
2109 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2110 prd_table[i].base_addr =
2111 cpu_to_le32(lower_32_bits(sg->dma_address));
2112 prd_table[i].upper_addr =
2113 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002114 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302115 }
2116 } else {
2117 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2118 }
2119
2120 return 0;
2121}
2122
2123/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302124 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302125 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302126 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302127 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302128static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302129{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302130 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2131
2132 if (hba->ufs_version == UFSHCI_VERSION_10) {
2133 u32 rw;
2134 rw = set & INTERRUPT_MASK_RW_VER_10;
2135 set = rw | ((set ^ intrs) & intrs);
2136 } else {
2137 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302138 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302139
2140 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2141}
2142
2143/**
2144 * ufshcd_disable_intr - disable interrupts
2145 * @hba: per adapter instance
2146 * @intrs: interrupt bits
2147 */
2148static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2149{
2150 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2151
2152 if (hba->ufs_version == UFSHCI_VERSION_10) {
2153 u32 rw;
2154 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2155 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2156 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2157
2158 } else {
2159 set &= ~intrs;
2160 }
2161
2162 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302163}
2164
2165/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302166 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2167 * descriptor according to request
2168 * @lrbp: pointer to local reference block
2169 * @upiu_flags: flags required in the header
2170 * @cmd_dir: requests data direction
2171 */
2172static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002173 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302174{
2175 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2176 u32 data_direction;
2177 u32 dword_0;
2178
2179 if (cmd_dir == DMA_FROM_DEVICE) {
2180 data_direction = UTP_DEVICE_TO_HOST;
2181 *upiu_flags = UPIU_CMD_FLAGS_READ;
2182 } else if (cmd_dir == DMA_TO_DEVICE) {
2183 data_direction = UTP_HOST_TO_DEVICE;
2184 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2185 } else {
2186 data_direction = UTP_NO_DATA_TRANSFER;
2187 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2188 }
2189
2190 dword_0 = data_direction | (lrbp->command_type
2191 << UPIU_COMMAND_TYPE_OFFSET);
2192 if (lrbp->intr_cmd)
2193 dword_0 |= UTP_REQ_DESC_INT_CMD;
2194
2195 /* Transfer request descriptor header fields */
2196 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002197 /* dword_1 is reserved, hence it is set to 0 */
2198 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302199 /*
2200 * assigning invalid value for command status. Controller
2201 * updates OCS on command completion, with the command
2202 * status
2203 */
2204 req_desc->header.dword_2 =
2205 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002206 /* dword_3 is reserved, hence it is set to 0 */
2207 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002208
2209 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302210}
2211
2212/**
2213 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2214 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002215 * @lrbp: local reference block pointer
2216 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302217 */
2218static
2219void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2220{
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002221 struct scsi_cmnd *cmd = lrbp->cmd;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302222 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002223 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302224
2225 /* command descriptor fields */
2226 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2227 UPIU_TRANSACTION_COMMAND, upiu_flags,
2228 lrbp->lun, lrbp->task_tag);
2229 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2230 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2231
2232 /* Total EHS length and Data segment length will be zero */
2233 ucd_req_ptr->header.dword_2 = 0;
2234
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002235 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302236
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002237 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
Avri Altmana851b2b2018-10-07 17:30:34 +03002238 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002239 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002240
2241 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302242}
2243
Dolev Raviv68078d52013-07-30 00:35:58 +05302244/**
2245 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2246 * for query requsts
2247 * @hba: UFS hba
2248 * @lrbp: local reference block pointer
2249 * @upiu_flags: flags
2250 */
2251static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2252 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2253{
2254 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2255 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302256 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302257
2258 /* Query request header */
2259 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2260 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2261 lrbp->lun, lrbp->task_tag);
2262 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2263 0, query->request.query_func, 0, 0);
2264
Zang Leigang68612852016-08-25 17:39:19 +08002265 /* Data segment length only need for WRITE_DESC */
2266 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2267 ucd_req_ptr->header.dword_2 =
2268 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2269 else
2270 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302271
2272 /* Copy the Query Request buffer as is */
2273 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2274 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302275
2276 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002277 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002278 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002279
Yaniv Gardi51047262016-02-01 15:02:38 +02002280 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302281}
2282
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302283static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2284{
2285 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2286
2287 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2288
2289 /* command descriptor fields */
2290 ucd_req_ptr->header.dword_0 =
2291 UPIU_HEADER_DWORD(
2292 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002293 /* clear rest of the fields of basic header */
2294 ucd_req_ptr->header.dword_1 = 0;
2295 ucd_req_ptr->header.dword_2 = 0;
2296
2297 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302298}
2299
2300/**
Joao Pinto300bb132016-05-11 12:21:27 +01002301 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2302 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002303 * @hba: per adapter instance
2304 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302305 */
Joao Pinto300bb132016-05-11 12:21:27 +01002306static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302307{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302308 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302309 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302310
kehuanlin83dc7e32017-09-06 17:58:39 +08002311 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2312 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002313 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002314 else
2315 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002316
2317 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2318 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2319 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2320 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2321 ufshcd_prepare_utp_nop_upiu(lrbp);
2322 else
2323 ret = -EINVAL;
2324
2325 return ret;
2326}
2327
2328/**
2329 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2330 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002331 * @hba: per adapter instance
2332 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002333 */
2334static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2335{
2336 u32 upiu_flags;
2337 int ret = 0;
2338
kehuanlin83dc7e32017-09-06 17:58:39 +08002339 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2340 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002341 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002342 else
2343 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002344
2345 if (likely(lrbp->cmd)) {
2346 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2347 lrbp->cmd->sc_data_direction);
2348 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2349 } else {
2350 ret = -EINVAL;
2351 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302352
2353 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302354}
2355
2356/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002357 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002358 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002359 *
2360 * Returns SCSI W-LUN id
2361 */
2362static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2363{
2364 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2365}
2366
2367/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302368 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002369 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302370 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302371 *
2372 * Returns 0 for success, non-zero in case of failure
2373 */
2374static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2375{
2376 struct ufshcd_lrb *lrbp;
2377 struct ufs_hba *hba;
2378 unsigned long flags;
2379 int tag;
2380 int err = 0;
2381
2382 hba = shost_priv(host);
2383
2384 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002385 if (!ufshcd_valid_tag(hba, tag)) {
2386 dev_err(hba->dev,
2387 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2388 __func__, tag, cmd, cmd->request);
2389 BUG();
2390 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302391
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002392 if (!down_read_trylock(&hba->clk_scaling_lock))
2393 return SCSI_MLQUEUE_HOST_BUSY;
2394
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302395 spin_lock_irqsave(hba->host->host_lock, flags);
2396 switch (hba->ufshcd_state) {
2397 case UFSHCD_STATE_OPERATIONAL:
2398 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002399 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302400 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302401 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302402 goto out_unlock;
2403 case UFSHCD_STATE_ERROR:
2404 set_host_byte(cmd, DID_ERROR);
2405 cmd->scsi_done(cmd);
2406 goto out_unlock;
2407 default:
2408 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2409 __func__, hba->ufshcd_state);
2410 set_host_byte(cmd, DID_BAD_TARGET);
2411 cmd->scsi_done(cmd);
2412 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302413 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002414
2415 /* if error handling is in progress, don't issue commands */
2416 if (ufshcd_eh_in_progress(hba)) {
2417 set_host_byte(cmd, DID_ERROR);
2418 cmd->scsi_done(cmd);
2419 goto out_unlock;
2420 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302421 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302422
Gilad Broner7fabb772017-02-03 16:56:50 -08002423 hba->req_abort_count = 0;
2424
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002425 err = ufshcd_hold(hba, true);
2426 if (err) {
2427 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002428 goto out;
2429 }
2430 WARN_ON(hba->clk_gating.state != CLKS_ON);
2431
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302432 lrbp = &hba->lrb[tag];
2433
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302434 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302435 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002436 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302437 lrbp->sense_buffer = cmd->sense_buffer;
2438 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002439 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002440 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002441 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302442
Joao Pinto300bb132016-05-11 12:21:27 +01002443 ufshcd_comp_scsi_upiu(hba, lrbp);
2444
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002445 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302446 if (err) {
2447 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002448 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302449 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302450 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002451 /* Make sure descriptors are ready before ringing the doorbell */
2452 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302453
2454 /* issue command to the controller */
2455 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002456 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302457 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302458out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302459 spin_unlock_irqrestore(hba->host->host_lock, flags);
2460out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002461 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302462 return err;
2463}
2464
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302465static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2466 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2467{
2468 lrbp->cmd = NULL;
2469 lrbp->sense_bufflen = 0;
2470 lrbp->sense_buffer = NULL;
2471 lrbp->task_tag = tag;
2472 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302473 lrbp->intr_cmd = true; /* No interrupt aggregation */
2474 hba->dev_cmd.type = cmd_type;
2475
Joao Pinto300bb132016-05-11 12:21:27 +01002476 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302477}
2478
2479static int
2480ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2481{
2482 int err = 0;
2483 unsigned long flags;
2484 u32 mask = 1 << tag;
2485
2486 /* clear outstanding transaction before retry */
2487 spin_lock_irqsave(hba->host->host_lock, flags);
2488 ufshcd_utrl_clear(hba, tag);
2489 spin_unlock_irqrestore(hba->host->host_lock, flags);
2490
2491 /*
2492 * wait for for h/w to clear corresponding bit in door-bell.
2493 * max. wait is 1 sec.
2494 */
2495 err = ufshcd_wait_for_register(hba,
2496 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002497 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302498
2499 return err;
2500}
2501
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002502static int
2503ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2504{
2505 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2506
2507 /* Get the UPIU response */
2508 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2509 UPIU_RSP_CODE_OFFSET;
2510 return query_res->response;
2511}
2512
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302513/**
2514 * ufshcd_dev_cmd_completion() - handles device management command responses
2515 * @hba: per adapter instance
2516 * @lrbp: pointer to local reference block
2517 */
2518static int
2519ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2520{
2521 int resp;
2522 int err = 0;
2523
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002524 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302525 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2526
2527 switch (resp) {
2528 case UPIU_TRANSACTION_NOP_IN:
2529 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2530 err = -EINVAL;
2531 dev_err(hba->dev, "%s: unexpected response %x\n",
2532 __func__, resp);
2533 }
2534 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302535 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002536 err = ufshcd_check_query_response(hba, lrbp);
2537 if (!err)
2538 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302539 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302540 case UPIU_TRANSACTION_REJECT_UPIU:
2541 /* TODO: handle Reject UPIU Response */
2542 err = -EPERM;
2543 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2544 __func__);
2545 break;
2546 default:
2547 err = -EINVAL;
2548 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2549 __func__, resp);
2550 break;
2551 }
2552
2553 return err;
2554}
2555
2556static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2557 struct ufshcd_lrb *lrbp, int max_timeout)
2558{
2559 int err = 0;
2560 unsigned long time_left;
2561 unsigned long flags;
2562
2563 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2564 msecs_to_jiffies(max_timeout));
2565
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002566 /* Make sure descriptors are ready before ringing the doorbell */
2567 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302568 spin_lock_irqsave(hba->host->host_lock, flags);
2569 hba->dev_cmd.complete = NULL;
2570 if (likely(time_left)) {
2571 err = ufshcd_get_tr_ocs(lrbp);
2572 if (!err)
2573 err = ufshcd_dev_cmd_completion(hba, lrbp);
2574 }
2575 spin_unlock_irqrestore(hba->host->host_lock, flags);
2576
2577 if (!time_left) {
2578 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002579 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2580 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302581 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002582 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302583 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002584 /*
2585 * in case of an error, after clearing the doorbell,
2586 * we also need to clear the outstanding_request
2587 * field in hba
2588 */
2589 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302590 }
2591
2592 return err;
2593}
2594
2595/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302596 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002597 * @hba: UFS hba
2598 * @cmd_type: specifies the type (NOP, Query...)
2599 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302600 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302601 * NOTE: Since there is only one available tag for device management commands,
2602 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302603 */
2604static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2605 enum dev_cmd_type cmd_type, int timeout)
2606{
Bart Van Assche7252a362019-12-09 10:13:08 -08002607 struct request_queue *q = hba->cmd_queue;
2608 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302609 struct ufshcd_lrb *lrbp;
2610 int err;
2611 int tag;
2612 struct completion wait;
2613 unsigned long flags;
2614
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002615 down_read(&hba->clk_scaling_lock);
2616
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302617 /*
2618 * Get free slot, sleep if slots are unavailable.
2619 * Even though we use wait_event() which sleeps indefinitely,
2620 * the maximum wait time is bounded by SCSI request timeout.
2621 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002622 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002623 if (IS_ERR(req)) {
2624 err = PTR_ERR(req);
2625 goto out_unlock;
2626 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002627 tag = req->tag;
2628 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302629
2630 init_completion(&wait);
2631 lrbp = &hba->lrb[tag];
2632 WARN_ON(lrbp->cmd);
2633 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2634 if (unlikely(err))
2635 goto out_put_tag;
2636
2637 hba->dev_cmd.complete = &wait;
2638
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002639 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002640 /* Make sure descriptors are ready before ringing the doorbell */
2641 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302642 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002643 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302644 ufshcd_send_command(hba, tag);
2645 spin_unlock_irqrestore(hba->host->host_lock, flags);
2646
2647 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2648
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002649 ufshcd_add_query_upiu_trace(hba, tag,
2650 err ? "query_complete_err" : "query_complete");
2651
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302652out_put_tag:
Bart Van Assche7252a362019-12-09 10:13:08 -08002653 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002654out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002655 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302656 return err;
2657}
2658
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302659/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002660 * ufshcd_init_query() - init the query response and request parameters
2661 * @hba: per-adapter instance
2662 * @request: address of the request pointer to be initialized
2663 * @response: address of the response pointer to be initialized
2664 * @opcode: operation to perform
2665 * @idn: flag idn to access
2666 * @index: LU number to access
2667 * @selector: query/flag/descriptor further identification
2668 */
2669static inline void ufshcd_init_query(struct ufs_hba *hba,
2670 struct ufs_query_req **request, struct ufs_query_res **response,
2671 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2672{
2673 *request = &hba->dev_cmd.query.request;
2674 *response = &hba->dev_cmd.query.response;
2675 memset(*request, 0, sizeof(struct ufs_query_req));
2676 memset(*response, 0, sizeof(struct ufs_query_res));
2677 (*request)->upiu_req.opcode = opcode;
2678 (*request)->upiu_req.idn = idn;
2679 (*request)->upiu_req.index = index;
2680 (*request)->upiu_req.selector = selector;
2681}
2682
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002683static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2684 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2685{
2686 int ret;
2687 int retries;
2688
2689 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2690 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2691 if (ret)
2692 dev_dbg(hba->dev,
2693 "%s: failed with error %d, retries %d\n",
2694 __func__, ret, retries);
2695 else
2696 break;
2697 }
2698
2699 if (ret)
2700 dev_err(hba->dev,
2701 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2702 __func__, opcode, idn, ret, retries);
2703 return ret;
2704}
2705
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002706/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302707 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002708 * @hba: per-adapter instance
2709 * @opcode: flag query to perform
2710 * @idn: flag idn to access
2711 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302712 *
2713 * Returns 0 for success, non-zero in case of failure
2714 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002715int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302716 enum flag_idn idn, bool *flag_res)
2717{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002718 struct ufs_query_req *request = NULL;
2719 struct ufs_query_res *response = NULL;
2720 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002721 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302722
2723 BUG_ON(!hba);
2724
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002725 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302726 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002727 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2728 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302729
2730 switch (opcode) {
2731 case UPIU_QUERY_OPCODE_SET_FLAG:
2732 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2733 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2734 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2735 break;
2736 case UPIU_QUERY_OPCODE_READ_FLAG:
2737 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2738 if (!flag_res) {
2739 /* No dummy reads */
2740 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2741 __func__);
2742 err = -EINVAL;
2743 goto out_unlock;
2744 }
2745 break;
2746 default:
2747 dev_err(hba->dev,
2748 "%s: Expected query flag opcode but got = %d\n",
2749 __func__, opcode);
2750 err = -EINVAL;
2751 goto out_unlock;
2752 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302753
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002754 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302755
2756 if (err) {
2757 dev_err(hba->dev,
2758 "%s: Sending flag query for idn %d failed, err = %d\n",
2759 __func__, idn, err);
2760 goto out_unlock;
2761 }
2762
2763 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302764 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302765 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2766
2767out_unlock:
2768 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002769 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302770 return err;
2771}
2772
2773/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302774 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002775 * @hba: per-adapter instance
2776 * @opcode: attribute opcode
2777 * @idn: attribute idn to access
2778 * @index: index field
2779 * @selector: selector field
2780 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302781 *
2782 * Returns 0 for success, non-zero in case of failure
2783*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002784int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2785 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302786{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002787 struct ufs_query_req *request = NULL;
2788 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302789 int err;
2790
2791 BUG_ON(!hba);
2792
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002793 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302794 if (!attr_val) {
2795 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2796 __func__, opcode);
2797 err = -EINVAL;
2798 goto out;
2799 }
2800
2801 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002802 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2803 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302804
2805 switch (opcode) {
2806 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2807 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302808 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302809 break;
2810 case UPIU_QUERY_OPCODE_READ_ATTR:
2811 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2812 break;
2813 default:
2814 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2815 __func__, opcode);
2816 err = -EINVAL;
2817 goto out_unlock;
2818 }
2819
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002820 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302821
2822 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002823 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2824 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302825 goto out_unlock;
2826 }
2827
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302828 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302829
2830out_unlock:
2831 mutex_unlock(&hba->dev_cmd.lock);
2832out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002833 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302834 return err;
2835}
2836
2837/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002838 * ufshcd_query_attr_retry() - API function for sending query
2839 * attribute with retries
2840 * @hba: per-adapter instance
2841 * @opcode: attribute opcode
2842 * @idn: attribute idn to access
2843 * @index: index field
2844 * @selector: selector field
2845 * @attr_val: the attribute value after the query request
2846 * completes
2847 *
2848 * Returns 0 for success, non-zero in case of failure
2849*/
2850static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2851 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2852 u32 *attr_val)
2853{
2854 int ret = 0;
2855 u32 retries;
2856
Bart Van Assche68c9fcf2019-12-24 14:02:43 -08002857 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002858 ret = ufshcd_query_attr(hba, opcode, idn, index,
2859 selector, attr_val);
2860 if (ret)
2861 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2862 __func__, ret, retries);
2863 else
2864 break;
2865 }
2866
2867 if (ret)
2868 dev_err(hba->dev,
2869 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2870 __func__, idn, ret, QUERY_REQ_RETRIES);
2871 return ret;
2872}
2873
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002874static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002875 enum query_opcode opcode, enum desc_idn idn, u8 index,
2876 u8 selector, u8 *desc_buf, int *buf_len)
2877{
2878 struct ufs_query_req *request = NULL;
2879 struct ufs_query_res *response = NULL;
2880 int err;
2881
2882 BUG_ON(!hba);
2883
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002884 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002885 if (!desc_buf) {
2886 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2887 __func__, opcode);
2888 err = -EINVAL;
2889 goto out;
2890 }
2891
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002892 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002893 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2894 __func__, *buf_len);
2895 err = -EINVAL;
2896 goto out;
2897 }
2898
2899 mutex_lock(&hba->dev_cmd.lock);
2900 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2901 selector);
2902 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002903 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002904
2905 switch (opcode) {
2906 case UPIU_QUERY_OPCODE_WRITE_DESC:
2907 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2908 break;
2909 case UPIU_QUERY_OPCODE_READ_DESC:
2910 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2911 break;
2912 default:
2913 dev_err(hba->dev,
2914 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2915 __func__, opcode);
2916 err = -EINVAL;
2917 goto out_unlock;
2918 }
2919
2920 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2921
2922 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002923 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2924 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002925 goto out_unlock;
2926 }
2927
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002928 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002929
2930out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01002931 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002932 mutex_unlock(&hba->dev_cmd.lock);
2933out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002934 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002935 return err;
2936}
2937
2938/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002939 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2940 * @hba: per-adapter instance
2941 * @opcode: attribute opcode
2942 * @idn: attribute idn to access
2943 * @index: index field
2944 * @selector: selector field
2945 * @desc_buf: the buffer that contains the descriptor
2946 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002947 *
2948 * Returns 0 for success, non-zero in case of failure.
2949 * The buf_len parameter will contain, on return, the length parameter
2950 * received on the response.
2951 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02002952int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2953 enum query_opcode opcode,
2954 enum desc_idn idn, u8 index,
2955 u8 selector,
2956 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002957{
2958 int err;
2959 int retries;
2960
2961 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2962 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2963 selector, desc_buf, buf_len);
2964 if (!err || err == -EINVAL)
2965 break;
2966 }
2967
2968 return err;
2969}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002970
2971/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002972 * ufshcd_read_desc_length - read the specified descriptor length from header
2973 * @hba: Pointer to adapter instance
2974 * @desc_id: descriptor idn value
2975 * @desc_index: descriptor index
2976 * @desc_length: pointer to variable to read the length of descriptor
2977 *
2978 * Return 0 in case of success, non-zero otherwise
2979 */
2980static int ufshcd_read_desc_length(struct ufs_hba *hba,
2981 enum desc_idn desc_id,
2982 int desc_index,
2983 int *desc_length)
2984{
2985 int ret;
2986 u8 header[QUERY_DESC_HDR_SIZE];
2987 int header_len = QUERY_DESC_HDR_SIZE;
2988
2989 if (desc_id >= QUERY_DESC_IDN_MAX)
2990 return -EINVAL;
2991
2992 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2993 desc_id, desc_index, 0, header,
2994 &header_len);
2995
2996 if (ret) {
2997 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2998 __func__, desc_id);
2999 return ret;
3000 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3001 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3002 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3003 desc_id);
3004 ret = -EINVAL;
3005 }
3006
3007 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3008 return ret;
3009
3010}
3011
3012/**
3013 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3014 * @hba: Pointer to adapter instance
3015 * @desc_id: descriptor idn value
3016 * @desc_len: mapped desc length (out)
3017 *
3018 * Return 0 in case of success, non-zero otherwise
3019 */
3020int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3021 enum desc_idn desc_id, int *desc_len)
3022{
3023 switch (desc_id) {
3024 case QUERY_DESC_IDN_DEVICE:
3025 *desc_len = hba->desc_size.dev_desc;
3026 break;
3027 case QUERY_DESC_IDN_POWER:
3028 *desc_len = hba->desc_size.pwr_desc;
3029 break;
3030 case QUERY_DESC_IDN_GEOMETRY:
3031 *desc_len = hba->desc_size.geom_desc;
3032 break;
3033 case QUERY_DESC_IDN_CONFIGURATION:
3034 *desc_len = hba->desc_size.conf_desc;
3035 break;
3036 case QUERY_DESC_IDN_UNIT:
3037 *desc_len = hba->desc_size.unit_desc;
3038 break;
3039 case QUERY_DESC_IDN_INTERCONNECT:
3040 *desc_len = hba->desc_size.interc_desc;
3041 break;
3042 case QUERY_DESC_IDN_STRING:
3043 *desc_len = QUERY_DESC_MAX_SIZE;
3044 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003045 case QUERY_DESC_IDN_HEALTH:
3046 *desc_len = hba->desc_size.hlth_desc;
3047 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003048 case QUERY_DESC_IDN_RFU_0:
3049 case QUERY_DESC_IDN_RFU_1:
3050 *desc_len = 0;
3051 break;
3052 default:
3053 *desc_len = 0;
3054 return -EINVAL;
3055 }
3056 return 0;
3057}
3058EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3059
3060/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003061 * ufshcd_read_desc_param - read the specified descriptor parameter
3062 * @hba: Pointer to adapter instance
3063 * @desc_id: descriptor idn value
3064 * @desc_index: descriptor index
3065 * @param_offset: offset of the parameter to read
3066 * @param_read_buf: pointer to buffer where parameter would be read
3067 * @param_size: sizeof(param_read_buf)
3068 *
3069 * Return 0 in case of success, non-zero otherwise
3070 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003071int ufshcd_read_desc_param(struct ufs_hba *hba,
3072 enum desc_idn desc_id,
3073 int desc_index,
3074 u8 param_offset,
3075 u8 *param_read_buf,
3076 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003077{
3078 int ret;
3079 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003080 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003081 bool is_kmalloc = true;
3082
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003083 /* Safety check */
3084 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003085 return -EINVAL;
3086
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003087 /* Get the max length of descriptor from structure filled up at probe
3088 * time.
3089 */
3090 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003091
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003092 /* Sanity checks */
3093 if (ret || !buff_len) {
3094 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3095 __func__);
3096 return ret;
3097 }
3098
3099 /* Check whether we need temp memory */
3100 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003101 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3102 if (!desc_buf)
3103 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003104 } else {
3105 desc_buf = param_read_buf;
3106 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003107 }
3108
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003109 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003110 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003111 desc_id, desc_index, 0,
3112 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003113
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003114 if (ret) {
3115 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3116 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003117 goto out;
3118 }
3119
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003120 /* Sanity check */
3121 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3122 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3123 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3124 ret = -EINVAL;
3125 goto out;
3126 }
3127
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003128 /* Check wherher we will not copy more data, than available */
3129 if (is_kmalloc && param_size > buff_len)
3130 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003131
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003132 if (is_kmalloc)
3133 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3134out:
3135 if (is_kmalloc)
3136 kfree(desc_buf);
3137 return ret;
3138}
3139
3140static inline int ufshcd_read_desc(struct ufs_hba *hba,
3141 enum desc_idn desc_id,
3142 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003143 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003144 u32 size)
3145{
3146 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3147}
3148
3149static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3150 u8 *buf,
3151 u32 size)
3152{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003153 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003154}
3155
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003156static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003157{
3158 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3159}
Yaniv Gardib573d482016-03-10 17:37:09 +02003160
3161/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003162 * struct uc_string_id - unicode string
3163 *
3164 * @len: size of this descriptor inclusive
3165 * @type: descriptor type
3166 * @uc: unicode string character
3167 */
3168struct uc_string_id {
3169 u8 len;
3170 u8 type;
3171 wchar_t uc[0];
3172} __packed;
3173
3174/* replace non-printable or non-ASCII characters with spaces */
3175static inline char ufshcd_remove_non_printable(u8 ch)
3176{
3177 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3178}
3179
3180/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003181 * ufshcd_read_string_desc - read string descriptor
3182 * @hba: pointer to adapter instance
3183 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003184 * @buf: pointer to buffer where descriptor would be read,
3185 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003186 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003187 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003188 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003189 * Return:
3190 * * string size on success.
3191 * * -ENOMEM: on allocation failure
3192 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003193 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003194int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3195 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003196{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003197 struct uc_string_id *uc_str;
3198 u8 *str;
3199 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003200
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003201 if (!buf)
3202 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003203
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003204 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3205 if (!uc_str)
3206 return -ENOMEM;
3207
3208 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3209 desc_index, uc_str,
3210 QUERY_DESC_MAX_SIZE);
3211 if (ret < 0) {
3212 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3213 QUERY_REQ_RETRIES, ret);
3214 str = NULL;
3215 goto out;
3216 }
3217
3218 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3219 dev_dbg(hba->dev, "String Desc is of zero length\n");
3220 str = NULL;
3221 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003222 goto out;
3223 }
3224
3225 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003226 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003227 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003228 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003229 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3230 str = kzalloc(ascii_len, GFP_KERNEL);
3231 if (!str) {
3232 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003233 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003234 }
3235
3236 /*
3237 * the descriptor contains string in UTF16 format
3238 * we need to convert to utf-8 so it can be displayed
3239 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003240 ret = utf16s_to_utf8s(uc_str->uc,
3241 uc_str->len - QUERY_DESC_HDR_SIZE,
3242 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003243
3244 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003245 for (i = 0; i < ret; i++)
3246 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003247
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003248 str[ret++] = '\0';
3249
3250 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003251 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003252 if (!str) {
3253 ret = -ENOMEM;
3254 goto out;
3255 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003256 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003257 }
3258out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003259 *buf = str;
3260 kfree(uc_str);
3261 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003262}
Yaniv Gardib573d482016-03-10 17:37:09 +02003263
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003264/**
3265 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3266 * @hba: Pointer to adapter instance
3267 * @lun: lun id
3268 * @param_offset: offset of the parameter to read
3269 * @param_read_buf: pointer to buffer where parameter would be read
3270 * @param_size: sizeof(param_read_buf)
3271 *
3272 * Return 0 in case of success, non-zero otherwise
3273 */
3274static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3275 int lun,
3276 enum unit_desc_param param_offset,
3277 u8 *param_read_buf,
3278 u32 param_size)
3279{
3280 /*
3281 * Unit descriptors are only available for general purpose LUs (LUN id
3282 * from 0 to 7) and RPMB Well known LU.
3283 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003284 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003285 return -EOPNOTSUPP;
3286
3287 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3288 param_offset, param_read_buf, param_size);
3289}
3290
3291/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303292 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3293 * @hba: per adapter instance
3294 *
3295 * 1. Allocate DMA memory for Command Descriptor array
3296 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3297 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3298 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3299 * (UTMRDL)
3300 * 4. Allocate memory for local reference block(lrb).
3301 *
3302 * Returns 0 for success, non-zero in case of failure
3303 */
3304static int ufshcd_memory_alloc(struct ufs_hba *hba)
3305{
3306 size_t utmrdl_size, utrdl_size, ucdl_size;
3307
3308 /* Allocate memory for UTP command descriptors */
3309 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003310 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3311 ucdl_size,
3312 &hba->ucdl_dma_addr,
3313 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303314
3315 /*
3316 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3317 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3318 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3319 * be aligned to 128 bytes as well
3320 */
3321 if (!hba->ucdl_base_addr ||
3322 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303323 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303324 "Command Descriptor Memory allocation failed\n");
3325 goto out;
3326 }
3327
3328 /*
3329 * Allocate memory for UTP Transfer descriptors
3330 * UFSHCI requires 1024 byte alignment of UTRD
3331 */
3332 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003333 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3334 utrdl_size,
3335 &hba->utrdl_dma_addr,
3336 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303337 if (!hba->utrdl_base_addr ||
3338 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303339 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303340 "Transfer Descriptor Memory allocation failed\n");
3341 goto out;
3342 }
3343
3344 /*
3345 * Allocate memory for UTP Task Management descriptors
3346 * UFSHCI requires 1024 byte alignment of UTMRD
3347 */
3348 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003349 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3350 utmrdl_size,
3351 &hba->utmrdl_dma_addr,
3352 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303353 if (!hba->utmrdl_base_addr ||
3354 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303355 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303356 "Task Management Descriptor Memory allocation failed\n");
3357 goto out;
3358 }
3359
3360 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003361 hba->lrb = devm_kcalloc(hba->dev,
3362 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003363 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303364 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303365 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303366 goto out;
3367 }
3368 return 0;
3369out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303370 return -ENOMEM;
3371}
3372
3373/**
3374 * ufshcd_host_memory_configure - configure local reference block with
3375 * memory offsets
3376 * @hba: per adapter instance
3377 *
3378 * Configure Host memory space
3379 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3380 * address.
3381 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3382 * and PRDT offset.
3383 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3384 * into local reference block.
3385 */
3386static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3387{
3388 struct utp_transfer_cmd_desc *cmd_descp;
3389 struct utp_transfer_req_desc *utrdlp;
3390 dma_addr_t cmd_desc_dma_addr;
3391 dma_addr_t cmd_desc_element_addr;
3392 u16 response_offset;
3393 u16 prdt_offset;
3394 int cmd_desc_size;
3395 int i;
3396
3397 utrdlp = hba->utrdl_base_addr;
3398 cmd_descp = hba->ucdl_base_addr;
3399
3400 response_offset =
3401 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3402 prdt_offset =
3403 offsetof(struct utp_transfer_cmd_desc, prd_table);
3404
3405 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3406 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3407
3408 for (i = 0; i < hba->nutrs; i++) {
3409 /* Configure UTRD with command descriptor base address */
3410 cmd_desc_element_addr =
3411 (cmd_desc_dma_addr + (cmd_desc_size * i));
3412 utrdlp[i].command_desc_base_addr_lo =
3413 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3414 utrdlp[i].command_desc_base_addr_hi =
3415 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3416
3417 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003418 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3419 utrdlp[i].response_upiu_offset =
3420 cpu_to_le16(response_offset);
3421 utrdlp[i].prd_table_offset =
3422 cpu_to_le16(prdt_offset);
3423 utrdlp[i].response_upiu_length =
3424 cpu_to_le16(ALIGNED_UPIU_SIZE);
3425 } else {
3426 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303427 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003428 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303429 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003430 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303431 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003432 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303433
3434 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003435 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3436 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303437 hba->lrb[i].ucd_req_ptr =
3438 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003439 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303440 hba->lrb[i].ucd_rsp_ptr =
3441 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003442 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3443 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303444 hba->lrb[i].ucd_prdt_ptr =
3445 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003446 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3447 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303448 }
3449}
3450
3451/**
3452 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3453 * @hba: per adapter instance
3454 *
3455 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3456 * in order to initialize the Unipro link startup procedure.
3457 * Once the Unipro links are up, the device connected to the controller
3458 * is detected.
3459 *
3460 * Returns 0 on success, non-zero value on failure
3461 */
3462static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3463{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303464 struct uic_command uic_cmd = {0};
3465 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303466
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303467 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3468
3469 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3470 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003471 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303472 "dme-link-startup: error code %d\n", ret);
3473 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303474}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303475/**
3476 * ufshcd_dme_reset - UIC command for DME_RESET
3477 * @hba: per adapter instance
3478 *
3479 * DME_RESET command is issued in order to reset UniPro stack.
3480 * This function now deal with cold reset.
3481 *
3482 * Returns 0 on success, non-zero value on failure
3483 */
3484static int ufshcd_dme_reset(struct ufs_hba *hba)
3485{
3486 struct uic_command uic_cmd = {0};
3487 int ret;
3488
3489 uic_cmd.command = UIC_CMD_DME_RESET;
3490
3491 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3492 if (ret)
3493 dev_err(hba->dev,
3494 "dme-reset: error code %d\n", ret);
3495
3496 return ret;
3497}
3498
3499/**
3500 * ufshcd_dme_enable - UIC command for DME_ENABLE
3501 * @hba: per adapter instance
3502 *
3503 * DME_ENABLE command is issued in order to enable UniPro stack.
3504 *
3505 * Returns 0 on success, non-zero value on failure
3506 */
3507static int ufshcd_dme_enable(struct ufs_hba *hba)
3508{
3509 struct uic_command uic_cmd = {0};
3510 int ret;
3511
3512 uic_cmd.command = UIC_CMD_DME_ENABLE;
3513
3514 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3515 if (ret)
3516 dev_err(hba->dev,
3517 "dme-reset: error code %d\n", ret);
3518
3519 return ret;
3520}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303521
Yaniv Gardicad2e032015-03-31 17:37:14 +03003522static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3523{
3524 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3525 unsigned long min_sleep_time_us;
3526
3527 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3528 return;
3529
3530 /*
3531 * last_dme_cmd_tstamp will be 0 only for 1st call to
3532 * this function
3533 */
3534 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3535 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3536 } else {
3537 unsigned long delta =
3538 (unsigned long) ktime_to_us(
3539 ktime_sub(ktime_get(),
3540 hba->last_dme_cmd_tstamp));
3541
3542 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3543 min_sleep_time_us =
3544 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3545 else
3546 return; /* no more delay required */
3547 }
3548
3549 /* allow sleep for extra 50us if needed */
3550 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3551}
3552
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303553/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303554 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3555 * @hba: per adapter instance
3556 * @attr_sel: uic command argument1
3557 * @attr_set: attribute set type as uic command argument2
3558 * @mib_val: setting value as uic command argument3
3559 * @peer: indicate whether peer or local
3560 *
3561 * Returns 0 on success, non-zero value on failure
3562 */
3563int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3564 u8 attr_set, u32 mib_val, u8 peer)
3565{
3566 struct uic_command uic_cmd = {0};
3567 static const char *const action[] = {
3568 "dme-set",
3569 "dme-peer-set"
3570 };
3571 const char *set = action[!!peer];
3572 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003573 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303574
3575 uic_cmd.command = peer ?
3576 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3577 uic_cmd.argument1 = attr_sel;
3578 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3579 uic_cmd.argument3 = mib_val;
3580
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003581 do {
3582 /* for peer attributes we retry upon failure */
3583 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3584 if (ret)
3585 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3586 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3587 } while (ret && peer && --retries);
3588
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003589 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003590 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003591 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3592 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303593
3594 return ret;
3595}
3596EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3597
3598/**
3599 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3600 * @hba: per adapter instance
3601 * @attr_sel: uic command argument1
3602 * @mib_val: the value of the attribute as returned by the UIC command
3603 * @peer: indicate whether peer or local
3604 *
3605 * Returns 0 on success, non-zero value on failure
3606 */
3607int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3608 u32 *mib_val, u8 peer)
3609{
3610 struct uic_command uic_cmd = {0};
3611 static const char *const action[] = {
3612 "dme-get",
3613 "dme-peer-get"
3614 };
3615 const char *get = action[!!peer];
3616 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003617 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003618 struct ufs_pa_layer_attr orig_pwr_info;
3619 struct ufs_pa_layer_attr temp_pwr_info;
3620 bool pwr_mode_change = false;
3621
3622 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3623 orig_pwr_info = hba->pwr_info;
3624 temp_pwr_info = orig_pwr_info;
3625
3626 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3627 orig_pwr_info.pwr_rx == FAST_MODE) {
3628 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3629 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3630 pwr_mode_change = true;
3631 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3632 orig_pwr_info.pwr_rx == SLOW_MODE) {
3633 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3634 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3635 pwr_mode_change = true;
3636 }
3637 if (pwr_mode_change) {
3638 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3639 if (ret)
3640 goto out;
3641 }
3642 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303643
3644 uic_cmd.command = peer ?
3645 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3646 uic_cmd.argument1 = attr_sel;
3647
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003648 do {
3649 /* for peer attributes we retry upon failure */
3650 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3651 if (ret)
3652 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3653 get, UIC_GET_ATTR_ID(attr_sel), ret);
3654 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303655
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003656 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003657 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003658 get, UIC_GET_ATTR_ID(attr_sel),
3659 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003660
3661 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303662 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003663
3664 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3665 && pwr_mode_change)
3666 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303667out:
3668 return ret;
3669}
3670EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3671
3672/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003673 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3674 * state) and waits for it to take effect.
3675 *
3676 * @hba: per adapter instance
3677 * @cmd: UIC command to execute
3678 *
3679 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3680 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3681 * and device UniPro link and hence it's final completion would be indicated by
3682 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3683 * addition to normal UIC command completion Status (UCCS). This function only
3684 * returns after the relevant status bits indicate the completion.
3685 *
3686 * Returns 0 on success, non-zero value on failure
3687 */
3688static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3689{
3690 struct completion uic_async_done;
3691 unsigned long flags;
3692 u8 status;
3693 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003694 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003695
3696 mutex_lock(&hba->uic_cmd_mutex);
3697 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003698 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003699
3700 spin_lock_irqsave(hba->host->host_lock, flags);
3701 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003702 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3703 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3704 /*
3705 * Make sure UIC command completion interrupt is disabled before
3706 * issuing UIC command.
3707 */
3708 wmb();
3709 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003710 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003711 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3712 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003713 if (ret) {
3714 dev_err(hba->dev,
3715 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3716 cmd->command, cmd->argument3, ret);
3717 goto out;
3718 }
3719
3720 if (!wait_for_completion_timeout(hba->uic_async_done,
3721 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3722 dev_err(hba->dev,
3723 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3724 cmd->command, cmd->argument3);
3725 ret = -ETIMEDOUT;
3726 goto out;
3727 }
3728
3729 status = ufshcd_get_upmcrs(hba);
3730 if (status != PWR_LOCAL) {
3731 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003732 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003733 cmd->command, status);
3734 ret = (status != PWR_OK) ? status : -1;
3735 }
3736out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003737 if (ret) {
3738 ufshcd_print_host_state(hba);
3739 ufshcd_print_pwr_info(hba);
3740 ufshcd_print_host_regs(hba);
3741 }
3742
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003743 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003744 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003745 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003746 if (reenable_intr)
3747 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003748 spin_unlock_irqrestore(hba->host->host_lock, flags);
3749 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003750
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003751 return ret;
3752}
3753
3754/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303755 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3756 * using DME_SET primitives.
3757 * @hba: per adapter instance
3758 * @mode: powr mode value
3759 *
3760 * Returns 0 on success, non-zero value on failure
3761 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303762static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303763{
3764 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003765 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303766
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003767 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3768 ret = ufshcd_dme_set(hba,
3769 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3770 if (ret) {
3771 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3772 __func__, ret);
3773 goto out;
3774 }
3775 }
3776
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303777 uic_cmd.command = UIC_CMD_DME_SET;
3778 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3779 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003780 ufshcd_hold(hba, false);
3781 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3782 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303783
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003784out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003785 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003786}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303787
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003788static int ufshcd_link_recovery(struct ufs_hba *hba)
3789{
3790 int ret;
3791 unsigned long flags;
3792
3793 spin_lock_irqsave(hba->host->host_lock, flags);
3794 hba->ufshcd_state = UFSHCD_STATE_RESET;
3795 ufshcd_set_eh_in_progress(hba);
3796 spin_unlock_irqrestore(hba->host->host_lock, flags);
3797
Can Guoebdd1df2019-11-14 22:09:24 -08003798 /* Reset the attached device */
3799 ufshcd_vops_device_reset(hba);
3800
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003801 ret = ufshcd_host_reset_and_restore(hba);
3802
3803 spin_lock_irqsave(hba->host->host_lock, flags);
3804 if (ret)
3805 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3806 ufshcd_clear_eh_in_progress(hba);
3807 spin_unlock_irqrestore(hba->host->host_lock, flags);
3808
3809 if (ret)
3810 dev_err(hba->dev, "%s: link recovery failed, err %d",
3811 __func__, ret);
3812
3813 return ret;
3814}
3815
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003816static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003817{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003818 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003819 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003820 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003821
Kiwoong Kimee32c902016-11-10 21:17:43 +09003822 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3823
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003824 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003825 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003826 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3827 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003828
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003829 if (ret) {
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003830 int err;
3831
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003832 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3833 __func__, ret);
3834
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003835 /*
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003836 * If link recovery fails then return error code returned from
3837 * ufshcd_link_recovery().
3838 * If link recovery succeeds then return -EAGAIN to attempt
3839 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003840 */
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003841 err = ufshcd_link_recovery(hba);
3842 if (err) {
3843 dev_err(hba->dev, "%s: link recovery failed", __func__);
3844 ret = err;
3845 } else {
3846 ret = -EAGAIN;
3847 }
Kiwoong Kimee32c902016-11-10 21:17:43 +09003848 } else
3849 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3850 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003851
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003852 return ret;
3853}
3854
3855static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3856{
3857 int ret = 0, retries;
3858
3859 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3860 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003861 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003862 goto out;
3863 }
3864out:
3865 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003866}
3867
3868static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3869{
3870 struct uic_command uic_cmd = {0};
3871 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003872 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003873
Kiwoong Kimee32c902016-11-10 21:17:43 +09003874 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3875
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003876 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3877 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003878 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3879 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3880
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303881 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003882 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3883 __func__, ret);
3884 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003885 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003886 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3887 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003888 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3889 hba->ufs_stats.hibern8_exit_cnt++;
3890 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303891
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303892 return ret;
3893}
3894
Stanley Chuba7af5e2019-12-30 13:32:28 +08003895void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
3896{
3897 unsigned long flags;
3898
3899 if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT))
3900 return;
3901
3902 spin_lock_irqsave(hba->host->host_lock, flags);
3903 if (hba->ahit == ahit)
3904 goto out_unlock;
3905 hba->ahit = ahit;
3906 if (!pm_runtime_suspended(hba->dev))
3907 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3908out_unlock:
3909 spin_unlock_irqrestore(hba->host->host_lock, flags);
3910}
3911EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
3912
Can Guo71d848b2019-11-14 22:09:26 -08003913void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003914{
3915 unsigned long flags;
3916
Stanley Chuee5f1042019-05-21 14:44:52 +08003917 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003918 return;
3919
3920 spin_lock_irqsave(hba->host->host_lock, flags);
3921 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3922 spin_unlock_irqrestore(hba->host->host_lock, flags);
3923}
3924
Yaniv Gardi50646362014-10-23 13:25:13 +03003925 /**
3926 * ufshcd_init_pwr_info - setting the POR (power on reset)
3927 * values in hba power info
3928 * @hba: per-adapter instance
3929 */
3930static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3931{
3932 hba->pwr_info.gear_rx = UFS_PWM_G1;
3933 hba->pwr_info.gear_tx = UFS_PWM_G1;
3934 hba->pwr_info.lane_rx = 1;
3935 hba->pwr_info.lane_tx = 1;
3936 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3937 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3938 hba->pwr_info.hs_rate = 0;
3939}
3940
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303941/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003942 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3943 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303944 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003945static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303946{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003947 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3948
3949 if (hba->max_pwr_info.is_valid)
3950 return 0;
3951
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003952 pwr_info->pwr_tx = FAST_MODE;
3953 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003954 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303955
3956 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003957 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3958 &pwr_info->lane_rx);
3959 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3960 &pwr_info->lane_tx);
3961
3962 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3963 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3964 __func__,
3965 pwr_info->lane_rx,
3966 pwr_info->lane_tx);
3967 return -EINVAL;
3968 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303969
3970 /*
3971 * First, get the maximum gears of HS speed.
3972 * If a zero value, it means there is no HSGEAR capability.
3973 * Then, get the maximum gears of PWM speed.
3974 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003975 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3976 if (!pwr_info->gear_rx) {
3977 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3978 &pwr_info->gear_rx);
3979 if (!pwr_info->gear_rx) {
3980 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3981 __func__, pwr_info->gear_rx);
3982 return -EINVAL;
3983 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003984 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303985 }
3986
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003987 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3988 &pwr_info->gear_tx);
3989 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303990 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003991 &pwr_info->gear_tx);
3992 if (!pwr_info->gear_tx) {
3993 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3994 __func__, pwr_info->gear_tx);
3995 return -EINVAL;
3996 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003997 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003998 }
3999
4000 hba->max_pwr_info.is_valid = true;
4001 return 0;
4002}
4003
4004static int ufshcd_change_power_mode(struct ufs_hba *hba,
4005 struct ufs_pa_layer_attr *pwr_mode)
4006{
4007 int ret;
4008
4009 /* if already configured to the requested pwr_mode */
4010 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4011 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4012 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4013 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4014 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4015 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4016 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4017 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4018 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304019 }
4020
4021 /*
4022 * Configure attributes for power mode change with below.
4023 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4024 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4025 * - PA_HSSERIES
4026 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004027 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4028 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4029 pwr_mode->lane_rx);
4030 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4031 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304032 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004033 else
4034 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304035
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004036 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4037 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4038 pwr_mode->lane_tx);
4039 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4040 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304041 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004042 else
4043 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304044
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004045 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4046 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4047 pwr_mode->pwr_rx == FAST_MODE ||
4048 pwr_mode->pwr_tx == FAST_MODE)
4049 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4050 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304051
Can Guo08342532019-12-05 02:14:42 +00004052 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4053 DL_FC0ProtectionTimeOutVal_Default);
4054 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4055 DL_TC0ReplayTimeOutVal_Default);
4056 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4057 DL_AFC0ReqTimeOutVal_Default);
4058 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4059 DL_FC1ProtectionTimeOutVal_Default);
4060 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4061 DL_TC1ReplayTimeOutVal_Default);
4062 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4063 DL_AFC1ReqTimeOutVal_Default);
4064
4065 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4066 DL_FC0ProtectionTimeOutVal_Default);
4067 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4068 DL_TC0ReplayTimeOutVal_Default);
4069 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4070 DL_AFC0ReqTimeOutVal_Default);
4071
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004072 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4073 | pwr_mode->pwr_tx);
4074
4075 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304076 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004077 "%s: power mode change failed %d\n", __func__, ret);
4078 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004079 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4080 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004081
4082 memcpy(&hba->pwr_info, pwr_mode,
4083 sizeof(struct ufs_pa_layer_attr));
4084 }
4085
4086 return ret;
4087}
4088
4089/**
4090 * ufshcd_config_pwr_mode - configure a new power mode
4091 * @hba: per-adapter instance
4092 * @desired_pwr_mode: desired power configuration
4093 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304094int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004095 struct ufs_pa_layer_attr *desired_pwr_mode)
4096{
4097 struct ufs_pa_layer_attr final_params = { 0 };
4098 int ret;
4099
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004100 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4101 desired_pwr_mode, &final_params);
4102
4103 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004104 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4105
4106 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004107 if (!ret)
4108 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304109
4110 return ret;
4111}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304112EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304113
4114/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304115 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004116 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304117 *
4118 * Set fDeviceInit flag and poll until device toggles it.
4119 */
4120static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4121{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004122 int i;
4123 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304124 bool flag_res = 1;
4125
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004126 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4127 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304128 if (err) {
4129 dev_err(hba->dev,
4130 "%s setting fDeviceInit flag failed with error %d\n",
4131 __func__, err);
4132 goto out;
4133 }
4134
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004135 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4136 for (i = 0; i < 1000 && !err && flag_res; i++)
4137 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4138 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4139
Dolev Raviv68078d52013-07-30 00:35:58 +05304140 if (err)
4141 dev_err(hba->dev,
4142 "%s reading fDeviceInit flag failed with error %d\n",
4143 __func__, err);
4144 else if (flag_res)
4145 dev_err(hba->dev,
4146 "%s fDeviceInit was not cleared by the device\n",
4147 __func__);
4148
4149out:
4150 return err;
4151}
4152
4153/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304154 * ufshcd_make_hba_operational - Make UFS controller operational
4155 * @hba: per adapter instance
4156 *
4157 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004158 * 1. Enable required interrupts
4159 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004160 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004161 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304162 *
4163 * Returns 0 on success, non-zero value on failure
4164 */
4165static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4166{
4167 int err = 0;
4168 u32 reg;
4169
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304170 /* Enable required interrupts */
4171 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4172
4173 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004174 if (ufshcd_is_intr_aggr_allowed(hba))
4175 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4176 else
4177 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304178
4179 /* Configure UTRL and UTMRL base address registers */
4180 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4181 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4182 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4183 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4184 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4185 REG_UTP_TASK_REQ_LIST_BASE_L);
4186 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4187 REG_UTP_TASK_REQ_LIST_BASE_H);
4188
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304189 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004190 * Make sure base address and interrupt setup are updated before
4191 * enabling the run/stop registers below.
4192 */
4193 wmb();
4194
4195 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304196 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304197 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004198 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304199 if (!(ufshcd_get_lists_status(reg))) {
4200 ufshcd_enable_run_stop_reg(hba);
4201 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304202 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304203 "Host controller not ready to process requests");
4204 err = -EIO;
4205 goto out;
4206 }
4207
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304208out:
4209 return err;
4210}
4211
4212/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004213 * ufshcd_hba_stop - Send controller to reset state
4214 * @hba: per adapter instance
4215 * @can_sleep: perform sleep or just spin
4216 */
4217static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4218{
4219 int err;
4220
4221 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4222 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4223 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4224 10, 1, can_sleep);
4225 if (err)
4226 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4227}
4228
4229/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304230 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304231 * @hba: per adapter instance
4232 *
4233 * The controller resets itself and controller firmware initialization
4234 * sequence kicks off. When controller is ready it will set
4235 * the Host Controller Enable bit to 1.
4236 *
4237 * Returns 0 on success, non-zero value on failure
4238 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304239static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304240{
4241 int retry;
4242
Yaniv Gardi596585a2016-03-10 17:37:08 +02004243 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304244 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004245 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304246
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004247 /* UniPro link is disabled at this point */
4248 ufshcd_set_link_off(hba);
4249
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004250 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004251
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304252 /* start controller initialization sequence */
4253 ufshcd_hba_start(hba);
4254
4255 /*
4256 * To initialize a UFS host controller HCE bit must be set to 1.
4257 * During initialization the HCE bit value changes from 1->0->1.
4258 * When the host controller completes initialization sequence
4259 * it sets the value of HCE bit to 1. The same HCE bit is read back
4260 * to check if the controller has completed initialization sequence.
4261 * So without this delay the value HCE = 1, set in the previous
4262 * instruction might be read back.
4263 * This delay can be changed based on the controller.
4264 */
Bean Huo838c1ef2019-07-15 11:21:10 +00004265 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304266
4267 /* wait for the host controller to complete initialization */
4268 retry = 10;
4269 while (ufshcd_is_hba_active(hba)) {
4270 if (retry) {
4271 retry--;
4272 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304273 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304274 "Controller enable failed\n");
4275 return -EIO;
4276 }
Bean Huo838c1ef2019-07-15 11:21:10 +00004277 usleep_range(5000, 5100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304278 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004279
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004280 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004281 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004282
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004283 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004284
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304285 return 0;
4286}
4287
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304288static int ufshcd_hba_enable(struct ufs_hba *hba)
4289{
4290 int ret;
4291
4292 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4293 ufshcd_set_link_off(hba);
4294 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4295
4296 /* enable UIC related interrupts */
4297 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4298 ret = ufshcd_dme_reset(hba);
4299 if (!ret) {
4300 ret = ufshcd_dme_enable(hba);
4301 if (!ret)
4302 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4303 if (ret)
4304 dev_err(hba->dev,
4305 "Host controller enable failed with non-hce\n");
4306 }
4307 } else {
4308 ret = ufshcd_hba_execute_hce(hba);
4309 }
4310
4311 return ret;
4312}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004313static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4314{
4315 int tx_lanes, i, err = 0;
4316
4317 if (!peer)
4318 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4319 &tx_lanes);
4320 else
4321 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4322 &tx_lanes);
4323 for (i = 0; i < tx_lanes; i++) {
4324 if (!peer)
4325 err = ufshcd_dme_set(hba,
4326 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4327 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4328 0);
4329 else
4330 err = ufshcd_dme_peer_set(hba,
4331 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4332 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4333 0);
4334 if (err) {
4335 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4336 __func__, peer, i, err);
4337 break;
4338 }
4339 }
4340
4341 return err;
4342}
4343
4344static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4345{
4346 return ufshcd_disable_tx_lcc(hba, true);
4347}
4348
Stanley Chua5fe372d2020-01-04 22:26:07 +08004349void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4350 u32 reg)
Stanley Chu8808b4e2019-07-10 21:38:21 +08004351{
4352 reg_hist->reg[reg_hist->pos] = reg;
4353 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4354 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4355}
Stanley Chua5fe372d2020-01-04 22:26:07 +08004356EXPORT_SYMBOL_GPL(ufshcd_update_reg_hist);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004357
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304358/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304359 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304360 * @hba: per adapter instance
4361 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304362 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304363 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304364static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304365{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304366 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004367 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004368 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304369
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004370 /*
4371 * If UFS device isn't active then we will have to issue link startup
4372 * 2 times to make sure the device state move to active.
4373 */
4374 if (!ufshcd_is_ufs_dev_active(hba))
4375 link_startup_again = true;
4376
4377link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004378 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004379 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304380
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004381 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004382
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004383 /* check if device is detected by inter-connect layer */
4384 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004385 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4386 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004387 dev_err(hba->dev, "%s: Device not present\n", __func__);
4388 ret = -ENXIO;
4389 goto out;
4390 }
4391
4392 /*
4393 * DME link lost indication is only received when link is up,
4394 * but we can't be sure if the link is up until link startup
4395 * succeeds. So reset the local Uni-Pro and try again.
4396 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004397 if (ret && ufshcd_hba_enable(hba)) {
4398 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4399 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004400 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004401 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004402 } while (ret && retries--);
4403
Stanley Chu8808b4e2019-07-10 21:38:21 +08004404 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004405 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004406 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4407 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304408 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004409 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304410
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004411 if (link_startup_again) {
4412 link_startup_again = false;
4413 retries = DME_LINKSTARTUP_RETRIES;
4414 goto link_startup;
4415 }
4416
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004417 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4418 ufshcd_init_pwr_info(hba);
4419 ufshcd_print_pwr_info(hba);
4420
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004421 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4422 ret = ufshcd_disable_device_tx_lcc(hba);
4423 if (ret)
4424 goto out;
4425 }
4426
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004427 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004428 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4429 if (ret)
4430 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004431
4432 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304433out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004434 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304435 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004436 ufshcd_print_host_state(hba);
4437 ufshcd_print_pwr_info(hba);
4438 ufshcd_print_host_regs(hba);
4439 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304440 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304441}
4442
4443/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304444 * ufshcd_verify_dev_init() - Verify device initialization
4445 * @hba: per-adapter instance
4446 *
4447 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4448 * device Transport Protocol (UTP) layer is ready after a reset.
4449 * If the UTP layer at the device side is not initialized, it may
4450 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4451 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4452 */
4453static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4454{
4455 int err = 0;
4456 int retries;
4457
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004458 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304459 mutex_lock(&hba->dev_cmd.lock);
4460 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4461 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4462 NOP_OUT_TIMEOUT);
4463
4464 if (!err || err == -ETIMEDOUT)
4465 break;
4466
4467 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4468 }
4469 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004470 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304471
4472 if (err)
4473 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4474 return err;
4475}
4476
4477/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004478 * ufshcd_set_queue_depth - set lun queue depth
4479 * @sdev: pointer to SCSI device
4480 *
4481 * Read bLUQueueDepth value and activate scsi tagged command
4482 * queueing. For WLUN, queue depth is set to 1. For best-effort
4483 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4484 * value that host can queue.
4485 */
4486static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4487{
4488 int ret = 0;
4489 u8 lun_qdepth;
4490 struct ufs_hba *hba;
4491
4492 hba = shost_priv(sdev->host);
4493
4494 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004495 ret = ufshcd_read_unit_desc_param(hba,
4496 ufshcd_scsi_to_upiu_lun(sdev->lun),
4497 UNIT_DESC_PARAM_LU_Q_DEPTH,
4498 &lun_qdepth,
4499 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004500
4501 /* Some WLUN doesn't support unit descriptor */
4502 if (ret == -EOPNOTSUPP)
4503 lun_qdepth = 1;
4504 else if (!lun_qdepth)
4505 /* eventually, we can figure out the real queue depth */
4506 lun_qdepth = hba->nutrs;
4507 else
4508 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4509
4510 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4511 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004512 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004513}
4514
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004515/*
4516 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4517 * @hba: per-adapter instance
4518 * @lun: UFS device lun id
4519 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4520 *
4521 * Returns 0 in case of success and b_lu_write_protect status would be returned
4522 * @b_lu_write_protect parameter.
4523 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4524 * Returns -EINVAL in case of invalid parameters passed to this function.
4525 */
4526static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4527 u8 lun,
4528 u8 *b_lu_write_protect)
4529{
4530 int ret;
4531
4532 if (!b_lu_write_protect)
4533 ret = -EINVAL;
4534 /*
4535 * According to UFS device spec, RPMB LU can't be write
4536 * protected so skip reading bLUWriteProtect parameter for
4537 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4538 */
4539 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4540 ret = -ENOTSUPP;
4541 else
4542 ret = ufshcd_read_unit_desc_param(hba,
4543 lun,
4544 UNIT_DESC_PARAM_LU_WR_PROTECT,
4545 b_lu_write_protect,
4546 sizeof(*b_lu_write_protect));
4547 return ret;
4548}
4549
4550/**
4551 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4552 * status
4553 * @hba: per-adapter instance
4554 * @sdev: pointer to SCSI device
4555 *
4556 */
4557static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4558 struct scsi_device *sdev)
4559{
4560 if (hba->dev_info.f_power_on_wp_en &&
4561 !hba->dev_info.is_lu_power_on_wp) {
4562 u8 b_lu_write_protect;
4563
4564 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4565 &b_lu_write_protect) &&
4566 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4567 hba->dev_info.is_lu_power_on_wp = true;
4568 }
4569}
4570
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004571/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304572 * ufshcd_slave_alloc - handle initial SCSI device configurations
4573 * @sdev: pointer to SCSI device
4574 *
4575 * Returns success
4576 */
4577static int ufshcd_slave_alloc(struct scsi_device *sdev)
4578{
4579 struct ufs_hba *hba;
4580
4581 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304582
4583 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4584 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304585
Can Guoa3a76392019-12-05 02:14:30 +00004586 /* DBD field should be set to 1 in mode sense(10) */
4587 sdev->set_dbd_for_ms = 1;
4588
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304589 /* allow SCSI layer to restart the device in case of errors */
4590 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004591
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004592 /* REPORT SUPPORTED OPERATION CODES is not supported */
4593 sdev->no_report_opcodes = 1;
4594
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304595 /* WRITE_SAME command is not supported */
4596 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004597
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004598 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004599
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004600 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4601
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004602 return 0;
4603}
4604
4605/**
4606 * ufshcd_change_queue_depth - change queue depth
4607 * @sdev: pointer to SCSI device
4608 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004609 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004610 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004611 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004612static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004613{
4614 struct ufs_hba *hba = shost_priv(sdev->host);
4615
4616 if (depth > hba->nutrs)
4617 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004618 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304619}
4620
4621/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004622 * ufshcd_slave_configure - adjust SCSI device configurations
4623 * @sdev: pointer to SCSI device
4624 */
4625static int ufshcd_slave_configure(struct scsi_device *sdev)
4626{
Stanley Chu49615ba2019-09-16 23:56:50 +08004627 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004628 struct request_queue *q = sdev->request_queue;
4629
4630 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004631
4632 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4633 sdev->rpm_autosuspend = 1;
4634
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004635 return 0;
4636}
4637
4638/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304639 * ufshcd_slave_destroy - remove SCSI device configurations
4640 * @sdev: pointer to SCSI device
4641 */
4642static void ufshcd_slave_destroy(struct scsi_device *sdev)
4643{
4644 struct ufs_hba *hba;
4645
4646 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004647 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004648 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4649 unsigned long flags;
4650
4651 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004652 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004653 spin_unlock_irqrestore(hba->host->host_lock, flags);
4654 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304655}
4656
4657/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304658 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004659 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304660 * @scsi_status: SCSI command status
4661 *
4662 * Returns value base on SCSI command status
4663 */
4664static inline int
4665ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4666{
4667 int result = 0;
4668
4669 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304670 case SAM_STAT_CHECK_CONDITION:
4671 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004672 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304673 case SAM_STAT_GOOD:
4674 result |= DID_OK << 16 |
4675 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304676 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304677 break;
4678 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304679 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304680 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304681 ufshcd_copy_sense_data(lrbp);
4682 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304683 break;
4684 default:
4685 result |= DID_ERROR << 16;
4686 break;
4687 } /* end of switch */
4688
4689 return result;
4690}
4691
4692/**
4693 * ufshcd_transfer_rsp_status - Get overall status of the response
4694 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004695 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304696 *
4697 * Returns result of the command to notify SCSI midlayer
4698 */
4699static inline int
4700ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4701{
4702 int result = 0;
4703 int scsi_status;
4704 int ocs;
4705
4706 /* overall command status of utrd */
4707 ocs = ufshcd_get_tr_ocs(lrbp);
4708
4709 switch (ocs) {
4710 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304711 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004712 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304713 switch (result) {
4714 case UPIU_TRANSACTION_RESPONSE:
4715 /*
4716 * get the response UPIU result to extract
4717 * the SCSI command status
4718 */
4719 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4720
4721 /*
4722 * get the result based on SCSI status response
4723 * to notify the SCSI midlayer of the command status
4724 */
4725 scsi_status = result & MASK_SCSI_STATUS;
4726 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304727
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004728 /*
4729 * Currently we are only supporting BKOPs exception
4730 * events hence we can ignore BKOPs exception event
4731 * during power management callbacks. BKOPs exception
4732 * event is not expected to be raised in runtime suspend
4733 * callback as it allows the urgent bkops.
4734 * During system suspend, we are anyway forcefully
4735 * disabling the bkops and if urgent bkops is needed
4736 * it will be enabled on system resume. Long term
4737 * solution could be to abort the system suspend if
4738 * UFS device needs urgent BKOPs.
4739 */
4740 if (!hba->pm_op_in_progress &&
4741 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304742 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304743 break;
4744 case UPIU_TRANSACTION_REJECT_UPIU:
4745 /* TODO: handle Reject UPIU Response */
4746 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304747 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304748 "Reject UPIU not fully implemented\n");
4749 break;
4750 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304751 dev_err(hba->dev,
4752 "Unexpected request response code = %x\n",
4753 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004754 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304755 break;
4756 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304757 break;
4758 case OCS_ABORTED:
4759 result |= DID_ABORT << 16;
4760 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304761 case OCS_INVALID_COMMAND_STATUS:
4762 result |= DID_REQUEUE << 16;
4763 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304764 case OCS_INVALID_CMD_TABLE_ATTR:
4765 case OCS_INVALID_PRDT_ATTR:
4766 case OCS_MISMATCH_DATA_BUF_SIZE:
4767 case OCS_MISMATCH_RESP_UPIU_SIZE:
4768 case OCS_PEER_COMM_FAILURE:
4769 case OCS_FATAL_ERROR:
4770 default:
4771 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304772 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004773 "OCS error from controller = %x for tag %d\n",
4774 ocs, lrbp->task_tag);
4775 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004776 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304777 break;
4778 } /* end of switch */
4779
Can Guo2df74b62019-11-25 22:53:33 -08004780 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08004781 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304782 return result;
4783}
4784
4785/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304786 * ufshcd_uic_cmd_compl - handle completion of uic command
4787 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304788 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004789 *
4790 * Returns
4791 * IRQ_HANDLED - If interrupt is valid
4792 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304793 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004794static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304795{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004796 irqreturn_t retval = IRQ_NONE;
4797
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304798 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304799 hba->active_uic_cmd->argument2 |=
4800 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304801 hba->active_uic_cmd->argument3 =
4802 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304803 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004804 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304805 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304806
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004807 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004808 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004809 retval = IRQ_HANDLED;
4810 }
4811 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304812}
4813
4814/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004815 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304816 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004817 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304818 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004819static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4820 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304821{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304822 struct ufshcd_lrb *lrbp;
4823 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304824 int result;
4825 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004826
Dolev Ravive9d501b2014-07-01 12:22:37 +03004827 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4828 lrbp = &hba->lrb[index];
4829 cmd = lrbp->cmd;
4830 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004831 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004832 result = ufshcd_transfer_rsp_status(hba, lrbp);
4833 scsi_dma_unmap(cmd);
4834 cmd->result = result;
4835 /* Mark completed command as NULL in LRB */
4836 lrbp->cmd = NULL;
Can Guo74a527a2019-11-25 22:53:32 -08004837 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004838 /* Do not touch lrbp after scsi done */
4839 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004840 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004841 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4842 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Can Guo74a527a2019-11-25 22:53:32 -08004843 lrbp->compl_time_stamp = ktime_get();
Lee Susman1a07f2d2016-12-22 18:42:03 -08004844 if (hba->dev_cmd.complete) {
4845 ufshcd_add_command_trace(hba, index,
4846 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004847 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004848 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004849 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004850 if (ufshcd_is_clkscaling_supported(hba))
4851 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004852 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304853
4854 /* clear corresponding bits of completed commands */
4855 hba->outstanding_reqs ^= completed_reqs;
4856
Sahitya Tummala856b3482014-09-25 15:32:34 +03004857 ufshcd_clk_scaling_update_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304858}
4859
4860/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004861 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4862 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004863 *
4864 * Returns
4865 * IRQ_HANDLED - If interrupt is valid
4866 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004867 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004868static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004869{
4870 unsigned long completed_reqs;
4871 u32 tr_doorbell;
4872
4873 /* Resetting interrupt aggregation counters first and reading the
4874 * DOOR_BELL afterward allows us to handle all the completed requests.
4875 * In order to prevent other interrupts starvation the DB is read once
4876 * after reset. The down side of this solution is the possibility of
4877 * false interrupt if device completes another request after resetting
4878 * aggregation and before reading the DB.
4879 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304880 if (ufshcd_is_intr_aggr_allowed(hba) &&
4881 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004882 ufshcd_reset_intr_aggr(hba);
4883
4884 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4885 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4886
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004887 if (completed_reqs) {
4888 __ufshcd_transfer_req_compl(hba, completed_reqs);
4889 return IRQ_HANDLED;
4890 } else {
4891 return IRQ_NONE;
4892 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004893}
4894
4895/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304896 * ufshcd_disable_ee - disable exception event
4897 * @hba: per-adapter instance
4898 * @mask: exception event to disable
4899 *
4900 * Disables exception event in the device so that the EVENT_ALERT
4901 * bit is not set.
4902 *
4903 * Returns zero on success, non-zero error value on failure.
4904 */
4905static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4906{
4907 int err = 0;
4908 u32 val;
4909
4910 if (!(hba->ee_ctrl_mask & mask))
4911 goto out;
4912
4913 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004914 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004915 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304916 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4917 if (!err)
4918 hba->ee_ctrl_mask &= ~mask;
4919out:
4920 return err;
4921}
4922
4923/**
4924 * ufshcd_enable_ee - enable exception event
4925 * @hba: per-adapter instance
4926 * @mask: exception event to enable
4927 *
4928 * Enable corresponding exception event in the device to allow
4929 * device to alert host in critical scenarios.
4930 *
4931 * Returns zero on success, non-zero error value on failure.
4932 */
4933static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4934{
4935 int err = 0;
4936 u32 val;
4937
4938 if (hba->ee_ctrl_mask & mask)
4939 goto out;
4940
4941 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004942 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004943 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304944 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4945 if (!err)
4946 hba->ee_ctrl_mask |= mask;
4947out:
4948 return err;
4949}
4950
4951/**
4952 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4953 * @hba: per-adapter instance
4954 *
4955 * Allow device to manage background operations on its own. Enabling
4956 * this might lead to inconsistent latencies during normal data transfers
4957 * as the device is allowed to manage its own way of handling background
4958 * operations.
4959 *
4960 * Returns zero on success, non-zero on failure.
4961 */
4962static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4963{
4964 int err = 0;
4965
4966 if (hba->auto_bkops_enabled)
4967 goto out;
4968
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004969 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304970 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4971 if (err) {
4972 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4973 __func__, err);
4974 goto out;
4975 }
4976
4977 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004978 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304979
4980 /* No need of URGENT_BKOPS exception from the device */
4981 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4982 if (err)
4983 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4984 __func__, err);
4985out:
4986 return err;
4987}
4988
4989/**
4990 * ufshcd_disable_auto_bkops - block device in doing background operations
4991 * @hba: per-adapter instance
4992 *
4993 * Disabling background operations improves command response latency but
4994 * has drawback of device moving into critical state where the device is
4995 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4996 * host is idle so that BKOPS are managed effectively without any negative
4997 * impacts.
4998 *
4999 * Returns zero on success, non-zero on failure.
5000 */
5001static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5002{
5003 int err = 0;
5004
5005 if (!hba->auto_bkops_enabled)
5006 goto out;
5007
5008 /*
5009 * If host assisted BKOPs is to be enabled, make sure
5010 * urgent bkops exception is allowed.
5011 */
5012 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5013 if (err) {
5014 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5015 __func__, err);
5016 goto out;
5017 }
5018
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005019 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305020 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5021 if (err) {
5022 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5023 __func__, err);
5024 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5025 goto out;
5026 }
5027
5028 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005029 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005030 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305031out:
5032 return err;
5033}
5034
5035/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005036 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305037 * @hba: per adapter instance
5038 *
5039 * After a device reset the device may toggle the BKOPS_EN flag
5040 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005041 * as well. This function would change the auto-bkops state based on
5042 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305043 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005044static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305045{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005046 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5047 hba->auto_bkops_enabled = false;
5048 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5049 ufshcd_enable_auto_bkops(hba);
5050 } else {
5051 hba->auto_bkops_enabled = true;
5052 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5053 ufshcd_disable_auto_bkops(hba);
5054 }
Asutosh Das24366c2a2019-11-25 22:53:30 -08005055 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305056}
5057
5058static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5059{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005060 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305061 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5062}
5063
5064/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005065 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5066 * @hba: per-adapter instance
5067 * @status: bkops_status value
5068 *
5069 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5070 * flag in the device to permit background operations if the device
5071 * bkops_status is greater than or equal to "status" argument passed to
5072 * this function, disable otherwise.
5073 *
5074 * Returns 0 for success, non-zero in case of failure.
5075 *
5076 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5077 * to know whether auto bkops is enabled or disabled after this function
5078 * returns control to it.
5079 */
5080static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5081 enum bkops_status status)
5082{
5083 int err;
5084 u32 curr_status = 0;
5085
5086 err = ufshcd_get_bkops_status(hba, &curr_status);
5087 if (err) {
5088 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5089 __func__, err);
5090 goto out;
5091 } else if (curr_status > BKOPS_STATUS_MAX) {
5092 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5093 __func__, curr_status);
5094 err = -EINVAL;
5095 goto out;
5096 }
5097
5098 if (curr_status >= status)
5099 err = ufshcd_enable_auto_bkops(hba);
5100 else
5101 err = ufshcd_disable_auto_bkops(hba);
Asutosh Das24366c2a2019-11-25 22:53:30 -08005102 hba->urgent_bkops_lvl = curr_status;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005103out:
5104 return err;
5105}
5106
5107/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305108 * ufshcd_urgent_bkops - handle urgent bkops exception event
5109 * @hba: per-adapter instance
5110 *
5111 * Enable fBackgroundOpsEn flag in the device to permit background
5112 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005113 *
5114 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5115 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305116 */
5117static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5118{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005119 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305120}
5121
5122static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5123{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005124 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305125 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5126}
5127
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005128static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5129{
5130 int err;
5131 u32 curr_status = 0;
5132
5133 if (hba->is_urgent_bkops_lvl_checked)
5134 goto enable_auto_bkops;
5135
5136 err = ufshcd_get_bkops_status(hba, &curr_status);
5137 if (err) {
5138 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5139 __func__, err);
5140 goto out;
5141 }
5142
5143 /*
5144 * We are seeing that some devices are raising the urgent bkops
5145 * exception events even when BKOPS status doesn't indicate performace
5146 * impacted or critical. Handle these device by determining their urgent
5147 * bkops status at runtime.
5148 */
5149 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5150 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5151 __func__, curr_status);
5152 /* update the current status as the urgent bkops level */
5153 hba->urgent_bkops_lvl = curr_status;
5154 hba->is_urgent_bkops_lvl_checked = true;
5155 }
5156
5157enable_auto_bkops:
5158 err = ufshcd_enable_auto_bkops(hba);
5159out:
5160 if (err < 0)
5161 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5162 __func__, err);
5163}
5164
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305165/**
5166 * ufshcd_exception_event_handler - handle exceptions raised by device
5167 * @work: pointer to work data
5168 *
5169 * Read bExceptionEventStatus attribute from the device and handle the
5170 * exception event accordingly.
5171 */
5172static void ufshcd_exception_event_handler(struct work_struct *work)
5173{
5174 struct ufs_hba *hba;
5175 int err;
5176 u32 status = 0;
5177 hba = container_of(work, struct ufs_hba, eeh_work);
5178
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305179 pm_runtime_get_sync(hba->dev);
Stanley Chu03e1d282019-12-24 21:01:05 +08005180 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305181 err = ufshcd_get_ee_status(hba, &status);
5182 if (err) {
5183 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5184 __func__, err);
5185 goto out;
5186 }
5187
5188 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005189
5190 if (status & MASK_EE_URGENT_BKOPS)
5191 ufshcd_bkops_exception_event_handler(hba);
5192
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305193out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005194 ufshcd_scsi_unblock_requests(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305195 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305196 return;
5197}
5198
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005199/* Complete requests that have door-bell cleared */
5200static void ufshcd_complete_requests(struct ufs_hba *hba)
5201{
5202 ufshcd_transfer_req_compl(hba);
5203 ufshcd_tmc_handler(hba);
5204}
5205
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305206/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005207 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5208 * to recover from the DL NAC errors or not.
5209 * @hba: per-adapter instance
5210 *
5211 * Returns true if error handling is required, false otherwise
5212 */
5213static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5214{
5215 unsigned long flags;
5216 bool err_handling = true;
5217
5218 spin_lock_irqsave(hba->host->host_lock, flags);
5219 /*
5220 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5221 * device fatal error and/or DL NAC & REPLAY timeout errors.
5222 */
5223 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5224 goto out;
5225
5226 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5227 ((hba->saved_err & UIC_ERROR) &&
5228 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5229 goto out;
5230
5231 if ((hba->saved_err & UIC_ERROR) &&
5232 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5233 int err;
5234 /*
5235 * wait for 50ms to see if we can get any other errors or not.
5236 */
5237 spin_unlock_irqrestore(hba->host->host_lock, flags);
5238 msleep(50);
5239 spin_lock_irqsave(hba->host->host_lock, flags);
5240
5241 /*
5242 * now check if we have got any other severe errors other than
5243 * DL NAC error?
5244 */
5245 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5246 ((hba->saved_err & UIC_ERROR) &&
5247 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5248 goto out;
5249
5250 /*
5251 * As DL NAC is the only error received so far, send out NOP
5252 * command to confirm if link is still active or not.
5253 * - If we don't get any response then do error recovery.
5254 * - If we get response then clear the DL NAC error bit.
5255 */
5256
5257 spin_unlock_irqrestore(hba->host->host_lock, flags);
5258 err = ufshcd_verify_dev_init(hba);
5259 spin_lock_irqsave(hba->host->host_lock, flags);
5260
5261 if (err)
5262 goto out;
5263
5264 /* Link seems to be alive hence ignore the DL NAC errors */
5265 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5266 hba->saved_err &= ~UIC_ERROR;
5267 /* clear NAC error */
5268 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5269 if (!hba->saved_uic_err) {
5270 err_handling = false;
5271 goto out;
5272 }
5273 }
5274out:
5275 spin_unlock_irqrestore(hba->host->host_lock, flags);
5276 return err_handling;
5277}
5278
5279/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305280 * ufshcd_err_handler - handle UFS errors that require s/w attention
5281 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305282 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305283static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305284{
5285 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305286 unsigned long flags;
5287 u32 err_xfer = 0;
5288 u32 err_tm = 0;
5289 int err = 0;
5290 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005291 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305292
5293 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305294
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305295 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005296 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305297
5298 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005299 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305300 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305301
5302 hba->ufshcd_state = UFSHCD_STATE_RESET;
5303 ufshcd_set_eh_in_progress(hba);
5304
5305 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005306 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005307
5308 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5309 bool ret;
5310
5311 spin_unlock_irqrestore(hba->host->host_lock, flags);
5312 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5313 ret = ufshcd_quirk_dl_nac_errors(hba);
5314 spin_lock_irqsave(hba->host->host_lock, flags);
5315 if (!ret)
5316 goto skip_err_handling;
5317 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005318 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005319 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005320 ((hba->saved_err & UIC_ERROR) &&
5321 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5322 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5323 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5324 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305325
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005326 /*
5327 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08005328 * transfers forcefully because they will get cleared during
5329 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005330 */
5331 if (needs_reset)
5332 goto skip_pending_xfer_clear;
5333
5334 /* release lock as clear command might sleep */
5335 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305336 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005337 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5338 if (ufshcd_clear_cmd(hba, tag)) {
5339 err_xfer = true;
5340 goto lock_skip_pending_xfer_clear;
5341 }
5342 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305343
5344 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005345 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5346 if (ufshcd_clear_tm_cmd(hba, tag)) {
5347 err_tm = true;
5348 goto lock_skip_pending_xfer_clear;
5349 }
5350 }
5351
5352lock_skip_pending_xfer_clear:
5353 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305354
5355 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005356 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305357
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005358 if (err_xfer || err_tm)
5359 needs_reset = true;
5360
5361skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305362 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005363 if (needs_reset) {
5364 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5365
5366 /*
5367 * ufshcd_reset_and_restore() does the link reinitialization
5368 * which will need atleast one empty doorbell slot to send the
5369 * device management commands (NOP and query commands).
5370 * If there is no slot empty at this moment then free up last
5371 * slot forcefully.
5372 */
5373 if (hba->outstanding_reqs == max_doorbells)
5374 __ufshcd_transfer_req_compl(hba,
5375 (1UL << (hba->nutrs - 1)));
5376
5377 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305378 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005379 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305380 if (err) {
5381 dev_err(hba->dev, "%s: reset and restore failed\n",
5382 __func__);
5383 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5384 }
5385 /*
5386 * Inform scsi mid-layer that we did reset and allow to handle
5387 * Unit Attention properly.
5388 */
5389 scsi_report_bus_reset(hba->host, 0);
5390 hba->saved_err = 0;
5391 hba->saved_uic_err = 0;
5392 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005393
Yaniv Gardi583fa622016-03-10 17:37:13 +02005394skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005395 if (!needs_reset) {
5396 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5397 if (hba->saved_err || hba->saved_uic_err)
5398 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5399 __func__, hba->saved_err, hba->saved_uic_err);
5400 }
5401
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305402 ufshcd_clear_eh_in_progress(hba);
5403
5404out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005405 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305406 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005407 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305408 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305409}
5410
5411/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305412 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5413 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005414 *
5415 * Returns
5416 * IRQ_HANDLED - If interrupt is valid
5417 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305418 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005419static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305420{
5421 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005422 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305423
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005424 /* PHY layer lane error */
5425 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5426 /* Ignore LINERESET indication, as this is not an error */
5427 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005428 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005429 /*
5430 * To know whether this error is fatal or not, DB timeout
5431 * must be checked but this error is handled separately.
5432 */
5433 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005434 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005435 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005436 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005437
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305438 /* PA_INIT_ERROR is fatal and needs UIC reset */
5439 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005440 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5441 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005442 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005443
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005444 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5445 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5446 else if (hba->dev_quirks &
5447 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5448 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5449 hba->uic_error |=
5450 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5451 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5452 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5453 }
5454 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005455 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305456
5457 /* UIC NL/TL/DME errors needs software retry */
5458 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005459 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5460 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005461 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305462 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005463 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005464 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305465
5466 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005467 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5468 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005469 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305470 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005471 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005472 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305473
5474 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005475 if ((reg & UIC_DME_ERROR) &&
5476 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005477 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305478 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005479 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005480 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305481
5482 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5483 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005484 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305485}
5486
Stanley Chu82174442019-05-21 14:44:54 +08005487static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5488 u32 intr_mask)
5489{
5490 if (!ufshcd_is_auto_hibern8_supported(hba))
5491 return false;
5492
5493 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5494 return false;
5495
5496 if (hba->active_uic_cmd &&
5497 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5498 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5499 return false;
5500
5501 return true;
5502}
5503
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305504/**
5505 * ufshcd_check_errors - Check for errors that need s/w attention
5506 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005507 *
5508 * Returns
5509 * IRQ_HANDLED - If interrupt is valid
5510 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305511 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005512static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305513{
5514 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005515 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305516
Stanley Chud3c615b2019-07-10 21:38:19 +08005517 if (hba->errors & INT_FATAL_ERRORS) {
5518 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305519 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005520 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305521
5522 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305523 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005524 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305525 if (hba->uic_error)
5526 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305527 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305528
Stanley Chu82174442019-05-21 14:44:54 +08005529 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5530 dev_err(hba->dev,
5531 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5532 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5533 "Enter" : "Exit",
5534 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005535 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5536 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005537 queue_eh_work = true;
5538 }
5539
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305540 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005541 /*
5542 * update the transfer error masks to sticky bits, let's do this
5543 * irrespective of current ufshcd_state.
5544 */
5545 hba->saved_err |= hba->errors;
5546 hba->saved_uic_err |= hba->uic_error;
5547
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305548 /* handle fatal errors only when link is functional */
5549 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5550 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305551 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305552
Zang Leigang141f8162016-11-16 11:29:37 +08005553 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005554
5555 /* dump controller state before resetting */
5556 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5557 bool pr_prdt = !!(hba->saved_err &
5558 SYSTEM_BUS_FATAL_ERROR);
5559
5560 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5561 __func__, hba->saved_err,
5562 hba->saved_uic_err);
5563
5564 ufshcd_print_host_regs(hba);
5565 ufshcd_print_pwr_info(hba);
5566 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5567 ufshcd_print_trs(hba, hba->outstanding_reqs,
5568 pr_prdt);
5569 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305570 schedule_work(&hba->eh_work);
5571 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005572 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305573 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305574 /*
5575 * if (!queue_eh_work) -
5576 * Other errors are either non-fatal where host recovers
5577 * itself without s/w intervention or errors that will be
5578 * handled by the SCSI core layer.
5579 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005580 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305581}
5582
Bart Van Assche69a6c262019-12-09 10:13:09 -08005583struct ctm_info {
5584 struct ufs_hba *hba;
5585 unsigned long pending;
5586 unsigned int ncpl;
5587};
5588
5589static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
5590{
5591 struct ctm_info *const ci = priv;
5592 struct completion *c;
5593
5594 WARN_ON_ONCE(reserved);
5595 if (test_bit(req->tag, &ci->pending))
5596 return true;
5597 ci->ncpl++;
5598 c = req->end_io_data;
5599 if (c)
5600 complete(c);
5601 return true;
5602}
5603
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305604/**
5605 * ufshcd_tmc_handler - handle task management function completion
5606 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005607 *
5608 * Returns
5609 * IRQ_HANDLED - If interrupt is valid
5610 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305611 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005612static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305613{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005614 struct request_queue *q = hba->tmf_queue;
5615 struct ctm_info ci = {
5616 .hba = hba,
5617 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
5618 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305619
Bart Van Assche69a6c262019-12-09 10:13:09 -08005620 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
5621 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305622}
5623
5624/**
5625 * ufshcd_sl_intr - Interrupt service routine
5626 * @hba: per adapter instance
5627 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005628 *
5629 * Returns
5630 * IRQ_HANDLED - If interrupt is valid
5631 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305632 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005633static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305634{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005635 irqreturn_t retval = IRQ_NONE;
5636
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305637 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005638
5639 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5640 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5641
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305642 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005643 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305644
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305645 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005646 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305647
5648 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005649 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305650
5651 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005652 retval |= ufshcd_transfer_req_compl(hba);
5653
5654 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305655}
5656
5657/**
5658 * ufshcd_intr - Main interrupt service routine
5659 * @irq: irq number
5660 * @__hba: pointer to adapter instance
5661 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005662 * Returns
5663 * IRQ_HANDLED - If interrupt is valid
5664 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305665 */
5666static irqreturn_t ufshcd_intr(int irq, void *__hba)
5667{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005668 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305669 irqreturn_t retval = IRQ_NONE;
5670 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305671 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305672
5673 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305674 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305675
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305676 /*
5677 * There could be max of hba->nutrs reqs in flight and in worst case
5678 * if the reqs get finished 1 by 1 after the interrupt status is
5679 * read, make sure we handle them by checking the interrupt status
5680 * again in a loop until we process all of the reqs before returning.
5681 */
5682 do {
5683 enabled_intr_status =
5684 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5685 if (intr_status)
5686 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005687 if (enabled_intr_status)
5688 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005689
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305690 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5691 } while (intr_status && --retries);
5692
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005693 if (retval == IRQ_NONE) {
5694 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5695 __func__, intr_status);
5696 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5697 }
5698
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305699 spin_unlock(hba->host->host_lock);
5700 return retval;
5701}
5702
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305703static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5704{
5705 int err = 0;
5706 u32 mask = 1 << tag;
5707 unsigned long flags;
5708
5709 if (!test_bit(tag, &hba->outstanding_tasks))
5710 goto out;
5711
5712 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305713 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305714 spin_unlock_irqrestore(hba->host->host_lock, flags);
5715
5716 /* poll for max. 1 sec to clear door bell register by h/w */
5717 err = ufshcd_wait_for_register(hba,
5718 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005719 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305720out:
5721 return err;
5722}
5723
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005724static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5725 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305726{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005727 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005728 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08005729 DECLARE_COMPLETION_ONSTACK(wait);
5730 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305731 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005732 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305733
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305734 /*
5735 * Get free slot, sleep if slots are unavailable.
5736 * Even though we use wait_event() which sleeps indefinitely,
5737 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5738 */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005739 req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
5740 req->end_io_data = &wait;
5741 free_slot = req->tag;
5742 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005743 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305744
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305745 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305746 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305747
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005748 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5749
5750 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005751 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5752
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305753 /* send command to the controller */
5754 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005755
5756 /* Make sure descriptors are ready before ringing the task doorbell */
5757 wmb();
5758
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305759 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005760 /* Make sure that doorbell is committed immediately */
5761 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305762
5763 spin_unlock_irqrestore(host->host_lock, flags);
5764
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005765 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5766
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305767 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005768 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305769 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305770 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08005771 /*
5772 * Make sure that ufshcd_compl_tm() does not trigger a
5773 * use-after-free.
5774 */
5775 req->end_io_data = NULL;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005776 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305777 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5778 __func__, tm_function);
5779 if (ufshcd_clear_tm_cmd(hba, free_slot))
5780 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5781 __func__, free_slot);
5782 err = -ETIMEDOUT;
5783 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005784 err = 0;
5785 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5786
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005787 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305788 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305789
Stanley Chub5572172019-08-19 21:43:28 +08005790 spin_lock_irqsave(hba->host->host_lock, flags);
5791 __clear_bit(free_slot, &hba->outstanding_tasks);
5792 spin_unlock_irqrestore(hba->host->host_lock, flags);
5793
Bart Van Assche69a6c262019-12-09 10:13:09 -08005794 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305795
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005796 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305797 return err;
5798}
5799
5800/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005801 * ufshcd_issue_tm_cmd - issues task management commands to controller
5802 * @hba: per adapter instance
5803 * @lun_id: LUN ID to which TM command is sent
5804 * @task_id: task ID to which the TM command is applicable
5805 * @tm_function: task management function opcode
5806 * @tm_response: task management service response return value
5807 *
5808 * Returns non-zero value on error, zero on success.
5809 */
5810static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5811 u8 tm_function, u8 *tm_response)
5812{
5813 struct utp_task_req_desc treq = { { 0 }, };
5814 int ocs_value, err;
5815
5816 /* Configure task request descriptor */
5817 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5818 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5819
5820 /* Configure task request UPIU */
5821 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5822 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5823 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5824
5825 /*
5826 * The host shall provide the same value for LUN field in the basic
5827 * header and for Input Parameter.
5828 */
5829 treq.input_param1 = cpu_to_be32(lun_id);
5830 treq.input_param2 = cpu_to_be32(task_id);
5831
5832 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5833 if (err == -ETIMEDOUT)
5834 return err;
5835
5836 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5837 if (ocs_value != OCS_SUCCESS)
5838 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5839 __func__, ocs_value);
5840 else if (tm_response)
5841 *tm_response = be32_to_cpu(treq.output_param1) &
5842 MASK_TM_SERVICE_RESP;
5843 return err;
5844}
5845
5846/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005847 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5848 * @hba: per-adapter instance
5849 * @req_upiu: upiu request
5850 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03005851 * @desc_buff: pointer to descriptor buffer, NULL if NA
5852 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07005853 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03005854 * @desc_op: descriptor operation
5855 *
5856 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5857 * Therefore, it "rides" the device management infrastructure: uses its tag and
5858 * tasks work queues.
5859 *
5860 * Since there is only one available tag for device management commands,
5861 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5862 */
5863static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5864 struct utp_upiu_req *req_upiu,
5865 struct utp_upiu_req *rsp_upiu,
5866 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07005867 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03005868 enum query_opcode desc_op)
5869{
Bart Van Assche7252a362019-12-09 10:13:08 -08005870 struct request_queue *q = hba->cmd_queue;
5871 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005872 struct ufshcd_lrb *lrbp;
5873 int err = 0;
5874 int tag;
5875 struct completion wait;
5876 unsigned long flags;
5877 u32 upiu_flags;
5878
5879 down_read(&hba->clk_scaling_lock);
5880
Bart Van Assche7252a362019-12-09 10:13:08 -08005881 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03005882 if (IS_ERR(req)) {
5883 err = PTR_ERR(req);
5884 goto out_unlock;
5885 }
Bart Van Assche7252a362019-12-09 10:13:08 -08005886 tag = req->tag;
5887 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Avri Altman5e0a86e2018-10-07 17:30:37 +03005888
5889 init_completion(&wait);
5890 lrbp = &hba->lrb[tag];
5891 WARN_ON(lrbp->cmd);
5892
5893 lrbp->cmd = NULL;
5894 lrbp->sense_bufflen = 0;
5895 lrbp->sense_buffer = NULL;
5896 lrbp->task_tag = tag;
5897 lrbp->lun = 0;
5898 lrbp->intr_cmd = true;
5899 hba->dev_cmd.type = cmd_type;
5900
5901 switch (hba->ufs_version) {
5902 case UFSHCI_VERSION_10:
5903 case UFSHCI_VERSION_11:
5904 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5905 break;
5906 default:
5907 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5908 break;
5909 }
5910
5911 /* update the task tag in the request upiu */
5912 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5913
5914 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5915
5916 /* just copy the upiu request as it is */
5917 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5918 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5919 /* The Data Segment Area is optional depending upon the query
5920 * function value. for WRITE DESCRIPTOR, the data segment
5921 * follows right after the tsf.
5922 */
5923 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5924 *buff_len = 0;
5925 }
5926
5927 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5928
5929 hba->dev_cmd.complete = &wait;
5930
5931 /* Make sure descriptors are ready before ringing the doorbell */
5932 wmb();
5933 spin_lock_irqsave(hba->host->host_lock, flags);
5934 ufshcd_send_command(hba, tag);
5935 spin_unlock_irqrestore(hba->host->host_lock, flags);
5936
5937 /*
5938 * ignore the returning value here - ufshcd_check_query_response is
5939 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5940 * read the response directly ignoring all errors.
5941 */
5942 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5943
5944 /* just copy the upiu response as it is */
5945 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02005946 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5947 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5948 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5949 MASK_QUERY_DATA_SEG_LEN;
5950
5951 if (*buff_len >= resp_len) {
5952 memcpy(desc_buff, descp, resp_len);
5953 *buff_len = resp_len;
5954 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01005955 dev_warn(hba->dev,
5956 "%s: rsp size %d is bigger than buffer size %d",
5957 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02005958 *buff_len = 0;
5959 err = -EINVAL;
5960 }
5961 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03005962
Bart Van Assche7252a362019-12-09 10:13:08 -08005963 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03005964out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03005965 up_read(&hba->clk_scaling_lock);
5966 return err;
5967}
5968
5969/**
5970 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5971 * @hba: per-adapter instance
5972 * @req_upiu: upiu request
5973 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5974 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5975 * @desc_buff: pointer to descriptor buffer, NULL if NA
5976 * @buff_len: descriptor size, 0 if NA
5977 * @desc_op: descriptor operation
5978 *
5979 * Supports UTP Transfer requests (nop and query), and UTP Task
5980 * Management requests.
5981 * It is up to the caller to fill the upiu conent properly, as it will
5982 * be copied without any further input validations.
5983 */
5984int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5985 struct utp_upiu_req *req_upiu,
5986 struct utp_upiu_req *rsp_upiu,
5987 int msgcode,
5988 u8 *desc_buff, int *buff_len,
5989 enum query_opcode desc_op)
5990{
5991 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07005992 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005993 struct utp_task_req_desc treq = { { 0 }, };
5994 int ocs_value;
5995 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5996
Avri Altman5e0a86e2018-10-07 17:30:37 +03005997 switch (msgcode) {
5998 case UPIU_TRANSACTION_NOP_OUT:
5999 cmd_type = DEV_CMD_TYPE_NOP;
6000 /* fall through */
6001 case UPIU_TRANSACTION_QUERY_REQ:
6002 ufshcd_hold(hba, false);
6003 mutex_lock(&hba->dev_cmd.lock);
6004 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6005 desc_buff, buff_len,
6006 cmd_type, desc_op);
6007 mutex_unlock(&hba->dev_cmd.lock);
6008 ufshcd_release(hba);
6009
6010 break;
6011 case UPIU_TRANSACTION_TASK_REQ:
6012 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6013 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6014
6015 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
6016
6017 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6018 if (err == -ETIMEDOUT)
6019 break;
6020
6021 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6022 if (ocs_value != OCS_SUCCESS) {
6023 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6024 ocs_value);
6025 break;
6026 }
6027
6028 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6029
6030 break;
6031 default:
6032 err = -EINVAL;
6033
6034 break;
6035 }
6036
Avri Altman5e0a86e2018-10-07 17:30:37 +03006037 return err;
6038}
6039
6040/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306041 * ufshcd_eh_device_reset_handler - device reset handler registered to
6042 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306043 * @cmd: SCSI command pointer
6044 *
6045 * Returns SUCCESS/FAILED
6046 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306047static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306048{
6049 struct Scsi_Host *host;
6050 struct ufs_hba *hba;
6051 unsigned int tag;
6052 u32 pos;
6053 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306054 u8 resp = 0xF;
6055 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306056 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306057
6058 host = cmd->device->host;
6059 hba = shost_priv(host);
6060 tag = cmd->request->tag;
6061
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306062 lrbp = &hba->lrb[tag];
6063 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6064 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306065 if (!err)
6066 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306067 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306068 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306069
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306070 /* clear the commands that were pending for corresponding LUN */
6071 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6072 if (hba->lrb[pos].lun == lrbp->lun) {
6073 err = ufshcd_clear_cmd(hba, pos);
6074 if (err)
6075 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306076 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306077 }
6078 spin_lock_irqsave(host->host_lock, flags);
6079 ufshcd_transfer_req_compl(hba);
6080 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006081
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306082out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006083 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006084 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306085 if (!err) {
6086 err = SUCCESS;
6087 } else {
6088 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6089 err = FAILED;
6090 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306091 return err;
6092}
6093
Gilad Bronere0b299e2017-02-03 16:56:40 -08006094static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6095{
6096 struct ufshcd_lrb *lrbp;
6097 int tag;
6098
6099 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6100 lrbp = &hba->lrb[tag];
6101 lrbp->req_abort_skip = true;
6102 }
6103}
6104
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306105/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306106 * ufshcd_abort - abort a specific command
6107 * @cmd: SCSI command pointer
6108 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306109 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6110 * command, and in host controller by clearing the door-bell register. There can
6111 * be race between controller sending the command to the device while abort is
6112 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6113 * really issued and then try to abort it.
6114 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306115 * Returns SUCCESS/FAILED
6116 */
6117static int ufshcd_abort(struct scsi_cmnd *cmd)
6118{
6119 struct Scsi_Host *host;
6120 struct ufs_hba *hba;
6121 unsigned long flags;
6122 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306123 int err = 0;
6124 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306125 u8 resp = 0xF;
6126 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006127 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306128
6129 host = cmd->device->host;
6130 hba = shost_priv(host);
6131 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006132 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006133 if (!ufshcd_valid_tag(hba, tag)) {
6134 dev_err(hba->dev,
6135 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6136 __func__, tag, cmd, cmd->request);
6137 BUG();
6138 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306139
Dolev Ravive7d38252016-12-22 18:40:07 -08006140 /*
6141 * Task abort to the device W-LUN is illegal. When this command
6142 * will fail, due to spec violation, scsi err handling next step
6143 * will be to send LU reset which, again, is a spec violation.
6144 * To avoid these unnecessary/illegal step we skip to the last error
6145 * handling stage: reset and restore.
6146 */
6147 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6148 return ufshcd_eh_host_reset_handler(cmd);
6149
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006150 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006151 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006152 /* If command is already aborted/completed, return SUCCESS */
6153 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6154 dev_err(hba->dev,
6155 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6156 __func__, tag, hba->outstanding_reqs, reg);
6157 goto out;
6158 }
6159
Dolev Ravive9d501b2014-07-01 12:22:37 +03006160 if (!(reg & (1 << tag))) {
6161 dev_err(hba->dev,
6162 "%s: cmd was completed, but without a notifying intr, tag = %d",
6163 __func__, tag);
6164 }
6165
Dolev Raviv66cc8202016-12-22 18:39:42 -08006166 /* Print Transfer Request of aborted task */
6167 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006168
Gilad Broner7fabb772017-02-03 16:56:50 -08006169 /*
6170 * Print detailed info about aborted request.
6171 * As more than one request might get aborted at the same time,
6172 * print full information only for the first aborted request in order
6173 * to reduce repeated printouts. For other aborted requests only print
6174 * basic details.
6175 */
6176 scsi_print_command(hba->lrb[tag].cmd);
6177 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006178 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006179 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006180 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006181 ufshcd_print_pwr_info(hba);
6182 ufshcd_print_trs(hba, 1 << tag, true);
6183 } else {
6184 ufshcd_print_trs(hba, 1 << tag, false);
6185 }
6186 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006187
6188 /* Skip task abort in case previous aborts failed and report failure */
6189 if (lrbp->req_abort_skip) {
6190 err = -EIO;
6191 goto out;
6192 }
6193
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306194 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6195 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6196 UFS_QUERY_TASK, &resp);
6197 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6198 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006199 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6200 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306201 break;
6202 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306203 /*
6204 * cmd not pending in the device, check if it is
6205 * in transition.
6206 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006207 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6208 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306209 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6210 if (reg & (1 << tag)) {
6211 /* sleep for max. 200us to stabilize */
6212 usleep_range(100, 200);
6213 continue;
6214 }
6215 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006216 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6217 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306218 goto out;
6219 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006220 dev_err(hba->dev,
6221 "%s: no response from device. tag = %d, err %d\n",
6222 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306223 if (!err)
6224 err = resp; /* service response error */
6225 goto out;
6226 }
6227 }
6228
6229 if (!poll_cnt) {
6230 err = -EBUSY;
6231 goto out;
6232 }
6233
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306234 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6235 UFS_ABORT_TASK, &resp);
6236 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006237 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306238 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006239 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6240 __func__, tag, err);
6241 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306242 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306243 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306244
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306245 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006246 if (err) {
6247 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6248 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306249 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006250 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306251
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306252 scsi_dma_unmap(cmd);
6253
6254 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006255 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306256 hba->lrb[tag].cmd = NULL;
6257 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306258
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306259out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306260 if (!err) {
6261 err = SUCCESS;
6262 } else {
6263 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006264 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306265 err = FAILED;
6266 }
6267
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006268 /*
6269 * This ufshcd_release() corresponds to the original scsi cmd that got
6270 * aborted here (as we won't get any IRQ for it).
6271 */
6272 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306273 return err;
6274}
6275
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306276/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306277 * ufshcd_host_reset_and_restore - reset and restore host controller
6278 * @hba: per-adapter instance
6279 *
6280 * Note that host controller reset may issue DME_RESET to
6281 * local and remote (device) Uni-Pro stack and the attributes
6282 * are reset to default state.
6283 *
6284 * Returns zero on success, non-zero on failure
6285 */
6286static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6287{
6288 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306289 unsigned long flags;
6290
Can Guo2df74b62019-11-25 22:53:33 -08006291 /*
6292 * Stop the host controller and complete the requests
6293 * cleared by h/w
6294 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306295 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006296 ufshcd_hba_stop(hba, false);
Can Guo2df74b62019-11-25 22:53:33 -08006297 hba->silence_err_logs = true;
6298 ufshcd_complete_requests(hba);
6299 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306300 spin_unlock_irqrestore(hba->host->host_lock, flags);
6301
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006302 /* scale up clocks to max frequency before full reinitialization */
6303 ufshcd_scale_clks(hba, true);
6304
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306305 err = ufshcd_hba_enable(hba);
6306 if (err)
6307 goto out;
6308
6309 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006310 err = ufshcd_probe_hba(hba);
6311
6312 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306313 err = -EIO;
6314out:
6315 if (err)
6316 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006317 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306318 return err;
6319}
6320
6321/**
6322 * ufshcd_reset_and_restore - reset and re-initialize host/device
6323 * @hba: per-adapter instance
6324 *
6325 * Reset and recover device, host and re-establish link. This
6326 * is helpful to recover the communication in fatal error conditions.
6327 *
6328 * Returns zero on success, non-zero on failure
6329 */
6330static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6331{
6332 int err = 0;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006333 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306334
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006335 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006336 /* Reset the attached device */
6337 ufshcd_vops_device_reset(hba);
6338
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006339 err = ufshcd_host_reset_and_restore(hba);
6340 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306341
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306342 return err;
6343}
6344
6345/**
6346 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006347 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306348 *
6349 * Returns SUCCESS/FAILED
6350 */
6351static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6352{
6353 int err;
6354 unsigned long flags;
6355 struct ufs_hba *hba;
6356
6357 hba = shost_priv(cmd->device->host);
6358
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006359 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306360 /*
6361 * Check if there is any race with fatal error handling.
6362 * If so, wait for it to complete. Even though fatal error
6363 * handling does reset and restore in some cases, don't assume
6364 * anything out of it. We are just avoiding race here.
6365 */
6366 do {
6367 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306368 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006369 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6370 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306371 break;
6372 spin_unlock_irqrestore(hba->host->host_lock, flags);
6373 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306374 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306375 } while (1);
6376
6377 hba->ufshcd_state = UFSHCD_STATE_RESET;
6378 ufshcd_set_eh_in_progress(hba);
6379 spin_unlock_irqrestore(hba->host->host_lock, flags);
6380
6381 err = ufshcd_reset_and_restore(hba);
6382
6383 spin_lock_irqsave(hba->host->host_lock, flags);
6384 if (!err) {
6385 err = SUCCESS;
6386 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6387 } else {
6388 err = FAILED;
6389 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6390 }
6391 ufshcd_clear_eh_in_progress(hba);
6392 spin_unlock_irqrestore(hba->host->host_lock, flags);
6393
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006394 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306395 return err;
6396}
6397
6398/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006399 * ufshcd_get_max_icc_level - calculate the ICC level
6400 * @sup_curr_uA: max. current supported by the regulator
6401 * @start_scan: row at the desc table to start scan from
6402 * @buff: power descriptor buffer
6403 *
6404 * Returns calculated max ICC level for specific regulator
6405 */
6406static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6407{
6408 int i;
6409 int curr_uA;
6410 u16 data;
6411 u16 unit;
6412
6413 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006414 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006415 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6416 ATTR_ICC_LVL_UNIT_OFFSET;
6417 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6418 switch (unit) {
6419 case UFSHCD_NANO_AMP:
6420 curr_uA = curr_uA / 1000;
6421 break;
6422 case UFSHCD_MILI_AMP:
6423 curr_uA = curr_uA * 1000;
6424 break;
6425 case UFSHCD_AMP:
6426 curr_uA = curr_uA * 1000 * 1000;
6427 break;
6428 case UFSHCD_MICRO_AMP:
6429 default:
6430 break;
6431 }
6432 if (sup_curr_uA >= curr_uA)
6433 break;
6434 }
6435 if (i < 0) {
6436 i = 0;
6437 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6438 }
6439
6440 return (u32)i;
6441}
6442
6443/**
6444 * ufshcd_calc_icc_level - calculate the max ICC level
6445 * In case regulators are not initialized we'll return 0
6446 * @hba: per-adapter instance
6447 * @desc_buf: power descriptor buffer to extract ICC levels from.
6448 * @len: length of desc_buff
6449 *
6450 * Returns calculated ICC level
6451 */
6452static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6453 u8 *desc_buf, int len)
6454{
6455 u32 icc_level = 0;
6456
6457 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6458 !hba->vreg_info.vccq2) {
6459 dev_err(hba->dev,
6460 "%s: Regulator capability was not set, actvIccLevel=%d",
6461 __func__, icc_level);
6462 goto out;
6463 }
6464
Stanley Chu0487fff2019-03-28 17:16:25 +08006465 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006466 icc_level = ufshcd_get_max_icc_level(
6467 hba->vreg_info.vcc->max_uA,
6468 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6469 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6470
Stanley Chu0487fff2019-03-28 17:16:25 +08006471 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006472 icc_level = ufshcd_get_max_icc_level(
6473 hba->vreg_info.vccq->max_uA,
6474 icc_level,
6475 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6476
Stanley Chu0487fff2019-03-28 17:16:25 +08006477 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006478 icc_level = ufshcd_get_max_icc_level(
6479 hba->vreg_info.vccq2->max_uA,
6480 icc_level,
6481 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6482out:
6483 return icc_level;
6484}
6485
6486static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6487{
6488 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006489 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006490 u8 *desc_buf;
6491
6492 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6493 if (!desc_buf)
6494 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006495
6496 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6497 if (ret) {
6498 dev_err(hba->dev,
6499 "%s: Failed reading power descriptor.len = %d ret = %d",
6500 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006501 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006502 }
6503
6504 hba->init_prefetch_data.icc_level =
6505 ufshcd_find_max_sup_active_icc_level(hba,
6506 desc_buf, buff_len);
6507 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6508 __func__, hba->init_prefetch_data.icc_level);
6509
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006510 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6511 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6512 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006513
6514 if (ret)
6515 dev_err(hba->dev,
6516 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6517 __func__, hba->init_prefetch_data.icc_level , ret);
6518
Kees Cookbbe21d72018-05-02 16:58:09 -07006519out:
6520 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006521}
6522
6523/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006524 * ufshcd_scsi_add_wlus - Adds required W-LUs
6525 * @hba: per-adapter instance
6526 *
6527 * UFS device specification requires the UFS devices to support 4 well known
6528 * logical units:
6529 * "REPORT_LUNS" (address: 01h)
6530 * "UFS Device" (address: 50h)
6531 * "RPMB" (address: 44h)
6532 * "BOOT" (address: 30h)
6533 * UFS device's power management needs to be controlled by "POWER CONDITION"
6534 * field of SSU (START STOP UNIT) command. But this "power condition" field
6535 * will take effect only when its sent to "UFS device" well known logical unit
6536 * hence we require the scsi_device instance to represent this logical unit in
6537 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006538 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006539 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6540 * Block) LU so user space process can control this LU. User space may also
6541 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006542 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006543 * This function adds scsi device instances for each of all well known LUs
6544 * (except "REPORT LUNS" LU).
6545 *
6546 * Returns zero on success (all required W-LUs are added successfully),
6547 * non-zero error value on failure (if failed to add any of the required W-LU).
6548 */
6549static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6550{
6551 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006552 struct scsi_device *sdev_rpmb;
6553 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006554
6555 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6556 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6557 if (IS_ERR(hba->sdev_ufs_device)) {
6558 ret = PTR_ERR(hba->sdev_ufs_device);
6559 hba->sdev_ufs_device = NULL;
6560 goto out;
6561 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006562 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006563
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006564 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006565 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006566 if (IS_ERR(sdev_rpmb)) {
6567 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006568 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006569 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006570 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006571
6572 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6573 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6574 if (IS_ERR(sdev_boot))
6575 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6576 else
6577 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006578 goto out;
6579
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006580remove_sdev_ufs_device:
6581 scsi_remove_device(hba->sdev_ufs_device);
6582out:
6583 return ret;
6584}
6585
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006586static int ufs_get_device_desc(struct ufs_hba *hba,
6587 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006588{
6589 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006590 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006591 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006592 u8 *desc_buf;
6593
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006594 if (!dev_desc)
6595 return -EINVAL;
6596
Kees Cookbbe21d72018-05-02 16:58:09 -07006597 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6598 QUERY_DESC_MAX_SIZE + 1);
6599 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6600 if (!desc_buf) {
6601 err = -ENOMEM;
6602 goto out;
6603 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006604
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006605 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006606 if (err) {
6607 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6608 __func__, err);
6609 goto out;
6610 }
6611
6612 /*
6613 * getting vendor (manufacturerID) and Bank Index in big endian
6614 * format
6615 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006616 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006617 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6618
6619 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006620 err = ufshcd_read_string_desc(hba, model_index,
6621 &dev_desc->model, SD_ASCII_STD);
6622 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006623 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6624 __func__, err);
6625 goto out;
6626 }
6627
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006628 /*
6629 * ufshcd_read_string_desc returns size of the string
6630 * reset the error value
6631 */
6632 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006633
6634out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006635 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006636 return err;
6637}
6638
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006639static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc)
6640{
6641 kfree(dev_desc->model);
6642 dev_desc->model = NULL;
6643}
6644
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006645static void ufs_fixup_device_setup(struct ufs_hba *hba,
6646 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006647{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006648 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006649
6650 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006651 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6652 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006653 ((dev_desc->model &&
6654 STR_PRFX_EQUAL(f->card.model, dev_desc->model)) ||
6655 !strcmp(f->card.model, UFS_ANY_MODEL)))
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006656 hba->dev_quirks |= f->quirk;
6657 }
6658}
6659
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006660/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006661 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6662 * @hba: per-adapter instance
6663 *
6664 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6665 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6666 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6667 * the hibern8 exit latency.
6668 *
6669 * Returns zero on success, non-zero error value on failure.
6670 */
6671static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6672{
6673 int ret = 0;
6674 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6675
6676 ret = ufshcd_dme_peer_get(hba,
6677 UIC_ARG_MIB_SEL(
6678 RX_MIN_ACTIVATETIME_CAPABILITY,
6679 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6680 &peer_rx_min_activatetime);
6681 if (ret)
6682 goto out;
6683
6684 /* make sure proper unit conversion is applied */
6685 tuned_pa_tactivate =
6686 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6687 / PA_TACTIVATE_TIME_UNIT_US);
6688 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6689 tuned_pa_tactivate);
6690
6691out:
6692 return ret;
6693}
6694
6695/**
6696 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6697 * @hba: per-adapter instance
6698 *
6699 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6700 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6701 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6702 * This optimal value can help reduce the hibern8 exit latency.
6703 *
6704 * Returns zero on success, non-zero error value on failure.
6705 */
6706static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6707{
6708 int ret = 0;
6709 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6710 u32 max_hibern8_time, tuned_pa_hibern8time;
6711
6712 ret = ufshcd_dme_get(hba,
6713 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6714 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6715 &local_tx_hibern8_time_cap);
6716 if (ret)
6717 goto out;
6718
6719 ret = ufshcd_dme_peer_get(hba,
6720 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6721 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6722 &peer_rx_hibern8_time_cap);
6723 if (ret)
6724 goto out;
6725
6726 max_hibern8_time = max(local_tx_hibern8_time_cap,
6727 peer_rx_hibern8_time_cap);
6728 /* make sure proper unit conversion is applied */
6729 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6730 / PA_HIBERN8_TIME_UNIT_US);
6731 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6732 tuned_pa_hibern8time);
6733out:
6734 return ret;
6735}
6736
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006737/**
6738 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6739 * less than device PA_TACTIVATE time.
6740 * @hba: per-adapter instance
6741 *
6742 * Some UFS devices require host PA_TACTIVATE to be lower than device
6743 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6744 * for such devices.
6745 *
6746 * Returns zero on success, non-zero error value on failure.
6747 */
6748static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6749{
6750 int ret = 0;
6751 u32 granularity, peer_granularity;
6752 u32 pa_tactivate, peer_pa_tactivate;
6753 u32 pa_tactivate_us, peer_pa_tactivate_us;
6754 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6755
6756 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6757 &granularity);
6758 if (ret)
6759 goto out;
6760
6761 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6762 &peer_granularity);
6763 if (ret)
6764 goto out;
6765
6766 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6767 (granularity > PA_GRANULARITY_MAX_VAL)) {
6768 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6769 __func__, granularity);
6770 return -EINVAL;
6771 }
6772
6773 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6774 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6775 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6776 __func__, peer_granularity);
6777 return -EINVAL;
6778 }
6779
6780 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6781 if (ret)
6782 goto out;
6783
6784 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6785 &peer_pa_tactivate);
6786 if (ret)
6787 goto out;
6788
6789 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6790 peer_pa_tactivate_us = peer_pa_tactivate *
6791 gran_to_us_table[peer_granularity - 1];
6792
6793 if (pa_tactivate_us > peer_pa_tactivate_us) {
6794 u32 new_peer_pa_tactivate;
6795
6796 new_peer_pa_tactivate = pa_tactivate_us /
6797 gran_to_us_table[peer_granularity - 1];
6798 new_peer_pa_tactivate++;
6799 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6800 new_peer_pa_tactivate);
6801 }
6802
6803out:
6804 return ret;
6805}
6806
Yaniv Gardi37113102016-03-10 17:37:16 +02006807static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6808{
6809 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6810 ufshcd_tune_pa_tactivate(hba);
6811 ufshcd_tune_pa_hibern8time(hba);
6812 }
6813
6814 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6815 /* set 1ms timeout for PA_TACTIVATE */
6816 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006817
6818 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6819 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006820
6821 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006822}
6823
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006824static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6825{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006826 hba->ufs_stats.hibern8_exit_cnt = 0;
6827 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006828 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006829}
6830
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006831static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6832{
6833 int err;
6834
6835 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6836 &hba->desc_size.dev_desc);
6837 if (err)
6838 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6839
6840 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6841 &hba->desc_size.pwr_desc);
6842 if (err)
6843 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6844
6845 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6846 &hba->desc_size.interc_desc);
6847 if (err)
6848 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6849
6850 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6851 &hba->desc_size.conf_desc);
6852 if (err)
6853 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6854
6855 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6856 &hba->desc_size.unit_desc);
6857 if (err)
6858 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6859
6860 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6861 &hba->desc_size.geom_desc);
6862 if (err)
6863 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00006864
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006865 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6866 &hba->desc_size.hlth_desc);
6867 if (err)
6868 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006869}
6870
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306871static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6872 {19200000, REF_CLK_FREQ_19_2_MHZ},
6873 {26000000, REF_CLK_FREQ_26_MHZ},
6874 {38400000, REF_CLK_FREQ_38_4_MHZ},
6875 {52000000, REF_CLK_FREQ_52_MHZ},
6876 {0, REF_CLK_FREQ_INVAL},
6877};
6878
6879static enum ufs_ref_clk_freq
6880ufs_get_bref_clk_from_hz(unsigned long freq)
6881{
6882 int i;
6883
6884 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6885 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6886 return ufs_ref_clk_freqs[i].val;
6887
6888 return REF_CLK_FREQ_INVAL;
6889}
6890
6891void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6892{
6893 unsigned long freq;
6894
6895 freq = clk_get_rate(refclk);
6896
6897 hba->dev_ref_clk_freq =
6898 ufs_get_bref_clk_from_hz(freq);
6899
6900 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6901 dev_err(hba->dev,
6902 "invalid ref_clk setting = %ld\n", freq);
6903}
6904
6905static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6906{
6907 int err;
6908 u32 ref_clk;
6909 u32 freq = hba->dev_ref_clk_freq;
6910
6911 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6912 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6913
6914 if (err) {
6915 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6916 err);
6917 goto out;
6918 }
6919
6920 if (ref_clk == freq)
6921 goto out; /* nothing to update */
6922
6923 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6924 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6925
6926 if (err) {
6927 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6928 ufs_ref_clk_freqs[freq].freq_hz);
6929 goto out;
6930 }
6931
6932 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6933 ufs_ref_clk_freqs[freq].freq_hz);
6934
6935out:
6936 return err;
6937}
6938
Yaniv Gardi37113102016-03-10 17:37:16 +02006939/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006940 * ufshcd_probe_hba - probe hba to detect device and initialize
6941 * @hba: per-adapter instance
6942 *
6943 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306944 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006945static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306946{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006947 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306948 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006949 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306950
6951 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306952 if (ret)
6953 goto out;
6954
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006955 /* set the default level for urgent bkops */
6956 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6957 hba->is_urgent_bkops_lvl_checked = false;
6958
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006959 /* Debug counters initialization */
6960 ufshcd_clear_dbg_ufs_stats(hba);
6961
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006962 /* UniPro link is active now */
6963 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306964
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306965 ret = ufshcd_verify_dev_init(hba);
6966 if (ret)
6967 goto out;
6968
Dolev Raviv68078d52013-07-30 00:35:58 +05306969 ret = ufshcd_complete_dev_init(hba);
6970 if (ret)
6971 goto out;
6972
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006973 /* Init check for device descriptor sizes */
6974 ufshcd_init_desc_sizes(hba);
6975
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006976 ret = ufs_get_device_desc(hba, &card);
6977 if (ret) {
6978 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6979 __func__, ret);
6980 goto out;
6981 }
6982
6983 ufs_fixup_device_setup(hba, &card);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006984 ufs_put_device_desc(&card);
6985
Yaniv Gardi37113102016-03-10 17:37:16 +02006986 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006987
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006988 /* UFS device is also active now */
6989 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306990 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006991 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306992
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006993 if (ufshcd_get_max_pwr_mode(hba)) {
6994 dev_err(hba->dev,
6995 "%s: Failed getting max supported power mode\n",
6996 __func__);
6997 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306998 /*
6999 * Set the right value to bRefClkFreq before attempting to
7000 * switch to HS gears.
7001 */
7002 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
7003 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007004 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007005 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007006 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
7007 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007008 goto out;
7009 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007010 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007011
Yaniv Gardi53c12d02016-02-01 15:02:45 +02007012 /* set the state as operational after switching to desired gear */
7013 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007014
Can Guo71d848b2019-11-14 22:09:26 -08007015 /* Enable Auto-Hibernate if configured */
7016 ufshcd_auto_hibern8_enable(hba);
7017
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007018 /*
7019 * If we are in error handling context or in power management callbacks
7020 * context, no need to scan the host
7021 */
7022 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7023 bool flag;
7024
7025 /* clear any previous UFS device information */
7026 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02007027 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7028 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007029 hba->dev_info.f_power_on_wp_en = flag;
7030
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007031 if (!hba->is_init_prefetch)
7032 ufshcd_init_icc_levels(hba);
7033
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007034 /* Add required well known logical units to scsi mid layer */
7035 if (ufshcd_scsi_add_wlus(hba))
7036 goto out;
7037
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007038 /* Initialize devfreq after UFS device is detected */
7039 if (ufshcd_is_clkscaling_supported(hba)) {
7040 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7041 &hba->pwr_info,
7042 sizeof(struct ufs_pa_layer_attr));
7043 hba->clk_scaling.saved_pwr_info.is_valid = true;
7044 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07007045 ret = ufshcd_devfreq_init(hba);
7046 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007047 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007048 }
7049 hba->clk_scaling.is_allowed = true;
7050 }
7051
Avri Altmandf032bf2018-10-07 17:30:35 +03007052 ufs_bsg_probe(hba);
7053
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307054 scsi_scan_host(hba->host);
7055 pm_runtime_put_sync(hba->dev);
7056 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007057
7058 if (!hba->is_init_prefetch)
7059 hba->is_init_prefetch = true;
7060
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307061out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007062 /*
7063 * If we failed to initialize the device or the device is not
7064 * present, turn off the power/clocks etc.
7065 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007066 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7067 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05307068 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007069 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007070 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007071
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007072 trace_ufshcd_init(dev_name(hba->dev), ret,
7073 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007074 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007075 return ret;
7076}
7077
7078/**
7079 * ufshcd_async_scan - asynchronous execution for probing hba
7080 * @data: data pointer to pass to this function
7081 * @cookie: cookie data
7082 */
7083static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7084{
7085 struct ufs_hba *hba = (struct ufs_hba *)data;
7086
7087 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307088}
7089
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007090static const struct attribute_group *ufshcd_driver_groups[] = {
7091 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007092 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007093 NULL,
7094};
7095
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307096static struct scsi_host_template ufshcd_driver_template = {
7097 .module = THIS_MODULE,
7098 .name = UFSHCD,
7099 .proc_name = UFSHCD,
7100 .queuecommand = ufshcd_queuecommand,
7101 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007102 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307103 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007104 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307105 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307106 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7107 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307108 .this_id = -1,
7109 .sg_tablesize = SG_ALL,
7110 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7111 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007112 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007113 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007114 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007115 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007116 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007117 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307118};
7119
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007120static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7121 int ua)
7122{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007123 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007124
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007125 if (!vreg)
7126 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007127
Stanley Chu0487fff2019-03-28 17:16:25 +08007128 /*
7129 * "set_load" operation shall be required on those regulators
7130 * which specifically configured current limitation. Otherwise
7131 * zero max_uA may cause unexpected behavior when regulator is
7132 * enabled or set as high power mode.
7133 */
7134 if (!vreg->max_uA)
7135 return 0;
7136
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007137 ret = regulator_set_load(vreg->reg, ua);
7138 if (ret < 0) {
7139 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7140 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007141 }
7142
7143 return ret;
7144}
7145
7146static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7147 struct ufs_vreg *vreg)
7148{
Marc Gonzalez73067982019-02-27 11:41:45 +01007149 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007150}
7151
7152static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7153 struct ufs_vreg *vreg)
7154{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007155 if (!vreg)
7156 return 0;
7157
Marc Gonzalez73067982019-02-27 11:41:45 +01007158 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007159}
7160
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007161static int ufshcd_config_vreg(struct device *dev,
7162 struct ufs_vreg *vreg, bool on)
7163{
7164 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007165 struct regulator *reg;
7166 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007167 int min_uV, uA_load;
7168
7169 BUG_ON(!vreg);
7170
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007171 reg = vreg->reg;
7172 name = vreg->name;
7173
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007174 if (regulator_count_voltages(reg) > 0) {
Stanley Chu3b141e82019-03-28 17:16:24 +08007175 if (vreg->min_uV && vreg->max_uV) {
7176 min_uV = on ? vreg->min_uV : 0;
7177 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7178 if (ret) {
7179 dev_err(dev,
7180 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007181 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007182 goto out;
7183 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007184 }
7185
7186 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007187 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7188 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007189 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007190 }
7191out:
7192 return ret;
7193}
7194
7195static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7196{
7197 int ret = 0;
7198
Marc Gonzalez73067982019-02-27 11:41:45 +01007199 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007200 goto out;
7201
7202 ret = ufshcd_config_vreg(dev, vreg, true);
7203 if (!ret)
7204 ret = regulator_enable(vreg->reg);
7205
7206 if (!ret)
7207 vreg->enabled = true;
7208 else
7209 dev_err(dev, "%s: %s enable failed, err=%d\n",
7210 __func__, vreg->name, ret);
7211out:
7212 return ret;
7213}
7214
7215static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7216{
7217 int ret = 0;
7218
Marc Gonzalez73067982019-02-27 11:41:45 +01007219 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007220 goto out;
7221
7222 ret = regulator_disable(vreg->reg);
7223
7224 if (!ret) {
7225 /* ignore errors on applying disable config */
7226 ufshcd_config_vreg(dev, vreg, false);
7227 vreg->enabled = false;
7228 } else {
7229 dev_err(dev, "%s: %s disable failed, err=%d\n",
7230 __func__, vreg->name, ret);
7231 }
7232out:
7233 return ret;
7234}
7235
7236static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7237{
7238 int ret = 0;
7239 struct device *dev = hba->dev;
7240 struct ufs_vreg_info *info = &hba->vreg_info;
7241
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007242 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7243 if (ret)
7244 goto out;
7245
7246 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7247 if (ret)
7248 goto out;
7249
7250 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7251 if (ret)
7252 goto out;
7253
7254out:
7255 if (ret) {
7256 ufshcd_toggle_vreg(dev, info->vccq2, false);
7257 ufshcd_toggle_vreg(dev, info->vccq, false);
7258 ufshcd_toggle_vreg(dev, info->vcc, false);
7259 }
7260 return ret;
7261}
7262
Raviv Shvili6a771a62014-09-25 15:32:24 +03007263static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7264{
7265 struct ufs_vreg_info *info = &hba->vreg_info;
7266
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007267 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007268}
7269
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007270static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7271{
7272 int ret = 0;
7273
7274 if (!vreg)
7275 goto out;
7276
7277 vreg->reg = devm_regulator_get(dev, vreg->name);
7278 if (IS_ERR(vreg->reg)) {
7279 ret = PTR_ERR(vreg->reg);
7280 dev_err(dev, "%s: %s get failed, err=%d\n",
7281 __func__, vreg->name, ret);
7282 }
7283out:
7284 return ret;
7285}
7286
7287static int ufshcd_init_vreg(struct ufs_hba *hba)
7288{
7289 int ret = 0;
7290 struct device *dev = hba->dev;
7291 struct ufs_vreg_info *info = &hba->vreg_info;
7292
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007293 ret = ufshcd_get_vreg(dev, info->vcc);
7294 if (ret)
7295 goto out;
7296
7297 ret = ufshcd_get_vreg(dev, info->vccq);
7298 if (ret)
7299 goto out;
7300
7301 ret = ufshcd_get_vreg(dev, info->vccq2);
7302out:
7303 return ret;
7304}
7305
Raviv Shvili6a771a62014-09-25 15:32:24 +03007306static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7307{
7308 struct ufs_vreg_info *info = &hba->vreg_info;
7309
7310 if (info)
7311 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7312
7313 return 0;
7314}
7315
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007316static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7317 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007318{
7319 int ret = 0;
7320 struct ufs_clk_info *clki;
7321 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007322 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007323 ktime_t start = ktime_get();
7324 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007325
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007326 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007327 goto out;
7328
Subhash Jadavanib3344562018-05-03 16:37:17 +05307329 /*
7330 * vendor specific setup_clocks ops may depend on clocks managed by
7331 * this standard driver hence call the vendor specific setup_clocks
7332 * before disabling the clocks managed here.
7333 */
7334 if (!on) {
7335 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7336 if (ret)
7337 return ret;
7338 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007339
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007340 list_for_each_entry(clki, head, list) {
7341 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007342 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7343 continue;
7344
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007345 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007346 if (on && !clki->enabled) {
7347 ret = clk_prepare_enable(clki->clk);
7348 if (ret) {
7349 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7350 __func__, clki->name, ret);
7351 goto out;
7352 }
7353 } else if (!on && clki->enabled) {
7354 clk_disable_unprepare(clki->clk);
7355 }
7356 clki->enabled = on;
7357 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7358 clki->name, on ? "en" : "dis");
7359 }
7360 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007361
Subhash Jadavanib3344562018-05-03 16:37:17 +05307362 /*
7363 * vendor specific setup_clocks ops may depend on clocks managed by
7364 * this standard driver hence call the vendor specific setup_clocks
7365 * after enabling the clocks managed here.
7366 */
7367 if (on) {
7368 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7369 if (ret)
7370 return ret;
7371 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007372
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007373out:
7374 if (ret) {
7375 list_for_each_entry(clki, head, list) {
7376 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7377 clk_disable_unprepare(clki->clk);
7378 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007379 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007380 spin_lock_irqsave(hba->host->host_lock, flags);
7381 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007382 trace_ufshcd_clk_gating(dev_name(hba->dev),
7383 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007384 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007385 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007386
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007387 if (clk_state_changed)
7388 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7389 (on ? "on" : "off"),
7390 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007391 return ret;
7392}
7393
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007394static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7395{
7396 return __ufshcd_setup_clocks(hba, on, false);
7397}
7398
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007399static int ufshcd_init_clocks(struct ufs_hba *hba)
7400{
7401 int ret = 0;
7402 struct ufs_clk_info *clki;
7403 struct device *dev = hba->dev;
7404 struct list_head *head = &hba->clk_list_head;
7405
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007406 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007407 goto out;
7408
7409 list_for_each_entry(clki, head, list) {
7410 if (!clki->name)
7411 continue;
7412
7413 clki->clk = devm_clk_get(dev, clki->name);
7414 if (IS_ERR(clki->clk)) {
7415 ret = PTR_ERR(clki->clk);
7416 dev_err(dev, "%s: %s clk get failed, %d\n",
7417 __func__, clki->name, ret);
7418 goto out;
7419 }
7420
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307421 /*
7422 * Parse device ref clk freq as per device tree "ref_clk".
7423 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7424 * in ufshcd_alloc_host().
7425 */
7426 if (!strcmp(clki->name, "ref_clk"))
7427 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7428
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007429 if (clki->max_freq) {
7430 ret = clk_set_rate(clki->clk, clki->max_freq);
7431 if (ret) {
7432 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7433 __func__, clki->name,
7434 clki->max_freq, ret);
7435 goto out;
7436 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007437 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007438 }
7439 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7440 clki->name, clk_get_rate(clki->clk));
7441 }
7442out:
7443 return ret;
7444}
7445
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007446static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7447{
7448 int err = 0;
7449
7450 if (!hba->vops)
7451 goto out;
7452
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007453 err = ufshcd_vops_init(hba);
7454 if (err)
7455 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007456
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007457 err = ufshcd_vops_setup_regulators(hba, true);
7458 if (err)
7459 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007460
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007461 goto out;
7462
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007463out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007464 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007465out:
7466 if (err)
7467 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007468 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007469 return err;
7470}
7471
7472static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7473{
7474 if (!hba->vops)
7475 return;
7476
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007477 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007478
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007479 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007480}
7481
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007482static int ufshcd_hba_init(struct ufs_hba *hba)
7483{
7484 int err;
7485
Raviv Shvili6a771a62014-09-25 15:32:24 +03007486 /*
7487 * Handle host controller power separately from the UFS device power
7488 * rails as it will help controlling the UFS host controller power
7489 * collapse easily which is different than UFS device power collapse.
7490 * Also, enable the host controller power before we go ahead with rest
7491 * of the initialization here.
7492 */
7493 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007494 if (err)
7495 goto out;
7496
Raviv Shvili6a771a62014-09-25 15:32:24 +03007497 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007498 if (err)
7499 goto out;
7500
Raviv Shvili6a771a62014-09-25 15:32:24 +03007501 err = ufshcd_init_clocks(hba);
7502 if (err)
7503 goto out_disable_hba_vreg;
7504
7505 err = ufshcd_setup_clocks(hba, true);
7506 if (err)
7507 goto out_disable_hba_vreg;
7508
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007509 err = ufshcd_init_vreg(hba);
7510 if (err)
7511 goto out_disable_clks;
7512
7513 err = ufshcd_setup_vreg(hba, true);
7514 if (err)
7515 goto out_disable_clks;
7516
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007517 err = ufshcd_variant_hba_init(hba);
7518 if (err)
7519 goto out_disable_vreg;
7520
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007521 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007522 goto out;
7523
7524out_disable_vreg:
7525 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007526out_disable_clks:
7527 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007528out_disable_hba_vreg:
7529 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007530out:
7531 return err;
7532}
7533
7534static void ufshcd_hba_exit(struct ufs_hba *hba)
7535{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007536 if (hba->is_powered) {
7537 ufshcd_variant_hba_exit(hba);
7538 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007539 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307540 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007541 if (hba->devfreq)
7542 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007543 ufshcd_setup_clocks(hba, false);
7544 ufshcd_setup_hba_vreg(hba, false);
7545 hba->is_powered = false;
7546 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007547}
7548
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007549static int
7550ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307551{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007552 unsigned char cmd[6] = {REQUEST_SENSE,
7553 0,
7554 0,
7555 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007556 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007557 0};
7558 char *buffer;
7559 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307560
Avri Altman09a5a242018-11-22 20:04:56 +02007561 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007562 if (!buffer) {
7563 ret = -ENOMEM;
7564 goto out;
7565 }
7566
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007567 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007568 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007569 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007570 if (ret)
7571 pr_err("%s: failed with err %d\n", __func__, ret);
7572
7573 kfree(buffer);
7574out:
7575 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307576}
7577
7578/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007579 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7580 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307581 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007582 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307583 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007584 * Returns 0 if requested power mode is set successfully
7585 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307586 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007587static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7588 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307589{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007590 unsigned char cmd[6] = { START_STOP };
7591 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007592 struct scsi_device *sdp;
7593 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007594 int ret;
7595
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007596 spin_lock_irqsave(hba->host->host_lock, flags);
7597 sdp = hba->sdev_ufs_device;
7598 if (sdp) {
7599 ret = scsi_device_get(sdp);
7600 if (!ret && !scsi_device_online(sdp)) {
7601 ret = -ENODEV;
7602 scsi_device_put(sdp);
7603 }
7604 } else {
7605 ret = -ENODEV;
7606 }
7607 spin_unlock_irqrestore(hba->host->host_lock, flags);
7608
7609 if (ret)
7610 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007611
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307612 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007613 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7614 * handling, which would wait for host to be resumed. Since we know
7615 * we are functional while we are here, skip host resume in error
7616 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307617 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007618 hba->host->eh_noresume = 1;
7619 if (hba->wlun_dev_clr_ua) {
7620 ret = ufshcd_send_request_sense(hba, sdp);
7621 if (ret)
7622 goto out;
7623 /* Unit attention condition is cleared now */
7624 hba->wlun_dev_clr_ua = false;
7625 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307626
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007627 cmd[4] = pwr_mode << 4;
7628
7629 /*
7630 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007631 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007632 * already suspended childs.
7633 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007634 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7635 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007636 if (ret) {
7637 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007638 "START_STOP failed for power mode: %d, result %x\n",
7639 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007640 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007641 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007642 }
7643
7644 if (!ret)
7645 hba->curr_dev_pwr_mode = pwr_mode;
7646out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007647 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007648 hba->host->eh_noresume = 0;
7649 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307650}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307651
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007652static int ufshcd_link_state_transition(struct ufs_hba *hba,
7653 enum uic_link_state req_link_state,
7654 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307655{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007656 int ret = 0;
7657
7658 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307659 return 0;
7660
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007661 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7662 ret = ufshcd_uic_hibern8_enter(hba);
7663 if (!ret)
7664 ufshcd_set_link_hibern8(hba);
7665 else
7666 goto out;
7667 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307668 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007669 * If autobkops is enabled, link can't be turned off because
7670 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307671 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007672 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03007673 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007674 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007675 * Let's make sure that link is in low power mode, we are doing
7676 * this currently by putting the link in Hibern8. Otherway to
7677 * put the link in low power mode is to send the DME end point
7678 * to device and then send the DME reset command to local
7679 * unipro. But putting the link in hibern8 is much faster.
7680 */
7681 ret = ufshcd_uic_hibern8_enter(hba);
7682 if (ret)
7683 goto out;
7684 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007685 * Change controller state to "reset state" which
7686 * should also put the link in off/reset state
7687 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007688 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007689 /*
7690 * TODO: Check if we need any delay to make sure that
7691 * controller is reset
7692 */
7693 ufshcd_set_link_off(hba);
7694 }
7695
7696out:
7697 return ret;
7698}
7699
7700static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7701{
7702 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007703 * It seems some UFS devices may keep drawing more than sleep current
7704 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7705 * To avoid this situation, add 2ms delay before putting these UFS
7706 * rails in LPM mode.
7707 */
7708 if (!ufshcd_is_link_active(hba) &&
7709 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7710 usleep_range(2000, 2100);
7711
7712 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007713 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7714 * power.
7715 *
7716 * If UFS device and link is in OFF state, all power supplies (VCC,
7717 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7718 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7719 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7720 *
7721 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7722 * in low power state which would save some power.
7723 */
7724 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7725 !hba->dev_info.is_lu_power_on_wp) {
7726 ufshcd_setup_vreg(hba, false);
7727 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7728 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7729 if (!ufshcd_is_link_active(hba)) {
7730 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7731 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7732 }
7733 }
7734}
7735
7736static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7737{
7738 int ret = 0;
7739
7740 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7741 !hba->dev_info.is_lu_power_on_wp) {
7742 ret = ufshcd_setup_vreg(hba, true);
7743 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007744 if (!ret && !ufshcd_is_link_active(hba)) {
7745 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7746 if (ret)
7747 goto vcc_disable;
7748 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7749 if (ret)
7750 goto vccq_lpm;
7751 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007752 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007753 }
7754 goto out;
7755
7756vccq_lpm:
7757 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7758vcc_disable:
7759 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7760out:
7761 return ret;
7762}
7763
7764static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7765{
7766 if (ufshcd_is_link_off(hba))
7767 ufshcd_setup_hba_vreg(hba, false);
7768}
7769
7770static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7771{
7772 if (ufshcd_is_link_off(hba))
7773 ufshcd_setup_hba_vreg(hba, true);
7774}
7775
7776/**
7777 * ufshcd_suspend - helper function for suspend operations
7778 * @hba: per adapter instance
7779 * @pm_op: desired low power operation type
7780 *
7781 * This function will try to put the UFS device and link into low power
7782 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7783 * (System PM level).
7784 *
7785 * If this function is called during shutdown, it will make sure that
7786 * both UFS device and UFS link is powered off.
7787 *
7788 * NOTE: UFS device & link must be active before we enter in this function.
7789 *
7790 * Returns 0 for success and non-zero for failure
7791 */
7792static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7793{
7794 int ret = 0;
7795 enum ufs_pm_level pm_lvl;
7796 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7797 enum uic_link_state req_link_state;
7798
7799 hba->pm_op_in_progress = 1;
7800 if (!ufshcd_is_shutdown_pm(pm_op)) {
7801 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7802 hba->rpm_lvl : hba->spm_lvl;
7803 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7804 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7805 } else {
7806 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7807 req_link_state = UIC_LINK_OFF_STATE;
7808 }
7809
7810 /*
7811 * If we can't transition into any of the low power modes
7812 * just gate the clocks.
7813 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007814 ufshcd_hold(hba, false);
7815 hba->clk_gating.is_suspended = true;
7816
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007817 if (hba->clk_scaling.is_allowed) {
7818 cancel_work_sync(&hba->clk_scaling.suspend_work);
7819 cancel_work_sync(&hba->clk_scaling.resume_work);
7820 ufshcd_suspend_clkscaling(hba);
7821 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007822
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007823 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7824 req_link_state == UIC_LINK_ACTIVE_STATE) {
7825 goto disable_clks;
7826 }
7827
7828 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7829 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007830 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007831
7832 /* UFS device & link must be active before we enter in this function */
7833 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7834 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007835 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007836 }
7837
7838 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007839 if (ufshcd_can_autobkops_during_suspend(hba)) {
7840 /*
7841 * The device is idle with no requests in the queue,
7842 * allow background operations if bkops status shows
7843 * that performance might be impacted.
7844 */
7845 ret = ufshcd_urgent_bkops(hba);
7846 if (ret)
7847 goto enable_gating;
7848 } else {
7849 /* make sure that auto bkops is disabled */
7850 ufshcd_disable_auto_bkops(hba);
7851 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007852 }
7853
7854 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7855 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7856 !ufshcd_is_runtime_pm(pm_op))) {
7857 /* ensure that bkops is disabled */
7858 ufshcd_disable_auto_bkops(hba);
7859 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7860 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007861 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007862 }
7863
7864 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7865 if (ret)
7866 goto set_dev_active;
7867
7868 ufshcd_vreg_set_lpm(hba);
7869
7870disable_clks:
7871 /*
7872 * Call vendor specific suspend callback. As these callbacks may access
7873 * vendor specific host controller register space call them before the
7874 * host clocks are ON.
7875 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007876 ret = ufshcd_vops_suspend(hba, pm_op);
7877 if (ret)
7878 goto set_link_active;
Stanley Chudcb6cec2019-12-07 20:22:00 +08007879 /*
7880 * Disable the host irq as host controller as there won't be any
7881 * host controller transaction expected till resume.
7882 */
7883 ufshcd_disable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007884
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007885 if (!ufshcd_is_link_active(hba))
7886 ufshcd_setup_clocks(hba, false);
7887 else
7888 /* If link is active, device ref_clk can't be switched off */
7889 __ufshcd_setup_clocks(hba, false, true);
7890
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007891 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007892 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Stanley Chudcb6cec2019-12-07 20:22:00 +08007893
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007894 /* Put the host controller in low power mode if possible */
7895 ufshcd_hba_vreg_set_lpm(hba);
7896 goto out;
7897
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007898set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007899 if (hba->clk_scaling.is_allowed)
7900 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007901 ufshcd_vreg_set_hpm(hba);
7902 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7903 ufshcd_set_link_active(hba);
7904 else if (ufshcd_is_link_off(hba))
7905 ufshcd_host_reset_and_restore(hba);
7906set_dev_active:
7907 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7908 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007909enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007910 if (hba->clk_scaling.is_allowed)
7911 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007912 hba->clk_gating.is_suspended = false;
7913 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007914out:
7915 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08007916 if (ret)
7917 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007918 return ret;
7919}
7920
7921/**
7922 * ufshcd_resume - helper function for resume operations
7923 * @hba: per adapter instance
7924 * @pm_op: runtime PM or system PM
7925 *
7926 * This function basically brings the UFS device, UniPro link and controller
7927 * to active state.
7928 *
7929 * Returns 0 for success and non-zero for failure
7930 */
7931static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7932{
7933 int ret;
7934 enum uic_link_state old_link_state;
7935
7936 hba->pm_op_in_progress = 1;
7937 old_link_state = hba->uic_link_state;
7938
7939 ufshcd_hba_vreg_set_hpm(hba);
7940 /* Make sure clocks are enabled before accessing controller */
7941 ret = ufshcd_setup_clocks(hba, true);
7942 if (ret)
7943 goto out;
7944
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007945 /* enable the host irq as host controller would be active soon */
Can Guo5231d382019-12-05 02:14:46 +00007946 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007947
7948 ret = ufshcd_vreg_set_hpm(hba);
7949 if (ret)
7950 goto disable_irq_and_vops_clks;
7951
7952 /*
7953 * Call vendor specific resume callback. As these callbacks may access
7954 * vendor specific host controller register space call them when the
7955 * host clocks are ON.
7956 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007957 ret = ufshcd_vops_resume(hba, pm_op);
7958 if (ret)
7959 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007960
7961 if (ufshcd_is_link_hibern8(hba)) {
7962 ret = ufshcd_uic_hibern8_exit(hba);
7963 if (!ret)
7964 ufshcd_set_link_active(hba);
7965 else
7966 goto vendor_suspend;
7967 } else if (ufshcd_is_link_off(hba)) {
7968 ret = ufshcd_host_reset_and_restore(hba);
7969 /*
7970 * ufshcd_host_reset_and_restore() should have already
7971 * set the link state as active
7972 */
7973 if (ret || !ufshcd_is_link_active(hba))
7974 goto vendor_suspend;
7975 }
7976
7977 if (!ufshcd_is_ufs_dev_active(hba)) {
7978 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7979 if (ret)
7980 goto set_old_link_state;
7981 }
7982
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08007983 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7984 ufshcd_enable_auto_bkops(hba);
7985 else
7986 /*
7987 * If BKOPs operations are urgently needed at this moment then
7988 * keep auto-bkops enabled or else disable it.
7989 */
7990 ufshcd_urgent_bkops(hba);
7991
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007992 hba->clk_gating.is_suspended = false;
7993
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007994 if (hba->clk_scaling.is_allowed)
7995 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007996
Adrian Hunterad448372018-03-20 15:07:38 +02007997 /* Enable Auto-Hibernate if configured */
7998 ufshcd_auto_hibern8_enable(hba);
7999
Can Guo71d848b2019-11-14 22:09:26 -08008000 /* Schedule clock gating in case of no access to UFS device yet */
8001 ufshcd_release(hba);
8002
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008003 goto out;
8004
8005set_old_link_state:
8006 ufshcd_link_state_transition(hba, old_link_state, 0);
8007vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008008 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008009disable_vreg:
8010 ufshcd_vreg_set_lpm(hba);
8011disable_irq_and_vops_clks:
8012 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008013 if (hba->clk_scaling.is_allowed)
8014 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008015 ufshcd_setup_clocks(hba, false);
8016out:
8017 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008018 if (ret)
8019 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008020 return ret;
8021}
8022
8023/**
8024 * ufshcd_system_suspend - system suspend routine
8025 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008026 *
8027 * Check the description of ufshcd_suspend() function for more details.
8028 *
8029 * Returns 0 for success and non-zero for failure
8030 */
8031int ufshcd_system_suspend(struct ufs_hba *hba)
8032{
8033 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008034 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008035
8036 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008037 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008038
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008039 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8040 hba->curr_dev_pwr_mode) &&
8041 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8042 hba->uic_link_state))
8043 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008044
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008045 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008046 /*
8047 * UFS device and/or UFS link low power states during runtime
8048 * suspend seems to be different than what is expected during
8049 * system suspend. Hence runtime resume the devic & link and
8050 * let the system suspend low power states to take effect.
8051 * TODO: If resume takes longer time, we might have optimize
8052 * it in future by not resuming everything if possible.
8053 */
8054 ret = ufshcd_runtime_resume(hba);
8055 if (ret)
8056 goto out;
8057 }
8058
8059 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8060out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008061 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8062 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008063 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008064 if (!ret)
8065 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008066 return ret;
8067}
8068EXPORT_SYMBOL(ufshcd_system_suspend);
8069
8070/**
8071 * ufshcd_system_resume - system resume routine
8072 * @hba: per adapter instance
8073 *
8074 * Returns 0 for success and non-zero for failure
8075 */
8076
8077int ufshcd_system_resume(struct ufs_hba *hba)
8078{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008079 int ret = 0;
8080 ktime_t start = ktime_get();
8081
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008082 if (!hba)
8083 return -EINVAL;
8084
8085 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008086 /*
8087 * Let the runtime resume take care of resuming
8088 * if runtime suspended.
8089 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008090 goto out;
8091 else
8092 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8093out:
8094 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8095 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008096 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008097 if (!ret)
8098 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008099 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008100}
8101EXPORT_SYMBOL(ufshcd_system_resume);
8102
8103/**
8104 * ufshcd_runtime_suspend - runtime suspend routine
8105 * @hba: per adapter instance
8106 *
8107 * Check the description of ufshcd_suspend() function for more details.
8108 *
8109 * Returns 0 for success and non-zero for failure
8110 */
8111int ufshcd_runtime_suspend(struct ufs_hba *hba)
8112{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008113 int ret = 0;
8114 ktime_t start = ktime_get();
8115
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008116 if (!hba)
8117 return -EINVAL;
8118
8119 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008120 goto out;
8121 else
8122 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8123out:
8124 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8125 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008126 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008127 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308128}
8129EXPORT_SYMBOL(ufshcd_runtime_suspend);
8130
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008131/**
8132 * ufshcd_runtime_resume - runtime resume routine
8133 * @hba: per adapter instance
8134 *
8135 * This function basically brings the UFS device, UniPro link and controller
8136 * to active state. Following operations are done in this function:
8137 *
8138 * 1. Turn on all the controller related clocks
8139 * 2. Bring the UniPro link out of Hibernate state
8140 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8141 * to active state.
8142 * 4. If auto-bkops is enabled on the device, disable it.
8143 *
8144 * So following would be the possible power state after this function return
8145 * successfully:
8146 * S1: UFS device in Active state with VCC rail ON
8147 * UniPro link in Active state
8148 * All the UFS/UniPro controller clocks are ON
8149 *
8150 * Returns 0 for success and non-zero for failure
8151 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308152int ufshcd_runtime_resume(struct ufs_hba *hba)
8153{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008154 int ret = 0;
8155 ktime_t start = ktime_get();
8156
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008157 if (!hba)
8158 return -EINVAL;
8159
8160 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008161 goto out;
8162 else
8163 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8164out:
8165 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8166 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008167 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008168 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308169}
8170EXPORT_SYMBOL(ufshcd_runtime_resume);
8171
8172int ufshcd_runtime_idle(struct ufs_hba *hba)
8173{
8174 return 0;
8175}
8176EXPORT_SYMBOL(ufshcd_runtime_idle);
8177
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308178/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008179 * ufshcd_shutdown - shutdown routine
8180 * @hba: per adapter instance
8181 *
8182 * This function would power off both UFS device and UFS link.
8183 *
8184 * Returns 0 always to allow force shutdown even in case of errors.
8185 */
8186int ufshcd_shutdown(struct ufs_hba *hba)
8187{
8188 int ret = 0;
8189
Stanley Chuf51913e2019-09-18 12:20:38 +08008190 if (!hba->is_powered)
8191 goto out;
8192
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008193 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8194 goto out;
8195
8196 if (pm_runtime_suspended(hba->dev)) {
8197 ret = ufshcd_runtime_resume(hba);
8198 if (ret)
8199 goto out;
8200 }
8201
8202 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8203out:
8204 if (ret)
8205 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8206 /* allow force shutdown even in case of errors */
8207 return 0;
8208}
8209EXPORT_SYMBOL(ufshcd_shutdown);
8210
8211/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308212 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308213 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008214 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308215 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308216void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308217{
Avri Altmandf032bf2018-10-07 17:30:35 +03008218 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008219 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008220 blk_cleanup_queue(hba->tmf_queue);
8221 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008222 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308223 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308224 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308225 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008226 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308227
Vivek Gautameebcc192018-08-07 23:17:39 +05308228 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008229 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008230 if (ufshcd_is_clkscaling_supported(hba))
8231 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008232 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308233}
8234EXPORT_SYMBOL_GPL(ufshcd_remove);
8235
8236/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008237 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8238 * @hba: pointer to Host Bus Adapter (HBA)
8239 */
8240void ufshcd_dealloc_host(struct ufs_hba *hba)
8241{
8242 scsi_host_put(hba->host);
8243}
8244EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8245
8246/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008247 * ufshcd_set_dma_mask - Set dma mask based on the controller
8248 * addressing capability
8249 * @hba: per adapter instance
8250 *
8251 * Returns 0 for success, non-zero for failure
8252 */
8253static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8254{
8255 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8256 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8257 return 0;
8258 }
8259 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8260}
8261
8262/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008263 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308264 * @dev: pointer to device handle
8265 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308266 * Returns 0 on success, non-zero value on failure
8267 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008268int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308269{
8270 struct Scsi_Host *host;
8271 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008272 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308273
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308274 if (!dev) {
8275 dev_err(dev,
8276 "Invalid memory reference for dev is NULL\n");
8277 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308278 goto out_error;
8279 }
8280
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308281 host = scsi_host_alloc(&ufshcd_driver_template,
8282 sizeof(struct ufs_hba));
8283 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308284 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308285 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308286 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308287 }
8288 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308289 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308290 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008291 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308292 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008293
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008294 INIT_LIST_HEAD(&hba->clk_list_head);
8295
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008296out_error:
8297 return err;
8298}
8299EXPORT_SYMBOL(ufshcd_alloc_host);
8300
Bart Van Assche69a6c262019-12-09 10:13:09 -08008301/* This function exists because blk_mq_alloc_tag_set() requires this. */
8302static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
8303 const struct blk_mq_queue_data *qd)
8304{
8305 WARN_ON_ONCE(true);
8306 return BLK_STS_NOTSUPP;
8307}
8308
8309static const struct blk_mq_ops ufshcd_tmf_ops = {
8310 .queue_rq = ufshcd_queue_tmf,
8311};
8312
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008313/**
8314 * ufshcd_init - Driver initialization routine
8315 * @hba: per-adapter instance
8316 * @mmio_base: base register address
8317 * @irq: Interrupt line of device
8318 * Returns 0 on success, non-zero value on failure
8319 */
8320int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8321{
8322 int err;
8323 struct Scsi_Host *host = hba->host;
8324 struct device *dev = hba->dev;
8325
8326 if (!mmio_base) {
8327 dev_err(hba->dev,
8328 "Invalid memory reference for mmio_base is NULL\n");
8329 err = -ENODEV;
8330 goto out_error;
8331 }
8332
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308333 hba->mmio_base = mmio_base;
8334 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308335
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008336 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008337 if (err)
8338 goto out_error;
8339
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308340 /* Read capabilities registers */
8341 ufshcd_hba_capabilities(hba);
8342
8343 /* Get UFS version supported by the controller */
8344 hba->ufs_version = ufshcd_get_ufs_version(hba);
8345
Yaniv Gardic01848c2016-12-05 19:25:02 -08008346 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8347 (hba->ufs_version != UFSHCI_VERSION_11) &&
8348 (hba->ufs_version != UFSHCI_VERSION_20) &&
8349 (hba->ufs_version != UFSHCI_VERSION_21))
8350 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8351 hba->ufs_version);
8352
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308353 /* Get Interrupt bit mask per version */
8354 hba->intr_mask = ufshcd_get_intr_mask(hba);
8355
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008356 err = ufshcd_set_dma_mask(hba);
8357 if (err) {
8358 dev_err(hba->dev, "set dma mask failed\n");
8359 goto out_disable;
8360 }
8361
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308362 /* Allocate memory for host memory space */
8363 err = ufshcd_memory_alloc(hba);
8364 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308365 dev_err(hba->dev, "Memory allocation failed\n");
8366 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308367 }
8368
8369 /* Configure LRB */
8370 ufshcd_host_memory_configure(hba);
8371
8372 host->can_queue = hba->nutrs;
8373 host->cmd_per_lun = hba->nutrs;
8374 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008375 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308376 host->max_channel = UFSHCD_MAX_CHANNEL;
8377 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008378 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308379
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008380 hba->max_pwr_info.is_valid = false;
8381
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308382 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308383 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308384 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308385
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308386 /* Initialize UIC command mutex */
8387 mutex_init(&hba->uic_cmd_mutex);
8388
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308389 /* Initialize mutex for device management commands */
8390 mutex_init(&hba->dev_cmd.lock);
8391
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008392 init_rwsem(&hba->clk_scaling_lock);
8393
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008394 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008395
Vivek Gautameebcc192018-08-07 23:17:39 +05308396 ufshcd_init_clk_scaling(hba);
8397
Yaniv Gardi199ef132016-03-10 17:37:06 +02008398 /*
8399 * In order to avoid any spurious interrupt immediately after
8400 * registering UFS controller interrupt handler, clear any pending UFS
8401 * interrupt status and disable all the UFS interrupts.
8402 */
8403 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8404 REG_INTERRUPT_STATUS);
8405 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8406 /*
8407 * Make sure that UFS interrupts are disabled and any pending interrupt
8408 * status is cleared before registering UFS interrupt handler.
8409 */
8410 mb();
8411
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308412 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008413 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308414 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308415 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008416 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008417 } else {
8418 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308419 }
8420
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308421 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308422 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308423 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008424 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308425 }
8426
Bart Van Assche7252a362019-12-09 10:13:08 -08008427 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
8428 if (IS_ERR(hba->cmd_queue)) {
8429 err = PTR_ERR(hba->cmd_queue);
8430 goto out_remove_scsi_host;
8431 }
8432
Bart Van Assche69a6c262019-12-09 10:13:09 -08008433 hba->tmf_tag_set = (struct blk_mq_tag_set) {
8434 .nr_hw_queues = 1,
8435 .queue_depth = hba->nutmrs,
8436 .ops = &ufshcd_tmf_ops,
8437 .flags = BLK_MQ_F_NO_SCHED,
8438 };
8439 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
8440 if (err < 0)
8441 goto free_cmd_queue;
8442 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
8443 if (IS_ERR(hba->tmf_queue)) {
8444 err = PTR_ERR(hba->tmf_queue);
8445 goto free_tmf_tag_set;
8446 }
8447
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008448 /* Reset the attached device */
8449 ufshcd_vops_device_reset(hba);
8450
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308451 /* Host controller enable */
8452 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308453 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308454 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008455 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008456 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008457 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308458 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308459
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008460 /*
8461 * Set the default power management level for runtime and system PM.
8462 * Default power saving mode is to keep UFS link in Hibern8 state
8463 * and UFS device in sleep state.
8464 */
8465 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8466 UFS_SLEEP_PWR_MODE,
8467 UIC_LINK_HIBERN8_STATE);
8468 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8469 UFS_SLEEP_PWR_MODE,
8470 UIC_LINK_HIBERN8_STATE);
8471
Adrian Hunterad448372018-03-20 15:07:38 +02008472 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008473 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008474 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8475 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8476 }
8477
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308478 /* Hold auto suspend until async scan completes */
8479 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308480 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008481 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008482 * We are assuming that device wasn't put in sleep/power-down
8483 * state exclusively during the boot stage before kernel.
8484 * This assumption helps avoid doing link startup twice during
8485 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008486 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008487 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008488
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308489 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008490 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308491
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308492 return 0;
8493
Bart Van Assche69a6c262019-12-09 10:13:09 -08008494free_tmf_queue:
8495 blk_cleanup_queue(hba->tmf_queue);
8496free_tmf_tag_set:
8497 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008498free_cmd_queue:
8499 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308500out_remove_scsi_host:
8501 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008502exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308503 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008504 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308505out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008506 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008507 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308508out_error:
8509 return err;
8510}
8511EXPORT_SYMBOL_GPL(ufshcd_init);
8512
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308513MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8514MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308515MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308516MODULE_LICENSE("GPL");
8517MODULE_VERSION(UFSHCD_DRIVER_VERSION);