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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053049
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080050#define CREATE_TRACE_POINTS
51#include <trace/events/ufs.h>
52
Gilad Bronerdcea0bf2016-10-17 17:09:48 -070053#define UFSHCD_REQ_SENSE_SIZE 18
54
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053055#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
56 UTP_TASK_REQ_COMPL |\
57 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053058/* UIC command timeout, unit: ms */
59#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053060
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053061/* NOP OUT retries waiting for NOP IN response */
62#define NOP_OUT_RETRIES 10
63/* Timeout after 30 msecs if NOP OUT hangs without response */
64#define NOP_OUT_TIMEOUT 30 /* msecs */
65
Dolev Raviv68078d52013-07-30 00:35:58 +053066/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080067#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053068/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080069#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053070
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053071/* Task management command timeout */
72#define TM_CMD_TIMEOUT 100 /* msecs */
73
Yaniv Gardi64238fb2016-02-01 15:02:43 +020074/* maximum number of retries for a general UIC command */
75#define UFS_UIC_COMMAND_RETRIES 3
76
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030077/* maximum number of link-startup retries */
78#define DME_LINKSTARTUP_RETRIES 3
79
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020080/* Maximum retries for Hibern8 enter */
81#define UIC_HIBERN8_ENTER_RETRIES 3
82
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030083/* maximum number of reset retries before giving up */
84#define MAX_HOST_RESET_RETRIES 5
85
Dolev Raviv68078d52013-07-30 00:35:58 +053086/* Expose the flag value from utp_upiu_query.value */
87#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
88
Seungwon Jeon7d568652013-08-31 21:40:20 +053089/* Interrupt aggregation default timeout, unit: 40us */
90#define INT_AGGR_DEF_TO 0x02
91
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030092#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
93 ({ \
94 int _ret; \
95 if (_on) \
96 _ret = ufshcd_enable_vreg(_dev, _vreg); \
97 else \
98 _ret = ufshcd_disable_vreg(_dev, _vreg); \
99 _ret; \
100 })
101
Dolev Raviv66cc8202016-12-22 18:39:42 -0800102#define ufshcd_hex_dump(prefix_str, buf, len) \
103print_hex_dump(KERN_ERR, prefix_str, DUMP_PREFIX_OFFSET, 16, 4, buf, len, false)
104
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530105enum {
106 UFSHCD_MAX_CHANNEL = 0,
107 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530108 UFSHCD_CMD_PER_LUN = 32,
109 UFSHCD_CAN_QUEUE = 32,
110};
111
112/* UFSHCD states */
113enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530114 UFSHCD_STATE_RESET,
115 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530116 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800117 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530118};
119
120/* UFSHCD error handling flags */
121enum {
122 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530123};
124
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530125/* UFSHCD UIC layer error flags */
126enum {
127 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200128 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
129 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
130 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
131 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
132 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530133};
134
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530135#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300136 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530137#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300138 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530139#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300140 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530141
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300142#define ufshcd_set_ufs_dev_active(h) \
143 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
144#define ufshcd_set_ufs_dev_sleep(h) \
145 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
146#define ufshcd_set_ufs_dev_poweroff(h) \
147 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
148#define ufshcd_is_ufs_dev_active(h) \
149 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
150#define ufshcd_is_ufs_dev_sleep(h) \
151 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
152#define ufshcd_is_ufs_dev_poweroff(h) \
153 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
154
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200155struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300156 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
157 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
158 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
159 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
160 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
161 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
162};
163
164static inline enum ufs_dev_pwr_mode
165ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
166{
167 return ufs_pm_lvl_states[lvl].dev_state;
168}
169
170static inline enum uic_link_state
171ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
172{
173 return ufs_pm_lvl_states[lvl].link_state;
174}
175
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800176static inline enum ufs_pm_level
177ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
178 enum uic_link_state link_state)
179{
180 enum ufs_pm_level lvl;
181
182 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
183 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
184 (ufs_pm_lvl_states[lvl].link_state == link_state))
185 return lvl;
186 }
187
188 /* if no match found, return the level 0 */
189 return UFS_PM_LVL_0;
190}
191
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800192static struct ufs_dev_fix ufs_fixups[] = {
193 /* UFS cards deviations table */
194 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
195 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
196 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
197 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
198 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
199 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
200 UFS_DEVICE_NO_FASTAUTO),
201 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
202 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
203 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
204 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
205 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
206 UFS_DEVICE_QUIRK_PA_TACTIVATE),
207 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
208 UFS_DEVICE_QUIRK_PA_TACTIVATE),
209 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
210 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
211 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
212
213 END_FIX
214};
215
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530216static void ufshcd_tmc_handler(struct ufs_hba *hba);
217static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530218static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800219static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530220static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300221static void ufshcd_hba_exit(struct ufs_hba *hba);
222static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300223static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
224 bool skip_ref_clk);
225static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Yaniv Gardi60f01872016-03-10 17:37:11 +0200226static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300227static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
228static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300229static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300230static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800231static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
232static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800233static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800234static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300235static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300236static int ufshcd_change_power_mode(struct ufs_hba *hba,
237 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200238static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
239{
240 return tag >= 0 && tag < hba->nutrs;
241}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300242
243static inline int ufshcd_enable_irq(struct ufs_hba *hba)
244{
245 int ret = 0;
246
247 if (!hba->is_irq_enabled) {
248 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
249 hba);
250 if (ret)
251 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
252 __func__, ret);
253 hba->is_irq_enabled = true;
254 }
255
256 return ret;
257}
258
259static inline void ufshcd_disable_irq(struct ufs_hba *hba)
260{
261 if (hba->is_irq_enabled) {
262 free_irq(hba->irq, hba);
263 hba->is_irq_enabled = false;
264 }
265}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530266
Yaniv Gardib573d482016-03-10 17:37:09 +0200267/* replace non-printable or non-ASCII characters with spaces */
268static inline void ufshcd_remove_non_printable(char *val)
269{
270 if (!val)
271 return;
272
273 if (*val < 0x20 || *val > 0x7e)
274 *val = ' ';
275}
276
Lee Susman1a07f2d2016-12-22 18:42:03 -0800277static void ufshcd_add_command_trace(struct ufs_hba *hba,
278 unsigned int tag, const char *str)
279{
280 sector_t lba = -1;
281 u8 opcode = 0;
282 u32 intr, doorbell;
283 struct ufshcd_lrb *lrbp;
284 int transfer_len = -1;
285
286 if (!trace_ufshcd_command_enabled())
287 return;
288
289 lrbp = &hba->lrb[tag];
290
291 if (lrbp->cmd) { /* data phase exists */
292 opcode = (u8)(*lrbp->cmd->cmnd);
293 if ((opcode == READ_10) || (opcode == WRITE_10)) {
294 /*
295 * Currently we only fully trace read(10) and write(10)
296 * commands
297 */
298 if (lrbp->cmd->request && lrbp->cmd->request->bio)
299 lba =
300 lrbp->cmd->request->bio->bi_iter.bi_sector;
301 transfer_len = be32_to_cpu(
302 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
303 }
304 }
305
306 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
307 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
308 trace_ufshcd_command(dev_name(hba->dev), str, tag,
309 doorbell, transfer_len, intr, lba, opcode);
310}
311
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800312static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
313{
314 struct ufs_clk_info *clki;
315 struct list_head *head = &hba->clk_list_head;
316
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300317 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800318 return;
319
320 list_for_each_entry(clki, head, list) {
321 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
322 clki->max_freq)
323 dev_err(hba->dev, "clk: %s, rate: %u\n",
324 clki->name, clki->curr_freq);
325 }
326}
327
328static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
329 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
330{
331 int i;
332
333 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
334 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
335
336 if (err_hist->reg[p] == 0)
337 continue;
338 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
339 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
340 }
341}
342
Dolev Raviv66cc8202016-12-22 18:39:42 -0800343static void ufshcd_print_host_regs(struct ufs_hba *hba)
344{
345 /*
346 * hex_dump reads its data without the readl macro. This might
347 * cause inconsistency issues on some platform, as the printed
348 * values may be from cache and not the most recent value.
349 * To know whether you are looking at an un-cached version verify
350 * that IORESOURCE_MEM flag is on when xxx_get_resource() is invoked
351 * during platform/pci probe function.
352 */
353 ufshcd_hex_dump("host regs: ", hba->mmio_base, UFSHCI_REG_SPACE_SIZE);
354 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
355 hba->ufs_version, hba->capabilities);
356 dev_err(hba->dev,
357 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
358 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800359 dev_err(hba->dev,
360 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
361 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
362 hba->ufs_stats.hibern8_exit_cnt);
363
364 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
365 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
366 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
367 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
368 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
369
370 ufshcd_print_clk_freqs(hba);
371
372 if (hba->vops && hba->vops->dbg_register_dump)
373 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800374}
375
376static
377void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
378{
379 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800380 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800381 int tag;
382
383 for_each_set_bit(tag, &bitmap, hba->nutrs) {
384 lrbp = &hba->lrb[tag];
385
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800386 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
387 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800388 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
389 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800390 dev_err(hba->dev,
391 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
392 tag, (u64)lrbp->utrd_dma_addr);
393
Dolev Raviv66cc8202016-12-22 18:39:42 -0800394 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
395 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800396 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
397 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800398 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
399 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800400 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
401 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800402 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
403 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800404
Gilad Broner7fabb772017-02-03 16:56:50 -0800405 prdt_length = le16_to_cpu(
406 lrbp->utr_descriptor_ptr->prd_table_length);
407 dev_err(hba->dev,
408 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
409 tag, prdt_length,
410 (u64)lrbp->ucd_prdt_dma_addr);
411
412 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800413 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800414 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800415 }
416}
417
418static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
419{
420 struct utp_task_req_desc *tmrdp;
421 int tag;
422
423 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
424 tmrdp = &hba->utmrdl_base_addr[tag];
425 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
426 ufshcd_hex_dump("TM TRD: ", &tmrdp->header,
427 sizeof(struct request_desc_header));
428 dev_err(hba->dev, "TM[%d] - Task Management Request UPIU\n",
429 tag);
430 ufshcd_hex_dump("TM REQ: ", tmrdp->task_req_upiu,
431 sizeof(struct utp_upiu_req));
432 dev_err(hba->dev, "TM[%d] - Task Management Response UPIU\n",
433 tag);
434 ufshcd_hex_dump("TM RSP: ", tmrdp->task_rsp_upiu,
435 sizeof(struct utp_task_req_desc));
436 }
437}
438
Gilad Broner6ba65582017-02-03 16:57:28 -0800439static void ufshcd_print_host_state(struct ufs_hba *hba)
440{
441 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
442 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
Zang Leigange002e652017-08-24 10:57:15 +0800443 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800444 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
445 hba->saved_err, hba->saved_uic_err);
446 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
447 hba->curr_dev_pwr_mode, hba->uic_link_state);
448 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
449 hba->pm_op_in_progress, hba->is_sys_suspended);
450 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
451 hba->auto_bkops_enabled, hba->host->host_self_blocked);
452 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
453 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
454 hba->eh_flags, hba->req_abort_count);
455 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
456 hba->capabilities, hba->caps);
457 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
458 hba->dev_quirks);
459}
460
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800461/**
462 * ufshcd_print_pwr_info - print power params as saved in hba
463 * power info
464 * @hba: per-adapter instance
465 */
466static void ufshcd_print_pwr_info(struct ufs_hba *hba)
467{
468 static const char * const names[] = {
469 "INVALID MODE",
470 "FAST MODE",
471 "SLOW_MODE",
472 "INVALID MODE",
473 "FASTAUTO_MODE",
474 "SLOWAUTO_MODE",
475 "INVALID MODE",
476 };
477
478 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
479 __func__,
480 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
481 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
482 names[hba->pwr_info.pwr_rx],
483 names[hba->pwr_info.pwr_tx],
484 hba->pwr_info.hs_rate);
485}
486
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530487/*
488 * ufshcd_wait_for_register - wait for register value to change
489 * @hba - per-adapter interface
490 * @reg - mmio register offset
491 * @mask - mask to apply to read register value
492 * @val - wait condition
493 * @interval_us - polling interval in microsecs
494 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200495 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530496 *
497 * Returns -ETIMEDOUT on error, zero on success
498 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200499int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
500 u32 val, unsigned long interval_us,
501 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530502{
503 int err = 0;
504 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
505
506 /* ignore bits that we don't intend to wait on */
507 val = val & mask;
508
509 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200510 if (can_sleep)
511 usleep_range(interval_us, interval_us + 50);
512 else
513 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530514 if (time_after(jiffies, timeout)) {
515 if ((ufshcd_readl(hba, reg) & mask) != val)
516 err = -ETIMEDOUT;
517 break;
518 }
519 }
520
521 return err;
522}
523
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530524/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530525 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800526 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530527 *
528 * Returns interrupt bit mask per version
529 */
530static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
531{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800532 u32 intr_mask = 0;
533
534 switch (hba->ufs_version) {
535 case UFSHCI_VERSION_10:
536 intr_mask = INTERRUPT_MASK_ALL_VER_10;
537 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800538 case UFSHCI_VERSION_11:
539 case UFSHCI_VERSION_20:
540 intr_mask = INTERRUPT_MASK_ALL_VER_11;
541 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800542 case UFSHCI_VERSION_21:
543 default:
544 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200545 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800546 }
547
548 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530549}
550
551/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530552 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800553 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530554 *
555 * Returns UFSHCI version supported by the controller
556 */
557static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
558{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200559 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
560 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300561
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530562 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530563}
564
565/**
566 * ufshcd_is_device_present - Check if any device connected to
567 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300568 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530569 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300570 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530571 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300572static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530573{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300574 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300575 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530576}
577
578/**
579 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800580 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530581 *
582 * This function is used to get the OCS field from UTRD
583 * Returns the OCS field in the UTRD
584 */
585static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
586{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530587 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530588}
589
590/**
591 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
592 * @task_req_descp: pointer to utp_task_req_desc structure
593 *
594 * This function is used to get the OCS field from UTMRD
595 * Returns the OCS field in the UTMRD
596 */
597static inline int
598ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
599{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530600 return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530601}
602
603/**
604 * ufshcd_get_tm_free_slot - get a free slot for task management request
605 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530606 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530607 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530608 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
609 * Returns 0 if free slot is not available, else return 1 with tag value
610 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530611 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530612static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530613{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530614 int tag;
615 bool ret = false;
616
617 if (!free_slot)
618 goto out;
619
620 do {
621 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
622 if (tag >= hba->nutmrs)
623 goto out;
624 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
625
626 *free_slot = tag;
627 ret = true;
628out:
629 return ret;
630}
631
632static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
633{
634 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530635}
636
637/**
638 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
639 * @hba: per adapter instance
640 * @pos: position of the bit to be cleared
641 */
642static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
643{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530644 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
645 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
646 else
647 ufshcd_writel(hba, ~(1 << pos),
648 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
649}
650
651/**
652 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
653 * @hba: per adapter instance
654 * @pos: position of the bit to be cleared
655 */
656static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
657{
658 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
659 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
660 else
661 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530662}
663
664/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200665 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
666 * @hba: per adapter instance
667 * @tag: position of the bit to be cleared
668 */
669static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
670{
671 __clear_bit(tag, &hba->outstanding_reqs);
672}
673
674/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530675 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
676 * @reg: Register value of host controller status
677 *
678 * Returns integer, 0 on Success and positive value if failed
679 */
680static inline int ufshcd_get_lists_status(u32 reg)
681{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300682 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530683}
684
685/**
686 * ufshcd_get_uic_cmd_result - Get the UIC command result
687 * @hba: Pointer to adapter instance
688 *
689 * This function gets the result of UIC command completion
690 * Returns 0 on success, non zero value on error
691 */
692static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
693{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530694 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530695 MASK_UIC_COMMAND_RESULT;
696}
697
698/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530699 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
700 * @hba: Pointer to adapter instance
701 *
702 * This function gets UIC command argument3
703 * Returns 0 on success, non zero value on error
704 */
705static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
706{
707 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
708}
709
710/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530711 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530712 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530713 */
714static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530715ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530716{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530717 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530718}
719
720/**
721 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
722 * @ucd_rsp_ptr: pointer to response UPIU
723 *
724 * This function gets the response status and scsi_status from response UPIU
725 * Returns the response result code.
726 */
727static inline int
728ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
729{
730 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
731}
732
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530733/*
734 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
735 * from response UPIU
736 * @ucd_rsp_ptr: pointer to response UPIU
737 *
738 * Return the data segment length.
739 */
740static inline unsigned int
741ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
742{
743 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
744 MASK_RSP_UPIU_DATA_SEG_LEN;
745}
746
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530747/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530748 * ufshcd_is_exception_event - Check if the device raised an exception event
749 * @ucd_rsp_ptr: pointer to response UPIU
750 *
751 * The function checks if the device raised an exception event indicated in
752 * the Device Information field of response UPIU.
753 *
754 * Returns true if exception is raised, false otherwise.
755 */
756static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
757{
758 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
759 MASK_RSP_EXCEPTION_EVENT ? true : false;
760}
761
762/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530763 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530764 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530765 */
766static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530767ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530768{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530769 ufshcd_writel(hba, INT_AGGR_ENABLE |
770 INT_AGGR_COUNTER_AND_TIMER_RESET,
771 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
772}
773
774/**
775 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
776 * @hba: per adapter instance
777 * @cnt: Interrupt aggregation counter threshold
778 * @tmout: Interrupt aggregation timeout value
779 */
780static inline void
781ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
782{
783 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
784 INT_AGGR_COUNTER_THLD_VAL(cnt) |
785 INT_AGGR_TIMEOUT_VAL(tmout),
786 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530787}
788
789/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300790 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
791 * @hba: per adapter instance
792 */
793static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
794{
795 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
796}
797
798/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530799 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
800 * When run-stop registers are set to 1, it indicates the
801 * host controller that it can process the requests
802 * @hba: per adapter instance
803 */
804static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
805{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530806 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
807 REG_UTP_TASK_REQ_LIST_RUN_STOP);
808 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
809 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530810}
811
812/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530813 * ufshcd_hba_start - Start controller initialization sequence
814 * @hba: per adapter instance
815 */
816static inline void ufshcd_hba_start(struct ufs_hba *hba)
817{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530818 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530819}
820
821/**
822 * ufshcd_is_hba_active - Get controller state
823 * @hba: per adapter instance
824 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300825 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530826 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300827static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530828{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300829 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
830 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530831}
832
Yaniv Gardi37113102016-03-10 17:37:16 +0200833u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
834{
835 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
836 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
837 (hba->ufs_version == UFSHCI_VERSION_11))
838 return UFS_UNIPRO_VER_1_41;
839 else
840 return UFS_UNIPRO_VER_1_6;
841}
842EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
843
844static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
845{
846 /*
847 * If both host and device support UniPro ver1.6 or later, PA layer
848 * parameters tuning happens during link startup itself.
849 *
850 * We can manually tune PA layer parameters if either host or device
851 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
852 * logic simple, we will only do manual tuning if local unipro version
853 * doesn't support ver1.6 or later.
854 */
855 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
856 return true;
857 else
858 return false;
859}
860
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800861static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
862{
863 int ret = 0;
864 struct ufs_clk_info *clki;
865 struct list_head *head = &hba->clk_list_head;
866 ktime_t start = ktime_get();
867 bool clk_state_changed = false;
868
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300869 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800870 goto out;
871
872 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
873 if (ret)
874 return ret;
875
876 list_for_each_entry(clki, head, list) {
877 if (!IS_ERR_OR_NULL(clki->clk)) {
878 if (scale_up && clki->max_freq) {
879 if (clki->curr_freq == clki->max_freq)
880 continue;
881
882 clk_state_changed = true;
883 ret = clk_set_rate(clki->clk, clki->max_freq);
884 if (ret) {
885 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
886 __func__, clki->name,
887 clki->max_freq, ret);
888 break;
889 }
890 trace_ufshcd_clk_scaling(dev_name(hba->dev),
891 "scaled up", clki->name,
892 clki->curr_freq,
893 clki->max_freq);
894
895 clki->curr_freq = clki->max_freq;
896
897 } else if (!scale_up && clki->min_freq) {
898 if (clki->curr_freq == clki->min_freq)
899 continue;
900
901 clk_state_changed = true;
902 ret = clk_set_rate(clki->clk, clki->min_freq);
903 if (ret) {
904 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
905 __func__, clki->name,
906 clki->min_freq, ret);
907 break;
908 }
909 trace_ufshcd_clk_scaling(dev_name(hba->dev),
910 "scaled down", clki->name,
911 clki->curr_freq,
912 clki->min_freq);
913 clki->curr_freq = clki->min_freq;
914 }
915 }
916 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
917 clki->name, clk_get_rate(clki->clk));
918 }
919
920 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
921
922out:
923 if (clk_state_changed)
924 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
925 (scale_up ? "up" : "down"),
926 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
927 return ret;
928}
929
930/**
931 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
932 * @hba: per adapter instance
933 * @scale_up: True if scaling up and false if scaling down
934 *
935 * Returns true if scaling is required, false otherwise.
936 */
937static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
938 bool scale_up)
939{
940 struct ufs_clk_info *clki;
941 struct list_head *head = &hba->clk_list_head;
942
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300943 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800944 return false;
945
946 list_for_each_entry(clki, head, list) {
947 if (!IS_ERR_OR_NULL(clki->clk)) {
948 if (scale_up && clki->max_freq) {
949 if (clki->curr_freq == clki->max_freq)
950 continue;
951 return true;
952 } else if (!scale_up && clki->min_freq) {
953 if (clki->curr_freq == clki->min_freq)
954 continue;
955 return true;
956 }
957 }
958 }
959
960 return false;
961}
962
963static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
964 u64 wait_timeout_us)
965{
966 unsigned long flags;
967 int ret = 0;
968 u32 tm_doorbell;
969 u32 tr_doorbell;
970 bool timeout = false, do_last_check = false;
971 ktime_t start;
972
973 ufshcd_hold(hba, false);
974 spin_lock_irqsave(hba->host->host_lock, flags);
975 /*
976 * Wait for all the outstanding tasks/transfer requests.
977 * Verify by checking the doorbell registers are clear.
978 */
979 start = ktime_get();
980 do {
981 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
982 ret = -EBUSY;
983 goto out;
984 }
985
986 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
987 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
988 if (!tm_doorbell && !tr_doorbell) {
989 timeout = false;
990 break;
991 } else if (do_last_check) {
992 break;
993 }
994
995 spin_unlock_irqrestore(hba->host->host_lock, flags);
996 schedule();
997 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
998 wait_timeout_us) {
999 timeout = true;
1000 /*
1001 * We might have scheduled out for long time so make
1002 * sure to check if doorbells are cleared by this time
1003 * or not.
1004 */
1005 do_last_check = true;
1006 }
1007 spin_lock_irqsave(hba->host->host_lock, flags);
1008 } while (tm_doorbell || tr_doorbell);
1009
1010 if (timeout) {
1011 dev_err(hba->dev,
1012 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1013 __func__, tm_doorbell, tr_doorbell);
1014 ret = -EBUSY;
1015 }
1016out:
1017 spin_unlock_irqrestore(hba->host->host_lock, flags);
1018 ufshcd_release(hba);
1019 return ret;
1020}
1021
1022/**
1023 * ufshcd_scale_gear - scale up/down UFS gear
1024 * @hba: per adapter instance
1025 * @scale_up: True for scaling up gear and false for scaling down
1026 *
1027 * Returns 0 for success,
1028 * Returns -EBUSY if scaling can't happen at this time
1029 * Returns non-zero for any other errors
1030 */
1031static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1032{
1033 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1034 int ret = 0;
1035 struct ufs_pa_layer_attr new_pwr_info;
1036
1037 if (scale_up) {
1038 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1039 sizeof(struct ufs_pa_layer_attr));
1040 } else {
1041 memcpy(&new_pwr_info, &hba->pwr_info,
1042 sizeof(struct ufs_pa_layer_attr));
1043
1044 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1045 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1046 /* save the current power mode */
1047 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1048 &hba->pwr_info,
1049 sizeof(struct ufs_pa_layer_attr));
1050
1051 /* scale down gear */
1052 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1053 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1054 }
1055 }
1056
1057 /* check if the power mode needs to be changed or not? */
1058 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1059
1060 if (ret)
1061 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1062 __func__, ret,
1063 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1064 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1065
1066 return ret;
1067}
1068
1069static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1070{
1071 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1072 int ret = 0;
1073 /*
1074 * make sure that there are no outstanding requests when
1075 * clock scaling is in progress
1076 */
1077 scsi_block_requests(hba->host);
1078 down_write(&hba->clk_scaling_lock);
1079 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1080 ret = -EBUSY;
1081 up_write(&hba->clk_scaling_lock);
1082 scsi_unblock_requests(hba->host);
1083 }
1084
1085 return ret;
1086}
1087
1088static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1089{
1090 up_write(&hba->clk_scaling_lock);
1091 scsi_unblock_requests(hba->host);
1092}
1093
1094/**
1095 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1096 * @hba: per adapter instance
1097 * @scale_up: True for scaling up and false for scalin down
1098 *
1099 * Returns 0 for success,
1100 * Returns -EBUSY if scaling can't happen at this time
1101 * Returns non-zero for any other errors
1102 */
1103static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1104{
1105 int ret = 0;
1106
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001107 /* let's not get into low power until clock scaling is completed */
1108 ufshcd_hold(hba, false);
1109
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001110 ret = ufshcd_clock_scaling_prepare(hba);
1111 if (ret)
1112 return ret;
1113
1114 /* scale down the gear before scaling down clocks */
1115 if (!scale_up) {
1116 ret = ufshcd_scale_gear(hba, false);
1117 if (ret)
1118 goto out;
1119 }
1120
1121 ret = ufshcd_scale_clks(hba, scale_up);
1122 if (ret) {
1123 if (!scale_up)
1124 ufshcd_scale_gear(hba, true);
1125 goto out;
1126 }
1127
1128 /* scale up the gear after scaling up clocks */
1129 if (scale_up) {
1130 ret = ufshcd_scale_gear(hba, true);
1131 if (ret) {
1132 ufshcd_scale_clks(hba, false);
1133 goto out;
1134 }
1135 }
1136
1137 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1138
1139out:
1140 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001141 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001142 return ret;
1143}
1144
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001145static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1146{
1147 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1148 clk_scaling.suspend_work);
1149 unsigned long irq_flags;
1150
1151 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1152 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1153 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1154 return;
1155 }
1156 hba->clk_scaling.is_suspended = true;
1157 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1158
1159 __ufshcd_suspend_clkscaling(hba);
1160}
1161
1162static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1163{
1164 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1165 clk_scaling.resume_work);
1166 unsigned long irq_flags;
1167
1168 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1169 if (!hba->clk_scaling.is_suspended) {
1170 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1171 return;
1172 }
1173 hba->clk_scaling.is_suspended = false;
1174 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1175
1176 devfreq_resume_device(hba->devfreq);
1177}
1178
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001179static int ufshcd_devfreq_target(struct device *dev,
1180 unsigned long *freq, u32 flags)
1181{
1182 int ret = 0;
1183 struct ufs_hba *hba = dev_get_drvdata(dev);
1184 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001185 bool scale_up, sched_clk_scaling_suspend_work = false;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001186 unsigned long irq_flags;
1187
1188 if (!ufshcd_is_clkscaling_supported(hba))
1189 return -EINVAL;
1190
1191 if ((*freq > 0) && (*freq < UINT_MAX)) {
1192 dev_err(hba->dev, "%s: invalid freq = %lu\n", __func__, *freq);
1193 return -EINVAL;
1194 }
1195
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001196 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1197 if (ufshcd_eh_in_progress(hba)) {
1198 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1199 return 0;
1200 }
1201
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001202 if (!hba->clk_scaling.active_reqs)
1203 sched_clk_scaling_suspend_work = true;
1204
1205 scale_up = (*freq == UINT_MAX) ? true : false;
1206 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1207 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1208 ret = 0;
1209 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001210 }
1211 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1212
1213 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001214 ret = ufshcd_devfreq_scale(hba, scale_up);
1215
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001216 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1217 (scale_up ? "up" : "down"),
1218 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1219
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001220out:
1221 if (sched_clk_scaling_suspend_work)
1222 queue_work(hba->clk_scaling.workq,
1223 &hba->clk_scaling.suspend_work);
1224
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001225 return ret;
1226}
1227
1228
1229static int ufshcd_devfreq_get_dev_status(struct device *dev,
1230 struct devfreq_dev_status *stat)
1231{
1232 struct ufs_hba *hba = dev_get_drvdata(dev);
1233 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1234 unsigned long flags;
1235
1236 if (!ufshcd_is_clkscaling_supported(hba))
1237 return -EINVAL;
1238
1239 memset(stat, 0, sizeof(*stat));
1240
1241 spin_lock_irqsave(hba->host->host_lock, flags);
1242 if (!scaling->window_start_t)
1243 goto start_window;
1244
1245 if (scaling->is_busy_started)
1246 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1247 scaling->busy_start_t));
1248
1249 stat->total_time = jiffies_to_usecs((long)jiffies -
1250 (long)scaling->window_start_t);
1251 stat->busy_time = scaling->tot_busy_t;
1252start_window:
1253 scaling->window_start_t = jiffies;
1254 scaling->tot_busy_t = 0;
1255
1256 if (hba->outstanding_reqs) {
1257 scaling->busy_start_t = ktime_get();
1258 scaling->is_busy_started = true;
1259 } else {
1260 scaling->busy_start_t = 0;
1261 scaling->is_busy_started = false;
1262 }
1263 spin_unlock_irqrestore(hba->host->host_lock, flags);
1264 return 0;
1265}
1266
1267static struct devfreq_dev_profile ufs_devfreq_profile = {
1268 .polling_ms = 100,
1269 .target = ufshcd_devfreq_target,
1270 .get_dev_status = ufshcd_devfreq_get_dev_status,
1271};
1272
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001273static int ufshcd_devfreq_init(struct ufs_hba *hba)
1274{
1275 struct devfreq *devfreq;
1276 int ret;
1277
1278 devfreq = devm_devfreq_add_device(hba->dev,
1279 &ufs_devfreq_profile,
1280 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1281 NULL);
1282 if (IS_ERR(devfreq)) {
1283 ret = PTR_ERR(devfreq);
1284 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1285 return ret;
1286 }
1287
1288 hba->devfreq = devfreq;
1289
1290 return 0;
1291}
1292
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001293static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1294{
1295 unsigned long flags;
1296
1297 devfreq_suspend_device(hba->devfreq);
1298 spin_lock_irqsave(hba->host->host_lock, flags);
1299 hba->clk_scaling.window_start_t = 0;
1300 spin_unlock_irqrestore(hba->host->host_lock, flags);
1301}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001302
Gilad Bronera5082532016-10-17 17:10:00 -07001303static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1304{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001305 unsigned long flags;
1306 bool suspend = false;
1307
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001308 if (!ufshcd_is_clkscaling_supported(hba))
1309 return;
1310
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001311 spin_lock_irqsave(hba->host->host_lock, flags);
1312 if (!hba->clk_scaling.is_suspended) {
1313 suspend = true;
1314 hba->clk_scaling.is_suspended = true;
1315 }
1316 spin_unlock_irqrestore(hba->host->host_lock, flags);
1317
1318 if (suspend)
1319 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001320}
1321
1322static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1323{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001324 unsigned long flags;
1325 bool resume = false;
1326
1327 if (!ufshcd_is_clkscaling_supported(hba))
1328 return;
1329
1330 spin_lock_irqsave(hba->host->host_lock, flags);
1331 if (hba->clk_scaling.is_suspended) {
1332 resume = true;
1333 hba->clk_scaling.is_suspended = false;
1334 }
1335 spin_unlock_irqrestore(hba->host->host_lock, flags);
1336
1337 if (resume)
1338 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001339}
1340
1341static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1342 struct device_attribute *attr, char *buf)
1343{
1344 struct ufs_hba *hba = dev_get_drvdata(dev);
1345
1346 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1347}
1348
1349static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1350 struct device_attribute *attr, const char *buf, size_t count)
1351{
1352 struct ufs_hba *hba = dev_get_drvdata(dev);
1353 u32 value;
1354 int err;
1355
1356 if (kstrtou32(buf, 0, &value))
1357 return -EINVAL;
1358
1359 value = !!value;
1360 if (value == hba->clk_scaling.is_allowed)
1361 goto out;
1362
1363 pm_runtime_get_sync(hba->dev);
1364 ufshcd_hold(hba, false);
1365
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001366 cancel_work_sync(&hba->clk_scaling.suspend_work);
1367 cancel_work_sync(&hba->clk_scaling.resume_work);
1368
1369 hba->clk_scaling.is_allowed = value;
1370
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001371 if (value) {
1372 ufshcd_resume_clkscaling(hba);
1373 } else {
1374 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001375 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001376 if (err)
1377 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1378 __func__, err);
1379 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001380
1381 ufshcd_release(hba);
1382 pm_runtime_put_sync(hba->dev);
1383out:
1384 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001385}
1386
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001387static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1388{
1389 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1390 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1391 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1392 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1393 hba->clk_scaling.enable_attr.attr.mode = 0644;
1394 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1395 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1396}
1397
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001398static void ufshcd_ungate_work(struct work_struct *work)
1399{
1400 int ret;
1401 unsigned long flags;
1402 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1403 clk_gating.ungate_work);
1404
1405 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1406
1407 spin_lock_irqsave(hba->host->host_lock, flags);
1408 if (hba->clk_gating.state == CLKS_ON) {
1409 spin_unlock_irqrestore(hba->host->host_lock, flags);
1410 goto unblock_reqs;
1411 }
1412
1413 spin_unlock_irqrestore(hba->host->host_lock, flags);
1414 ufshcd_setup_clocks(hba, true);
1415
1416 /* Exit from hibern8 */
1417 if (ufshcd_can_hibern8_during_gating(hba)) {
1418 /* Prevent gating in this path */
1419 hba->clk_gating.is_suspended = true;
1420 if (ufshcd_is_link_hibern8(hba)) {
1421 ret = ufshcd_uic_hibern8_exit(hba);
1422 if (ret)
1423 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1424 __func__, ret);
1425 else
1426 ufshcd_set_link_active(hba);
1427 }
1428 hba->clk_gating.is_suspended = false;
1429 }
1430unblock_reqs:
1431 scsi_unblock_requests(hba->host);
1432}
1433
1434/**
1435 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1436 * Also, exit from hibern8 mode and set the link as active.
1437 * @hba: per adapter instance
1438 * @async: This indicates whether caller should ungate clocks asynchronously.
1439 */
1440int ufshcd_hold(struct ufs_hba *hba, bool async)
1441{
1442 int rc = 0;
1443 unsigned long flags;
1444
1445 if (!ufshcd_is_clkgating_allowed(hba))
1446 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001447 spin_lock_irqsave(hba->host->host_lock, flags);
1448 hba->clk_gating.active_reqs++;
1449
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001450 if (ufshcd_eh_in_progress(hba)) {
1451 spin_unlock_irqrestore(hba->host->host_lock, flags);
1452 return 0;
1453 }
1454
Sahitya Tummala856b3482014-09-25 15:32:34 +03001455start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001456 switch (hba->clk_gating.state) {
1457 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001458 /*
1459 * Wait for the ungate work to complete if in progress.
1460 * Though the clocks may be in ON state, the link could
1461 * still be in hibner8 state if hibern8 is allowed
1462 * during clock gating.
1463 * Make sure we exit hibern8 state also in addition to
1464 * clocks being ON.
1465 */
1466 if (ufshcd_can_hibern8_during_gating(hba) &&
1467 ufshcd_is_link_hibern8(hba)) {
1468 spin_unlock_irqrestore(hba->host->host_lock, flags);
1469 flush_work(&hba->clk_gating.ungate_work);
1470 spin_lock_irqsave(hba->host->host_lock, flags);
1471 goto start;
1472 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001473 break;
1474 case REQ_CLKS_OFF:
1475 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1476 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001477 trace_ufshcd_clk_gating(dev_name(hba->dev),
1478 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001479 break;
1480 }
1481 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001482 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001483 * currently running. Hence, fall through to cancel gating
1484 * work and to enable clocks.
1485 */
1486 case CLKS_OFF:
1487 scsi_block_requests(hba->host);
1488 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001489 trace_ufshcd_clk_gating(dev_name(hba->dev),
1490 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001491 schedule_work(&hba->clk_gating.ungate_work);
1492 /*
1493 * fall through to check if we should wait for this
1494 * work to be done or not.
1495 */
1496 case REQ_CLKS_ON:
1497 if (async) {
1498 rc = -EAGAIN;
1499 hba->clk_gating.active_reqs--;
1500 break;
1501 }
1502
1503 spin_unlock_irqrestore(hba->host->host_lock, flags);
1504 flush_work(&hba->clk_gating.ungate_work);
1505 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001506 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001507 goto start;
1508 default:
1509 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1510 __func__, hba->clk_gating.state);
1511 break;
1512 }
1513 spin_unlock_irqrestore(hba->host->host_lock, flags);
1514out:
1515 return rc;
1516}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001517EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001518
1519static void ufshcd_gate_work(struct work_struct *work)
1520{
1521 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1522 clk_gating.gate_work.work);
1523 unsigned long flags;
1524
1525 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001526 /*
1527 * In case you are here to cancel this work the gating state
1528 * would be marked as REQ_CLKS_ON. In this case save time by
1529 * skipping the gating work and exit after changing the clock
1530 * state to CLKS_ON.
1531 */
1532 if (hba->clk_gating.is_suspended ||
1533 (hba->clk_gating.state == REQ_CLKS_ON)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001534 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001535 trace_ufshcd_clk_gating(dev_name(hba->dev),
1536 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001537 goto rel_lock;
1538 }
1539
1540 if (hba->clk_gating.active_reqs
1541 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1542 || hba->lrb_in_use || hba->outstanding_tasks
1543 || hba->active_uic_cmd || hba->uic_async_done)
1544 goto rel_lock;
1545
1546 spin_unlock_irqrestore(hba->host->host_lock, flags);
1547
1548 /* put the link into hibern8 mode before turning off clocks */
1549 if (ufshcd_can_hibern8_during_gating(hba)) {
1550 if (ufshcd_uic_hibern8_enter(hba)) {
1551 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001552 trace_ufshcd_clk_gating(dev_name(hba->dev),
1553 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001554 goto out;
1555 }
1556 ufshcd_set_link_hibern8(hba);
1557 }
1558
1559 if (!ufshcd_is_link_active(hba))
1560 ufshcd_setup_clocks(hba, false);
1561 else
1562 /* If link is active, device ref_clk can't be switched off */
1563 __ufshcd_setup_clocks(hba, false, true);
1564
1565 /*
1566 * In case you are here to cancel this work the gating state
1567 * would be marked as REQ_CLKS_ON. In this case keep the state
1568 * as REQ_CLKS_ON which would anyway imply that clocks are off
1569 * and a request to turn them on is pending. By doing this way,
1570 * we keep the state machine in tact and this would ultimately
1571 * prevent from doing cancel work multiple times when there are
1572 * new requests arriving before the current cancel work is done.
1573 */
1574 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001575 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001576 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001577 trace_ufshcd_clk_gating(dev_name(hba->dev),
1578 hba->clk_gating.state);
1579 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001580rel_lock:
1581 spin_unlock_irqrestore(hba->host->host_lock, flags);
1582out:
1583 return;
1584}
1585
1586/* host lock must be held before calling this variant */
1587static void __ufshcd_release(struct ufs_hba *hba)
1588{
1589 if (!ufshcd_is_clkgating_allowed(hba))
1590 return;
1591
1592 hba->clk_gating.active_reqs--;
1593
1594 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1595 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1596 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001597 || hba->active_uic_cmd || hba->uic_async_done
1598 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001599 return;
1600
1601 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001602 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001603 schedule_delayed_work(&hba->clk_gating.gate_work,
1604 msecs_to_jiffies(hba->clk_gating.delay_ms));
1605}
1606
1607void ufshcd_release(struct ufs_hba *hba)
1608{
1609 unsigned long flags;
1610
1611 spin_lock_irqsave(hba->host->host_lock, flags);
1612 __ufshcd_release(hba);
1613 spin_unlock_irqrestore(hba->host->host_lock, flags);
1614}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001615EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001616
1617static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1618 struct device_attribute *attr, char *buf)
1619{
1620 struct ufs_hba *hba = dev_get_drvdata(dev);
1621
1622 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1623}
1624
1625static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1626 struct device_attribute *attr, const char *buf, size_t count)
1627{
1628 struct ufs_hba *hba = dev_get_drvdata(dev);
1629 unsigned long flags, value;
1630
1631 if (kstrtoul(buf, 0, &value))
1632 return -EINVAL;
1633
1634 spin_lock_irqsave(hba->host->host_lock, flags);
1635 hba->clk_gating.delay_ms = value;
1636 spin_unlock_irqrestore(hba->host->host_lock, flags);
1637 return count;
1638}
1639
Sahitya Tummalab4274112016-12-22 18:40:39 -08001640static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1641 struct device_attribute *attr, char *buf)
1642{
1643 struct ufs_hba *hba = dev_get_drvdata(dev);
1644
1645 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1646}
1647
1648static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1649 struct device_attribute *attr, const char *buf, size_t count)
1650{
1651 struct ufs_hba *hba = dev_get_drvdata(dev);
1652 unsigned long flags;
1653 u32 value;
1654
1655 if (kstrtou32(buf, 0, &value))
1656 return -EINVAL;
1657
1658 value = !!value;
1659 if (value == hba->clk_gating.is_enabled)
1660 goto out;
1661
1662 if (value) {
1663 ufshcd_release(hba);
1664 } else {
1665 spin_lock_irqsave(hba->host->host_lock, flags);
1666 hba->clk_gating.active_reqs++;
1667 spin_unlock_irqrestore(hba->host->host_lock, flags);
1668 }
1669
1670 hba->clk_gating.is_enabled = value;
1671out:
1672 return count;
1673}
1674
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001675static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1676{
1677 if (!ufshcd_is_clkgating_allowed(hba))
1678 return;
1679
1680 hba->clk_gating.delay_ms = 150;
1681 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1682 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1683
Sahitya Tummalab4274112016-12-22 18:40:39 -08001684 hba->clk_gating.is_enabled = true;
1685
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001686 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1687 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1688 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1689 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001690 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001691 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1692 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001693
1694 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1695 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1696 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1697 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1698 hba->clk_gating.enable_attr.attr.mode = 0644;
1699 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1700 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001701}
1702
1703static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1704{
1705 if (!ufshcd_is_clkgating_allowed(hba))
1706 return;
1707 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001708 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001709 cancel_work_sync(&hba->clk_gating.ungate_work);
1710 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001711}
1712
Sahitya Tummala856b3482014-09-25 15:32:34 +03001713/* Must be called with host lock acquired */
1714static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1715{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001716 bool queue_resume_work = false;
1717
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001718 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001719 return;
1720
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001721 if (!hba->clk_scaling.active_reqs++)
1722 queue_resume_work = true;
1723
1724 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1725 return;
1726
1727 if (queue_resume_work)
1728 queue_work(hba->clk_scaling.workq,
1729 &hba->clk_scaling.resume_work);
1730
1731 if (!hba->clk_scaling.window_start_t) {
1732 hba->clk_scaling.window_start_t = jiffies;
1733 hba->clk_scaling.tot_busy_t = 0;
1734 hba->clk_scaling.is_busy_started = false;
1735 }
1736
Sahitya Tummala856b3482014-09-25 15:32:34 +03001737 if (!hba->clk_scaling.is_busy_started) {
1738 hba->clk_scaling.busy_start_t = ktime_get();
1739 hba->clk_scaling.is_busy_started = true;
1740 }
1741}
1742
1743static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1744{
1745 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1746
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001747 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001748 return;
1749
1750 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1751 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1752 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001753 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001754 scaling->is_busy_started = false;
1755 }
1756}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301757/**
1758 * ufshcd_send_command - Send SCSI or device management commands
1759 * @hba: per adapter instance
1760 * @task_tag: Task tag of the command
1761 */
1762static inline
1763void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1764{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001765 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001766 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001767 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301768 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301769 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001770 /* Make sure that doorbell is committed immediately */
1771 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001772 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301773}
1774
1775/**
1776 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001777 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301778 */
1779static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1780{
1781 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301782 if (lrbp->sense_buffer &&
1783 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001784 int len_to_copy;
1785
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301786 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001787 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
1788
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301789 memcpy(lrbp->sense_buffer,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301790 lrbp->ucd_rsp_ptr->sr.sense_data,
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07001791 min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301792 }
1793}
1794
1795/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301796 * ufshcd_copy_query_response() - Copy the Query Response and the data
1797 * descriptor
1798 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001799 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301800 */
1801static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001802int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301803{
1804 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1805
Dolev Raviv68078d52013-07-30 00:35:58 +05301806 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301807
Dolev Raviv68078d52013-07-30 00:35:58 +05301808 /* Get the descriptor */
1809 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001810 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301811 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001812 u16 resp_len;
1813 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301814
1815 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001816 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301817 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001818 buf_len = be16_to_cpu(
1819 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001820 if (likely(buf_len >= resp_len)) {
1821 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1822 } else {
1823 dev_warn(hba->dev,
1824 "%s: Response size is bigger than buffer",
1825 __func__);
1826 return -EINVAL;
1827 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301828 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001829
1830 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301831}
1832
1833/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301834 * ufshcd_hba_capabilities - Read controller capabilities
1835 * @hba: per adapter instance
1836 */
1837static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1838{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301839 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301840
1841 /* nutrs and nutmrs are 0 based values */
1842 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1843 hba->nutmrs =
1844 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1845}
1846
1847/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301848 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1849 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301850 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301851 * Return true on success, else false
1852 */
1853static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1854{
1855 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1856 return true;
1857 else
1858 return false;
1859}
1860
1861/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301862 * ufshcd_get_upmcrs - Get the power mode change request status
1863 * @hba: Pointer to adapter instance
1864 *
1865 * This function gets the UPMCRS field of HCS register
1866 * Returns value of UPMCRS field
1867 */
1868static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1869{
1870 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1871}
1872
1873/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301874 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1875 * @hba: per adapter instance
1876 * @uic_cmd: UIC command
1877 *
1878 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301879 */
1880static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301881ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301882{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301883 WARN_ON(hba->active_uic_cmd);
1884
1885 hba->active_uic_cmd = uic_cmd;
1886
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301887 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301888 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1889 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1890 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301891
1892 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301893 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301894 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301895}
1896
1897/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301898 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1899 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001900 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301901 *
1902 * Must be called with mutex held.
1903 * Returns 0 only if success.
1904 */
1905static int
1906ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1907{
1908 int ret;
1909 unsigned long flags;
1910
1911 if (wait_for_completion_timeout(&uic_cmd->done,
1912 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
1913 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
1914 else
1915 ret = -ETIMEDOUT;
1916
1917 spin_lock_irqsave(hba->host->host_lock, flags);
1918 hba->active_uic_cmd = NULL;
1919 spin_unlock_irqrestore(hba->host->host_lock, flags);
1920
1921 return ret;
1922}
1923
1924/**
1925 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1926 * @hba: per adapter instance
1927 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001928 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301929 *
1930 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001931 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301932 * Returns 0 only if success.
1933 */
1934static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001935__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
1936 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301937{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301938 if (!ufshcd_ready_for_uic_cmd(hba)) {
1939 dev_err(hba->dev,
1940 "Controller not ready to accept UIC commands\n");
1941 return -EIO;
1942 }
1943
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001944 if (completion)
1945 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301946
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301947 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301948
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001949 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301950}
1951
1952/**
1953 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1954 * @hba: per adapter instance
1955 * @uic_cmd: UIC command
1956 *
1957 * Returns 0 only if success.
1958 */
1959static int
1960ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1961{
1962 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001963 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301964
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001965 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301966 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03001967 ufshcd_add_delay_before_dme_cmd(hba);
1968
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001969 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001970 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001971 spin_unlock_irqrestore(hba->host->host_lock, flags);
1972 if (!ret)
1973 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
1974
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301975 mutex_unlock(&hba->uic_cmd_mutex);
1976
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001977 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301978 return ret;
1979}
1980
1981/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301982 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001983 * @hba: per adapter instance
1984 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301985 *
1986 * Returns 0 in case of success, non-zero value in case of failure
1987 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09001988static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301989{
1990 struct ufshcd_sg_entry *prd_table;
1991 struct scatterlist *sg;
1992 struct scsi_cmnd *cmd;
1993 int sg_segments;
1994 int i;
1995
1996 cmd = lrbp->cmd;
1997 sg_segments = scsi_dma_map(cmd);
1998 if (sg_segments < 0)
1999 return sg_segments;
2000
2001 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002002 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2003 lrbp->utr_descriptor_ptr->prd_table_length =
2004 cpu_to_le16((u16)(sg_segments *
2005 sizeof(struct ufshcd_sg_entry)));
2006 else
2007 lrbp->utr_descriptor_ptr->prd_table_length =
2008 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302009
2010 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2011
2012 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2013 prd_table[i].size =
2014 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2015 prd_table[i].base_addr =
2016 cpu_to_le32(lower_32_bits(sg->dma_address));
2017 prd_table[i].upper_addr =
2018 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002019 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302020 }
2021 } else {
2022 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2023 }
2024
2025 return 0;
2026}
2027
2028/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302029 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302030 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302031 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302032 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302033static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302034{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302035 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2036
2037 if (hba->ufs_version == UFSHCI_VERSION_10) {
2038 u32 rw;
2039 rw = set & INTERRUPT_MASK_RW_VER_10;
2040 set = rw | ((set ^ intrs) & intrs);
2041 } else {
2042 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302043 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302044
2045 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2046}
2047
2048/**
2049 * ufshcd_disable_intr - disable interrupts
2050 * @hba: per adapter instance
2051 * @intrs: interrupt bits
2052 */
2053static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2054{
2055 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2056
2057 if (hba->ufs_version == UFSHCI_VERSION_10) {
2058 u32 rw;
2059 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2060 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2061 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2062
2063 } else {
2064 set &= ~intrs;
2065 }
2066
2067 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302068}
2069
2070/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302071 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2072 * descriptor according to request
2073 * @lrbp: pointer to local reference block
2074 * @upiu_flags: flags required in the header
2075 * @cmd_dir: requests data direction
2076 */
2077static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002078 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302079{
2080 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2081 u32 data_direction;
2082 u32 dword_0;
2083
2084 if (cmd_dir == DMA_FROM_DEVICE) {
2085 data_direction = UTP_DEVICE_TO_HOST;
2086 *upiu_flags = UPIU_CMD_FLAGS_READ;
2087 } else if (cmd_dir == DMA_TO_DEVICE) {
2088 data_direction = UTP_HOST_TO_DEVICE;
2089 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2090 } else {
2091 data_direction = UTP_NO_DATA_TRANSFER;
2092 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2093 }
2094
2095 dword_0 = data_direction | (lrbp->command_type
2096 << UPIU_COMMAND_TYPE_OFFSET);
2097 if (lrbp->intr_cmd)
2098 dword_0 |= UTP_REQ_DESC_INT_CMD;
2099
2100 /* Transfer request descriptor header fields */
2101 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002102 /* dword_1 is reserved, hence it is set to 0 */
2103 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302104 /*
2105 * assigning invalid value for command status. Controller
2106 * updates OCS on command completion, with the command
2107 * status
2108 */
2109 req_desc->header.dword_2 =
2110 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002111 /* dword_3 is reserved, hence it is set to 0 */
2112 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002113
2114 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302115}
2116
2117/**
2118 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2119 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002120 * @lrbp: local reference block pointer
2121 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302122 */
2123static
2124void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2125{
2126 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002127 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302128
2129 /* command descriptor fields */
2130 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2131 UPIU_TRANSACTION_COMMAND, upiu_flags,
2132 lrbp->lun, lrbp->task_tag);
2133 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2134 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2135
2136 /* Total EHS length and Data segment length will be zero */
2137 ucd_req_ptr->header.dword_2 = 0;
2138
2139 ucd_req_ptr->sc.exp_data_transfer_len =
2140 cpu_to_be32(lrbp->cmd->sdb.length);
2141
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002142 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
2143 memset(ucd_req_ptr->sc.cdb, 0, MAX_CDB_SIZE);
2144 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2145
2146 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302147}
2148
Dolev Raviv68078d52013-07-30 00:35:58 +05302149/**
2150 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2151 * for query requsts
2152 * @hba: UFS hba
2153 * @lrbp: local reference block pointer
2154 * @upiu_flags: flags
2155 */
2156static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2157 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2158{
2159 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2160 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302161 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302162 u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
2163
2164 /* Query request header */
2165 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2166 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2167 lrbp->lun, lrbp->task_tag);
2168 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2169 0, query->request.query_func, 0, 0);
2170
Zang Leigang68612852016-08-25 17:39:19 +08002171 /* Data segment length only need for WRITE_DESC */
2172 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2173 ucd_req_ptr->header.dword_2 =
2174 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2175 else
2176 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302177
2178 /* Copy the Query Request buffer as is */
2179 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2180 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302181
2182 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002183 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2184 memcpy(descp, query->descriptor, len);
2185
Yaniv Gardi51047262016-02-01 15:02:38 +02002186 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302187}
2188
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302189static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2190{
2191 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2192
2193 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2194
2195 /* command descriptor fields */
2196 ucd_req_ptr->header.dword_0 =
2197 UPIU_HEADER_DWORD(
2198 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002199 /* clear rest of the fields of basic header */
2200 ucd_req_ptr->header.dword_1 = 0;
2201 ucd_req_ptr->header.dword_2 = 0;
2202
2203 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302204}
2205
2206/**
Joao Pinto300bb132016-05-11 12:21:27 +01002207 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2208 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002209 * @hba: per adapter instance
2210 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302211 */
Joao Pinto300bb132016-05-11 12:21:27 +01002212static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302213{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302214 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302215 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302216
kehuanlin83dc7e32017-09-06 17:58:39 +08002217 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2218 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002219 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002220 else
2221 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002222
2223 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2224 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2225 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2226 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2227 ufshcd_prepare_utp_nop_upiu(lrbp);
2228 else
2229 ret = -EINVAL;
2230
2231 return ret;
2232}
2233
2234/**
2235 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2236 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002237 * @hba: per adapter instance
2238 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002239 */
2240static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2241{
2242 u32 upiu_flags;
2243 int ret = 0;
2244
kehuanlin83dc7e32017-09-06 17:58:39 +08002245 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2246 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002247 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002248 else
2249 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002250
2251 if (likely(lrbp->cmd)) {
2252 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2253 lrbp->cmd->sc_data_direction);
2254 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2255 } else {
2256 ret = -EINVAL;
2257 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302258
2259 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302260}
2261
2262/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002263 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002264 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002265 *
2266 * Returns SCSI W-LUN id
2267 */
2268static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2269{
2270 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2271}
2272
2273/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302274 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002275 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302276 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302277 *
2278 * Returns 0 for success, non-zero in case of failure
2279 */
2280static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2281{
2282 struct ufshcd_lrb *lrbp;
2283 struct ufs_hba *hba;
2284 unsigned long flags;
2285 int tag;
2286 int err = 0;
2287
2288 hba = shost_priv(host);
2289
2290 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002291 if (!ufshcd_valid_tag(hba, tag)) {
2292 dev_err(hba->dev,
2293 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2294 __func__, tag, cmd, cmd->request);
2295 BUG();
2296 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302297
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002298 if (!down_read_trylock(&hba->clk_scaling_lock))
2299 return SCSI_MLQUEUE_HOST_BUSY;
2300
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302301 spin_lock_irqsave(hba->host->host_lock, flags);
2302 switch (hba->ufshcd_state) {
2303 case UFSHCD_STATE_OPERATIONAL:
2304 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002305 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302306 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302307 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302308 goto out_unlock;
2309 case UFSHCD_STATE_ERROR:
2310 set_host_byte(cmd, DID_ERROR);
2311 cmd->scsi_done(cmd);
2312 goto out_unlock;
2313 default:
2314 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2315 __func__, hba->ufshcd_state);
2316 set_host_byte(cmd, DID_BAD_TARGET);
2317 cmd->scsi_done(cmd);
2318 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302319 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002320
2321 /* if error handling is in progress, don't issue commands */
2322 if (ufshcd_eh_in_progress(hba)) {
2323 set_host_byte(cmd, DID_ERROR);
2324 cmd->scsi_done(cmd);
2325 goto out_unlock;
2326 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302327 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302328
Gilad Broner7fabb772017-02-03 16:56:50 -08002329 hba->req_abort_count = 0;
2330
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302331 /* acquire the tag to make sure device cmds don't use it */
2332 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2333 /*
2334 * Dev manage command in progress, requeue the command.
2335 * Requeuing the command helps in cases where the request *may*
2336 * find different tag instead of waiting for dev manage command
2337 * completion.
2338 */
2339 err = SCSI_MLQUEUE_HOST_BUSY;
2340 goto out;
2341 }
2342
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002343 err = ufshcd_hold(hba, true);
2344 if (err) {
2345 err = SCSI_MLQUEUE_HOST_BUSY;
2346 clear_bit_unlock(tag, &hba->lrb_in_use);
2347 goto out;
2348 }
2349 WARN_ON(hba->clk_gating.state != CLKS_ON);
2350
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302351 lrbp = &hba->lrb[tag];
2352
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302353 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302354 lrbp->cmd = cmd;
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07002355 lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302356 lrbp->sense_buffer = cmd->sense_buffer;
2357 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002358 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002359 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002360 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302361
Joao Pinto300bb132016-05-11 12:21:27 +01002362 ufshcd_comp_scsi_upiu(hba, lrbp);
2363
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002364 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302365 if (err) {
2366 lrbp->cmd = NULL;
2367 clear_bit_unlock(tag, &hba->lrb_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302368 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302369 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002370 /* Make sure descriptors are ready before ringing the doorbell */
2371 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302372
2373 /* issue command to the controller */
2374 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002375 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302376 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302377out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302378 spin_unlock_irqrestore(hba->host->host_lock, flags);
2379out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002380 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302381 return err;
2382}
2383
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302384static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2385 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2386{
2387 lrbp->cmd = NULL;
2388 lrbp->sense_bufflen = 0;
2389 lrbp->sense_buffer = NULL;
2390 lrbp->task_tag = tag;
2391 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302392 lrbp->intr_cmd = true; /* No interrupt aggregation */
2393 hba->dev_cmd.type = cmd_type;
2394
Joao Pinto300bb132016-05-11 12:21:27 +01002395 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302396}
2397
2398static int
2399ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2400{
2401 int err = 0;
2402 unsigned long flags;
2403 u32 mask = 1 << tag;
2404
2405 /* clear outstanding transaction before retry */
2406 spin_lock_irqsave(hba->host->host_lock, flags);
2407 ufshcd_utrl_clear(hba, tag);
2408 spin_unlock_irqrestore(hba->host->host_lock, flags);
2409
2410 /*
2411 * wait for for h/w to clear corresponding bit in door-bell.
2412 * max. wait is 1 sec.
2413 */
2414 err = ufshcd_wait_for_register(hba,
2415 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002416 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302417
2418 return err;
2419}
2420
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002421static int
2422ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2423{
2424 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2425
2426 /* Get the UPIU response */
2427 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2428 UPIU_RSP_CODE_OFFSET;
2429 return query_res->response;
2430}
2431
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302432/**
2433 * ufshcd_dev_cmd_completion() - handles device management command responses
2434 * @hba: per adapter instance
2435 * @lrbp: pointer to local reference block
2436 */
2437static int
2438ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2439{
2440 int resp;
2441 int err = 0;
2442
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002443 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302444 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2445
2446 switch (resp) {
2447 case UPIU_TRANSACTION_NOP_IN:
2448 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2449 err = -EINVAL;
2450 dev_err(hba->dev, "%s: unexpected response %x\n",
2451 __func__, resp);
2452 }
2453 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302454 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002455 err = ufshcd_check_query_response(hba, lrbp);
2456 if (!err)
2457 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302458 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302459 case UPIU_TRANSACTION_REJECT_UPIU:
2460 /* TODO: handle Reject UPIU Response */
2461 err = -EPERM;
2462 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2463 __func__);
2464 break;
2465 default:
2466 err = -EINVAL;
2467 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2468 __func__, resp);
2469 break;
2470 }
2471
2472 return err;
2473}
2474
2475static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2476 struct ufshcd_lrb *lrbp, int max_timeout)
2477{
2478 int err = 0;
2479 unsigned long time_left;
2480 unsigned long flags;
2481
2482 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2483 msecs_to_jiffies(max_timeout));
2484
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002485 /* Make sure descriptors are ready before ringing the doorbell */
2486 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302487 spin_lock_irqsave(hba->host->host_lock, flags);
2488 hba->dev_cmd.complete = NULL;
2489 if (likely(time_left)) {
2490 err = ufshcd_get_tr_ocs(lrbp);
2491 if (!err)
2492 err = ufshcd_dev_cmd_completion(hba, lrbp);
2493 }
2494 spin_unlock_irqrestore(hba->host->host_lock, flags);
2495
2496 if (!time_left) {
2497 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002498 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2499 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302500 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002501 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302502 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002503 /*
2504 * in case of an error, after clearing the doorbell,
2505 * we also need to clear the outstanding_request
2506 * field in hba
2507 */
2508 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302509 }
2510
2511 return err;
2512}
2513
2514/**
2515 * ufshcd_get_dev_cmd_tag - Get device management command tag
2516 * @hba: per-adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002517 * @tag_out: pointer to variable with available slot value
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302518 *
2519 * Get a free slot and lock it until device management command
2520 * completes.
2521 *
2522 * Returns false if free slot is unavailable for locking, else
2523 * return true with tag value in @tag.
2524 */
2525static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2526{
2527 int tag;
2528 bool ret = false;
2529 unsigned long tmp;
2530
2531 if (!tag_out)
2532 goto out;
2533
2534 do {
2535 tmp = ~hba->lrb_in_use;
2536 tag = find_last_bit(&tmp, hba->nutrs);
2537 if (tag >= hba->nutrs)
2538 goto out;
2539 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2540
2541 *tag_out = tag;
2542 ret = true;
2543out:
2544 return ret;
2545}
2546
2547static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2548{
2549 clear_bit_unlock(tag, &hba->lrb_in_use);
2550}
2551
2552/**
2553 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002554 * @hba: UFS hba
2555 * @cmd_type: specifies the type (NOP, Query...)
2556 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302557 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302558 * NOTE: Since there is only one available tag for device management commands,
2559 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302560 */
2561static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2562 enum dev_cmd_type cmd_type, int timeout)
2563{
2564 struct ufshcd_lrb *lrbp;
2565 int err;
2566 int tag;
2567 struct completion wait;
2568 unsigned long flags;
2569
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002570 down_read(&hba->clk_scaling_lock);
2571
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302572 /*
2573 * Get free slot, sleep if slots are unavailable.
2574 * Even though we use wait_event() which sleeps indefinitely,
2575 * the maximum wait time is bounded by SCSI request timeout.
2576 */
2577 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2578
2579 init_completion(&wait);
2580 lrbp = &hba->lrb[tag];
2581 WARN_ON(lrbp->cmd);
2582 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2583 if (unlikely(err))
2584 goto out_put_tag;
2585
2586 hba->dev_cmd.complete = &wait;
2587
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002588 /* Make sure descriptors are ready before ringing the doorbell */
2589 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302590 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002591 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302592 ufshcd_send_command(hba, tag);
2593 spin_unlock_irqrestore(hba->host->host_lock, flags);
2594
2595 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2596
2597out_put_tag:
2598 ufshcd_put_dev_cmd_tag(hba, tag);
2599 wake_up(&hba->dev_cmd.tag_wq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002600 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302601 return err;
2602}
2603
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302604/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002605 * ufshcd_init_query() - init the query response and request parameters
2606 * @hba: per-adapter instance
2607 * @request: address of the request pointer to be initialized
2608 * @response: address of the response pointer to be initialized
2609 * @opcode: operation to perform
2610 * @idn: flag idn to access
2611 * @index: LU number to access
2612 * @selector: query/flag/descriptor further identification
2613 */
2614static inline void ufshcd_init_query(struct ufs_hba *hba,
2615 struct ufs_query_req **request, struct ufs_query_res **response,
2616 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2617{
2618 *request = &hba->dev_cmd.query.request;
2619 *response = &hba->dev_cmd.query.response;
2620 memset(*request, 0, sizeof(struct ufs_query_req));
2621 memset(*response, 0, sizeof(struct ufs_query_res));
2622 (*request)->upiu_req.opcode = opcode;
2623 (*request)->upiu_req.idn = idn;
2624 (*request)->upiu_req.index = index;
2625 (*request)->upiu_req.selector = selector;
2626}
2627
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002628static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2629 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2630{
2631 int ret;
2632 int retries;
2633
2634 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2635 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2636 if (ret)
2637 dev_dbg(hba->dev,
2638 "%s: failed with error %d, retries %d\n",
2639 __func__, ret, retries);
2640 else
2641 break;
2642 }
2643
2644 if (ret)
2645 dev_err(hba->dev,
2646 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2647 __func__, opcode, idn, ret, retries);
2648 return ret;
2649}
2650
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002651/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302652 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002653 * @hba: per-adapter instance
2654 * @opcode: flag query to perform
2655 * @idn: flag idn to access
2656 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302657 *
2658 * Returns 0 for success, non-zero in case of failure
2659 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002660int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302661 enum flag_idn idn, bool *flag_res)
2662{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002663 struct ufs_query_req *request = NULL;
2664 struct ufs_query_res *response = NULL;
2665 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002666 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302667
2668 BUG_ON(!hba);
2669
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002670 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302671 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002672 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2673 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302674
2675 switch (opcode) {
2676 case UPIU_QUERY_OPCODE_SET_FLAG:
2677 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2678 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2679 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2680 break;
2681 case UPIU_QUERY_OPCODE_READ_FLAG:
2682 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2683 if (!flag_res) {
2684 /* No dummy reads */
2685 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2686 __func__);
2687 err = -EINVAL;
2688 goto out_unlock;
2689 }
2690 break;
2691 default:
2692 dev_err(hba->dev,
2693 "%s: Expected query flag opcode but got = %d\n",
2694 __func__, opcode);
2695 err = -EINVAL;
2696 goto out_unlock;
2697 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302698
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002699 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302700
2701 if (err) {
2702 dev_err(hba->dev,
2703 "%s: Sending flag query for idn %d failed, err = %d\n",
2704 __func__, idn, err);
2705 goto out_unlock;
2706 }
2707
2708 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302709 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302710 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2711
2712out_unlock:
2713 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002714 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302715 return err;
2716}
2717
2718/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302719 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002720 * @hba: per-adapter instance
2721 * @opcode: attribute opcode
2722 * @idn: attribute idn to access
2723 * @index: index field
2724 * @selector: selector field
2725 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302726 *
2727 * Returns 0 for success, non-zero in case of failure
2728*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002729int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2730 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302731{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002732 struct ufs_query_req *request = NULL;
2733 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302734 int err;
2735
2736 BUG_ON(!hba);
2737
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002738 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302739 if (!attr_val) {
2740 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2741 __func__, opcode);
2742 err = -EINVAL;
2743 goto out;
2744 }
2745
2746 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002747 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2748 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302749
2750 switch (opcode) {
2751 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2752 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302753 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302754 break;
2755 case UPIU_QUERY_OPCODE_READ_ATTR:
2756 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2757 break;
2758 default:
2759 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2760 __func__, opcode);
2761 err = -EINVAL;
2762 goto out_unlock;
2763 }
2764
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002765 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302766
2767 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002768 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2769 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302770 goto out_unlock;
2771 }
2772
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302773 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302774
2775out_unlock:
2776 mutex_unlock(&hba->dev_cmd.lock);
2777out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002778 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302779 return err;
2780}
2781
2782/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002783 * ufshcd_query_attr_retry() - API function for sending query
2784 * attribute with retries
2785 * @hba: per-adapter instance
2786 * @opcode: attribute opcode
2787 * @idn: attribute idn to access
2788 * @index: index field
2789 * @selector: selector field
2790 * @attr_val: the attribute value after the query request
2791 * completes
2792 *
2793 * Returns 0 for success, non-zero in case of failure
2794*/
2795static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2796 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2797 u32 *attr_val)
2798{
2799 int ret = 0;
2800 u32 retries;
2801
2802 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2803 ret = ufshcd_query_attr(hba, opcode, idn, index,
2804 selector, attr_val);
2805 if (ret)
2806 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2807 __func__, ret, retries);
2808 else
2809 break;
2810 }
2811
2812 if (ret)
2813 dev_err(hba->dev,
2814 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2815 __func__, idn, ret, QUERY_REQ_RETRIES);
2816 return ret;
2817}
2818
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002819static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002820 enum query_opcode opcode, enum desc_idn idn, u8 index,
2821 u8 selector, u8 *desc_buf, int *buf_len)
2822{
2823 struct ufs_query_req *request = NULL;
2824 struct ufs_query_res *response = NULL;
2825 int err;
2826
2827 BUG_ON(!hba);
2828
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002829 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002830 if (!desc_buf) {
2831 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2832 __func__, opcode);
2833 err = -EINVAL;
2834 goto out;
2835 }
2836
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002837 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002838 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2839 __func__, *buf_len);
2840 err = -EINVAL;
2841 goto out;
2842 }
2843
2844 mutex_lock(&hba->dev_cmd.lock);
2845 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2846 selector);
2847 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002848 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002849
2850 switch (opcode) {
2851 case UPIU_QUERY_OPCODE_WRITE_DESC:
2852 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2853 break;
2854 case UPIU_QUERY_OPCODE_READ_DESC:
2855 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2856 break;
2857 default:
2858 dev_err(hba->dev,
2859 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2860 __func__, opcode);
2861 err = -EINVAL;
2862 goto out_unlock;
2863 }
2864
2865 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2866
2867 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002868 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2869 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002870 goto out_unlock;
2871 }
2872
2873 hba->dev_cmd.query.descriptor = NULL;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002874 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002875
2876out_unlock:
2877 mutex_unlock(&hba->dev_cmd.lock);
2878out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002879 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002880 return err;
2881}
2882
2883/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002884 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2885 * @hba: per-adapter instance
2886 * @opcode: attribute opcode
2887 * @idn: attribute idn to access
2888 * @index: index field
2889 * @selector: selector field
2890 * @desc_buf: the buffer that contains the descriptor
2891 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002892 *
2893 * Returns 0 for success, non-zero in case of failure.
2894 * The buf_len parameter will contain, on return, the length parameter
2895 * received on the response.
2896 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02002897int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2898 enum query_opcode opcode,
2899 enum desc_idn idn, u8 index,
2900 u8 selector,
2901 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002902{
2903 int err;
2904 int retries;
2905
2906 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2907 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2908 selector, desc_buf, buf_len);
2909 if (!err || err == -EINVAL)
2910 break;
2911 }
2912
2913 return err;
2914}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002915
2916/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002917 * ufshcd_read_desc_length - read the specified descriptor length from header
2918 * @hba: Pointer to adapter instance
2919 * @desc_id: descriptor idn value
2920 * @desc_index: descriptor index
2921 * @desc_length: pointer to variable to read the length of descriptor
2922 *
2923 * Return 0 in case of success, non-zero otherwise
2924 */
2925static int ufshcd_read_desc_length(struct ufs_hba *hba,
2926 enum desc_idn desc_id,
2927 int desc_index,
2928 int *desc_length)
2929{
2930 int ret;
2931 u8 header[QUERY_DESC_HDR_SIZE];
2932 int header_len = QUERY_DESC_HDR_SIZE;
2933
2934 if (desc_id >= QUERY_DESC_IDN_MAX)
2935 return -EINVAL;
2936
2937 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2938 desc_id, desc_index, 0, header,
2939 &header_len);
2940
2941 if (ret) {
2942 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2943 __func__, desc_id);
2944 return ret;
2945 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
2946 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
2947 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
2948 desc_id);
2949 ret = -EINVAL;
2950 }
2951
2952 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
2953 return ret;
2954
2955}
2956
2957/**
2958 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
2959 * @hba: Pointer to adapter instance
2960 * @desc_id: descriptor idn value
2961 * @desc_len: mapped desc length (out)
2962 *
2963 * Return 0 in case of success, non-zero otherwise
2964 */
2965int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
2966 enum desc_idn desc_id, int *desc_len)
2967{
2968 switch (desc_id) {
2969 case QUERY_DESC_IDN_DEVICE:
2970 *desc_len = hba->desc_size.dev_desc;
2971 break;
2972 case QUERY_DESC_IDN_POWER:
2973 *desc_len = hba->desc_size.pwr_desc;
2974 break;
2975 case QUERY_DESC_IDN_GEOMETRY:
2976 *desc_len = hba->desc_size.geom_desc;
2977 break;
2978 case QUERY_DESC_IDN_CONFIGURATION:
2979 *desc_len = hba->desc_size.conf_desc;
2980 break;
2981 case QUERY_DESC_IDN_UNIT:
2982 *desc_len = hba->desc_size.unit_desc;
2983 break;
2984 case QUERY_DESC_IDN_INTERCONNECT:
2985 *desc_len = hba->desc_size.interc_desc;
2986 break;
2987 case QUERY_DESC_IDN_STRING:
2988 *desc_len = QUERY_DESC_MAX_SIZE;
2989 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02002990 case QUERY_DESC_IDN_HEALTH:
2991 *desc_len = hba->desc_size.hlth_desc;
2992 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002993 case QUERY_DESC_IDN_RFU_0:
2994 case QUERY_DESC_IDN_RFU_1:
2995 *desc_len = 0;
2996 break;
2997 default:
2998 *desc_len = 0;
2999 return -EINVAL;
3000 }
3001 return 0;
3002}
3003EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3004
3005/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003006 * ufshcd_read_desc_param - read the specified descriptor parameter
3007 * @hba: Pointer to adapter instance
3008 * @desc_id: descriptor idn value
3009 * @desc_index: descriptor index
3010 * @param_offset: offset of the parameter to read
3011 * @param_read_buf: pointer to buffer where parameter would be read
3012 * @param_size: sizeof(param_read_buf)
3013 *
3014 * Return 0 in case of success, non-zero otherwise
3015 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003016int ufshcd_read_desc_param(struct ufs_hba *hba,
3017 enum desc_idn desc_id,
3018 int desc_index,
3019 u8 param_offset,
3020 u8 *param_read_buf,
3021 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003022{
3023 int ret;
3024 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003025 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003026 bool is_kmalloc = true;
3027
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003028 /* Safety check */
3029 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003030 return -EINVAL;
3031
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003032 /* Get the max length of descriptor from structure filled up at probe
3033 * time.
3034 */
3035 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003036
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003037 /* Sanity checks */
3038 if (ret || !buff_len) {
3039 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3040 __func__);
3041 return ret;
3042 }
3043
3044 /* Check whether we need temp memory */
3045 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003046 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3047 if (!desc_buf)
3048 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003049 } else {
3050 desc_buf = param_read_buf;
3051 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003052 }
3053
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003054 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003055 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003056 desc_id, desc_index, 0,
3057 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003058
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003059 if (ret) {
3060 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3061 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003062 goto out;
3063 }
3064
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003065 /* Sanity check */
3066 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3067 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3068 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3069 ret = -EINVAL;
3070 goto out;
3071 }
3072
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003073 /* Check wherher we will not copy more data, than available */
3074 if (is_kmalloc && param_size > buff_len)
3075 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003076
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003077 if (is_kmalloc)
3078 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3079out:
3080 if (is_kmalloc)
3081 kfree(desc_buf);
3082 return ret;
3083}
3084
3085static inline int ufshcd_read_desc(struct ufs_hba *hba,
3086 enum desc_idn desc_id,
3087 int desc_index,
3088 u8 *buf,
3089 u32 size)
3090{
3091 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3092}
3093
3094static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3095 u8 *buf,
3096 u32 size)
3097{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003098 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003099}
3100
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003101static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003102{
3103 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3104}
Yaniv Gardib573d482016-03-10 17:37:09 +02003105
3106/**
3107 * ufshcd_read_string_desc - read string descriptor
3108 * @hba: pointer to adapter instance
3109 * @desc_index: descriptor index
3110 * @buf: pointer to buffer where descriptor would be read
3111 * @size: size of buf
3112 * @ascii: if true convert from unicode to ascii characters
3113 *
3114 * Return 0 in case of success, non-zero otherwise
3115 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003116int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3117 u8 *buf, u32 size, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003118{
3119 int err = 0;
3120
3121 err = ufshcd_read_desc(hba,
3122 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3123
3124 if (err) {
3125 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3126 __func__, QUERY_REQ_RETRIES, err);
3127 goto out;
3128 }
3129
3130 if (ascii) {
3131 int desc_len;
3132 int ascii_len;
3133 int i;
3134 char *buff_ascii;
3135
3136 desc_len = buf[0];
3137 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3138 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3139 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3140 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3141 __func__);
3142 err = -ENOMEM;
3143 goto out;
3144 }
3145
3146 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3147 if (!buff_ascii) {
3148 err = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003149 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003150 }
3151
3152 /*
3153 * the descriptor contains string in UTF16 format
3154 * we need to convert to utf-8 so it can be displayed
3155 */
3156 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3157 desc_len - QUERY_DESC_HDR_SIZE,
3158 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3159
3160 /* replace non-printable or non-ASCII characters with spaces */
3161 for (i = 0; i < ascii_len; i++)
3162 ufshcd_remove_non_printable(&buff_ascii[i]);
3163
3164 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3165 size - QUERY_DESC_HDR_SIZE);
3166 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3167 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
Yaniv Gardib573d482016-03-10 17:37:09 +02003168 kfree(buff_ascii);
3169 }
3170out:
3171 return err;
3172}
Yaniv Gardib573d482016-03-10 17:37:09 +02003173
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003174/**
3175 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3176 * @hba: Pointer to adapter instance
3177 * @lun: lun id
3178 * @param_offset: offset of the parameter to read
3179 * @param_read_buf: pointer to buffer where parameter would be read
3180 * @param_size: sizeof(param_read_buf)
3181 *
3182 * Return 0 in case of success, non-zero otherwise
3183 */
3184static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3185 int lun,
3186 enum unit_desc_param param_offset,
3187 u8 *param_read_buf,
3188 u32 param_size)
3189{
3190 /*
3191 * Unit descriptors are only available for general purpose LUs (LUN id
3192 * from 0 to 7) and RPMB Well known LU.
3193 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003194 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003195 return -EOPNOTSUPP;
3196
3197 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3198 param_offset, param_read_buf, param_size);
3199}
3200
3201/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303202 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3203 * @hba: per adapter instance
3204 *
3205 * 1. Allocate DMA memory for Command Descriptor array
3206 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3207 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3208 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3209 * (UTMRDL)
3210 * 4. Allocate memory for local reference block(lrb).
3211 *
3212 * Returns 0 for success, non-zero in case of failure
3213 */
3214static int ufshcd_memory_alloc(struct ufs_hba *hba)
3215{
3216 size_t utmrdl_size, utrdl_size, ucdl_size;
3217
3218 /* Allocate memory for UTP command descriptors */
3219 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003220 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3221 ucdl_size,
3222 &hba->ucdl_dma_addr,
3223 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303224
3225 /*
3226 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3227 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3228 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3229 * be aligned to 128 bytes as well
3230 */
3231 if (!hba->ucdl_base_addr ||
3232 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303233 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303234 "Command Descriptor Memory allocation failed\n");
3235 goto out;
3236 }
3237
3238 /*
3239 * Allocate memory for UTP Transfer descriptors
3240 * UFSHCI requires 1024 byte alignment of UTRD
3241 */
3242 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003243 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3244 utrdl_size,
3245 &hba->utrdl_dma_addr,
3246 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303247 if (!hba->utrdl_base_addr ||
3248 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303249 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303250 "Transfer Descriptor Memory allocation failed\n");
3251 goto out;
3252 }
3253
3254 /*
3255 * Allocate memory for UTP Task Management descriptors
3256 * UFSHCI requires 1024 byte alignment of UTMRD
3257 */
3258 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003259 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3260 utmrdl_size,
3261 &hba->utmrdl_dma_addr,
3262 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303263 if (!hba->utmrdl_base_addr ||
3264 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303265 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303266 "Task Management Descriptor Memory allocation failed\n");
3267 goto out;
3268 }
3269
3270 /* Allocate memory for local reference block */
Seungwon Jeon2953f852013-06-27 13:31:54 +09003271 hba->lrb = devm_kzalloc(hba->dev,
3272 hba->nutrs * sizeof(struct ufshcd_lrb),
3273 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303274 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303275 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303276 goto out;
3277 }
3278 return 0;
3279out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303280 return -ENOMEM;
3281}
3282
3283/**
3284 * ufshcd_host_memory_configure - configure local reference block with
3285 * memory offsets
3286 * @hba: per adapter instance
3287 *
3288 * Configure Host memory space
3289 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3290 * address.
3291 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3292 * and PRDT offset.
3293 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3294 * into local reference block.
3295 */
3296static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3297{
3298 struct utp_transfer_cmd_desc *cmd_descp;
3299 struct utp_transfer_req_desc *utrdlp;
3300 dma_addr_t cmd_desc_dma_addr;
3301 dma_addr_t cmd_desc_element_addr;
3302 u16 response_offset;
3303 u16 prdt_offset;
3304 int cmd_desc_size;
3305 int i;
3306
3307 utrdlp = hba->utrdl_base_addr;
3308 cmd_descp = hba->ucdl_base_addr;
3309
3310 response_offset =
3311 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3312 prdt_offset =
3313 offsetof(struct utp_transfer_cmd_desc, prd_table);
3314
3315 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3316 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3317
3318 for (i = 0; i < hba->nutrs; i++) {
3319 /* Configure UTRD with command descriptor base address */
3320 cmd_desc_element_addr =
3321 (cmd_desc_dma_addr + (cmd_desc_size * i));
3322 utrdlp[i].command_desc_base_addr_lo =
3323 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3324 utrdlp[i].command_desc_base_addr_hi =
3325 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3326
3327 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003328 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3329 utrdlp[i].response_upiu_offset =
3330 cpu_to_le16(response_offset);
3331 utrdlp[i].prd_table_offset =
3332 cpu_to_le16(prdt_offset);
3333 utrdlp[i].response_upiu_length =
3334 cpu_to_le16(ALIGNED_UPIU_SIZE);
3335 } else {
3336 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303337 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003338 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303339 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003340 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303341 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003342 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303343
3344 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003345 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3346 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303347 hba->lrb[i].ucd_req_ptr =
3348 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003349 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303350 hba->lrb[i].ucd_rsp_ptr =
3351 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003352 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3353 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303354 hba->lrb[i].ucd_prdt_ptr =
3355 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003356 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3357 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303358 }
3359}
3360
3361/**
3362 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3363 * @hba: per adapter instance
3364 *
3365 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3366 * in order to initialize the Unipro link startup procedure.
3367 * Once the Unipro links are up, the device connected to the controller
3368 * is detected.
3369 *
3370 * Returns 0 on success, non-zero value on failure
3371 */
3372static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3373{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303374 struct uic_command uic_cmd = {0};
3375 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303376
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303377 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3378
3379 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3380 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003381 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303382 "dme-link-startup: error code %d\n", ret);
3383 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303384}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303385/**
3386 * ufshcd_dme_reset - UIC command for DME_RESET
3387 * @hba: per adapter instance
3388 *
3389 * DME_RESET command is issued in order to reset UniPro stack.
3390 * This function now deal with cold reset.
3391 *
3392 * Returns 0 on success, non-zero value on failure
3393 */
3394static int ufshcd_dme_reset(struct ufs_hba *hba)
3395{
3396 struct uic_command uic_cmd = {0};
3397 int ret;
3398
3399 uic_cmd.command = UIC_CMD_DME_RESET;
3400
3401 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3402 if (ret)
3403 dev_err(hba->dev,
3404 "dme-reset: error code %d\n", ret);
3405
3406 return ret;
3407}
3408
3409/**
3410 * ufshcd_dme_enable - UIC command for DME_ENABLE
3411 * @hba: per adapter instance
3412 *
3413 * DME_ENABLE command is issued in order to enable UniPro stack.
3414 *
3415 * Returns 0 on success, non-zero value on failure
3416 */
3417static int ufshcd_dme_enable(struct ufs_hba *hba)
3418{
3419 struct uic_command uic_cmd = {0};
3420 int ret;
3421
3422 uic_cmd.command = UIC_CMD_DME_ENABLE;
3423
3424 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3425 if (ret)
3426 dev_err(hba->dev,
3427 "dme-reset: error code %d\n", ret);
3428
3429 return ret;
3430}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303431
Yaniv Gardicad2e032015-03-31 17:37:14 +03003432static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3433{
3434 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3435 unsigned long min_sleep_time_us;
3436
3437 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3438 return;
3439
3440 /*
3441 * last_dme_cmd_tstamp will be 0 only for 1st call to
3442 * this function
3443 */
3444 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3445 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3446 } else {
3447 unsigned long delta =
3448 (unsigned long) ktime_to_us(
3449 ktime_sub(ktime_get(),
3450 hba->last_dme_cmd_tstamp));
3451
3452 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3453 min_sleep_time_us =
3454 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3455 else
3456 return; /* no more delay required */
3457 }
3458
3459 /* allow sleep for extra 50us if needed */
3460 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3461}
3462
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303463/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303464 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3465 * @hba: per adapter instance
3466 * @attr_sel: uic command argument1
3467 * @attr_set: attribute set type as uic command argument2
3468 * @mib_val: setting value as uic command argument3
3469 * @peer: indicate whether peer or local
3470 *
3471 * Returns 0 on success, non-zero value on failure
3472 */
3473int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3474 u8 attr_set, u32 mib_val, u8 peer)
3475{
3476 struct uic_command uic_cmd = {0};
3477 static const char *const action[] = {
3478 "dme-set",
3479 "dme-peer-set"
3480 };
3481 const char *set = action[!!peer];
3482 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003483 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303484
3485 uic_cmd.command = peer ?
3486 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3487 uic_cmd.argument1 = attr_sel;
3488 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3489 uic_cmd.argument3 = mib_val;
3490
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003491 do {
3492 /* for peer attributes we retry upon failure */
3493 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3494 if (ret)
3495 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3496 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3497 } while (ret && peer && --retries);
3498
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003499 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003500 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003501 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3502 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303503
3504 return ret;
3505}
3506EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3507
3508/**
3509 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3510 * @hba: per adapter instance
3511 * @attr_sel: uic command argument1
3512 * @mib_val: the value of the attribute as returned by the UIC command
3513 * @peer: indicate whether peer or local
3514 *
3515 * Returns 0 on success, non-zero value on failure
3516 */
3517int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3518 u32 *mib_val, u8 peer)
3519{
3520 struct uic_command uic_cmd = {0};
3521 static const char *const action[] = {
3522 "dme-get",
3523 "dme-peer-get"
3524 };
3525 const char *get = action[!!peer];
3526 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003527 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003528 struct ufs_pa_layer_attr orig_pwr_info;
3529 struct ufs_pa_layer_attr temp_pwr_info;
3530 bool pwr_mode_change = false;
3531
3532 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3533 orig_pwr_info = hba->pwr_info;
3534 temp_pwr_info = orig_pwr_info;
3535
3536 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3537 orig_pwr_info.pwr_rx == FAST_MODE) {
3538 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3539 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3540 pwr_mode_change = true;
3541 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3542 orig_pwr_info.pwr_rx == SLOW_MODE) {
3543 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3544 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3545 pwr_mode_change = true;
3546 }
3547 if (pwr_mode_change) {
3548 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3549 if (ret)
3550 goto out;
3551 }
3552 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303553
3554 uic_cmd.command = peer ?
3555 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3556 uic_cmd.argument1 = attr_sel;
3557
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003558 do {
3559 /* for peer attributes we retry upon failure */
3560 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3561 if (ret)
3562 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3563 get, UIC_GET_ATTR_ID(attr_sel), ret);
3564 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303565
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003566 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003567 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003568 get, UIC_GET_ATTR_ID(attr_sel),
3569 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003570
3571 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303572 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003573
3574 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3575 && pwr_mode_change)
3576 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303577out:
3578 return ret;
3579}
3580EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3581
3582/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003583 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3584 * state) and waits for it to take effect.
3585 *
3586 * @hba: per adapter instance
3587 * @cmd: UIC command to execute
3588 *
3589 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3590 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3591 * and device UniPro link and hence it's final completion would be indicated by
3592 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3593 * addition to normal UIC command completion Status (UCCS). This function only
3594 * returns after the relevant status bits indicate the completion.
3595 *
3596 * Returns 0 on success, non-zero value on failure
3597 */
3598static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3599{
3600 struct completion uic_async_done;
3601 unsigned long flags;
3602 u8 status;
3603 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003604 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003605
3606 mutex_lock(&hba->uic_cmd_mutex);
3607 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003608 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003609
3610 spin_lock_irqsave(hba->host->host_lock, flags);
3611 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003612 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3613 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3614 /*
3615 * Make sure UIC command completion interrupt is disabled before
3616 * issuing UIC command.
3617 */
3618 wmb();
3619 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003620 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003621 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3622 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003623 if (ret) {
3624 dev_err(hba->dev,
3625 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3626 cmd->command, cmd->argument3, ret);
3627 goto out;
3628 }
3629
3630 if (!wait_for_completion_timeout(hba->uic_async_done,
3631 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3632 dev_err(hba->dev,
3633 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3634 cmd->command, cmd->argument3);
3635 ret = -ETIMEDOUT;
3636 goto out;
3637 }
3638
3639 status = ufshcd_get_upmcrs(hba);
3640 if (status != PWR_LOCAL) {
3641 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003642 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003643 cmd->command, status);
3644 ret = (status != PWR_OK) ? status : -1;
3645 }
3646out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003647 if (ret) {
3648 ufshcd_print_host_state(hba);
3649 ufshcd_print_pwr_info(hba);
3650 ufshcd_print_host_regs(hba);
3651 }
3652
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003653 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003654 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003655 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003656 if (reenable_intr)
3657 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003658 spin_unlock_irqrestore(hba->host->host_lock, flags);
3659 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003660
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003661 return ret;
3662}
3663
3664/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303665 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3666 * using DME_SET primitives.
3667 * @hba: per adapter instance
3668 * @mode: powr mode value
3669 *
3670 * Returns 0 on success, non-zero value on failure
3671 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303672static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303673{
3674 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003675 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303676
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003677 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3678 ret = ufshcd_dme_set(hba,
3679 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3680 if (ret) {
3681 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3682 __func__, ret);
3683 goto out;
3684 }
3685 }
3686
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303687 uic_cmd.command = UIC_CMD_DME_SET;
3688 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3689 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003690 ufshcd_hold(hba, false);
3691 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3692 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303693
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003694out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003695 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003696}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303697
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003698static int ufshcd_link_recovery(struct ufs_hba *hba)
3699{
3700 int ret;
3701 unsigned long flags;
3702
3703 spin_lock_irqsave(hba->host->host_lock, flags);
3704 hba->ufshcd_state = UFSHCD_STATE_RESET;
3705 ufshcd_set_eh_in_progress(hba);
3706 spin_unlock_irqrestore(hba->host->host_lock, flags);
3707
3708 ret = ufshcd_host_reset_and_restore(hba);
3709
3710 spin_lock_irqsave(hba->host->host_lock, flags);
3711 if (ret)
3712 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3713 ufshcd_clear_eh_in_progress(hba);
3714 spin_unlock_irqrestore(hba->host->host_lock, flags);
3715
3716 if (ret)
3717 dev_err(hba->dev, "%s: link recovery failed, err %d",
3718 __func__, ret);
3719
3720 return ret;
3721}
3722
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003723static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003724{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003725 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003726 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003727 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003728
Kiwoong Kimee32c902016-11-10 21:17:43 +09003729 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3730
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003731 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003732 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003733 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3734 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003735
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003736 if (ret) {
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003737 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3738 __func__, ret);
3739
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003740 /*
3741 * If link recovery fails then return error so that caller
3742 * don't retry the hibern8 enter again.
3743 */
3744 if (ufshcd_link_recovery(hba))
3745 ret = -ENOLINK;
Kiwoong Kimee32c902016-11-10 21:17:43 +09003746 } else
3747 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3748 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003749
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003750 return ret;
3751}
3752
3753static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3754{
3755 int ret = 0, retries;
3756
3757 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3758 ret = __ufshcd_uic_hibern8_enter(hba);
3759 if (!ret || ret == -ENOLINK)
3760 goto out;
3761 }
3762out:
3763 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003764}
3765
3766static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3767{
3768 struct uic_command uic_cmd = {0};
3769 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003770 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003771
Kiwoong Kimee32c902016-11-10 21:17:43 +09003772 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3773
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003774 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3775 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003776 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3777 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3778
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303779 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003780 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3781 __func__, ret);
3782 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003783 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003784 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3785 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003786 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3787 hba->ufs_stats.hibern8_exit_cnt++;
3788 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303789
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303790 return ret;
3791}
3792
Adrian Hunterad448372018-03-20 15:07:38 +02003793static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3794{
3795 unsigned long flags;
3796
3797 if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) || !hba->ahit)
3798 return;
3799
3800 spin_lock_irqsave(hba->host->host_lock, flags);
3801 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3802 spin_unlock_irqrestore(hba->host->host_lock, flags);
3803}
3804
Yaniv Gardi50646362014-10-23 13:25:13 +03003805 /**
3806 * ufshcd_init_pwr_info - setting the POR (power on reset)
3807 * values in hba power info
3808 * @hba: per-adapter instance
3809 */
3810static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3811{
3812 hba->pwr_info.gear_rx = UFS_PWM_G1;
3813 hba->pwr_info.gear_tx = UFS_PWM_G1;
3814 hba->pwr_info.lane_rx = 1;
3815 hba->pwr_info.lane_tx = 1;
3816 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3817 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3818 hba->pwr_info.hs_rate = 0;
3819}
3820
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303821/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003822 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3823 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303824 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003825static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303826{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003827 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3828
3829 if (hba->max_pwr_info.is_valid)
3830 return 0;
3831
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003832 pwr_info->pwr_tx = FAST_MODE;
3833 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003834 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303835
3836 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003837 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3838 &pwr_info->lane_rx);
3839 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3840 &pwr_info->lane_tx);
3841
3842 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3843 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3844 __func__,
3845 pwr_info->lane_rx,
3846 pwr_info->lane_tx);
3847 return -EINVAL;
3848 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303849
3850 /*
3851 * First, get the maximum gears of HS speed.
3852 * If a zero value, it means there is no HSGEAR capability.
3853 * Then, get the maximum gears of PWM speed.
3854 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003855 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3856 if (!pwr_info->gear_rx) {
3857 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3858 &pwr_info->gear_rx);
3859 if (!pwr_info->gear_rx) {
3860 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3861 __func__, pwr_info->gear_rx);
3862 return -EINVAL;
3863 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003864 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303865 }
3866
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003867 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3868 &pwr_info->gear_tx);
3869 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303870 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003871 &pwr_info->gear_tx);
3872 if (!pwr_info->gear_tx) {
3873 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3874 __func__, pwr_info->gear_tx);
3875 return -EINVAL;
3876 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003877 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003878 }
3879
3880 hba->max_pwr_info.is_valid = true;
3881 return 0;
3882}
3883
3884static int ufshcd_change_power_mode(struct ufs_hba *hba,
3885 struct ufs_pa_layer_attr *pwr_mode)
3886{
3887 int ret;
3888
3889 /* if already configured to the requested pwr_mode */
3890 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3891 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3892 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
3893 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
3894 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
3895 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
3896 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
3897 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
3898 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303899 }
3900
3901 /*
3902 * Configure attributes for power mode change with below.
3903 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
3904 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
3905 * - PA_HSSERIES
3906 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003907 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
3908 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
3909 pwr_mode->lane_rx);
3910 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
3911 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303912 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003913 else
3914 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303915
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003916 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
3917 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
3918 pwr_mode->lane_tx);
3919 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
3920 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303921 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003922 else
3923 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303924
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003925 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
3926 pwr_mode->pwr_tx == FASTAUTO_MODE ||
3927 pwr_mode->pwr_rx == FAST_MODE ||
3928 pwr_mode->pwr_tx == FAST_MODE)
3929 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
3930 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303931
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003932 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
3933 | pwr_mode->pwr_tx);
3934
3935 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303936 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003937 "%s: power mode change failed %d\n", __func__, ret);
3938 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02003939 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
3940 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003941
3942 memcpy(&hba->pwr_info, pwr_mode,
3943 sizeof(struct ufs_pa_layer_attr));
3944 }
3945
3946 return ret;
3947}
3948
3949/**
3950 * ufshcd_config_pwr_mode - configure a new power mode
3951 * @hba: per-adapter instance
3952 * @desired_pwr_mode: desired power configuration
3953 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05303954int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003955 struct ufs_pa_layer_attr *desired_pwr_mode)
3956{
3957 struct ufs_pa_layer_attr final_params = { 0 };
3958 int ret;
3959
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02003960 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
3961 desired_pwr_mode, &final_params);
3962
3963 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003964 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
3965
3966 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08003967 if (!ret)
3968 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303969
3970 return ret;
3971}
Alim Akhtar0d846e72018-05-06 15:44:18 +05303972EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303973
3974/**
Dolev Raviv68078d52013-07-30 00:35:58 +05303975 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003976 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05303977 *
3978 * Set fDeviceInit flag and poll until device toggles it.
3979 */
3980static int ufshcd_complete_dev_init(struct ufs_hba *hba)
3981{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003982 int i;
3983 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05303984 bool flag_res = 1;
3985
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003986 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
3987 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05303988 if (err) {
3989 dev_err(hba->dev,
3990 "%s setting fDeviceInit flag failed with error %d\n",
3991 __func__, err);
3992 goto out;
3993 }
3994
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003995 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
3996 for (i = 0; i < 1000 && !err && flag_res; i++)
3997 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
3998 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
3999
Dolev Raviv68078d52013-07-30 00:35:58 +05304000 if (err)
4001 dev_err(hba->dev,
4002 "%s reading fDeviceInit flag failed with error %d\n",
4003 __func__, err);
4004 else if (flag_res)
4005 dev_err(hba->dev,
4006 "%s fDeviceInit was not cleared by the device\n",
4007 __func__);
4008
4009out:
4010 return err;
4011}
4012
4013/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304014 * ufshcd_make_hba_operational - Make UFS controller operational
4015 * @hba: per adapter instance
4016 *
4017 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004018 * 1. Enable required interrupts
4019 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004020 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004021 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304022 *
4023 * Returns 0 on success, non-zero value on failure
4024 */
4025static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4026{
4027 int err = 0;
4028 u32 reg;
4029
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304030 /* Enable required interrupts */
4031 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4032
4033 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004034 if (ufshcd_is_intr_aggr_allowed(hba))
4035 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4036 else
4037 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304038
4039 /* Configure UTRL and UTMRL base address registers */
4040 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4041 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4042 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4043 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4044 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4045 REG_UTP_TASK_REQ_LIST_BASE_L);
4046 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4047 REG_UTP_TASK_REQ_LIST_BASE_H);
4048
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304049 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004050 * Make sure base address and interrupt setup are updated before
4051 * enabling the run/stop registers below.
4052 */
4053 wmb();
4054
4055 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304056 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304057 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004058 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304059 if (!(ufshcd_get_lists_status(reg))) {
4060 ufshcd_enable_run_stop_reg(hba);
4061 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304062 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304063 "Host controller not ready to process requests");
4064 err = -EIO;
4065 goto out;
4066 }
4067
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304068out:
4069 return err;
4070}
4071
4072/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004073 * ufshcd_hba_stop - Send controller to reset state
4074 * @hba: per adapter instance
4075 * @can_sleep: perform sleep or just spin
4076 */
4077static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4078{
4079 int err;
4080
4081 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4082 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4083 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4084 10, 1, can_sleep);
4085 if (err)
4086 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4087}
4088
4089/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304090 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304091 * @hba: per adapter instance
4092 *
4093 * The controller resets itself and controller firmware initialization
4094 * sequence kicks off. When controller is ready it will set
4095 * the Host Controller Enable bit to 1.
4096 *
4097 * Returns 0 on success, non-zero value on failure
4098 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304099static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304100{
4101 int retry;
4102
4103 /*
4104 * msleep of 1 and 5 used in this function might result in msleep(20),
4105 * but it was necessary to send the UFS FPGA to reset mode during
4106 * development and testing of this driver. msleep can be changed to
4107 * mdelay and retry count can be reduced based on the controller.
4108 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004109 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304110 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004111 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304112
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004113 /* UniPro link is disabled at this point */
4114 ufshcd_set_link_off(hba);
4115
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004116 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004117
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304118 /* start controller initialization sequence */
4119 ufshcd_hba_start(hba);
4120
4121 /*
4122 * To initialize a UFS host controller HCE bit must be set to 1.
4123 * During initialization the HCE bit value changes from 1->0->1.
4124 * When the host controller completes initialization sequence
4125 * it sets the value of HCE bit to 1. The same HCE bit is read back
4126 * to check if the controller has completed initialization sequence.
4127 * So without this delay the value HCE = 1, set in the previous
4128 * instruction might be read back.
4129 * This delay can be changed based on the controller.
4130 */
4131 msleep(1);
4132
4133 /* wait for the host controller to complete initialization */
4134 retry = 10;
4135 while (ufshcd_is_hba_active(hba)) {
4136 if (retry) {
4137 retry--;
4138 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304139 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304140 "Controller enable failed\n");
4141 return -EIO;
4142 }
4143 msleep(5);
4144 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004145
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004146 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004147 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004148
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004149 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004150
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304151 return 0;
4152}
4153
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304154static int ufshcd_hba_enable(struct ufs_hba *hba)
4155{
4156 int ret;
4157
4158 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4159 ufshcd_set_link_off(hba);
4160 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4161
4162 /* enable UIC related interrupts */
4163 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4164 ret = ufshcd_dme_reset(hba);
4165 if (!ret) {
4166 ret = ufshcd_dme_enable(hba);
4167 if (!ret)
4168 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4169 if (ret)
4170 dev_err(hba->dev,
4171 "Host controller enable failed with non-hce\n");
4172 }
4173 } else {
4174 ret = ufshcd_hba_execute_hce(hba);
4175 }
4176
4177 return ret;
4178}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004179static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4180{
4181 int tx_lanes, i, err = 0;
4182
4183 if (!peer)
4184 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4185 &tx_lanes);
4186 else
4187 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4188 &tx_lanes);
4189 for (i = 0; i < tx_lanes; i++) {
4190 if (!peer)
4191 err = ufshcd_dme_set(hba,
4192 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4193 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4194 0);
4195 else
4196 err = ufshcd_dme_peer_set(hba,
4197 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4198 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4199 0);
4200 if (err) {
4201 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4202 __func__, peer, i, err);
4203 break;
4204 }
4205 }
4206
4207 return err;
4208}
4209
4210static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4211{
4212 return ufshcd_disable_tx_lcc(hba, true);
4213}
4214
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304215/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304216 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304217 * @hba: per adapter instance
4218 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304219 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304220 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304221static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304222{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304223 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004224 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004225 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304226
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004227 /*
4228 * If UFS device isn't active then we will have to issue link startup
4229 * 2 times to make sure the device state move to active.
4230 */
4231 if (!ufshcd_is_ufs_dev_active(hba))
4232 link_startup_again = true;
4233
4234link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004235 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004236 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304237
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004238 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004239
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004240 /* check if device is detected by inter-connect layer */
4241 if (!ret && !ufshcd_is_device_present(hba)) {
4242 dev_err(hba->dev, "%s: Device not present\n", __func__);
4243 ret = -ENXIO;
4244 goto out;
4245 }
4246
4247 /*
4248 * DME link lost indication is only received when link is up,
4249 * but we can't be sure if the link is up until link startup
4250 * succeeds. So reset the local Uni-Pro and try again.
4251 */
4252 if (ret && ufshcd_hba_enable(hba))
4253 goto out;
4254 } while (ret && retries--);
4255
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304256 if (ret)
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004257 /* failed to get the link up... retire */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304258 goto out;
4259
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004260 if (link_startup_again) {
4261 link_startup_again = false;
4262 retries = DME_LINKSTARTUP_RETRIES;
4263 goto link_startup;
4264 }
4265
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004266 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4267 ufshcd_init_pwr_info(hba);
4268 ufshcd_print_pwr_info(hba);
4269
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004270 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4271 ret = ufshcd_disable_device_tx_lcc(hba);
4272 if (ret)
4273 goto out;
4274 }
4275
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004276 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004277 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4278 if (ret)
4279 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004280
4281 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304282out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004283 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304284 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004285 ufshcd_print_host_state(hba);
4286 ufshcd_print_pwr_info(hba);
4287 ufshcd_print_host_regs(hba);
4288 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304289 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304290}
4291
4292/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304293 * ufshcd_verify_dev_init() - Verify device initialization
4294 * @hba: per-adapter instance
4295 *
4296 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4297 * device Transport Protocol (UTP) layer is ready after a reset.
4298 * If the UTP layer at the device side is not initialized, it may
4299 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4300 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4301 */
4302static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4303{
4304 int err = 0;
4305 int retries;
4306
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004307 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304308 mutex_lock(&hba->dev_cmd.lock);
4309 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4310 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4311 NOP_OUT_TIMEOUT);
4312
4313 if (!err || err == -ETIMEDOUT)
4314 break;
4315
4316 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4317 }
4318 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004319 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304320
4321 if (err)
4322 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4323 return err;
4324}
4325
4326/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004327 * ufshcd_set_queue_depth - set lun queue depth
4328 * @sdev: pointer to SCSI device
4329 *
4330 * Read bLUQueueDepth value and activate scsi tagged command
4331 * queueing. For WLUN, queue depth is set to 1. For best-effort
4332 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4333 * value that host can queue.
4334 */
4335static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4336{
4337 int ret = 0;
4338 u8 lun_qdepth;
4339 struct ufs_hba *hba;
4340
4341 hba = shost_priv(sdev->host);
4342
4343 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004344 ret = ufshcd_read_unit_desc_param(hba,
4345 ufshcd_scsi_to_upiu_lun(sdev->lun),
4346 UNIT_DESC_PARAM_LU_Q_DEPTH,
4347 &lun_qdepth,
4348 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004349
4350 /* Some WLUN doesn't support unit descriptor */
4351 if (ret == -EOPNOTSUPP)
4352 lun_qdepth = 1;
4353 else if (!lun_qdepth)
4354 /* eventually, we can figure out the real queue depth */
4355 lun_qdepth = hba->nutrs;
4356 else
4357 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4358
4359 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4360 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004361 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004362}
4363
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004364/*
4365 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4366 * @hba: per-adapter instance
4367 * @lun: UFS device lun id
4368 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4369 *
4370 * Returns 0 in case of success and b_lu_write_protect status would be returned
4371 * @b_lu_write_protect parameter.
4372 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4373 * Returns -EINVAL in case of invalid parameters passed to this function.
4374 */
4375static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4376 u8 lun,
4377 u8 *b_lu_write_protect)
4378{
4379 int ret;
4380
4381 if (!b_lu_write_protect)
4382 ret = -EINVAL;
4383 /*
4384 * According to UFS device spec, RPMB LU can't be write
4385 * protected so skip reading bLUWriteProtect parameter for
4386 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4387 */
4388 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4389 ret = -ENOTSUPP;
4390 else
4391 ret = ufshcd_read_unit_desc_param(hba,
4392 lun,
4393 UNIT_DESC_PARAM_LU_WR_PROTECT,
4394 b_lu_write_protect,
4395 sizeof(*b_lu_write_protect));
4396 return ret;
4397}
4398
4399/**
4400 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4401 * status
4402 * @hba: per-adapter instance
4403 * @sdev: pointer to SCSI device
4404 *
4405 */
4406static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4407 struct scsi_device *sdev)
4408{
4409 if (hba->dev_info.f_power_on_wp_en &&
4410 !hba->dev_info.is_lu_power_on_wp) {
4411 u8 b_lu_write_protect;
4412
4413 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4414 &b_lu_write_protect) &&
4415 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4416 hba->dev_info.is_lu_power_on_wp = true;
4417 }
4418}
4419
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004420/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304421 * ufshcd_slave_alloc - handle initial SCSI device configurations
4422 * @sdev: pointer to SCSI device
4423 *
4424 * Returns success
4425 */
4426static int ufshcd_slave_alloc(struct scsi_device *sdev)
4427{
4428 struct ufs_hba *hba;
4429
4430 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304431
4432 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4433 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304434
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304435 /* allow SCSI layer to restart the device in case of errors */
4436 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004437
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004438 /* REPORT SUPPORTED OPERATION CODES is not supported */
4439 sdev->no_report_opcodes = 1;
4440
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304441 /* WRITE_SAME command is not supported */
4442 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004443
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004444 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004445
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004446 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4447
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004448 return 0;
4449}
4450
4451/**
4452 * ufshcd_change_queue_depth - change queue depth
4453 * @sdev: pointer to SCSI device
4454 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004455 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004456 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004457 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004458static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004459{
4460 struct ufs_hba *hba = shost_priv(sdev->host);
4461
4462 if (depth > hba->nutrs)
4463 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004464 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304465}
4466
4467/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004468 * ufshcd_slave_configure - adjust SCSI device configurations
4469 * @sdev: pointer to SCSI device
4470 */
4471static int ufshcd_slave_configure(struct scsi_device *sdev)
4472{
4473 struct request_queue *q = sdev->request_queue;
4474
4475 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4476 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4477
4478 return 0;
4479}
4480
4481/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304482 * ufshcd_slave_destroy - remove SCSI device configurations
4483 * @sdev: pointer to SCSI device
4484 */
4485static void ufshcd_slave_destroy(struct scsi_device *sdev)
4486{
4487 struct ufs_hba *hba;
4488
4489 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004490 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004491 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4492 unsigned long flags;
4493
4494 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004495 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004496 spin_unlock_irqrestore(hba->host->host_lock, flags);
4497 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304498}
4499
4500/**
4501 * ufshcd_task_req_compl - handle task management request completion
4502 * @hba: per adapter instance
4503 * @index: index of the completed request
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304504 * @resp: task management service response
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304505 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304506 * Returns non-zero value on error, zero on success
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304507 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304508static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304509{
4510 struct utp_task_req_desc *task_req_descp;
4511 struct utp_upiu_task_rsp *task_rsp_upiup;
4512 unsigned long flags;
4513 int ocs_value;
4514 int task_result;
4515
4516 spin_lock_irqsave(hba->host->host_lock, flags);
4517
4518 /* Clear completed tasks from outstanding_tasks */
4519 __clear_bit(index, &hba->outstanding_tasks);
4520
4521 task_req_descp = hba->utmrdl_base_addr;
4522 ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
4523
4524 if (ocs_value == OCS_SUCCESS) {
4525 task_rsp_upiup = (struct utp_upiu_task_rsp *)
4526 task_req_descp[index].task_rsp_upiu;
Kiwoong Kim8794ee02016-09-09 08:22:22 +09004527 task_result = be32_to_cpu(task_rsp_upiup->output_param1);
4528 task_result = task_result & MASK_TM_SERVICE_RESP;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304529 if (resp)
4530 *resp = (u8)task_result;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304531 } else {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304532 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
4533 __func__, ocs_value);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304534 }
4535 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304536
4537 return ocs_value;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304538}
4539
4540/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304541 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004542 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304543 * @scsi_status: SCSI command status
4544 *
4545 * Returns value base on SCSI command status
4546 */
4547static inline int
4548ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4549{
4550 int result = 0;
4551
4552 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304553 case SAM_STAT_CHECK_CONDITION:
4554 ufshcd_copy_sense_data(lrbp);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304555 case SAM_STAT_GOOD:
4556 result |= DID_OK << 16 |
4557 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304558 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304559 break;
4560 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304561 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304562 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304563 ufshcd_copy_sense_data(lrbp);
4564 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304565 break;
4566 default:
4567 result |= DID_ERROR << 16;
4568 break;
4569 } /* end of switch */
4570
4571 return result;
4572}
4573
4574/**
4575 * ufshcd_transfer_rsp_status - Get overall status of the response
4576 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004577 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304578 *
4579 * Returns result of the command to notify SCSI midlayer
4580 */
4581static inline int
4582ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4583{
4584 int result = 0;
4585 int scsi_status;
4586 int ocs;
4587
4588 /* overall command status of utrd */
4589 ocs = ufshcd_get_tr_ocs(lrbp);
4590
4591 switch (ocs) {
4592 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304593 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004594 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304595 switch (result) {
4596 case UPIU_TRANSACTION_RESPONSE:
4597 /*
4598 * get the response UPIU result to extract
4599 * the SCSI command status
4600 */
4601 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4602
4603 /*
4604 * get the result based on SCSI status response
4605 * to notify the SCSI midlayer of the command status
4606 */
4607 scsi_status = result & MASK_SCSI_STATUS;
4608 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304609
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004610 /*
4611 * Currently we are only supporting BKOPs exception
4612 * events hence we can ignore BKOPs exception event
4613 * during power management callbacks. BKOPs exception
4614 * event is not expected to be raised in runtime suspend
4615 * callback as it allows the urgent bkops.
4616 * During system suspend, we are anyway forcefully
4617 * disabling the bkops and if urgent bkops is needed
4618 * it will be enabled on system resume. Long term
4619 * solution could be to abort the system suspend if
4620 * UFS device needs urgent BKOPs.
4621 */
4622 if (!hba->pm_op_in_progress &&
4623 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304624 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304625 break;
4626 case UPIU_TRANSACTION_REJECT_UPIU:
4627 /* TODO: handle Reject UPIU Response */
4628 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304629 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304630 "Reject UPIU not fully implemented\n");
4631 break;
4632 default:
4633 result = DID_ERROR << 16;
4634 dev_err(hba->dev,
4635 "Unexpected request response code = %x\n",
4636 result);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304637 break;
4638 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304639 break;
4640 case OCS_ABORTED:
4641 result |= DID_ABORT << 16;
4642 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304643 case OCS_INVALID_COMMAND_STATUS:
4644 result |= DID_REQUEUE << 16;
4645 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304646 case OCS_INVALID_CMD_TABLE_ATTR:
4647 case OCS_INVALID_PRDT_ATTR:
4648 case OCS_MISMATCH_DATA_BUF_SIZE:
4649 case OCS_MISMATCH_RESP_UPIU_SIZE:
4650 case OCS_PEER_COMM_FAILURE:
4651 case OCS_FATAL_ERROR:
4652 default:
4653 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304654 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004655 "OCS error from controller = %x for tag %d\n",
4656 ocs, lrbp->task_tag);
4657 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004658 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304659 break;
4660 } /* end of switch */
4661
Dolev Raviv66cc8202016-12-22 18:39:42 -08004662 if (host_byte(result) != DID_OK)
4663 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304664 return result;
4665}
4666
4667/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304668 * ufshcd_uic_cmd_compl - handle completion of uic command
4669 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304670 * @intr_status: interrupt status generated by the controller
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304671 */
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304672static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304673{
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304674 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304675 hba->active_uic_cmd->argument2 |=
4676 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304677 hba->active_uic_cmd->argument3 =
4678 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304679 complete(&hba->active_uic_cmd->done);
4680 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304681
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004682 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4683 complete(hba->uic_async_done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304684}
4685
4686/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004687 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304688 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004689 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304690 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004691static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4692 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304693{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304694 struct ufshcd_lrb *lrbp;
4695 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304696 int result;
4697 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004698
Dolev Ravive9d501b2014-07-01 12:22:37 +03004699 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4700 lrbp = &hba->lrb[index];
4701 cmd = lrbp->cmd;
4702 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004703 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004704 result = ufshcd_transfer_rsp_status(hba, lrbp);
4705 scsi_dma_unmap(cmd);
4706 cmd->result = result;
4707 /* Mark completed command as NULL in LRB */
4708 lrbp->cmd = NULL;
4709 clear_bit_unlock(index, &hba->lrb_in_use);
4710 /* Do not touch lrbp after scsi done */
4711 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004712 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004713 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4714 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004715 if (hba->dev_cmd.complete) {
4716 ufshcd_add_command_trace(hba, index,
4717 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004718 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004719 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004720 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004721 if (ufshcd_is_clkscaling_supported(hba))
4722 hba->clk_scaling.active_reqs--;
Zang Leigang09017182017-09-27 10:06:06 +08004723
4724 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004725 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304726
4727 /* clear corresponding bits of completed commands */
4728 hba->outstanding_reqs ^= completed_reqs;
4729
Sahitya Tummala856b3482014-09-25 15:32:34 +03004730 ufshcd_clk_scaling_update_busy(hba);
4731
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304732 /* we might have free'd some tags above */
4733 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304734}
4735
4736/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004737 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4738 * @hba: per adapter instance
4739 */
4740static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4741{
4742 unsigned long completed_reqs;
4743 u32 tr_doorbell;
4744
4745 /* Resetting interrupt aggregation counters first and reading the
4746 * DOOR_BELL afterward allows us to handle all the completed requests.
4747 * In order to prevent other interrupts starvation the DB is read once
4748 * after reset. The down side of this solution is the possibility of
4749 * false interrupt if device completes another request after resetting
4750 * aggregation and before reading the DB.
4751 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304752 if (ufshcd_is_intr_aggr_allowed(hba) &&
4753 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004754 ufshcd_reset_intr_aggr(hba);
4755
4756 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4757 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4758
4759 __ufshcd_transfer_req_compl(hba, completed_reqs);
4760}
4761
4762/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304763 * ufshcd_disable_ee - disable exception event
4764 * @hba: per-adapter instance
4765 * @mask: exception event to disable
4766 *
4767 * Disables exception event in the device so that the EVENT_ALERT
4768 * bit is not set.
4769 *
4770 * Returns zero on success, non-zero error value on failure.
4771 */
4772static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4773{
4774 int err = 0;
4775 u32 val;
4776
4777 if (!(hba->ee_ctrl_mask & mask))
4778 goto out;
4779
4780 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004781 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004782 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304783 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4784 if (!err)
4785 hba->ee_ctrl_mask &= ~mask;
4786out:
4787 return err;
4788}
4789
4790/**
4791 * ufshcd_enable_ee - enable exception event
4792 * @hba: per-adapter instance
4793 * @mask: exception event to enable
4794 *
4795 * Enable corresponding exception event in the device to allow
4796 * device to alert host in critical scenarios.
4797 *
4798 * Returns zero on success, non-zero error value on failure.
4799 */
4800static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4801{
4802 int err = 0;
4803 u32 val;
4804
4805 if (hba->ee_ctrl_mask & mask)
4806 goto out;
4807
4808 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004809 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004810 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304811 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4812 if (!err)
4813 hba->ee_ctrl_mask |= mask;
4814out:
4815 return err;
4816}
4817
4818/**
4819 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4820 * @hba: per-adapter instance
4821 *
4822 * Allow device to manage background operations on its own. Enabling
4823 * this might lead to inconsistent latencies during normal data transfers
4824 * as the device is allowed to manage its own way of handling background
4825 * operations.
4826 *
4827 * Returns zero on success, non-zero on failure.
4828 */
4829static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4830{
4831 int err = 0;
4832
4833 if (hba->auto_bkops_enabled)
4834 goto out;
4835
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004836 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304837 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4838 if (err) {
4839 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4840 __func__, err);
4841 goto out;
4842 }
4843
4844 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004845 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304846
4847 /* No need of URGENT_BKOPS exception from the device */
4848 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4849 if (err)
4850 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4851 __func__, err);
4852out:
4853 return err;
4854}
4855
4856/**
4857 * ufshcd_disable_auto_bkops - block device in doing background operations
4858 * @hba: per-adapter instance
4859 *
4860 * Disabling background operations improves command response latency but
4861 * has drawback of device moving into critical state where the device is
4862 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4863 * host is idle so that BKOPS are managed effectively without any negative
4864 * impacts.
4865 *
4866 * Returns zero on success, non-zero on failure.
4867 */
4868static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4869{
4870 int err = 0;
4871
4872 if (!hba->auto_bkops_enabled)
4873 goto out;
4874
4875 /*
4876 * If host assisted BKOPs is to be enabled, make sure
4877 * urgent bkops exception is allowed.
4878 */
4879 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4880 if (err) {
4881 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4882 __func__, err);
4883 goto out;
4884 }
4885
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004886 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304887 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4888 if (err) {
4889 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4890 __func__, err);
4891 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4892 goto out;
4893 }
4894
4895 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004896 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304897out:
4898 return err;
4899}
4900
4901/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004902 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304903 * @hba: per adapter instance
4904 *
4905 * After a device reset the device may toggle the BKOPS_EN flag
4906 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004907 * as well. This function would change the auto-bkops state based on
4908 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304909 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004910static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304911{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004912 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4913 hba->auto_bkops_enabled = false;
4914 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4915 ufshcd_enable_auto_bkops(hba);
4916 } else {
4917 hba->auto_bkops_enabled = true;
4918 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4919 ufshcd_disable_auto_bkops(hba);
4920 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304921}
4922
4923static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4924{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004925 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304926 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
4927}
4928
4929/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004930 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
4931 * @hba: per-adapter instance
4932 * @status: bkops_status value
4933 *
4934 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
4935 * flag in the device to permit background operations if the device
4936 * bkops_status is greater than or equal to "status" argument passed to
4937 * this function, disable otherwise.
4938 *
4939 * Returns 0 for success, non-zero in case of failure.
4940 *
4941 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
4942 * to know whether auto bkops is enabled or disabled after this function
4943 * returns control to it.
4944 */
4945static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
4946 enum bkops_status status)
4947{
4948 int err;
4949 u32 curr_status = 0;
4950
4951 err = ufshcd_get_bkops_status(hba, &curr_status);
4952 if (err) {
4953 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
4954 __func__, err);
4955 goto out;
4956 } else if (curr_status > BKOPS_STATUS_MAX) {
4957 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
4958 __func__, curr_status);
4959 err = -EINVAL;
4960 goto out;
4961 }
4962
4963 if (curr_status >= status)
4964 err = ufshcd_enable_auto_bkops(hba);
4965 else
4966 err = ufshcd_disable_auto_bkops(hba);
4967out:
4968 return err;
4969}
4970
4971/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304972 * ufshcd_urgent_bkops - handle urgent bkops exception event
4973 * @hba: per-adapter instance
4974 *
4975 * Enable fBackgroundOpsEn flag in the device to permit background
4976 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004977 *
4978 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
4979 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304980 */
4981static int ufshcd_urgent_bkops(struct ufs_hba *hba)
4982{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02004983 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304984}
4985
4986static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
4987{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004988 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304989 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
4990}
4991
Yaniv Gardiafdfff52016-03-10 17:37:15 +02004992static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
4993{
4994 int err;
4995 u32 curr_status = 0;
4996
4997 if (hba->is_urgent_bkops_lvl_checked)
4998 goto enable_auto_bkops;
4999
5000 err = ufshcd_get_bkops_status(hba, &curr_status);
5001 if (err) {
5002 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5003 __func__, err);
5004 goto out;
5005 }
5006
5007 /*
5008 * We are seeing that some devices are raising the urgent bkops
5009 * exception events even when BKOPS status doesn't indicate performace
5010 * impacted or critical. Handle these device by determining their urgent
5011 * bkops status at runtime.
5012 */
5013 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5014 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5015 __func__, curr_status);
5016 /* update the current status as the urgent bkops level */
5017 hba->urgent_bkops_lvl = curr_status;
5018 hba->is_urgent_bkops_lvl_checked = true;
5019 }
5020
5021enable_auto_bkops:
5022 err = ufshcd_enable_auto_bkops(hba);
5023out:
5024 if (err < 0)
5025 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5026 __func__, err);
5027}
5028
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305029/**
5030 * ufshcd_exception_event_handler - handle exceptions raised by device
5031 * @work: pointer to work data
5032 *
5033 * Read bExceptionEventStatus attribute from the device and handle the
5034 * exception event accordingly.
5035 */
5036static void ufshcd_exception_event_handler(struct work_struct *work)
5037{
5038 struct ufs_hba *hba;
5039 int err;
5040 u32 status = 0;
5041 hba = container_of(work, struct ufs_hba, eeh_work);
5042
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305043 pm_runtime_get_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305044 err = ufshcd_get_ee_status(hba, &status);
5045 if (err) {
5046 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5047 __func__, err);
5048 goto out;
5049 }
5050
5051 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005052
5053 if (status & MASK_EE_URGENT_BKOPS)
5054 ufshcd_bkops_exception_event_handler(hba);
5055
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305056out:
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305057 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305058 return;
5059}
5060
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005061/* Complete requests that have door-bell cleared */
5062static void ufshcd_complete_requests(struct ufs_hba *hba)
5063{
5064 ufshcd_transfer_req_compl(hba);
5065 ufshcd_tmc_handler(hba);
5066}
5067
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305068/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005069 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5070 * to recover from the DL NAC errors or not.
5071 * @hba: per-adapter instance
5072 *
5073 * Returns true if error handling is required, false otherwise
5074 */
5075static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5076{
5077 unsigned long flags;
5078 bool err_handling = true;
5079
5080 spin_lock_irqsave(hba->host->host_lock, flags);
5081 /*
5082 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5083 * device fatal error and/or DL NAC & REPLAY timeout errors.
5084 */
5085 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5086 goto out;
5087
5088 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5089 ((hba->saved_err & UIC_ERROR) &&
5090 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5091 goto out;
5092
5093 if ((hba->saved_err & UIC_ERROR) &&
5094 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5095 int err;
5096 /*
5097 * wait for 50ms to see if we can get any other errors or not.
5098 */
5099 spin_unlock_irqrestore(hba->host->host_lock, flags);
5100 msleep(50);
5101 spin_lock_irqsave(hba->host->host_lock, flags);
5102
5103 /*
5104 * now check if we have got any other severe errors other than
5105 * DL NAC error?
5106 */
5107 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5108 ((hba->saved_err & UIC_ERROR) &&
5109 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5110 goto out;
5111
5112 /*
5113 * As DL NAC is the only error received so far, send out NOP
5114 * command to confirm if link is still active or not.
5115 * - If we don't get any response then do error recovery.
5116 * - If we get response then clear the DL NAC error bit.
5117 */
5118
5119 spin_unlock_irqrestore(hba->host->host_lock, flags);
5120 err = ufshcd_verify_dev_init(hba);
5121 spin_lock_irqsave(hba->host->host_lock, flags);
5122
5123 if (err)
5124 goto out;
5125
5126 /* Link seems to be alive hence ignore the DL NAC errors */
5127 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5128 hba->saved_err &= ~UIC_ERROR;
5129 /* clear NAC error */
5130 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5131 if (!hba->saved_uic_err) {
5132 err_handling = false;
5133 goto out;
5134 }
5135 }
5136out:
5137 spin_unlock_irqrestore(hba->host->host_lock, flags);
5138 return err_handling;
5139}
5140
5141/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305142 * ufshcd_err_handler - handle UFS errors that require s/w attention
5143 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305144 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305145static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305146{
5147 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305148 unsigned long flags;
5149 u32 err_xfer = 0;
5150 u32 err_tm = 0;
5151 int err = 0;
5152 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005153 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305154
5155 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305156
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305157 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005158 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305159
5160 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005161 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305162 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305163
5164 hba->ufshcd_state = UFSHCD_STATE_RESET;
5165 ufshcd_set_eh_in_progress(hba);
5166
5167 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005168 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005169
5170 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5171 bool ret;
5172
5173 spin_unlock_irqrestore(hba->host->host_lock, flags);
5174 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5175 ret = ufshcd_quirk_dl_nac_errors(hba);
5176 spin_lock_irqsave(hba->host->host_lock, flags);
5177 if (!ret)
5178 goto skip_err_handling;
5179 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005180 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5181 ((hba->saved_err & UIC_ERROR) &&
5182 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5183 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5184 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5185 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305186
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005187 /*
5188 * if host reset is required then skip clearing the pending
5189 * transfers forcefully because they will automatically get
5190 * cleared after link startup.
5191 */
5192 if (needs_reset)
5193 goto skip_pending_xfer_clear;
5194
5195 /* release lock as clear command might sleep */
5196 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305197 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005198 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5199 if (ufshcd_clear_cmd(hba, tag)) {
5200 err_xfer = true;
5201 goto lock_skip_pending_xfer_clear;
5202 }
5203 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305204
5205 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005206 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5207 if (ufshcd_clear_tm_cmd(hba, tag)) {
5208 err_tm = true;
5209 goto lock_skip_pending_xfer_clear;
5210 }
5211 }
5212
5213lock_skip_pending_xfer_clear:
5214 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305215
5216 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005217 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305218
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005219 if (err_xfer || err_tm)
5220 needs_reset = true;
5221
5222skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305223 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005224 if (needs_reset) {
5225 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5226
5227 /*
5228 * ufshcd_reset_and_restore() does the link reinitialization
5229 * which will need atleast one empty doorbell slot to send the
5230 * device management commands (NOP and query commands).
5231 * If there is no slot empty at this moment then free up last
5232 * slot forcefully.
5233 */
5234 if (hba->outstanding_reqs == max_doorbells)
5235 __ufshcd_transfer_req_compl(hba,
5236 (1UL << (hba->nutrs - 1)));
5237
5238 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305239 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005240 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305241 if (err) {
5242 dev_err(hba->dev, "%s: reset and restore failed\n",
5243 __func__);
5244 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5245 }
5246 /*
5247 * Inform scsi mid-layer that we did reset and allow to handle
5248 * Unit Attention properly.
5249 */
5250 scsi_report_bus_reset(hba->host, 0);
5251 hba->saved_err = 0;
5252 hba->saved_uic_err = 0;
5253 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005254
Yaniv Gardi583fa622016-03-10 17:37:13 +02005255skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005256 if (!needs_reset) {
5257 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5258 if (hba->saved_err || hba->saved_uic_err)
5259 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5260 __func__, hba->saved_err, hba->saved_uic_err);
5261 }
5262
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305263 ufshcd_clear_eh_in_progress(hba);
5264
5265out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005266 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305267 scsi_unblock_requests(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005268 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305269 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305270}
5271
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005272static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5273 u32 reg)
5274{
5275 reg_hist->reg[reg_hist->pos] = reg;
5276 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5277 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5278}
5279
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305280/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305281 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5282 * @hba: per-adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305283 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305284static void ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305285{
5286 u32 reg;
5287
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005288 /* PHY layer lane error */
5289 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5290 /* Ignore LINERESET indication, as this is not an error */
5291 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005292 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005293 /*
5294 * To know whether this error is fatal or not, DB timeout
5295 * must be checked but this error is handled separately.
5296 */
5297 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005298 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5299 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005300
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305301 /* PA_INIT_ERROR is fatal and needs UIC reset */
5302 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005303 if (reg)
5304 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5305
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305306 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5307 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005308 else if (hba->dev_quirks &
5309 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5310 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5311 hba->uic_error |=
5312 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5313 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5314 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5315 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305316
5317 /* UIC NL/TL/DME errors needs software retry */
5318 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005319 if (reg) {
5320 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305321 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005322 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305323
5324 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005325 if (reg) {
5326 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305327 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005328 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305329
5330 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005331 if (reg) {
5332 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305333 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005334 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305335
5336 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5337 __func__, hba->uic_error);
5338}
5339
5340/**
5341 * ufshcd_check_errors - Check for errors that need s/w attention
5342 * @hba: per-adapter instance
5343 */
5344static void ufshcd_check_errors(struct ufs_hba *hba)
5345{
5346 bool queue_eh_work = false;
5347
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305348 if (hba->errors & INT_FATAL_ERRORS)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305349 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305350
5351 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305352 hba->uic_error = 0;
5353 ufshcd_update_uic_error(hba);
5354 if (hba->uic_error)
5355 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305356 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305357
5358 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005359 /*
5360 * update the transfer error masks to sticky bits, let's do this
5361 * irrespective of current ufshcd_state.
5362 */
5363 hba->saved_err |= hba->errors;
5364 hba->saved_uic_err |= hba->uic_error;
5365
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305366 /* handle fatal errors only when link is functional */
5367 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5368 /* block commands from scsi mid-layer */
5369 scsi_block_requests(hba->host);
5370
Zang Leigang141f8162016-11-16 11:29:37 +08005371 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005372
5373 /* dump controller state before resetting */
5374 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5375 bool pr_prdt = !!(hba->saved_err &
5376 SYSTEM_BUS_FATAL_ERROR);
5377
5378 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5379 __func__, hba->saved_err,
5380 hba->saved_uic_err);
5381
5382 ufshcd_print_host_regs(hba);
5383 ufshcd_print_pwr_info(hba);
5384 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5385 ufshcd_print_trs(hba, hba->outstanding_reqs,
5386 pr_prdt);
5387 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305388 schedule_work(&hba->eh_work);
5389 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305390 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305391 /*
5392 * if (!queue_eh_work) -
5393 * Other errors are either non-fatal where host recovers
5394 * itself without s/w intervention or errors that will be
5395 * handled by the SCSI core layer.
5396 */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305397}
5398
5399/**
5400 * ufshcd_tmc_handler - handle task management function completion
5401 * @hba: per adapter instance
5402 */
5403static void ufshcd_tmc_handler(struct ufs_hba *hba)
5404{
5405 u32 tm_doorbell;
5406
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305407 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305408 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305409 wake_up(&hba->tm_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305410}
5411
5412/**
5413 * ufshcd_sl_intr - Interrupt service routine
5414 * @hba: per adapter instance
5415 * @intr_status: contains interrupts generated by the controller
5416 */
5417static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5418{
5419 hba->errors = UFSHCD_ERROR_MASK & intr_status;
5420 if (hba->errors)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305421 ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305422
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305423 if (intr_status & UFSHCD_UIC_MASK)
5424 ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305425
5426 if (intr_status & UTP_TASK_REQ_COMPL)
5427 ufshcd_tmc_handler(hba);
5428
5429 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5430 ufshcd_transfer_req_compl(hba);
5431}
5432
5433/**
5434 * ufshcd_intr - Main interrupt service routine
5435 * @irq: irq number
5436 * @__hba: pointer to adapter instance
5437 *
5438 * Returns IRQ_HANDLED - If interrupt is valid
5439 * IRQ_NONE - If invalid interrupt
5440 */
5441static irqreturn_t ufshcd_intr(int irq, void *__hba)
5442{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005443 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305444 irqreturn_t retval = IRQ_NONE;
5445 struct ufs_hba *hba = __hba;
5446
5447 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305448 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005449 enabled_intr_status =
5450 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305451
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005452 if (intr_status)
Seungwon Jeon261ea452013-06-26 22:39:28 +05305453 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005454
5455 if (enabled_intr_status) {
5456 ufshcd_sl_intr(hba, enabled_intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305457 retval = IRQ_HANDLED;
5458 }
5459 spin_unlock(hba->host->host_lock);
5460 return retval;
5461}
5462
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305463static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5464{
5465 int err = 0;
5466 u32 mask = 1 << tag;
5467 unsigned long flags;
5468
5469 if (!test_bit(tag, &hba->outstanding_tasks))
5470 goto out;
5471
5472 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305473 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305474 spin_unlock_irqrestore(hba->host->host_lock, flags);
5475
5476 /* poll for max. 1 sec to clear door bell register by h/w */
5477 err = ufshcd_wait_for_register(hba,
5478 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005479 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305480out:
5481 return err;
5482}
5483
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305484/**
5485 * ufshcd_issue_tm_cmd - issues task management commands to controller
5486 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305487 * @lun_id: LUN ID to which TM command is sent
5488 * @task_id: task ID to which the TM command is applicable
5489 * @tm_function: task management function opcode
5490 * @tm_response: task management service response return value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305491 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305492 * Returns non-zero value on error, zero on success.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305493 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305494static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5495 u8 tm_function, u8 *tm_response)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305496{
5497 struct utp_task_req_desc *task_req_descp;
5498 struct utp_upiu_task_req *task_req_upiup;
5499 struct Scsi_Host *host;
5500 unsigned long flags;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305501 int free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305502 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305503 int task_tag;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305504
5505 host = hba->host;
5506
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305507 /*
5508 * Get free slot, sleep if slots are unavailable.
5509 * Even though we use wait_event() which sleeps indefinitely,
5510 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5511 */
5512 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005513 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305514
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305515 spin_lock_irqsave(host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305516 task_req_descp = hba->utmrdl_base_addr;
5517 task_req_descp += free_slot;
5518
5519 /* Configure task request descriptor */
5520 task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5521 task_req_descp->header.dword_2 =
5522 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5523
5524 /* Configure task request UPIU */
5525 task_req_upiup =
5526 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305527 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305528 task_req_upiup->header.dword_0 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305529 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305530 lun_id, task_tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305531 task_req_upiup->header.dword_1 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305532 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005533 /*
5534 * The host shall provide the same value for LUN field in the basic
5535 * header and for Input Parameter.
5536 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305537 task_req_upiup->input_param1 = cpu_to_be32(lun_id);
5538 task_req_upiup->input_param2 = cpu_to_be32(task_id);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305539
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005540 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5541
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305542 /* send command to the controller */
5543 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005544
5545 /* Make sure descriptors are ready before ringing the task doorbell */
5546 wmb();
5547
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305548 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005549 /* Make sure that doorbell is committed immediately */
5550 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305551
5552 spin_unlock_irqrestore(host->host_lock, flags);
5553
5554 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305555 err = wait_event_timeout(hba->tm_wq,
5556 test_bit(free_slot, &hba->tm_condition),
5557 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305558 if (!err) {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305559 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5560 __func__, tm_function);
5561 if (ufshcd_clear_tm_cmd(hba, free_slot))
5562 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5563 __func__, free_slot);
5564 err = -ETIMEDOUT;
5565 } else {
5566 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305567 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305568
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305569 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305570 ufshcd_put_tm_slot(hba, free_slot);
5571 wake_up(&hba->tm_tag_wq);
5572
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005573 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305574 return err;
5575}
5576
5577/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305578 * ufshcd_eh_device_reset_handler - device reset handler registered to
5579 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305580 * @cmd: SCSI command pointer
5581 *
5582 * Returns SUCCESS/FAILED
5583 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305584static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305585{
5586 struct Scsi_Host *host;
5587 struct ufs_hba *hba;
5588 unsigned int tag;
5589 u32 pos;
5590 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305591 u8 resp = 0xF;
5592 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305593 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305594
5595 host = cmd->device->host;
5596 hba = shost_priv(host);
5597 tag = cmd->request->tag;
5598
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305599 lrbp = &hba->lrb[tag];
5600 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5601 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305602 if (!err)
5603 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305604 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305605 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305606
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305607 /* clear the commands that were pending for corresponding LUN */
5608 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5609 if (hba->lrb[pos].lun == lrbp->lun) {
5610 err = ufshcd_clear_cmd(hba, pos);
5611 if (err)
5612 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305613 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305614 }
5615 spin_lock_irqsave(host->host_lock, flags);
5616 ufshcd_transfer_req_compl(hba);
5617 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08005618
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305619out:
Gilad Broner7fabb772017-02-03 16:56:50 -08005620 hba->req_abort_count = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305621 if (!err) {
5622 err = SUCCESS;
5623 } else {
5624 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5625 err = FAILED;
5626 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305627 return err;
5628}
5629
Gilad Bronere0b299e2017-02-03 16:56:40 -08005630static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5631{
5632 struct ufshcd_lrb *lrbp;
5633 int tag;
5634
5635 for_each_set_bit(tag, &bitmap, hba->nutrs) {
5636 lrbp = &hba->lrb[tag];
5637 lrbp->req_abort_skip = true;
5638 }
5639}
5640
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305641/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305642 * ufshcd_abort - abort a specific command
5643 * @cmd: SCSI command pointer
5644 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305645 * Abort the pending command in device by sending UFS_ABORT_TASK task management
5646 * command, and in host controller by clearing the door-bell register. There can
5647 * be race between controller sending the command to the device while abort is
5648 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5649 * really issued and then try to abort it.
5650 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305651 * Returns SUCCESS/FAILED
5652 */
5653static int ufshcd_abort(struct scsi_cmnd *cmd)
5654{
5655 struct Scsi_Host *host;
5656 struct ufs_hba *hba;
5657 unsigned long flags;
5658 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305659 int err = 0;
5660 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305661 u8 resp = 0xF;
5662 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005663 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305664
5665 host = cmd->device->host;
5666 hba = shost_priv(host);
5667 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08005668 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02005669 if (!ufshcd_valid_tag(hba, tag)) {
5670 dev_err(hba->dev,
5671 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5672 __func__, tag, cmd, cmd->request);
5673 BUG();
5674 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305675
Dolev Ravive7d38252016-12-22 18:40:07 -08005676 /*
5677 * Task abort to the device W-LUN is illegal. When this command
5678 * will fail, due to spec violation, scsi err handling next step
5679 * will be to send LU reset which, again, is a spec violation.
5680 * To avoid these unnecessary/illegal step we skip to the last error
5681 * handling stage: reset and restore.
5682 */
5683 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5684 return ufshcd_eh_host_reset_handler(cmd);
5685
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005686 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005687 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02005688 /* If command is already aborted/completed, return SUCCESS */
5689 if (!(test_bit(tag, &hba->outstanding_reqs))) {
5690 dev_err(hba->dev,
5691 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5692 __func__, tag, hba->outstanding_reqs, reg);
5693 goto out;
5694 }
5695
Dolev Ravive9d501b2014-07-01 12:22:37 +03005696 if (!(reg & (1 << tag))) {
5697 dev_err(hba->dev,
5698 "%s: cmd was completed, but without a notifying intr, tag = %d",
5699 __func__, tag);
5700 }
5701
Dolev Raviv66cc8202016-12-22 18:39:42 -08005702 /* Print Transfer Request of aborted task */
5703 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08005704
Gilad Broner7fabb772017-02-03 16:56:50 -08005705 /*
5706 * Print detailed info about aborted request.
5707 * As more than one request might get aborted at the same time,
5708 * print full information only for the first aborted request in order
5709 * to reduce repeated printouts. For other aborted requests only print
5710 * basic details.
5711 */
5712 scsi_print_command(hba->lrb[tag].cmd);
5713 if (!hba->req_abort_count) {
5714 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08005715 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08005716 ufshcd_print_pwr_info(hba);
5717 ufshcd_print_trs(hba, 1 << tag, true);
5718 } else {
5719 ufshcd_print_trs(hba, 1 << tag, false);
5720 }
5721 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08005722
5723 /* Skip task abort in case previous aborts failed and report failure */
5724 if (lrbp->req_abort_skip) {
5725 err = -EIO;
5726 goto out;
5727 }
5728
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305729 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
5730 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5731 UFS_QUERY_TASK, &resp);
5732 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
5733 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005734 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
5735 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305736 break;
5737 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305738 /*
5739 * cmd not pending in the device, check if it is
5740 * in transition.
5741 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005742 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
5743 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305744 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5745 if (reg & (1 << tag)) {
5746 /* sleep for max. 200us to stabilize */
5747 usleep_range(100, 200);
5748 continue;
5749 }
5750 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005751 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
5752 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305753 goto out;
5754 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005755 dev_err(hba->dev,
5756 "%s: no response from device. tag = %d, err %d\n",
5757 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305758 if (!err)
5759 err = resp; /* service response error */
5760 goto out;
5761 }
5762 }
5763
5764 if (!poll_cnt) {
5765 err = -EBUSY;
5766 goto out;
5767 }
5768
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305769 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5770 UFS_ABORT_TASK, &resp);
5771 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005772 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305773 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005774 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
5775 __func__, tag, err);
5776 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305777 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305778 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305779
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305780 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005781 if (err) {
5782 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
5783 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305784 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005785 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305786
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305787 scsi_dma_unmap(cmd);
5788
5789 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02005790 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305791 hba->lrb[tag].cmd = NULL;
5792 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305793
5794 clear_bit_unlock(tag, &hba->lrb_in_use);
5795 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005796
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305797out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305798 if (!err) {
5799 err = SUCCESS;
5800 } else {
5801 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08005802 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305803 err = FAILED;
5804 }
5805
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005806 /*
5807 * This ufshcd_release() corresponds to the original scsi cmd that got
5808 * aborted here (as we won't get any IRQ for it).
5809 */
5810 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305811 return err;
5812}
5813
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305814/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305815 * ufshcd_host_reset_and_restore - reset and restore host controller
5816 * @hba: per-adapter instance
5817 *
5818 * Note that host controller reset may issue DME_RESET to
5819 * local and remote (device) Uni-Pro stack and the attributes
5820 * are reset to default state.
5821 *
5822 * Returns zero on success, non-zero on failure
5823 */
5824static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
5825{
5826 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305827 unsigned long flags;
5828
5829 /* Reset the host controller */
5830 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02005831 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305832 spin_unlock_irqrestore(hba->host->host_lock, flags);
5833
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08005834 /* scale up clocks to max frequency before full reinitialization */
5835 ufshcd_scale_clks(hba, true);
5836
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305837 err = ufshcd_hba_enable(hba);
5838 if (err)
5839 goto out;
5840
5841 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005842 err = ufshcd_probe_hba(hba);
5843
5844 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305845 err = -EIO;
5846out:
5847 if (err)
5848 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
5849
5850 return err;
5851}
5852
5853/**
5854 * ufshcd_reset_and_restore - reset and re-initialize host/device
5855 * @hba: per-adapter instance
5856 *
5857 * Reset and recover device, host and re-establish link. This
5858 * is helpful to recover the communication in fatal error conditions.
5859 *
5860 * Returns zero on success, non-zero on failure
5861 */
5862static int ufshcd_reset_and_restore(struct ufs_hba *hba)
5863{
5864 int err = 0;
5865 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005866 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305867
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005868 do {
5869 err = ufshcd_host_reset_and_restore(hba);
5870 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305871
5872 /*
5873 * After reset the door-bell might be cleared, complete
5874 * outstanding requests in s/w here.
5875 */
5876 spin_lock_irqsave(hba->host->host_lock, flags);
5877 ufshcd_transfer_req_compl(hba);
5878 ufshcd_tmc_handler(hba);
5879 spin_unlock_irqrestore(hba->host->host_lock, flags);
5880
5881 return err;
5882}
5883
5884/**
5885 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08005886 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305887 *
5888 * Returns SUCCESS/FAILED
5889 */
5890static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
5891{
5892 int err;
5893 unsigned long flags;
5894 struct ufs_hba *hba;
5895
5896 hba = shost_priv(cmd->device->host);
5897
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005898 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305899 /*
5900 * Check if there is any race with fatal error handling.
5901 * If so, wait for it to complete. Even though fatal error
5902 * handling does reset and restore in some cases, don't assume
5903 * anything out of it. We are just avoiding race here.
5904 */
5905 do {
5906 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305907 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08005908 hba->ufshcd_state == UFSHCD_STATE_RESET ||
5909 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305910 break;
5911 spin_unlock_irqrestore(hba->host->host_lock, flags);
5912 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305913 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305914 } while (1);
5915
5916 hba->ufshcd_state = UFSHCD_STATE_RESET;
5917 ufshcd_set_eh_in_progress(hba);
5918 spin_unlock_irqrestore(hba->host->host_lock, flags);
5919
5920 err = ufshcd_reset_and_restore(hba);
5921
5922 spin_lock_irqsave(hba->host->host_lock, flags);
5923 if (!err) {
5924 err = SUCCESS;
5925 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5926 } else {
5927 err = FAILED;
5928 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5929 }
5930 ufshcd_clear_eh_in_progress(hba);
5931 spin_unlock_irqrestore(hba->host->host_lock, flags);
5932
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005933 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305934 return err;
5935}
5936
5937/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03005938 * ufshcd_get_max_icc_level - calculate the ICC level
5939 * @sup_curr_uA: max. current supported by the regulator
5940 * @start_scan: row at the desc table to start scan from
5941 * @buff: power descriptor buffer
5942 *
5943 * Returns calculated max ICC level for specific regulator
5944 */
5945static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
5946{
5947 int i;
5948 int curr_uA;
5949 u16 data;
5950 u16 unit;
5951
5952 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02005953 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03005954 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
5955 ATTR_ICC_LVL_UNIT_OFFSET;
5956 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
5957 switch (unit) {
5958 case UFSHCD_NANO_AMP:
5959 curr_uA = curr_uA / 1000;
5960 break;
5961 case UFSHCD_MILI_AMP:
5962 curr_uA = curr_uA * 1000;
5963 break;
5964 case UFSHCD_AMP:
5965 curr_uA = curr_uA * 1000 * 1000;
5966 break;
5967 case UFSHCD_MICRO_AMP:
5968 default:
5969 break;
5970 }
5971 if (sup_curr_uA >= curr_uA)
5972 break;
5973 }
5974 if (i < 0) {
5975 i = 0;
5976 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
5977 }
5978
5979 return (u32)i;
5980}
5981
5982/**
5983 * ufshcd_calc_icc_level - calculate the max ICC level
5984 * In case regulators are not initialized we'll return 0
5985 * @hba: per-adapter instance
5986 * @desc_buf: power descriptor buffer to extract ICC levels from.
5987 * @len: length of desc_buff
5988 *
5989 * Returns calculated ICC level
5990 */
5991static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
5992 u8 *desc_buf, int len)
5993{
5994 u32 icc_level = 0;
5995
5996 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
5997 !hba->vreg_info.vccq2) {
5998 dev_err(hba->dev,
5999 "%s: Regulator capability was not set, actvIccLevel=%d",
6000 __func__, icc_level);
6001 goto out;
6002 }
6003
6004 if (hba->vreg_info.vcc)
6005 icc_level = ufshcd_get_max_icc_level(
6006 hba->vreg_info.vcc->max_uA,
6007 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6008 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6009
6010 if (hba->vreg_info.vccq)
6011 icc_level = ufshcd_get_max_icc_level(
6012 hba->vreg_info.vccq->max_uA,
6013 icc_level,
6014 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6015
6016 if (hba->vreg_info.vccq2)
6017 icc_level = ufshcd_get_max_icc_level(
6018 hba->vreg_info.vccq2->max_uA,
6019 icc_level,
6020 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6021out:
6022 return icc_level;
6023}
6024
6025static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6026{
6027 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006028 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006029 u8 *desc_buf;
6030
6031 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6032 if (!desc_buf)
6033 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006034
6035 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6036 if (ret) {
6037 dev_err(hba->dev,
6038 "%s: Failed reading power descriptor.len = %d ret = %d",
6039 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006040 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006041 }
6042
6043 hba->init_prefetch_data.icc_level =
6044 ufshcd_find_max_sup_active_icc_level(hba,
6045 desc_buf, buff_len);
6046 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6047 __func__, hba->init_prefetch_data.icc_level);
6048
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006049 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6050 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6051 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006052
6053 if (ret)
6054 dev_err(hba->dev,
6055 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6056 __func__, hba->init_prefetch_data.icc_level , ret);
6057
Kees Cookbbe21d72018-05-02 16:58:09 -07006058out:
6059 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006060}
6061
6062/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006063 * ufshcd_scsi_add_wlus - Adds required W-LUs
6064 * @hba: per-adapter instance
6065 *
6066 * UFS device specification requires the UFS devices to support 4 well known
6067 * logical units:
6068 * "REPORT_LUNS" (address: 01h)
6069 * "UFS Device" (address: 50h)
6070 * "RPMB" (address: 44h)
6071 * "BOOT" (address: 30h)
6072 * UFS device's power management needs to be controlled by "POWER CONDITION"
6073 * field of SSU (START STOP UNIT) command. But this "power condition" field
6074 * will take effect only when its sent to "UFS device" well known logical unit
6075 * hence we require the scsi_device instance to represent this logical unit in
6076 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006077 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006078 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6079 * Block) LU so user space process can control this LU. User space may also
6080 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006081 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006082 * This function adds scsi device instances for each of all well known LUs
6083 * (except "REPORT LUNS" LU).
6084 *
6085 * Returns zero on success (all required W-LUs are added successfully),
6086 * non-zero error value on failure (if failed to add any of the required W-LU).
6087 */
6088static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6089{
6090 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006091 struct scsi_device *sdev_rpmb;
6092 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006093
6094 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6095 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6096 if (IS_ERR(hba->sdev_ufs_device)) {
6097 ret = PTR_ERR(hba->sdev_ufs_device);
6098 hba->sdev_ufs_device = NULL;
6099 goto out;
6100 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006101 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006102
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006103 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006104 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006105 if (IS_ERR(sdev_rpmb)) {
6106 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006107 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006108 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006109 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006110
6111 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6112 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6113 if (IS_ERR(sdev_boot))
6114 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6115 else
6116 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006117 goto out;
6118
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006119remove_sdev_ufs_device:
6120 scsi_remove_device(hba->sdev_ufs_device);
6121out:
6122 return ret;
6123}
6124
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006125static int ufs_get_device_desc(struct ufs_hba *hba,
6126 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006127{
6128 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006129 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006130 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006131 u8 *desc_buf;
6132
6133 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6134 QUERY_DESC_MAX_SIZE + 1);
6135 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6136 if (!desc_buf) {
6137 err = -ENOMEM;
6138 goto out;
6139 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006140
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006141 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006142 if (err) {
6143 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6144 __func__, err);
6145 goto out;
6146 }
6147
6148 /*
6149 * getting vendor (manufacturerID) and Bank Index in big endian
6150 * format
6151 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006152 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006153 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6154
6155 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6156
Kees Cookbbe21d72018-05-02 16:58:09 -07006157 /* Zero-pad entire buffer for string termination. */
6158 memset(desc_buf, 0, buff_len);
6159
6160 err = ufshcd_read_string_desc(hba, model_index, desc_buf,
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006161 QUERY_DESC_MAX_SIZE, true/*ASCII*/);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006162 if (err) {
6163 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6164 __func__, err);
6165 goto out;
6166 }
6167
Kees Cookbbe21d72018-05-02 16:58:09 -07006168 desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6169 strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6170 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006171 MAX_MODEL_LEN));
6172
6173 /* Null terminate the model string */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006174 dev_desc->model[MAX_MODEL_LEN] = '\0';
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006175
6176out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006177 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006178 return err;
6179}
6180
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006181static void ufs_fixup_device_setup(struct ufs_hba *hba,
6182 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006183{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006184 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006185
6186 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006187 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6188 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6189 (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006190 !strcmp(f->card.model, UFS_ANY_MODEL)))
6191 hba->dev_quirks |= f->quirk;
6192 }
6193}
6194
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006195/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006196 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6197 * @hba: per-adapter instance
6198 *
6199 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6200 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6201 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6202 * the hibern8 exit latency.
6203 *
6204 * Returns zero on success, non-zero error value on failure.
6205 */
6206static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6207{
6208 int ret = 0;
6209 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6210
6211 ret = ufshcd_dme_peer_get(hba,
6212 UIC_ARG_MIB_SEL(
6213 RX_MIN_ACTIVATETIME_CAPABILITY,
6214 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6215 &peer_rx_min_activatetime);
6216 if (ret)
6217 goto out;
6218
6219 /* make sure proper unit conversion is applied */
6220 tuned_pa_tactivate =
6221 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6222 / PA_TACTIVATE_TIME_UNIT_US);
6223 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6224 tuned_pa_tactivate);
6225
6226out:
6227 return ret;
6228}
6229
6230/**
6231 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6232 * @hba: per-adapter instance
6233 *
6234 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6235 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6236 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6237 * This optimal value can help reduce the hibern8 exit latency.
6238 *
6239 * Returns zero on success, non-zero error value on failure.
6240 */
6241static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6242{
6243 int ret = 0;
6244 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6245 u32 max_hibern8_time, tuned_pa_hibern8time;
6246
6247 ret = ufshcd_dme_get(hba,
6248 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6249 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6250 &local_tx_hibern8_time_cap);
6251 if (ret)
6252 goto out;
6253
6254 ret = ufshcd_dme_peer_get(hba,
6255 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6256 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6257 &peer_rx_hibern8_time_cap);
6258 if (ret)
6259 goto out;
6260
6261 max_hibern8_time = max(local_tx_hibern8_time_cap,
6262 peer_rx_hibern8_time_cap);
6263 /* make sure proper unit conversion is applied */
6264 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6265 / PA_HIBERN8_TIME_UNIT_US);
6266 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6267 tuned_pa_hibern8time);
6268out:
6269 return ret;
6270}
6271
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006272/**
6273 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6274 * less than device PA_TACTIVATE time.
6275 * @hba: per-adapter instance
6276 *
6277 * Some UFS devices require host PA_TACTIVATE to be lower than device
6278 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6279 * for such devices.
6280 *
6281 * Returns zero on success, non-zero error value on failure.
6282 */
6283static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6284{
6285 int ret = 0;
6286 u32 granularity, peer_granularity;
6287 u32 pa_tactivate, peer_pa_tactivate;
6288 u32 pa_tactivate_us, peer_pa_tactivate_us;
6289 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6290
6291 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6292 &granularity);
6293 if (ret)
6294 goto out;
6295
6296 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6297 &peer_granularity);
6298 if (ret)
6299 goto out;
6300
6301 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6302 (granularity > PA_GRANULARITY_MAX_VAL)) {
6303 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6304 __func__, granularity);
6305 return -EINVAL;
6306 }
6307
6308 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6309 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6310 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6311 __func__, peer_granularity);
6312 return -EINVAL;
6313 }
6314
6315 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6316 if (ret)
6317 goto out;
6318
6319 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6320 &peer_pa_tactivate);
6321 if (ret)
6322 goto out;
6323
6324 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6325 peer_pa_tactivate_us = peer_pa_tactivate *
6326 gran_to_us_table[peer_granularity - 1];
6327
6328 if (pa_tactivate_us > peer_pa_tactivate_us) {
6329 u32 new_peer_pa_tactivate;
6330
6331 new_peer_pa_tactivate = pa_tactivate_us /
6332 gran_to_us_table[peer_granularity - 1];
6333 new_peer_pa_tactivate++;
6334 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6335 new_peer_pa_tactivate);
6336 }
6337
6338out:
6339 return ret;
6340}
6341
Yaniv Gardi37113102016-03-10 17:37:16 +02006342static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6343{
6344 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6345 ufshcd_tune_pa_tactivate(hba);
6346 ufshcd_tune_pa_hibern8time(hba);
6347 }
6348
6349 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6350 /* set 1ms timeout for PA_TACTIVATE */
6351 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006352
6353 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6354 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006355
6356 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006357}
6358
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006359static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6360{
6361 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6362
6363 hba->ufs_stats.hibern8_exit_cnt = 0;
6364 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6365
6366 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6367 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6368 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6369 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6370 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
Gilad Broner7fabb772017-02-03 16:56:50 -08006371
6372 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006373}
6374
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006375static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6376{
6377 int err;
6378
6379 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6380 &hba->desc_size.dev_desc);
6381 if (err)
6382 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6383
6384 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6385 &hba->desc_size.pwr_desc);
6386 if (err)
6387 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6388
6389 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6390 &hba->desc_size.interc_desc);
6391 if (err)
6392 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6393
6394 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6395 &hba->desc_size.conf_desc);
6396 if (err)
6397 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6398
6399 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6400 &hba->desc_size.unit_desc);
6401 if (err)
6402 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6403
6404 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6405 &hba->desc_size.geom_desc);
6406 if (err)
6407 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006408 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6409 &hba->desc_size.hlth_desc);
6410 if (err)
6411 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006412}
6413
6414static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6415{
6416 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6417 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6418 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6419 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6420 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6421 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006422 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006423}
6424
Yaniv Gardi37113102016-03-10 17:37:16 +02006425/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006426 * ufshcd_probe_hba - probe hba to detect device and initialize
6427 * @hba: per-adapter instance
6428 *
6429 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306430 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006431static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306432{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006433 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306434 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006435 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306436
6437 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306438 if (ret)
6439 goto out;
6440
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006441 /* set the default level for urgent bkops */
6442 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6443 hba->is_urgent_bkops_lvl_checked = false;
6444
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006445 /* Debug counters initialization */
6446 ufshcd_clear_dbg_ufs_stats(hba);
6447
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006448 /* UniPro link is active now */
6449 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306450
Adrian Hunterad448372018-03-20 15:07:38 +02006451 /* Enable Auto-Hibernate if configured */
6452 ufshcd_auto_hibern8_enable(hba);
6453
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306454 ret = ufshcd_verify_dev_init(hba);
6455 if (ret)
6456 goto out;
6457
Dolev Raviv68078d52013-07-30 00:35:58 +05306458 ret = ufshcd_complete_dev_init(hba);
6459 if (ret)
6460 goto out;
6461
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006462 /* Init check for device descriptor sizes */
6463 ufshcd_init_desc_sizes(hba);
6464
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006465 ret = ufs_get_device_desc(hba, &card);
6466 if (ret) {
6467 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6468 __func__, ret);
6469 goto out;
6470 }
6471
6472 ufs_fixup_device_setup(hba, &card);
Yaniv Gardi37113102016-03-10 17:37:16 +02006473 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006474
6475 ret = ufshcd_set_vccq_rail_unused(hba,
6476 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6477 if (ret)
6478 goto out;
6479
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006480 /* UFS device is also active now */
6481 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306482 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006483 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306484
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006485 if (ufshcd_get_max_pwr_mode(hba)) {
6486 dev_err(hba->dev,
6487 "%s: Failed getting max supported power mode\n",
6488 __func__);
6489 } else {
6490 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006491 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006492 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6493 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006494 goto out;
6495 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006496 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006497
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006498 /* set the state as operational after switching to desired gear */
6499 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006500
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006501 /*
6502 * If we are in error handling context or in power management callbacks
6503 * context, no need to scan the host
6504 */
6505 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6506 bool flag;
6507
6508 /* clear any previous UFS device information */
6509 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006510 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6511 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006512 hba->dev_info.f_power_on_wp_en = flag;
6513
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006514 if (!hba->is_init_prefetch)
6515 ufshcd_init_icc_levels(hba);
6516
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006517 /* Add required well known logical units to scsi mid layer */
6518 if (ufshcd_scsi_add_wlus(hba))
6519 goto out;
6520
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006521 /* Initialize devfreq after UFS device is detected */
6522 if (ufshcd_is_clkscaling_supported(hba)) {
6523 memcpy(&hba->clk_scaling.saved_pwr_info.info,
6524 &hba->pwr_info,
6525 sizeof(struct ufs_pa_layer_attr));
6526 hba->clk_scaling.saved_pwr_info.is_valid = true;
6527 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07006528 ret = ufshcd_devfreq_init(hba);
6529 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006530 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006531 }
6532 hba->clk_scaling.is_allowed = true;
6533 }
6534
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306535 scsi_scan_host(hba->host);
6536 pm_runtime_put_sync(hba->dev);
6537 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006538
6539 if (!hba->is_init_prefetch)
6540 hba->is_init_prefetch = true;
6541
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306542out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006543 /*
6544 * If we failed to initialize the device or the device is not
6545 * present, turn off the power/clocks etc.
6546 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006547 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6548 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006549 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006550 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006551
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006552 trace_ufshcd_init(dev_name(hba->dev), ret,
6553 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08006554 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006555 return ret;
6556}
6557
6558/**
6559 * ufshcd_async_scan - asynchronous execution for probing hba
6560 * @data: data pointer to pass to this function
6561 * @cookie: cookie data
6562 */
6563static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6564{
6565 struct ufs_hba *hba = (struct ufs_hba *)data;
6566
6567 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306568}
6569
Yaniv Gardif550c652016-03-10 17:37:07 +02006570static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6571{
6572 unsigned long flags;
6573 struct Scsi_Host *host;
6574 struct ufs_hba *hba;
6575 int index;
6576 bool found = false;
6577
6578 if (!scmd || !scmd->device || !scmd->device->host)
6579 return BLK_EH_NOT_HANDLED;
6580
6581 host = scmd->device->host;
6582 hba = shost_priv(host);
6583 if (!hba)
6584 return BLK_EH_NOT_HANDLED;
6585
6586 spin_lock_irqsave(host->host_lock, flags);
6587
6588 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6589 if (hba->lrb[index].cmd == scmd) {
6590 found = true;
6591 break;
6592 }
6593 }
6594
6595 spin_unlock_irqrestore(host->host_lock, flags);
6596
6597 /*
6598 * Bypass SCSI error handling and reset the block layer timer if this
6599 * SCSI command was not actually dispatched to UFS driver, otherwise
6600 * let SCSI layer handle the error as usual.
6601 */
6602 return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER;
6603}
6604
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006605static const struct attribute_group *ufshcd_driver_groups[] = {
6606 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02006607 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006608 NULL,
6609};
6610
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306611static struct scsi_host_template ufshcd_driver_template = {
6612 .module = THIS_MODULE,
6613 .name = UFSHCD,
6614 .proc_name = UFSHCD,
6615 .queuecommand = ufshcd_queuecommand,
6616 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09006617 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306618 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03006619 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306620 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306621 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6622 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02006623 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306624 .this_id = -1,
6625 .sg_tablesize = SG_ALL,
6626 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
6627 .can_queue = UFSHCD_CAN_QUEUE,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006628 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01006629 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006630 .sdev_groups = ufshcd_driver_groups,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306631};
6632
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006633static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6634 int ua)
6635{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006636 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006637
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006638 if (!vreg)
6639 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006640
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006641 ret = regulator_set_load(vreg->reg, ua);
6642 if (ret < 0) {
6643 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
6644 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006645 }
6646
6647 return ret;
6648}
6649
6650static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
6651 struct ufs_vreg *vreg)
6652{
Yaniv Gardi60f01872016-03-10 17:37:11 +02006653 if (!vreg)
6654 return 0;
6655 else if (vreg->unused)
6656 return 0;
6657 else
6658 return ufshcd_config_vreg_load(hba->dev, vreg,
6659 UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006660}
6661
6662static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
6663 struct ufs_vreg *vreg)
6664{
Yaniv Gardi60f01872016-03-10 17:37:11 +02006665 if (!vreg)
6666 return 0;
6667 else if (vreg->unused)
6668 return 0;
6669 else
6670 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006671}
6672
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006673static int ufshcd_config_vreg(struct device *dev,
6674 struct ufs_vreg *vreg, bool on)
6675{
6676 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06006677 struct regulator *reg;
6678 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006679 int min_uV, uA_load;
6680
6681 BUG_ON(!vreg);
6682
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06006683 reg = vreg->reg;
6684 name = vreg->name;
6685
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006686 if (regulator_count_voltages(reg) > 0) {
6687 min_uV = on ? vreg->min_uV : 0;
6688 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
6689 if (ret) {
6690 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
6691 __func__, name, ret);
6692 goto out;
6693 }
6694
6695 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006696 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
6697 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006698 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006699 }
6700out:
6701 return ret;
6702}
6703
6704static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
6705{
6706 int ret = 0;
6707
Yaniv Gardi60f01872016-03-10 17:37:11 +02006708 if (!vreg)
6709 goto out;
6710 else if (vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006711 goto out;
6712
6713 ret = ufshcd_config_vreg(dev, vreg, true);
6714 if (!ret)
6715 ret = regulator_enable(vreg->reg);
6716
6717 if (!ret)
6718 vreg->enabled = true;
6719 else
6720 dev_err(dev, "%s: %s enable failed, err=%d\n",
6721 __func__, vreg->name, ret);
6722out:
6723 return ret;
6724}
6725
6726static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
6727{
6728 int ret = 0;
6729
Yaniv Gardi60f01872016-03-10 17:37:11 +02006730 if (!vreg)
6731 goto out;
6732 else if (!vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006733 goto out;
6734
6735 ret = regulator_disable(vreg->reg);
6736
6737 if (!ret) {
6738 /* ignore errors on applying disable config */
6739 ufshcd_config_vreg(dev, vreg, false);
6740 vreg->enabled = false;
6741 } else {
6742 dev_err(dev, "%s: %s disable failed, err=%d\n",
6743 __func__, vreg->name, ret);
6744 }
6745out:
6746 return ret;
6747}
6748
6749static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
6750{
6751 int ret = 0;
6752 struct device *dev = hba->dev;
6753 struct ufs_vreg_info *info = &hba->vreg_info;
6754
6755 if (!info)
6756 goto out;
6757
6758 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
6759 if (ret)
6760 goto out;
6761
6762 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
6763 if (ret)
6764 goto out;
6765
6766 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
6767 if (ret)
6768 goto out;
6769
6770out:
6771 if (ret) {
6772 ufshcd_toggle_vreg(dev, info->vccq2, false);
6773 ufshcd_toggle_vreg(dev, info->vccq, false);
6774 ufshcd_toggle_vreg(dev, info->vcc, false);
6775 }
6776 return ret;
6777}
6778
Raviv Shvili6a771a62014-09-25 15:32:24 +03006779static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
6780{
6781 struct ufs_vreg_info *info = &hba->vreg_info;
6782
6783 if (info)
6784 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
6785
6786 return 0;
6787}
6788
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006789static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
6790{
6791 int ret = 0;
6792
6793 if (!vreg)
6794 goto out;
6795
6796 vreg->reg = devm_regulator_get(dev, vreg->name);
6797 if (IS_ERR(vreg->reg)) {
6798 ret = PTR_ERR(vreg->reg);
6799 dev_err(dev, "%s: %s get failed, err=%d\n",
6800 __func__, vreg->name, ret);
6801 }
6802out:
6803 return ret;
6804}
6805
6806static int ufshcd_init_vreg(struct ufs_hba *hba)
6807{
6808 int ret = 0;
6809 struct device *dev = hba->dev;
6810 struct ufs_vreg_info *info = &hba->vreg_info;
6811
6812 if (!info)
6813 goto out;
6814
6815 ret = ufshcd_get_vreg(dev, info->vcc);
6816 if (ret)
6817 goto out;
6818
6819 ret = ufshcd_get_vreg(dev, info->vccq);
6820 if (ret)
6821 goto out;
6822
6823 ret = ufshcd_get_vreg(dev, info->vccq2);
6824out:
6825 return ret;
6826}
6827
Raviv Shvili6a771a62014-09-25 15:32:24 +03006828static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
6829{
6830 struct ufs_vreg_info *info = &hba->vreg_info;
6831
6832 if (info)
6833 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
6834
6835 return 0;
6836}
6837
Yaniv Gardi60f01872016-03-10 17:37:11 +02006838static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
6839{
6840 int ret = 0;
6841 struct ufs_vreg_info *info = &hba->vreg_info;
6842
6843 if (!info)
6844 goto out;
6845 else if (!info->vccq)
6846 goto out;
6847
6848 if (unused) {
6849 /* shut off the rail here */
6850 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
6851 /*
6852 * Mark this rail as no longer used, so it doesn't get enabled
6853 * later by mistake
6854 */
6855 if (!ret)
6856 info->vccq->unused = true;
6857 } else {
6858 /*
6859 * rail should have been already enabled hence just make sure
6860 * that unused flag is cleared.
6861 */
6862 info->vccq->unused = false;
6863 }
6864out:
6865 return ret;
6866}
6867
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006868static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
6869 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006870{
6871 int ret = 0;
6872 struct ufs_clk_info *clki;
6873 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006874 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08006875 ktime_t start = ktime_get();
6876 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006877
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03006878 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006879 goto out;
6880
Subhash Jadavani1e879e82016-10-06 21:48:22 -07006881 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
6882 if (ret)
6883 return ret;
6884
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006885 list_for_each_entry(clki, head, list) {
6886 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006887 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
6888 continue;
6889
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08006890 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006891 if (on && !clki->enabled) {
6892 ret = clk_prepare_enable(clki->clk);
6893 if (ret) {
6894 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
6895 __func__, clki->name, ret);
6896 goto out;
6897 }
6898 } else if (!on && clki->enabled) {
6899 clk_disable_unprepare(clki->clk);
6900 }
6901 clki->enabled = on;
6902 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
6903 clki->name, on ? "en" : "dis");
6904 }
6905 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006906
Subhash Jadavani1e879e82016-10-06 21:48:22 -07006907 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
6908 if (ret)
6909 return ret;
6910
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006911out:
6912 if (ret) {
6913 list_for_each_entry(clki, head, list) {
6914 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
6915 clk_disable_unprepare(clki->clk);
6916 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006917 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006918 spin_lock_irqsave(hba->host->host_lock, flags);
6919 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006920 trace_ufshcd_clk_gating(dev_name(hba->dev),
6921 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006922 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006923 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006924
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08006925 if (clk_state_changed)
6926 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
6927 (on ? "on" : "off"),
6928 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006929 return ret;
6930}
6931
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006932static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
6933{
6934 return __ufshcd_setup_clocks(hba, on, false);
6935}
6936
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006937static int ufshcd_init_clocks(struct ufs_hba *hba)
6938{
6939 int ret = 0;
6940 struct ufs_clk_info *clki;
6941 struct device *dev = hba->dev;
6942 struct list_head *head = &hba->clk_list_head;
6943
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03006944 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006945 goto out;
6946
6947 list_for_each_entry(clki, head, list) {
6948 if (!clki->name)
6949 continue;
6950
6951 clki->clk = devm_clk_get(dev, clki->name);
6952 if (IS_ERR(clki->clk)) {
6953 ret = PTR_ERR(clki->clk);
6954 dev_err(dev, "%s: %s clk get failed, %d\n",
6955 __func__, clki->name, ret);
6956 goto out;
6957 }
6958
6959 if (clki->max_freq) {
6960 ret = clk_set_rate(clki->clk, clki->max_freq);
6961 if (ret) {
6962 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
6963 __func__, clki->name,
6964 clki->max_freq, ret);
6965 goto out;
6966 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03006967 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006968 }
6969 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
6970 clki->name, clk_get_rate(clki->clk));
6971 }
6972out:
6973 return ret;
6974}
6975
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006976static int ufshcd_variant_hba_init(struct ufs_hba *hba)
6977{
6978 int err = 0;
6979
6980 if (!hba->vops)
6981 goto out;
6982
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006983 err = ufshcd_vops_init(hba);
6984 if (err)
6985 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006986
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006987 err = ufshcd_vops_setup_regulators(hba, true);
6988 if (err)
6989 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006990
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006991 goto out;
6992
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006993out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006994 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006995out:
6996 if (err)
6997 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006998 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006999 return err;
7000}
7001
7002static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7003{
7004 if (!hba->vops)
7005 return;
7006
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007007 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007008
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007009 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007010}
7011
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007012static int ufshcd_hba_init(struct ufs_hba *hba)
7013{
7014 int err;
7015
Raviv Shvili6a771a62014-09-25 15:32:24 +03007016 /*
7017 * Handle host controller power separately from the UFS device power
7018 * rails as it will help controlling the UFS host controller power
7019 * collapse easily which is different than UFS device power collapse.
7020 * Also, enable the host controller power before we go ahead with rest
7021 * of the initialization here.
7022 */
7023 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007024 if (err)
7025 goto out;
7026
Raviv Shvili6a771a62014-09-25 15:32:24 +03007027 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007028 if (err)
7029 goto out;
7030
Raviv Shvili6a771a62014-09-25 15:32:24 +03007031 err = ufshcd_init_clocks(hba);
7032 if (err)
7033 goto out_disable_hba_vreg;
7034
7035 err = ufshcd_setup_clocks(hba, true);
7036 if (err)
7037 goto out_disable_hba_vreg;
7038
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007039 err = ufshcd_init_vreg(hba);
7040 if (err)
7041 goto out_disable_clks;
7042
7043 err = ufshcd_setup_vreg(hba, true);
7044 if (err)
7045 goto out_disable_clks;
7046
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007047 err = ufshcd_variant_hba_init(hba);
7048 if (err)
7049 goto out_disable_vreg;
7050
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007051 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007052 goto out;
7053
7054out_disable_vreg:
7055 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007056out_disable_clks:
7057 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007058out_disable_hba_vreg:
7059 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007060out:
7061 return err;
7062}
7063
7064static void ufshcd_hba_exit(struct ufs_hba *hba)
7065{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007066 if (hba->is_powered) {
7067 ufshcd_variant_hba_exit(hba);
7068 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007069 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007070 if (ufshcd_is_clkscaling_supported(hba)) {
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007071 if (hba->devfreq)
7072 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007073 destroy_workqueue(hba->clk_scaling.workq);
7074 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007075 ufshcd_setup_clocks(hba, false);
7076 ufshcd_setup_hba_vreg(hba, false);
7077 hba->is_powered = false;
7078 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007079}
7080
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007081static int
7082ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307083{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007084 unsigned char cmd[6] = {REQUEST_SENSE,
7085 0,
7086 0,
7087 0,
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07007088 UFSHCD_REQ_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007089 0};
7090 char *buffer;
7091 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307092
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07007093 buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007094 if (!buffer) {
7095 ret = -ENOMEM;
7096 goto out;
7097 }
7098
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007099 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7100 UFSHCD_REQ_SENSE_SIZE, NULL, NULL,
7101 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007102 if (ret)
7103 pr_err("%s: failed with err %d\n", __func__, ret);
7104
7105 kfree(buffer);
7106out:
7107 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307108}
7109
7110/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007111 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7112 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307113 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007114 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307115 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007116 * Returns 0 if requested power mode is set successfully
7117 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307118 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007119static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7120 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307121{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007122 unsigned char cmd[6] = { START_STOP };
7123 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007124 struct scsi_device *sdp;
7125 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007126 int ret;
7127
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007128 spin_lock_irqsave(hba->host->host_lock, flags);
7129 sdp = hba->sdev_ufs_device;
7130 if (sdp) {
7131 ret = scsi_device_get(sdp);
7132 if (!ret && !scsi_device_online(sdp)) {
7133 ret = -ENODEV;
7134 scsi_device_put(sdp);
7135 }
7136 } else {
7137 ret = -ENODEV;
7138 }
7139 spin_unlock_irqrestore(hba->host->host_lock, flags);
7140
7141 if (ret)
7142 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007143
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307144 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007145 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7146 * handling, which would wait for host to be resumed. Since we know
7147 * we are functional while we are here, skip host resume in error
7148 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307149 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007150 hba->host->eh_noresume = 1;
7151 if (hba->wlun_dev_clr_ua) {
7152 ret = ufshcd_send_request_sense(hba, sdp);
7153 if (ret)
7154 goto out;
7155 /* Unit attention condition is cleared now */
7156 hba->wlun_dev_clr_ua = false;
7157 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307158
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007159 cmd[4] = pwr_mode << 4;
7160
7161 /*
7162 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007163 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007164 * already suspended childs.
7165 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007166 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7167 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007168 if (ret) {
7169 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007170 "START_STOP failed for power mode: %d, result %x\n",
7171 pwr_mode, ret);
Hannes Reinecke21045512015-01-08 07:43:46 +01007172 if (driver_byte(ret) & DRIVER_SENSE)
7173 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007174 }
7175
7176 if (!ret)
7177 hba->curr_dev_pwr_mode = pwr_mode;
7178out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007179 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007180 hba->host->eh_noresume = 0;
7181 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307182}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307183
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007184static int ufshcd_link_state_transition(struct ufs_hba *hba,
7185 enum uic_link_state req_link_state,
7186 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307187{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007188 int ret = 0;
7189
7190 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307191 return 0;
7192
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007193 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7194 ret = ufshcd_uic_hibern8_enter(hba);
7195 if (!ret)
7196 ufshcd_set_link_hibern8(hba);
7197 else
7198 goto out;
7199 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307200 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007201 * If autobkops is enabled, link can't be turned off because
7202 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307203 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007204 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7205 (!check_for_bkops || (check_for_bkops &&
7206 !hba->auto_bkops_enabled))) {
7207 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007208 * Let's make sure that link is in low power mode, we are doing
7209 * this currently by putting the link in Hibern8. Otherway to
7210 * put the link in low power mode is to send the DME end point
7211 * to device and then send the DME reset command to local
7212 * unipro. But putting the link in hibern8 is much faster.
7213 */
7214 ret = ufshcd_uic_hibern8_enter(hba);
7215 if (ret)
7216 goto out;
7217 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007218 * Change controller state to "reset state" which
7219 * should also put the link in off/reset state
7220 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007221 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007222 /*
7223 * TODO: Check if we need any delay to make sure that
7224 * controller is reset
7225 */
7226 ufshcd_set_link_off(hba);
7227 }
7228
7229out:
7230 return ret;
7231}
7232
7233static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7234{
7235 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007236 * It seems some UFS devices may keep drawing more than sleep current
7237 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7238 * To avoid this situation, add 2ms delay before putting these UFS
7239 * rails in LPM mode.
7240 */
7241 if (!ufshcd_is_link_active(hba) &&
7242 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7243 usleep_range(2000, 2100);
7244
7245 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007246 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7247 * power.
7248 *
7249 * If UFS device and link is in OFF state, all power supplies (VCC,
7250 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7251 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7252 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7253 *
7254 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7255 * in low power state which would save some power.
7256 */
7257 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7258 !hba->dev_info.is_lu_power_on_wp) {
7259 ufshcd_setup_vreg(hba, false);
7260 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7261 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7262 if (!ufshcd_is_link_active(hba)) {
7263 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7264 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7265 }
7266 }
7267}
7268
7269static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7270{
7271 int ret = 0;
7272
7273 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7274 !hba->dev_info.is_lu_power_on_wp) {
7275 ret = ufshcd_setup_vreg(hba, true);
7276 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007277 if (!ret && !ufshcd_is_link_active(hba)) {
7278 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7279 if (ret)
7280 goto vcc_disable;
7281 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7282 if (ret)
7283 goto vccq_lpm;
7284 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007285 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007286 }
7287 goto out;
7288
7289vccq_lpm:
7290 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7291vcc_disable:
7292 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7293out:
7294 return ret;
7295}
7296
7297static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7298{
7299 if (ufshcd_is_link_off(hba))
7300 ufshcd_setup_hba_vreg(hba, false);
7301}
7302
7303static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7304{
7305 if (ufshcd_is_link_off(hba))
7306 ufshcd_setup_hba_vreg(hba, true);
7307}
7308
7309/**
7310 * ufshcd_suspend - helper function for suspend operations
7311 * @hba: per adapter instance
7312 * @pm_op: desired low power operation type
7313 *
7314 * This function will try to put the UFS device and link into low power
7315 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7316 * (System PM level).
7317 *
7318 * If this function is called during shutdown, it will make sure that
7319 * both UFS device and UFS link is powered off.
7320 *
7321 * NOTE: UFS device & link must be active before we enter in this function.
7322 *
7323 * Returns 0 for success and non-zero for failure
7324 */
7325static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7326{
7327 int ret = 0;
7328 enum ufs_pm_level pm_lvl;
7329 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7330 enum uic_link_state req_link_state;
7331
7332 hba->pm_op_in_progress = 1;
7333 if (!ufshcd_is_shutdown_pm(pm_op)) {
7334 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7335 hba->rpm_lvl : hba->spm_lvl;
7336 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7337 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7338 } else {
7339 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7340 req_link_state = UIC_LINK_OFF_STATE;
7341 }
7342
7343 /*
7344 * If we can't transition into any of the low power modes
7345 * just gate the clocks.
7346 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007347 ufshcd_hold(hba, false);
7348 hba->clk_gating.is_suspended = true;
7349
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007350 if (hba->clk_scaling.is_allowed) {
7351 cancel_work_sync(&hba->clk_scaling.suspend_work);
7352 cancel_work_sync(&hba->clk_scaling.resume_work);
7353 ufshcd_suspend_clkscaling(hba);
7354 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007355
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007356 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7357 req_link_state == UIC_LINK_ACTIVE_STATE) {
7358 goto disable_clks;
7359 }
7360
7361 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7362 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007363 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007364
7365 /* UFS device & link must be active before we enter in this function */
7366 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7367 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007368 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007369 }
7370
7371 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007372 if (ufshcd_can_autobkops_during_suspend(hba)) {
7373 /*
7374 * The device is idle with no requests in the queue,
7375 * allow background operations if bkops status shows
7376 * that performance might be impacted.
7377 */
7378 ret = ufshcd_urgent_bkops(hba);
7379 if (ret)
7380 goto enable_gating;
7381 } else {
7382 /* make sure that auto bkops is disabled */
7383 ufshcd_disable_auto_bkops(hba);
7384 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007385 }
7386
7387 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7388 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7389 !ufshcd_is_runtime_pm(pm_op))) {
7390 /* ensure that bkops is disabled */
7391 ufshcd_disable_auto_bkops(hba);
7392 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7393 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007394 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007395 }
7396
7397 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7398 if (ret)
7399 goto set_dev_active;
7400
7401 ufshcd_vreg_set_lpm(hba);
7402
7403disable_clks:
7404 /*
7405 * Call vendor specific suspend callback. As these callbacks may access
7406 * vendor specific host controller register space call them before the
7407 * host clocks are ON.
7408 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007409 ret = ufshcd_vops_suspend(hba, pm_op);
7410 if (ret)
7411 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007412
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007413 if (!ufshcd_is_link_active(hba))
7414 ufshcd_setup_clocks(hba, false);
7415 else
7416 /* If link is active, device ref_clk can't be switched off */
7417 __ufshcd_setup_clocks(hba, false, true);
7418
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007419 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007420 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007421 /*
7422 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007423 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007424 */
7425 ufshcd_disable_irq(hba);
7426 /* Put the host controller in low power mode if possible */
7427 ufshcd_hba_vreg_set_lpm(hba);
7428 goto out;
7429
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007430set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007431 if (hba->clk_scaling.is_allowed)
7432 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007433 ufshcd_vreg_set_hpm(hba);
7434 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7435 ufshcd_set_link_active(hba);
7436 else if (ufshcd_is_link_off(hba))
7437 ufshcd_host_reset_and_restore(hba);
7438set_dev_active:
7439 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7440 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007441enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007442 if (hba->clk_scaling.is_allowed)
7443 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007444 hba->clk_gating.is_suspended = false;
7445 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007446out:
7447 hba->pm_op_in_progress = 0;
7448 return ret;
7449}
7450
7451/**
7452 * ufshcd_resume - helper function for resume operations
7453 * @hba: per adapter instance
7454 * @pm_op: runtime PM or system PM
7455 *
7456 * This function basically brings the UFS device, UniPro link and controller
7457 * to active state.
7458 *
7459 * Returns 0 for success and non-zero for failure
7460 */
7461static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7462{
7463 int ret;
7464 enum uic_link_state old_link_state;
7465
7466 hba->pm_op_in_progress = 1;
7467 old_link_state = hba->uic_link_state;
7468
7469 ufshcd_hba_vreg_set_hpm(hba);
7470 /* Make sure clocks are enabled before accessing controller */
7471 ret = ufshcd_setup_clocks(hba, true);
7472 if (ret)
7473 goto out;
7474
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007475 /* enable the host irq as host controller would be active soon */
7476 ret = ufshcd_enable_irq(hba);
7477 if (ret)
7478 goto disable_irq_and_vops_clks;
7479
7480 ret = ufshcd_vreg_set_hpm(hba);
7481 if (ret)
7482 goto disable_irq_and_vops_clks;
7483
7484 /*
7485 * Call vendor specific resume callback. As these callbacks may access
7486 * vendor specific host controller register space call them when the
7487 * host clocks are ON.
7488 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007489 ret = ufshcd_vops_resume(hba, pm_op);
7490 if (ret)
7491 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007492
7493 if (ufshcd_is_link_hibern8(hba)) {
7494 ret = ufshcd_uic_hibern8_exit(hba);
7495 if (!ret)
7496 ufshcd_set_link_active(hba);
7497 else
7498 goto vendor_suspend;
7499 } else if (ufshcd_is_link_off(hba)) {
7500 ret = ufshcd_host_reset_and_restore(hba);
7501 /*
7502 * ufshcd_host_reset_and_restore() should have already
7503 * set the link state as active
7504 */
7505 if (ret || !ufshcd_is_link_active(hba))
7506 goto vendor_suspend;
7507 }
7508
7509 if (!ufshcd_is_ufs_dev_active(hba)) {
7510 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7511 if (ret)
7512 goto set_old_link_state;
7513 }
7514
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08007515 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7516 ufshcd_enable_auto_bkops(hba);
7517 else
7518 /*
7519 * If BKOPs operations are urgently needed at this moment then
7520 * keep auto-bkops enabled or else disable it.
7521 */
7522 ufshcd_urgent_bkops(hba);
7523
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007524 hba->clk_gating.is_suspended = false;
7525
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007526 if (hba->clk_scaling.is_allowed)
7527 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007528
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007529 /* Schedule clock gating in case of no access to UFS device yet */
7530 ufshcd_release(hba);
Adrian Hunterad448372018-03-20 15:07:38 +02007531
7532 /* Enable Auto-Hibernate if configured */
7533 ufshcd_auto_hibern8_enable(hba);
7534
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007535 goto out;
7536
7537set_old_link_state:
7538 ufshcd_link_state_transition(hba, old_link_state, 0);
7539vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007540 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007541disable_vreg:
7542 ufshcd_vreg_set_lpm(hba);
7543disable_irq_and_vops_clks:
7544 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007545 if (hba->clk_scaling.is_allowed)
7546 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007547 ufshcd_setup_clocks(hba, false);
7548out:
7549 hba->pm_op_in_progress = 0;
7550 return ret;
7551}
7552
7553/**
7554 * ufshcd_system_suspend - system suspend routine
7555 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007556 *
7557 * Check the description of ufshcd_suspend() function for more details.
7558 *
7559 * Returns 0 for success and non-zero for failure
7560 */
7561int ufshcd_system_suspend(struct ufs_hba *hba)
7562{
7563 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007564 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007565
7566 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03007567 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007568
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007569 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7570 hba->curr_dev_pwr_mode) &&
7571 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7572 hba->uic_link_state))
7573 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007574
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007575 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007576 /*
7577 * UFS device and/or UFS link low power states during runtime
7578 * suspend seems to be different than what is expected during
7579 * system suspend. Hence runtime resume the devic & link and
7580 * let the system suspend low power states to take effect.
7581 * TODO: If resume takes longer time, we might have optimize
7582 * it in future by not resuming everything if possible.
7583 */
7584 ret = ufshcd_runtime_resume(hba);
7585 if (ret)
7586 goto out;
7587 }
7588
7589 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7590out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007591 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7592 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007593 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03007594 if (!ret)
7595 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007596 return ret;
7597}
7598EXPORT_SYMBOL(ufshcd_system_suspend);
7599
7600/**
7601 * ufshcd_system_resume - system resume routine
7602 * @hba: per adapter instance
7603 *
7604 * Returns 0 for success and non-zero for failure
7605 */
7606
7607int ufshcd_system_resume(struct ufs_hba *hba)
7608{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007609 int ret = 0;
7610 ktime_t start = ktime_get();
7611
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007612 if (!hba)
7613 return -EINVAL;
7614
7615 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007616 /*
7617 * Let the runtime resume take care of resuming
7618 * if runtime suspended.
7619 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007620 goto out;
7621 else
7622 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
7623out:
7624 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
7625 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007626 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007627 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007628}
7629EXPORT_SYMBOL(ufshcd_system_resume);
7630
7631/**
7632 * ufshcd_runtime_suspend - runtime suspend routine
7633 * @hba: per adapter instance
7634 *
7635 * Check the description of ufshcd_suspend() function for more details.
7636 *
7637 * Returns 0 for success and non-zero for failure
7638 */
7639int ufshcd_runtime_suspend(struct ufs_hba *hba)
7640{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007641 int ret = 0;
7642 ktime_t start = ktime_get();
7643
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007644 if (!hba)
7645 return -EINVAL;
7646
7647 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007648 goto out;
7649 else
7650 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
7651out:
7652 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
7653 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007654 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007655 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307656}
7657EXPORT_SYMBOL(ufshcd_runtime_suspend);
7658
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007659/**
7660 * ufshcd_runtime_resume - runtime resume routine
7661 * @hba: per adapter instance
7662 *
7663 * This function basically brings the UFS device, UniPro link and controller
7664 * to active state. Following operations are done in this function:
7665 *
7666 * 1. Turn on all the controller related clocks
7667 * 2. Bring the UniPro link out of Hibernate state
7668 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
7669 * to active state.
7670 * 4. If auto-bkops is enabled on the device, disable it.
7671 *
7672 * So following would be the possible power state after this function return
7673 * successfully:
7674 * S1: UFS device in Active state with VCC rail ON
7675 * UniPro link in Active state
7676 * All the UFS/UniPro controller clocks are ON
7677 *
7678 * Returns 0 for success and non-zero for failure
7679 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307680int ufshcd_runtime_resume(struct ufs_hba *hba)
7681{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007682 int ret = 0;
7683 ktime_t start = ktime_get();
7684
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007685 if (!hba)
7686 return -EINVAL;
7687
7688 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007689 goto out;
7690 else
7691 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
7692out:
7693 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
7694 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007695 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007696 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307697}
7698EXPORT_SYMBOL(ufshcd_runtime_resume);
7699
7700int ufshcd_runtime_idle(struct ufs_hba *hba)
7701{
7702 return 0;
7703}
7704EXPORT_SYMBOL(ufshcd_runtime_idle);
7705
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307706/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007707 * ufshcd_shutdown - shutdown routine
7708 * @hba: per adapter instance
7709 *
7710 * This function would power off both UFS device and UFS link.
7711 *
7712 * Returns 0 always to allow force shutdown even in case of errors.
7713 */
7714int ufshcd_shutdown(struct ufs_hba *hba)
7715{
7716 int ret = 0;
7717
7718 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
7719 goto out;
7720
7721 if (pm_runtime_suspended(hba->dev)) {
7722 ret = ufshcd_runtime_resume(hba);
7723 if (ret)
7724 goto out;
7725 }
7726
7727 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
7728out:
7729 if (ret)
7730 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
7731 /* allow force shutdown even in case of errors */
7732 return 0;
7733}
7734EXPORT_SYMBOL(ufshcd_shutdown);
7735
7736/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307737 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307738 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007739 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307740 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307741void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307742{
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02007743 ufs_sysfs_remove_nodes(hba->dev);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05307744 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307745 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05307746 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02007747 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307748
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007749 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007750 if (ufshcd_is_clkscaling_supported(hba))
7751 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007752 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307753}
7754EXPORT_SYMBOL_GPL(ufshcd_remove);
7755
7756/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02007757 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
7758 * @hba: pointer to Host Bus Adapter (HBA)
7759 */
7760void ufshcd_dealloc_host(struct ufs_hba *hba)
7761{
7762 scsi_host_put(hba->host);
7763}
7764EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
7765
7766/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09007767 * ufshcd_set_dma_mask - Set dma mask based on the controller
7768 * addressing capability
7769 * @hba: per adapter instance
7770 *
7771 * Returns 0 for success, non-zero for failure
7772 */
7773static int ufshcd_set_dma_mask(struct ufs_hba *hba)
7774{
7775 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
7776 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
7777 return 0;
7778 }
7779 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
7780}
7781
7782/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007783 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307784 * @dev: pointer to device handle
7785 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307786 * Returns 0 on success, non-zero value on failure
7787 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007788int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307789{
7790 struct Scsi_Host *host;
7791 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007792 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307793
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307794 if (!dev) {
7795 dev_err(dev,
7796 "Invalid memory reference for dev is NULL\n");
7797 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307798 goto out_error;
7799 }
7800
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307801 host = scsi_host_alloc(&ufshcd_driver_template,
7802 sizeof(struct ufs_hba));
7803 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307804 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307805 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307806 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307807 }
7808 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307809 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307810 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007811 *hba_handle = hba;
7812
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007813 INIT_LIST_HEAD(&hba->clk_list_head);
7814
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007815out_error:
7816 return err;
7817}
7818EXPORT_SYMBOL(ufshcd_alloc_host);
7819
7820/**
7821 * ufshcd_init - Driver initialization routine
7822 * @hba: per-adapter instance
7823 * @mmio_base: base register address
7824 * @irq: Interrupt line of device
7825 * Returns 0 on success, non-zero value on failure
7826 */
7827int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
7828{
7829 int err;
7830 struct Scsi_Host *host = hba->host;
7831 struct device *dev = hba->dev;
7832
7833 if (!mmio_base) {
7834 dev_err(hba->dev,
7835 "Invalid memory reference for mmio_base is NULL\n");
7836 err = -ENODEV;
7837 goto out_error;
7838 }
7839
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307840 hba->mmio_base = mmio_base;
7841 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307842
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007843 /* Set descriptor lengths to specification defaults */
7844 ufshcd_def_desc_sizes(hba);
7845
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007846 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007847 if (err)
7848 goto out_error;
7849
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307850 /* Read capabilities registers */
7851 ufshcd_hba_capabilities(hba);
7852
7853 /* Get UFS version supported by the controller */
7854 hba->ufs_version = ufshcd_get_ufs_version(hba);
7855
Yaniv Gardic01848c2016-12-05 19:25:02 -08007856 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
7857 (hba->ufs_version != UFSHCI_VERSION_11) &&
7858 (hba->ufs_version != UFSHCI_VERSION_20) &&
7859 (hba->ufs_version != UFSHCI_VERSION_21))
7860 dev_err(hba->dev, "invalid UFS version 0x%x\n",
7861 hba->ufs_version);
7862
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05307863 /* Get Interrupt bit mask per version */
7864 hba->intr_mask = ufshcd_get_intr_mask(hba);
7865
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09007866 err = ufshcd_set_dma_mask(hba);
7867 if (err) {
7868 dev_err(hba->dev, "set dma mask failed\n");
7869 goto out_disable;
7870 }
7871
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307872 /* Allocate memory for host memory space */
7873 err = ufshcd_memory_alloc(hba);
7874 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307875 dev_err(hba->dev, "Memory allocation failed\n");
7876 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307877 }
7878
7879 /* Configure LRB */
7880 ufshcd_host_memory_configure(hba);
7881
7882 host->can_queue = hba->nutrs;
7883 host->cmd_per_lun = hba->nutrs;
7884 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03007885 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307886 host->max_channel = UFSHCD_MAX_CHANNEL;
7887 host->unique_id = host->host_no;
7888 host->max_cmd_len = MAX_CDB_SIZE;
7889
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007890 hba->max_pwr_info.is_valid = false;
7891
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307892 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05307893 init_waitqueue_head(&hba->tm_wq);
7894 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307895
7896 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05307897 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307898 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307899
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307900 /* Initialize UIC command mutex */
7901 mutex_init(&hba->uic_cmd_mutex);
7902
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307903 /* Initialize mutex for device management commands */
7904 mutex_init(&hba->dev_cmd.lock);
7905
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08007906 init_rwsem(&hba->clk_scaling_lock);
7907
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307908 /* Initialize device management tag acquire wait queue */
7909 init_waitqueue_head(&hba->dev_cmd.tag_wq);
7910
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007911 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02007912
7913 /*
7914 * In order to avoid any spurious interrupt immediately after
7915 * registering UFS controller interrupt handler, clear any pending UFS
7916 * interrupt status and disable all the UFS interrupts.
7917 */
7918 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
7919 REG_INTERRUPT_STATUS);
7920 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
7921 /*
7922 * Make sure that UFS interrupts are disabled and any pending interrupt
7923 * status is cleared before registering UFS interrupt handler.
7924 */
7925 mb();
7926
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307927 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09007928 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307929 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307930 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007931 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007932 } else {
7933 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307934 }
7935
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307936 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307937 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307938 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007939 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307940 }
7941
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307942 /* Host controller enable */
7943 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307944 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307945 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08007946 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08007947 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307948 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307949 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307950
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007951 if (ufshcd_is_clkscaling_supported(hba)) {
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007952 char wq_name[sizeof("ufs_clkscaling_00")];
7953
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007954 INIT_WORK(&hba->clk_scaling.suspend_work,
7955 ufshcd_clk_scaling_suspend_work);
7956 INIT_WORK(&hba->clk_scaling.resume_work,
7957 ufshcd_clk_scaling_resume_work);
7958
Tomohiro Kusumid985c6ea2017-03-28 16:49:29 +03007959 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007960 host->host_no);
7961 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
7962
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007963 ufshcd_clkscaling_init_sysfs(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007964 }
7965
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08007966 /*
7967 * Set the default power management level for runtime and system PM.
7968 * Default power saving mode is to keep UFS link in Hibern8 state
7969 * and UFS device in sleep state.
7970 */
7971 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
7972 UFS_SLEEP_PWR_MODE,
7973 UIC_LINK_HIBERN8_STATE);
7974 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
7975 UFS_SLEEP_PWR_MODE,
7976 UIC_LINK_HIBERN8_STATE);
7977
Adrian Hunterad448372018-03-20 15:07:38 +02007978 /* Set the default auto-hiberate idle timer value to 150 ms */
7979 if (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) {
7980 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
7981 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
7982 }
7983
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05307984 /* Hold auto suspend until async scan completes */
7985 pm_runtime_get_sync(dev);
7986
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007987 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08007988 * We are assuming that device wasn't put in sleep/power-down
7989 * state exclusively during the boot stage before kernel.
7990 * This assumption helps avoid doing link startup twice during
7991 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007992 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08007993 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007994
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307995 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02007996 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307997
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307998 return 0;
7999
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308000out_remove_scsi_host:
8001 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008002exit_gating:
8003 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308004out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008005 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008006 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308007out_error:
8008 return err;
8009}
8010EXPORT_SYMBOL_GPL(ufshcd_init);
8011
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308012MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8013MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308014MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308015MODULE_LICENSE("GPL");
8016MODULE_VERSION(UFSHCD_DRIVER_VERSION);