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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Stanley Chu49615ba2019-09-16 23:56:50 +080091/* default delay of autosuspend: 2000 ms */
92#define RPM_AUTOSUSPEND_DELAY_MS 2000
93
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030094#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
95 ({ \
96 int _ret; \
97 if (_on) \
98 _ret = ufshcd_enable_vreg(_dev, _vreg); \
99 else \
100 _ret = ufshcd_disable_vreg(_dev, _vreg); \
101 _ret; \
102 })
103
Tomas Winklerba809172018-06-14 11:14:09 +0300104#define ufshcd_hex_dump(prefix_str, buf, len) do { \
105 size_t __len = (len); \
106 print_hex_dump(KERN_ERR, prefix_str, \
107 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
108 16, 4, buf, __len, false); \
109} while (0)
110
111int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
112 const char *prefix)
113{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100114 u32 *regs;
115 size_t pos;
116
117 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
118 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300119
Can Guocddaeba2019-11-14 22:09:27 -0800120 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300121 if (!regs)
122 return -ENOMEM;
123
Marc Gonzalezd6724752019-01-22 18:29:22 +0100124 for (pos = 0; pos < len; pos += 4)
125 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
126
Tomas Winklerba809172018-06-14 11:14:09 +0300127 ufshcd_hex_dump(prefix, regs, len);
128 kfree(regs);
129
130 return 0;
131}
132EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800133
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530134enum {
135 UFSHCD_MAX_CHANNEL = 0,
136 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530137 UFSHCD_CMD_PER_LUN = 32,
138 UFSHCD_CAN_QUEUE = 32,
139};
140
141/* UFSHCD states */
142enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_STATE_RESET,
144 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530145 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800146 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530147};
148
149/* UFSHCD error handling flags */
150enum {
151 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530152};
153
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530154/* UFSHCD UIC layer error flags */
155enum {
156 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200157 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
158 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
159 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
160 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
161 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530162};
163
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530164#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300165 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530166#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300167 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530168#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300169 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300171#define ufshcd_set_ufs_dev_active(h) \
172 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
173#define ufshcd_set_ufs_dev_sleep(h) \
174 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
175#define ufshcd_set_ufs_dev_poweroff(h) \
176 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
177#define ufshcd_is_ufs_dev_active(h) \
178 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
179#define ufshcd_is_ufs_dev_sleep(h) \
180 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
181#define ufshcd_is_ufs_dev_poweroff(h) \
182 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
183
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200184struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300185 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
188 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
189 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
190 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
191};
192
193static inline enum ufs_dev_pwr_mode
194ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
195{
196 return ufs_pm_lvl_states[lvl].dev_state;
197}
198
199static inline enum uic_link_state
200ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
201{
202 return ufs_pm_lvl_states[lvl].link_state;
203}
204
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800205static inline enum ufs_pm_level
206ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
207 enum uic_link_state link_state)
208{
209 enum ufs_pm_level lvl;
210
211 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
212 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
213 (ufs_pm_lvl_states[lvl].link_state == link_state))
214 return lvl;
215 }
216
217 /* if no match found, return the level 0 */
218 return UFS_PM_LVL_0;
219}
220
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221static struct ufs_dev_fix ufs_fixups[] = {
222 /* UFS cards deviations table */
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800225 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
227 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
230 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
231 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
232 UFS_DEVICE_QUIRK_PA_TACTIVATE),
233 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
234 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800235 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
236 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800237 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
238 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800239
240 END_FIX
241};
242
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800243static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530244static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530245static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800246static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530247static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300248static void ufshcd_hba_exit(struct ufs_hba *hba);
249static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300250static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
251 bool skip_ref_clk);
252static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
253static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
254static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300255static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300256static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800257static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
258static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800259static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800260static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300261static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300262static int ufshcd_change_power_mode(struct ufs_hba *hba,
263 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200264static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
265{
266 return tag >= 0 && tag < hba->nutrs;
267}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300268
269static inline int ufshcd_enable_irq(struct ufs_hba *hba)
270{
271 int ret = 0;
272
273 if (!hba->is_irq_enabled) {
274 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
275 hba);
276 if (ret)
277 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
278 __func__, ret);
279 hba->is_irq_enabled = true;
280 }
281
282 return ret;
283}
284
285static inline void ufshcd_disable_irq(struct ufs_hba *hba)
286{
287 if (hba->is_irq_enabled) {
288 free_irq(hba->irq, hba);
289 hba->is_irq_enabled = false;
290 }
291}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530292
Subhash Jadavani38135532018-05-03 16:37:18 +0530293static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
294{
295 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
296 scsi_unblock_requests(hba->host);
297}
298
299static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
300{
301 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
302 scsi_block_requests(hba->host);
303}
304
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300305static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
306 const char *str)
307{
308 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
309
310 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
311}
312
313static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
314 const char *str)
315{
316 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
317
318 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
319}
320
321static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
322 const char *str)
323{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300324 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300325 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300326
Christoph Hellwig391e3882018-10-07 17:30:32 +0300327 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
328 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300329}
330
Lee Susman1a07f2d2016-12-22 18:42:03 -0800331static void ufshcd_add_command_trace(struct ufs_hba *hba,
332 unsigned int tag, const char *str)
333{
334 sector_t lba = -1;
335 u8 opcode = 0;
336 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300337 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800338 int transfer_len = -1;
339
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300340 if (!trace_ufshcd_command_enabled()) {
341 /* trace UPIU W/O tracing command */
342 if (lrbp->cmd)
343 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800344 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300345 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800346
347 if (lrbp->cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300348 /* trace UPIU also */
349 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800350 opcode = (u8)(*lrbp->cmd->cmnd);
351 if ((opcode == READ_10) || (opcode == WRITE_10)) {
352 /*
353 * Currently we only fully trace read(10) and write(10)
354 * commands
355 */
356 if (lrbp->cmd->request && lrbp->cmd->request->bio)
357 lba =
358 lrbp->cmd->request->bio->bi_iter.bi_sector;
359 transfer_len = be32_to_cpu(
360 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
361 }
362 }
363
364 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
365 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
366 trace_ufshcd_command(dev_name(hba->dev), str, tag,
367 doorbell, transfer_len, intr, lba, opcode);
368}
369
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800370static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
371{
372 struct ufs_clk_info *clki;
373 struct list_head *head = &hba->clk_list_head;
374
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300375 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800376 return;
377
378 list_for_each_entry(clki, head, list) {
379 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
380 clki->max_freq)
381 dev_err(hba->dev, "clk: %s, rate: %u\n",
382 clki->name, clki->curr_freq);
383 }
384}
385
Stanley Chu48d5b972019-07-10 21:38:18 +0800386static void ufshcd_print_err_hist(struct ufs_hba *hba,
387 struct ufs_err_reg_hist *err_hist,
388 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800389{
390 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800391 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800392
Stanley Chu48d5b972019-07-10 21:38:18 +0800393 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
394 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800395
396 if (err_hist->reg[p] == 0)
397 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800398 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800399 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800400 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800401 }
Stanley Chu27752642019-01-28 22:04:26 +0800402
403 if (!found)
Stanley Chu48d5b972019-07-10 21:38:18 +0800404 dev_err(hba->dev, "No record of %s errors\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800405}
406
Dolev Raviv66cc8202016-12-22 18:39:42 -0800407static void ufshcd_print_host_regs(struct ufs_hba *hba)
408{
Tomas Winklerba809172018-06-14 11:14:09 +0300409 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800410 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
411 hba->ufs_version, hba->capabilities);
412 dev_err(hba->dev,
413 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
414 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800415 dev_err(hba->dev,
416 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
417 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
418 hba->ufs_stats.hibern8_exit_cnt);
419
Stanley Chu48d5b972019-07-10 21:38:18 +0800420 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
421 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
422 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
423 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
424 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800425 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
426 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800427 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
428 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
429 "link_startup_fail");
430 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
431 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
432 "suspend_fail");
433 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
434 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
435 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800436
437 ufshcd_print_clk_freqs(hba);
438
439 if (hba->vops && hba->vops->dbg_register_dump)
440 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800441}
442
443static
444void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
445{
446 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800447 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800448 int tag;
449
450 for_each_set_bit(tag, &bitmap, hba->nutrs) {
451 lrbp = &hba->lrb[tag];
452
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800453 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
454 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800455 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
456 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800457 dev_err(hba->dev,
458 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
459 tag, (u64)lrbp->utrd_dma_addr);
460
Dolev Raviv66cc8202016-12-22 18:39:42 -0800461 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
462 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800463 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
464 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800465 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
466 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800467 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
468 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800469 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
470 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800471
Gilad Broner7fabb772017-02-03 16:56:50 -0800472 prdt_length = le16_to_cpu(
473 lrbp->utr_descriptor_ptr->prd_table_length);
474 dev_err(hba->dev,
475 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
476 tag, prdt_length,
477 (u64)lrbp->ucd_prdt_dma_addr);
478
479 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800480 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800481 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800482 }
483}
484
485static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
486{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800487 int tag;
488
489 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300490 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
491
Dolev Raviv66cc8202016-12-22 18:39:42 -0800492 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300493 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800494 }
495}
496
Gilad Broner6ba65582017-02-03 16:57:28 -0800497static void ufshcd_print_host_state(struct ufs_hba *hba)
498{
499 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
500 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
Zang Leigange002e652017-08-24 10:57:15 +0800501 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800502 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
503 hba->saved_err, hba->saved_uic_err);
504 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
505 hba->curr_dev_pwr_mode, hba->uic_link_state);
506 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
507 hba->pm_op_in_progress, hba->is_sys_suspended);
508 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
509 hba->auto_bkops_enabled, hba->host->host_self_blocked);
510 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
511 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
512 hba->eh_flags, hba->req_abort_count);
513 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
514 hba->capabilities, hba->caps);
515 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
516 hba->dev_quirks);
517}
518
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800519/**
520 * ufshcd_print_pwr_info - print power params as saved in hba
521 * power info
522 * @hba: per-adapter instance
523 */
524static void ufshcd_print_pwr_info(struct ufs_hba *hba)
525{
526 static const char * const names[] = {
527 "INVALID MODE",
528 "FAST MODE",
529 "SLOW_MODE",
530 "INVALID MODE",
531 "FASTAUTO_MODE",
532 "SLOWAUTO_MODE",
533 "INVALID MODE",
534 };
535
536 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
537 __func__,
538 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
539 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
540 names[hba->pwr_info.pwr_rx],
541 names[hba->pwr_info.pwr_tx],
542 hba->pwr_info.hs_rate);
543}
544
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530545/*
546 * ufshcd_wait_for_register - wait for register value to change
547 * @hba - per-adapter interface
548 * @reg - mmio register offset
549 * @mask - mask to apply to read register value
550 * @val - wait condition
551 * @interval_us - polling interval in microsecs
552 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200553 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530554 *
555 * Returns -ETIMEDOUT on error, zero on success
556 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200557int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
558 u32 val, unsigned long interval_us,
559 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530560{
561 int err = 0;
562 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
563
564 /* ignore bits that we don't intend to wait on */
565 val = val & mask;
566
567 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200568 if (can_sleep)
569 usleep_range(interval_us, interval_us + 50);
570 else
571 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530572 if (time_after(jiffies, timeout)) {
573 if ((ufshcd_readl(hba, reg) & mask) != val)
574 err = -ETIMEDOUT;
575 break;
576 }
577 }
578
579 return err;
580}
581
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530582/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530583 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800584 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530585 *
586 * Returns interrupt bit mask per version
587 */
588static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
589{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800590 u32 intr_mask = 0;
591
592 switch (hba->ufs_version) {
593 case UFSHCI_VERSION_10:
594 intr_mask = INTERRUPT_MASK_ALL_VER_10;
595 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800596 case UFSHCI_VERSION_11:
597 case UFSHCI_VERSION_20:
598 intr_mask = INTERRUPT_MASK_ALL_VER_11;
599 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800600 case UFSHCI_VERSION_21:
601 default:
602 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200603 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800604 }
605
606 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530607}
608
609/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530610 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800611 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530612 *
613 * Returns UFSHCI version supported by the controller
614 */
615static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
616{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200617 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
618 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300619
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530620 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530621}
622
623/**
624 * ufshcd_is_device_present - Check if any device connected to
625 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300626 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530627 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300628 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530629 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300630static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530631{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300632 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300633 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530634}
635
636/**
637 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800638 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530639 *
640 * This function is used to get the OCS field from UTRD
641 * Returns the OCS field in the UTRD
642 */
643static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
644{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530645 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530646}
647
648/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530649 * ufshcd_get_tm_free_slot - get a free slot for task management request
650 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530651 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530652 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530653 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
654 * Returns 0 if free slot is not available, else return 1 with tag value
655 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530656 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530657static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530658{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530659 int tag;
660 bool ret = false;
661
662 if (!free_slot)
663 goto out;
664
665 do {
666 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
667 if (tag >= hba->nutmrs)
668 goto out;
669 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
670
671 *free_slot = tag;
672 ret = true;
673out:
674 return ret;
675}
676
677static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
678{
679 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530680}
681
682/**
683 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
684 * @hba: per adapter instance
685 * @pos: position of the bit to be cleared
686 */
687static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
688{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530689 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
690 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
691 else
692 ufshcd_writel(hba, ~(1 << pos),
693 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
694}
695
696/**
697 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
698 * @hba: per adapter instance
699 * @pos: position of the bit to be cleared
700 */
701static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
702{
703 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
704 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
705 else
706 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530707}
708
709/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200710 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
711 * @hba: per adapter instance
712 * @tag: position of the bit to be cleared
713 */
714static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
715{
716 __clear_bit(tag, &hba->outstanding_reqs);
717}
718
719/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530720 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
721 * @reg: Register value of host controller status
722 *
723 * Returns integer, 0 on Success and positive value if failed
724 */
725static inline int ufshcd_get_lists_status(u32 reg)
726{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300727 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530728}
729
730/**
731 * ufshcd_get_uic_cmd_result - Get the UIC command result
732 * @hba: Pointer to adapter instance
733 *
734 * This function gets the result of UIC command completion
735 * Returns 0 on success, non zero value on error
736 */
737static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
738{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530739 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530740 MASK_UIC_COMMAND_RESULT;
741}
742
743/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530744 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
745 * @hba: Pointer to adapter instance
746 *
747 * This function gets UIC command argument3
748 * Returns 0 on success, non zero value on error
749 */
750static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
751{
752 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
753}
754
755/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530756 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530757 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530758 */
759static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530760ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530761{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530762 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530763}
764
765/**
766 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
767 * @ucd_rsp_ptr: pointer to response UPIU
768 *
769 * This function gets the response status and scsi_status from response UPIU
770 * Returns the response result code.
771 */
772static inline int
773ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
774{
775 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
776}
777
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530778/*
779 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
780 * from response UPIU
781 * @ucd_rsp_ptr: pointer to response UPIU
782 *
783 * Return the data segment length.
784 */
785static inline unsigned int
786ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
787{
788 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
789 MASK_RSP_UPIU_DATA_SEG_LEN;
790}
791
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530792/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530793 * ufshcd_is_exception_event - Check if the device raised an exception event
794 * @ucd_rsp_ptr: pointer to response UPIU
795 *
796 * The function checks if the device raised an exception event indicated in
797 * the Device Information field of response UPIU.
798 *
799 * Returns true if exception is raised, false otherwise.
800 */
801static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
802{
803 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
804 MASK_RSP_EXCEPTION_EVENT ? true : false;
805}
806
807/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530808 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530809 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530810 */
811static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530812ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530813{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530814 ufshcd_writel(hba, INT_AGGR_ENABLE |
815 INT_AGGR_COUNTER_AND_TIMER_RESET,
816 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
817}
818
819/**
820 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
821 * @hba: per adapter instance
822 * @cnt: Interrupt aggregation counter threshold
823 * @tmout: Interrupt aggregation timeout value
824 */
825static inline void
826ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
827{
828 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
829 INT_AGGR_COUNTER_THLD_VAL(cnt) |
830 INT_AGGR_TIMEOUT_VAL(tmout),
831 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530832}
833
834/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300835 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
836 * @hba: per adapter instance
837 */
838static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
839{
840 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
841}
842
843/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530844 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
845 * When run-stop registers are set to 1, it indicates the
846 * host controller that it can process the requests
847 * @hba: per adapter instance
848 */
849static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
850{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530851 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
852 REG_UTP_TASK_REQ_LIST_RUN_STOP);
853 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
854 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530855}
856
857/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530858 * ufshcd_hba_start - Start controller initialization sequence
859 * @hba: per adapter instance
860 */
861static inline void ufshcd_hba_start(struct ufs_hba *hba)
862{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530863 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530864}
865
866/**
867 * ufshcd_is_hba_active - Get controller state
868 * @hba: per adapter instance
869 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300870 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530871 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300872static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530873{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300874 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
875 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530876}
877
Yaniv Gardi37113102016-03-10 17:37:16 +0200878u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
879{
880 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
881 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
882 (hba->ufs_version == UFSHCI_VERSION_11))
883 return UFS_UNIPRO_VER_1_41;
884 else
885 return UFS_UNIPRO_VER_1_6;
886}
887EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
888
889static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
890{
891 /*
892 * If both host and device support UniPro ver1.6 or later, PA layer
893 * parameters tuning happens during link startup itself.
894 *
895 * We can manually tune PA layer parameters if either host or device
896 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
897 * logic simple, we will only do manual tuning if local unipro version
898 * doesn't support ver1.6 or later.
899 */
900 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
901 return true;
902 else
903 return false;
904}
905
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800906static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
907{
908 int ret = 0;
909 struct ufs_clk_info *clki;
910 struct list_head *head = &hba->clk_list_head;
911 ktime_t start = ktime_get();
912 bool clk_state_changed = false;
913
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300914 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800915 goto out;
916
917 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
918 if (ret)
919 return ret;
920
921 list_for_each_entry(clki, head, list) {
922 if (!IS_ERR_OR_NULL(clki->clk)) {
923 if (scale_up && clki->max_freq) {
924 if (clki->curr_freq == clki->max_freq)
925 continue;
926
927 clk_state_changed = true;
928 ret = clk_set_rate(clki->clk, clki->max_freq);
929 if (ret) {
930 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
931 __func__, clki->name,
932 clki->max_freq, ret);
933 break;
934 }
935 trace_ufshcd_clk_scaling(dev_name(hba->dev),
936 "scaled up", clki->name,
937 clki->curr_freq,
938 clki->max_freq);
939
940 clki->curr_freq = clki->max_freq;
941
942 } else if (!scale_up && clki->min_freq) {
943 if (clki->curr_freq == clki->min_freq)
944 continue;
945
946 clk_state_changed = true;
947 ret = clk_set_rate(clki->clk, clki->min_freq);
948 if (ret) {
949 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
950 __func__, clki->name,
951 clki->min_freq, ret);
952 break;
953 }
954 trace_ufshcd_clk_scaling(dev_name(hba->dev),
955 "scaled down", clki->name,
956 clki->curr_freq,
957 clki->min_freq);
958 clki->curr_freq = clki->min_freq;
959 }
960 }
961 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
962 clki->name, clk_get_rate(clki->clk));
963 }
964
965 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
966
967out:
968 if (clk_state_changed)
969 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
970 (scale_up ? "up" : "down"),
971 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
972 return ret;
973}
974
975/**
976 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
977 * @hba: per adapter instance
978 * @scale_up: True if scaling up and false if scaling down
979 *
980 * Returns true if scaling is required, false otherwise.
981 */
982static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
983 bool scale_up)
984{
985 struct ufs_clk_info *clki;
986 struct list_head *head = &hba->clk_list_head;
987
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300988 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800989 return false;
990
991 list_for_each_entry(clki, head, list) {
992 if (!IS_ERR_OR_NULL(clki->clk)) {
993 if (scale_up && clki->max_freq) {
994 if (clki->curr_freq == clki->max_freq)
995 continue;
996 return true;
997 } else if (!scale_up && clki->min_freq) {
998 if (clki->curr_freq == clki->min_freq)
999 continue;
1000 return true;
1001 }
1002 }
1003 }
1004
1005 return false;
1006}
1007
1008static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1009 u64 wait_timeout_us)
1010{
1011 unsigned long flags;
1012 int ret = 0;
1013 u32 tm_doorbell;
1014 u32 tr_doorbell;
1015 bool timeout = false, do_last_check = false;
1016 ktime_t start;
1017
1018 ufshcd_hold(hba, false);
1019 spin_lock_irqsave(hba->host->host_lock, flags);
1020 /*
1021 * Wait for all the outstanding tasks/transfer requests.
1022 * Verify by checking the doorbell registers are clear.
1023 */
1024 start = ktime_get();
1025 do {
1026 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1027 ret = -EBUSY;
1028 goto out;
1029 }
1030
1031 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1032 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1033 if (!tm_doorbell && !tr_doorbell) {
1034 timeout = false;
1035 break;
1036 } else if (do_last_check) {
1037 break;
1038 }
1039
1040 spin_unlock_irqrestore(hba->host->host_lock, flags);
1041 schedule();
1042 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1043 wait_timeout_us) {
1044 timeout = true;
1045 /*
1046 * We might have scheduled out for long time so make
1047 * sure to check if doorbells are cleared by this time
1048 * or not.
1049 */
1050 do_last_check = true;
1051 }
1052 spin_lock_irqsave(hba->host->host_lock, flags);
1053 } while (tm_doorbell || tr_doorbell);
1054
1055 if (timeout) {
1056 dev_err(hba->dev,
1057 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1058 __func__, tm_doorbell, tr_doorbell);
1059 ret = -EBUSY;
1060 }
1061out:
1062 spin_unlock_irqrestore(hba->host->host_lock, flags);
1063 ufshcd_release(hba);
1064 return ret;
1065}
1066
1067/**
1068 * ufshcd_scale_gear - scale up/down UFS gear
1069 * @hba: per adapter instance
1070 * @scale_up: True for scaling up gear and false for scaling down
1071 *
1072 * Returns 0 for success,
1073 * Returns -EBUSY if scaling can't happen at this time
1074 * Returns non-zero for any other errors
1075 */
1076static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1077{
1078 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1079 int ret = 0;
1080 struct ufs_pa_layer_attr new_pwr_info;
1081
1082 if (scale_up) {
1083 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1084 sizeof(struct ufs_pa_layer_attr));
1085 } else {
1086 memcpy(&new_pwr_info, &hba->pwr_info,
1087 sizeof(struct ufs_pa_layer_attr));
1088
1089 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1090 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1091 /* save the current power mode */
1092 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1093 &hba->pwr_info,
1094 sizeof(struct ufs_pa_layer_attr));
1095
1096 /* scale down gear */
1097 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1098 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1099 }
1100 }
1101
1102 /* check if the power mode needs to be changed or not? */
1103 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1104
1105 if (ret)
1106 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1107 __func__, ret,
1108 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1109 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1110
1111 return ret;
1112}
1113
1114static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1115{
1116 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1117 int ret = 0;
1118 /*
1119 * make sure that there are no outstanding requests when
1120 * clock scaling is in progress
1121 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301122 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001123 down_write(&hba->clk_scaling_lock);
1124 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1125 ret = -EBUSY;
1126 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301127 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001128 }
1129
1130 return ret;
1131}
1132
1133static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1134{
1135 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301136 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001137}
1138
1139/**
1140 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1141 * @hba: per adapter instance
1142 * @scale_up: True for scaling up and false for scalin down
1143 *
1144 * Returns 0 for success,
1145 * Returns -EBUSY if scaling can't happen at this time
1146 * Returns non-zero for any other errors
1147 */
1148static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1149{
1150 int ret = 0;
1151
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001152 /* let's not get into low power until clock scaling is completed */
1153 ufshcd_hold(hba, false);
1154
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001155 ret = ufshcd_clock_scaling_prepare(hba);
1156 if (ret)
1157 return ret;
1158
1159 /* scale down the gear before scaling down clocks */
1160 if (!scale_up) {
1161 ret = ufshcd_scale_gear(hba, false);
1162 if (ret)
1163 goto out;
1164 }
1165
1166 ret = ufshcd_scale_clks(hba, scale_up);
1167 if (ret) {
1168 if (!scale_up)
1169 ufshcd_scale_gear(hba, true);
1170 goto out;
1171 }
1172
1173 /* scale up the gear after scaling up clocks */
1174 if (scale_up) {
1175 ret = ufshcd_scale_gear(hba, true);
1176 if (ret) {
1177 ufshcd_scale_clks(hba, false);
1178 goto out;
1179 }
1180 }
1181
1182 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1183
1184out:
1185 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001186 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001187 return ret;
1188}
1189
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001190static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1191{
1192 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1193 clk_scaling.suspend_work);
1194 unsigned long irq_flags;
1195
1196 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1197 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1198 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1199 return;
1200 }
1201 hba->clk_scaling.is_suspended = true;
1202 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1203
1204 __ufshcd_suspend_clkscaling(hba);
1205}
1206
1207static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1208{
1209 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1210 clk_scaling.resume_work);
1211 unsigned long irq_flags;
1212
1213 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1214 if (!hba->clk_scaling.is_suspended) {
1215 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1216 return;
1217 }
1218 hba->clk_scaling.is_suspended = false;
1219 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1220
1221 devfreq_resume_device(hba->devfreq);
1222}
1223
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001224static int ufshcd_devfreq_target(struct device *dev,
1225 unsigned long *freq, u32 flags)
1226{
1227 int ret = 0;
1228 struct ufs_hba *hba = dev_get_drvdata(dev);
1229 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001230 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001231 struct list_head *clk_list = &hba->clk_list_head;
1232 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001233 unsigned long irq_flags;
1234
1235 if (!ufshcd_is_clkscaling_supported(hba))
1236 return -EINVAL;
1237
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001238 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1239 if (ufshcd_eh_in_progress(hba)) {
1240 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1241 return 0;
1242 }
1243
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001244 if (!hba->clk_scaling.active_reqs)
1245 sched_clk_scaling_suspend_work = true;
1246
Bjorn Andersson092b4552018-05-17 23:26:37 -07001247 if (list_empty(clk_list)) {
1248 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1249 goto out;
1250 }
1251
1252 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1253 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001254 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1255 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1256 ret = 0;
1257 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001258 }
1259 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1260
1261 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001262 ret = ufshcd_devfreq_scale(hba, scale_up);
1263
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001264 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1265 (scale_up ? "up" : "down"),
1266 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1267
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001268out:
1269 if (sched_clk_scaling_suspend_work)
1270 queue_work(hba->clk_scaling.workq,
1271 &hba->clk_scaling.suspend_work);
1272
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001273 return ret;
1274}
1275
1276
1277static int ufshcd_devfreq_get_dev_status(struct device *dev,
1278 struct devfreq_dev_status *stat)
1279{
1280 struct ufs_hba *hba = dev_get_drvdata(dev);
1281 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1282 unsigned long flags;
1283
1284 if (!ufshcd_is_clkscaling_supported(hba))
1285 return -EINVAL;
1286
1287 memset(stat, 0, sizeof(*stat));
1288
1289 spin_lock_irqsave(hba->host->host_lock, flags);
1290 if (!scaling->window_start_t)
1291 goto start_window;
1292
1293 if (scaling->is_busy_started)
1294 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1295 scaling->busy_start_t));
1296
1297 stat->total_time = jiffies_to_usecs((long)jiffies -
1298 (long)scaling->window_start_t);
1299 stat->busy_time = scaling->tot_busy_t;
1300start_window:
1301 scaling->window_start_t = jiffies;
1302 scaling->tot_busy_t = 0;
1303
1304 if (hba->outstanding_reqs) {
1305 scaling->busy_start_t = ktime_get();
1306 scaling->is_busy_started = true;
1307 } else {
1308 scaling->busy_start_t = 0;
1309 scaling->is_busy_started = false;
1310 }
1311 spin_unlock_irqrestore(hba->host->host_lock, flags);
1312 return 0;
1313}
1314
1315static struct devfreq_dev_profile ufs_devfreq_profile = {
1316 .polling_ms = 100,
1317 .target = ufshcd_devfreq_target,
1318 .get_dev_status = ufshcd_devfreq_get_dev_status,
1319};
1320
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001321static int ufshcd_devfreq_init(struct ufs_hba *hba)
1322{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001323 struct list_head *clk_list = &hba->clk_list_head;
1324 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001325 struct devfreq *devfreq;
1326 int ret;
1327
Bjorn Andersson092b4552018-05-17 23:26:37 -07001328 /* Skip devfreq if we don't have any clocks in the list */
1329 if (list_empty(clk_list))
1330 return 0;
1331
1332 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1333 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1334 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1335
1336 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001337 &ufs_devfreq_profile,
1338 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1339 NULL);
1340 if (IS_ERR(devfreq)) {
1341 ret = PTR_ERR(devfreq);
1342 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001343
1344 dev_pm_opp_remove(hba->dev, clki->min_freq);
1345 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001346 return ret;
1347 }
1348
1349 hba->devfreq = devfreq;
1350
1351 return 0;
1352}
1353
Bjorn Andersson092b4552018-05-17 23:26:37 -07001354static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1355{
1356 struct list_head *clk_list = &hba->clk_list_head;
1357 struct ufs_clk_info *clki;
1358
1359 if (!hba->devfreq)
1360 return;
1361
1362 devfreq_remove_device(hba->devfreq);
1363 hba->devfreq = NULL;
1364
1365 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1366 dev_pm_opp_remove(hba->dev, clki->min_freq);
1367 dev_pm_opp_remove(hba->dev, clki->max_freq);
1368}
1369
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001370static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1371{
1372 unsigned long flags;
1373
1374 devfreq_suspend_device(hba->devfreq);
1375 spin_lock_irqsave(hba->host->host_lock, flags);
1376 hba->clk_scaling.window_start_t = 0;
1377 spin_unlock_irqrestore(hba->host->host_lock, flags);
1378}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001379
Gilad Bronera5082532016-10-17 17:10:00 -07001380static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1381{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001382 unsigned long flags;
1383 bool suspend = false;
1384
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001385 if (!ufshcd_is_clkscaling_supported(hba))
1386 return;
1387
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001388 spin_lock_irqsave(hba->host->host_lock, flags);
1389 if (!hba->clk_scaling.is_suspended) {
1390 suspend = true;
1391 hba->clk_scaling.is_suspended = true;
1392 }
1393 spin_unlock_irqrestore(hba->host->host_lock, flags);
1394
1395 if (suspend)
1396 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001397}
1398
1399static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1400{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001401 unsigned long flags;
1402 bool resume = false;
1403
1404 if (!ufshcd_is_clkscaling_supported(hba))
1405 return;
1406
1407 spin_lock_irqsave(hba->host->host_lock, flags);
1408 if (hba->clk_scaling.is_suspended) {
1409 resume = true;
1410 hba->clk_scaling.is_suspended = false;
1411 }
1412 spin_unlock_irqrestore(hba->host->host_lock, flags);
1413
1414 if (resume)
1415 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001416}
1417
1418static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1419 struct device_attribute *attr, char *buf)
1420{
1421 struct ufs_hba *hba = dev_get_drvdata(dev);
1422
1423 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1424}
1425
1426static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1427 struct device_attribute *attr, const char *buf, size_t count)
1428{
1429 struct ufs_hba *hba = dev_get_drvdata(dev);
1430 u32 value;
1431 int err;
1432
1433 if (kstrtou32(buf, 0, &value))
1434 return -EINVAL;
1435
1436 value = !!value;
1437 if (value == hba->clk_scaling.is_allowed)
1438 goto out;
1439
1440 pm_runtime_get_sync(hba->dev);
1441 ufshcd_hold(hba, false);
1442
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001443 cancel_work_sync(&hba->clk_scaling.suspend_work);
1444 cancel_work_sync(&hba->clk_scaling.resume_work);
1445
1446 hba->clk_scaling.is_allowed = value;
1447
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001448 if (value) {
1449 ufshcd_resume_clkscaling(hba);
1450 } else {
1451 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001452 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001453 if (err)
1454 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1455 __func__, err);
1456 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001457
1458 ufshcd_release(hba);
1459 pm_runtime_put_sync(hba->dev);
1460out:
1461 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001462}
1463
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001464static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1465{
1466 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1467 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1468 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1469 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1470 hba->clk_scaling.enable_attr.attr.mode = 0644;
1471 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1472 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1473}
1474
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001475static void ufshcd_ungate_work(struct work_struct *work)
1476{
1477 int ret;
1478 unsigned long flags;
1479 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1480 clk_gating.ungate_work);
1481
1482 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1483
1484 spin_lock_irqsave(hba->host->host_lock, flags);
1485 if (hba->clk_gating.state == CLKS_ON) {
1486 spin_unlock_irqrestore(hba->host->host_lock, flags);
1487 goto unblock_reqs;
1488 }
1489
1490 spin_unlock_irqrestore(hba->host->host_lock, flags);
1491 ufshcd_setup_clocks(hba, true);
1492
1493 /* Exit from hibern8 */
1494 if (ufshcd_can_hibern8_during_gating(hba)) {
1495 /* Prevent gating in this path */
1496 hba->clk_gating.is_suspended = true;
1497 if (ufshcd_is_link_hibern8(hba)) {
1498 ret = ufshcd_uic_hibern8_exit(hba);
1499 if (ret)
1500 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1501 __func__, ret);
1502 else
1503 ufshcd_set_link_active(hba);
1504 }
1505 hba->clk_gating.is_suspended = false;
1506 }
1507unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301508 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001509}
1510
1511/**
1512 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1513 * Also, exit from hibern8 mode and set the link as active.
1514 * @hba: per adapter instance
1515 * @async: This indicates whether caller should ungate clocks asynchronously.
1516 */
1517int ufshcd_hold(struct ufs_hba *hba, bool async)
1518{
1519 int rc = 0;
1520 unsigned long flags;
1521
1522 if (!ufshcd_is_clkgating_allowed(hba))
1523 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001524 spin_lock_irqsave(hba->host->host_lock, flags);
1525 hba->clk_gating.active_reqs++;
1526
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001527 if (ufshcd_eh_in_progress(hba)) {
1528 spin_unlock_irqrestore(hba->host->host_lock, flags);
1529 return 0;
1530 }
1531
Sahitya Tummala856b3482014-09-25 15:32:34 +03001532start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001533 switch (hba->clk_gating.state) {
1534 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001535 /*
1536 * Wait for the ungate work to complete if in progress.
1537 * Though the clocks may be in ON state, the link could
1538 * still be in hibner8 state if hibern8 is allowed
1539 * during clock gating.
1540 * Make sure we exit hibern8 state also in addition to
1541 * clocks being ON.
1542 */
1543 if (ufshcd_can_hibern8_during_gating(hba) &&
1544 ufshcd_is_link_hibern8(hba)) {
1545 spin_unlock_irqrestore(hba->host->host_lock, flags);
1546 flush_work(&hba->clk_gating.ungate_work);
1547 spin_lock_irqsave(hba->host->host_lock, flags);
1548 goto start;
1549 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001550 break;
1551 case REQ_CLKS_OFF:
1552 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1553 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001554 trace_ufshcd_clk_gating(dev_name(hba->dev),
1555 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001556 break;
1557 }
1558 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001559 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001560 * currently running. Hence, fall through to cancel gating
1561 * work and to enable clocks.
1562 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001563 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001564 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301565 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001566 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001567 trace_ufshcd_clk_gating(dev_name(hba->dev),
1568 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301569 queue_work(hba->clk_gating.clk_gating_workq,
1570 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001571 /*
1572 * fall through to check if we should wait for this
1573 * work to be done or not.
1574 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001575 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001576 case REQ_CLKS_ON:
1577 if (async) {
1578 rc = -EAGAIN;
1579 hba->clk_gating.active_reqs--;
1580 break;
1581 }
1582
1583 spin_unlock_irqrestore(hba->host->host_lock, flags);
1584 flush_work(&hba->clk_gating.ungate_work);
1585 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001586 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001587 goto start;
1588 default:
1589 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1590 __func__, hba->clk_gating.state);
1591 break;
1592 }
1593 spin_unlock_irqrestore(hba->host->host_lock, flags);
1594out:
1595 return rc;
1596}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001597EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001598
1599static void ufshcd_gate_work(struct work_struct *work)
1600{
1601 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1602 clk_gating.gate_work.work);
1603 unsigned long flags;
1604
1605 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001606 /*
1607 * In case you are here to cancel this work the gating state
1608 * would be marked as REQ_CLKS_ON. In this case save time by
1609 * skipping the gating work and exit after changing the clock
1610 * state to CLKS_ON.
1611 */
1612 if (hba->clk_gating.is_suspended ||
1613 (hba->clk_gating.state == REQ_CLKS_ON)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001614 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001615 trace_ufshcd_clk_gating(dev_name(hba->dev),
1616 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001617 goto rel_lock;
1618 }
1619
1620 if (hba->clk_gating.active_reqs
1621 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1622 || hba->lrb_in_use || hba->outstanding_tasks
1623 || hba->active_uic_cmd || hba->uic_async_done)
1624 goto rel_lock;
1625
1626 spin_unlock_irqrestore(hba->host->host_lock, flags);
1627
1628 /* put the link into hibern8 mode before turning off clocks */
1629 if (ufshcd_can_hibern8_during_gating(hba)) {
1630 if (ufshcd_uic_hibern8_enter(hba)) {
1631 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001632 trace_ufshcd_clk_gating(dev_name(hba->dev),
1633 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001634 goto out;
1635 }
1636 ufshcd_set_link_hibern8(hba);
1637 }
1638
1639 if (!ufshcd_is_link_active(hba))
1640 ufshcd_setup_clocks(hba, false);
1641 else
1642 /* If link is active, device ref_clk can't be switched off */
1643 __ufshcd_setup_clocks(hba, false, true);
1644
1645 /*
1646 * In case you are here to cancel this work the gating state
1647 * would be marked as REQ_CLKS_ON. In this case keep the state
1648 * as REQ_CLKS_ON which would anyway imply that clocks are off
1649 * and a request to turn them on is pending. By doing this way,
1650 * we keep the state machine in tact and this would ultimately
1651 * prevent from doing cancel work multiple times when there are
1652 * new requests arriving before the current cancel work is done.
1653 */
1654 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001655 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001656 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001657 trace_ufshcd_clk_gating(dev_name(hba->dev),
1658 hba->clk_gating.state);
1659 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001660rel_lock:
1661 spin_unlock_irqrestore(hba->host->host_lock, flags);
1662out:
1663 return;
1664}
1665
1666/* host lock must be held before calling this variant */
1667static void __ufshcd_release(struct ufs_hba *hba)
1668{
1669 if (!ufshcd_is_clkgating_allowed(hba))
1670 return;
1671
1672 hba->clk_gating.active_reqs--;
1673
1674 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1675 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1676 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001677 || hba->active_uic_cmd || hba->uic_async_done
1678 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001679 return;
1680
1681 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001682 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001683 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1684 &hba->clk_gating.gate_work,
1685 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001686}
1687
1688void ufshcd_release(struct ufs_hba *hba)
1689{
1690 unsigned long flags;
1691
1692 spin_lock_irqsave(hba->host->host_lock, flags);
1693 __ufshcd_release(hba);
1694 spin_unlock_irqrestore(hba->host->host_lock, flags);
1695}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001696EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001697
1698static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1699 struct device_attribute *attr, char *buf)
1700{
1701 struct ufs_hba *hba = dev_get_drvdata(dev);
1702
1703 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1704}
1705
1706static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1707 struct device_attribute *attr, const char *buf, size_t count)
1708{
1709 struct ufs_hba *hba = dev_get_drvdata(dev);
1710 unsigned long flags, value;
1711
1712 if (kstrtoul(buf, 0, &value))
1713 return -EINVAL;
1714
1715 spin_lock_irqsave(hba->host->host_lock, flags);
1716 hba->clk_gating.delay_ms = value;
1717 spin_unlock_irqrestore(hba->host->host_lock, flags);
1718 return count;
1719}
1720
Sahitya Tummalab4274112016-12-22 18:40:39 -08001721static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1722 struct device_attribute *attr, char *buf)
1723{
1724 struct ufs_hba *hba = dev_get_drvdata(dev);
1725
1726 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1727}
1728
1729static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1730 struct device_attribute *attr, const char *buf, size_t count)
1731{
1732 struct ufs_hba *hba = dev_get_drvdata(dev);
1733 unsigned long flags;
1734 u32 value;
1735
1736 if (kstrtou32(buf, 0, &value))
1737 return -EINVAL;
1738
1739 value = !!value;
1740 if (value == hba->clk_gating.is_enabled)
1741 goto out;
1742
1743 if (value) {
1744 ufshcd_release(hba);
1745 } else {
1746 spin_lock_irqsave(hba->host->host_lock, flags);
1747 hba->clk_gating.active_reqs++;
1748 spin_unlock_irqrestore(hba->host->host_lock, flags);
1749 }
1750
1751 hba->clk_gating.is_enabled = value;
1752out:
1753 return count;
1754}
1755
Vivek Gautameebcc192018-08-07 23:17:39 +05301756static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1757{
1758 char wq_name[sizeof("ufs_clkscaling_00")];
1759
1760 if (!ufshcd_is_clkscaling_supported(hba))
1761 return;
1762
1763 INIT_WORK(&hba->clk_scaling.suspend_work,
1764 ufshcd_clk_scaling_suspend_work);
1765 INIT_WORK(&hba->clk_scaling.resume_work,
1766 ufshcd_clk_scaling_resume_work);
1767
1768 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1769 hba->host->host_no);
1770 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1771
1772 ufshcd_clkscaling_init_sysfs(hba);
1773}
1774
1775static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1776{
1777 if (!ufshcd_is_clkscaling_supported(hba))
1778 return;
1779
1780 destroy_workqueue(hba->clk_scaling.workq);
1781 ufshcd_devfreq_remove(hba);
1782}
1783
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001784static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1785{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301786 char wq_name[sizeof("ufs_clk_gating_00")];
1787
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001788 if (!ufshcd_is_clkgating_allowed(hba))
1789 return;
1790
1791 hba->clk_gating.delay_ms = 150;
1792 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1793 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1794
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301795 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1796 hba->host->host_no);
1797 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1798 WQ_MEM_RECLAIM);
1799
Sahitya Tummalab4274112016-12-22 18:40:39 -08001800 hba->clk_gating.is_enabled = true;
1801
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001802 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1803 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1804 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1805 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001806 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001807 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1808 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001809
1810 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1811 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1812 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1813 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1814 hba->clk_gating.enable_attr.attr.mode = 0644;
1815 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1816 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001817}
1818
1819static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1820{
1821 if (!ufshcd_is_clkgating_allowed(hba))
1822 return;
1823 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001824 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001825 cancel_work_sync(&hba->clk_gating.ungate_work);
1826 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301827 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001828}
1829
Sahitya Tummala856b3482014-09-25 15:32:34 +03001830/* Must be called with host lock acquired */
1831static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1832{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001833 bool queue_resume_work = false;
1834
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001835 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001836 return;
1837
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001838 if (!hba->clk_scaling.active_reqs++)
1839 queue_resume_work = true;
1840
1841 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1842 return;
1843
1844 if (queue_resume_work)
1845 queue_work(hba->clk_scaling.workq,
1846 &hba->clk_scaling.resume_work);
1847
1848 if (!hba->clk_scaling.window_start_t) {
1849 hba->clk_scaling.window_start_t = jiffies;
1850 hba->clk_scaling.tot_busy_t = 0;
1851 hba->clk_scaling.is_busy_started = false;
1852 }
1853
Sahitya Tummala856b3482014-09-25 15:32:34 +03001854 if (!hba->clk_scaling.is_busy_started) {
1855 hba->clk_scaling.busy_start_t = ktime_get();
1856 hba->clk_scaling.is_busy_started = true;
1857 }
1858}
1859
1860static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1861{
1862 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1863
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001864 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001865 return;
1866
1867 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1868 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1869 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001870 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001871 scaling->is_busy_started = false;
1872 }
1873}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301874/**
1875 * ufshcd_send_command - Send SCSI or device management commands
1876 * @hba: per adapter instance
1877 * @task_tag: Task tag of the command
1878 */
1879static inline
1880void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1881{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001882 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001883 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001884 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301885 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301886 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001887 /* Make sure that doorbell is committed immediately */
1888 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001889 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301890}
1891
1892/**
1893 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001894 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301895 */
1896static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1897{
1898 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301899 if (lrbp->sense_buffer &&
1900 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001901 int len_to_copy;
1902
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301903 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001904 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001905
Avri Altman09a5a242018-11-22 20:04:56 +02001906 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1907 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301908 }
1909}
1910
1911/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301912 * ufshcd_copy_query_response() - Copy the Query Response and the data
1913 * descriptor
1914 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001915 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301916 */
1917static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001918int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301919{
1920 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1921
Dolev Raviv68078d52013-07-30 00:35:58 +05301922 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301923
Dolev Raviv68078d52013-07-30 00:35:58 +05301924 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001925 if (hba->dev_cmd.query.descriptor &&
1926 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001927 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301928 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001929 u16 resp_len;
1930 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301931
1932 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001933 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301934 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001935 buf_len = be16_to_cpu(
1936 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001937 if (likely(buf_len >= resp_len)) {
1938 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1939 } else {
1940 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01001941 "%s: rsp size %d is bigger than buffer size %d",
1942 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001943 return -EINVAL;
1944 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301945 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001946
1947 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301948}
1949
1950/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301951 * ufshcd_hba_capabilities - Read controller capabilities
1952 * @hba: per adapter instance
1953 */
1954static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1955{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301956 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301957
1958 /* nutrs and nutmrs are 0 based values */
1959 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1960 hba->nutmrs =
1961 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1962}
1963
1964/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301965 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1966 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301967 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301968 * Return true on success, else false
1969 */
1970static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1971{
1972 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1973 return true;
1974 else
1975 return false;
1976}
1977
1978/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301979 * ufshcd_get_upmcrs - Get the power mode change request status
1980 * @hba: Pointer to adapter instance
1981 *
1982 * This function gets the UPMCRS field of HCS register
1983 * Returns value of UPMCRS field
1984 */
1985static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1986{
1987 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1988}
1989
1990/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301991 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1992 * @hba: per adapter instance
1993 * @uic_cmd: UIC command
1994 *
1995 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301996 */
1997static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301998ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301999{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302000 WARN_ON(hba->active_uic_cmd);
2001
2002 hba->active_uic_cmd = uic_cmd;
2003
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302004 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302005 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2006 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2007 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302008
2009 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302010 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302011 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302012}
2013
2014/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302015 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2016 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002017 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302018 *
2019 * Must be called with mutex held.
2020 * Returns 0 only if success.
2021 */
2022static int
2023ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2024{
2025 int ret;
2026 unsigned long flags;
2027
2028 if (wait_for_completion_timeout(&uic_cmd->done,
2029 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2030 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2031 else
2032 ret = -ETIMEDOUT;
2033
2034 spin_lock_irqsave(hba->host->host_lock, flags);
2035 hba->active_uic_cmd = NULL;
2036 spin_unlock_irqrestore(hba->host->host_lock, flags);
2037
2038 return ret;
2039}
2040
2041/**
2042 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2043 * @hba: per adapter instance
2044 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002045 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302046 *
2047 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002048 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302049 * Returns 0 only if success.
2050 */
2051static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002052__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2053 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302054{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302055 if (!ufshcd_ready_for_uic_cmd(hba)) {
2056 dev_err(hba->dev,
2057 "Controller not ready to accept UIC commands\n");
2058 return -EIO;
2059 }
2060
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002061 if (completion)
2062 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302063
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302064 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302065
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002066 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302067}
2068
2069/**
2070 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2071 * @hba: per adapter instance
2072 * @uic_cmd: UIC command
2073 *
2074 * Returns 0 only if success.
2075 */
Avri Altmane77044c52018-10-07 17:30:39 +03002076int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302077{
2078 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002079 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302080
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002081 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302082 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002083 ufshcd_add_delay_before_dme_cmd(hba);
2084
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002085 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002086 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002087 spin_unlock_irqrestore(hba->host->host_lock, flags);
2088 if (!ret)
2089 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2090
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302091 mutex_unlock(&hba->uic_cmd_mutex);
2092
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002093 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302094 return ret;
2095}
2096
2097/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302098 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002099 * @hba: per adapter instance
2100 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302101 *
2102 * Returns 0 in case of success, non-zero value in case of failure
2103 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002104static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302105{
2106 struct ufshcd_sg_entry *prd_table;
2107 struct scatterlist *sg;
2108 struct scsi_cmnd *cmd;
2109 int sg_segments;
2110 int i;
2111
2112 cmd = lrbp->cmd;
2113 sg_segments = scsi_dma_map(cmd);
2114 if (sg_segments < 0)
2115 return sg_segments;
2116
2117 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002118 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2119 lrbp->utr_descriptor_ptr->prd_table_length =
2120 cpu_to_le16((u16)(sg_segments *
2121 sizeof(struct ufshcd_sg_entry)));
2122 else
2123 lrbp->utr_descriptor_ptr->prd_table_length =
2124 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302125
2126 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2127
2128 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2129 prd_table[i].size =
2130 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2131 prd_table[i].base_addr =
2132 cpu_to_le32(lower_32_bits(sg->dma_address));
2133 prd_table[i].upper_addr =
2134 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002135 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302136 }
2137 } else {
2138 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2139 }
2140
2141 return 0;
2142}
2143
2144/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302145 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302146 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302147 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302148 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302149static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302150{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302151 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2152
2153 if (hba->ufs_version == UFSHCI_VERSION_10) {
2154 u32 rw;
2155 rw = set & INTERRUPT_MASK_RW_VER_10;
2156 set = rw | ((set ^ intrs) & intrs);
2157 } else {
2158 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302159 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302160
2161 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2162}
2163
2164/**
2165 * ufshcd_disable_intr - disable interrupts
2166 * @hba: per adapter instance
2167 * @intrs: interrupt bits
2168 */
2169static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2170{
2171 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2172
2173 if (hba->ufs_version == UFSHCI_VERSION_10) {
2174 u32 rw;
2175 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2176 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2177 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2178
2179 } else {
2180 set &= ~intrs;
2181 }
2182
2183 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302184}
2185
2186/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302187 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2188 * descriptor according to request
2189 * @lrbp: pointer to local reference block
2190 * @upiu_flags: flags required in the header
2191 * @cmd_dir: requests data direction
2192 */
2193static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002194 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302195{
2196 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2197 u32 data_direction;
2198 u32 dword_0;
2199
2200 if (cmd_dir == DMA_FROM_DEVICE) {
2201 data_direction = UTP_DEVICE_TO_HOST;
2202 *upiu_flags = UPIU_CMD_FLAGS_READ;
2203 } else if (cmd_dir == DMA_TO_DEVICE) {
2204 data_direction = UTP_HOST_TO_DEVICE;
2205 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2206 } else {
2207 data_direction = UTP_NO_DATA_TRANSFER;
2208 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2209 }
2210
2211 dword_0 = data_direction | (lrbp->command_type
2212 << UPIU_COMMAND_TYPE_OFFSET);
2213 if (lrbp->intr_cmd)
2214 dword_0 |= UTP_REQ_DESC_INT_CMD;
2215
2216 /* Transfer request descriptor header fields */
2217 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002218 /* dword_1 is reserved, hence it is set to 0 */
2219 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302220 /*
2221 * assigning invalid value for command status. Controller
2222 * updates OCS on command completion, with the command
2223 * status
2224 */
2225 req_desc->header.dword_2 =
2226 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002227 /* dword_3 is reserved, hence it is set to 0 */
2228 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002229
2230 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302231}
2232
2233/**
2234 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2235 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002236 * @lrbp: local reference block pointer
2237 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302238 */
2239static
2240void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2241{
2242 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002243 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302244
2245 /* command descriptor fields */
2246 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2247 UPIU_TRANSACTION_COMMAND, upiu_flags,
2248 lrbp->lun, lrbp->task_tag);
2249 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2250 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2251
2252 /* Total EHS length and Data segment length will be zero */
2253 ucd_req_ptr->header.dword_2 = 0;
2254
2255 ucd_req_ptr->sc.exp_data_transfer_len =
2256 cpu_to_be32(lrbp->cmd->sdb.length);
2257
Avri Altmana851b2b2018-10-07 17:30:34 +03002258 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2259 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002260 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2261
2262 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302263}
2264
Dolev Raviv68078d52013-07-30 00:35:58 +05302265/**
2266 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2267 * for query requsts
2268 * @hba: UFS hba
2269 * @lrbp: local reference block pointer
2270 * @upiu_flags: flags
2271 */
2272static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2273 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2274{
2275 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2276 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302277 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302278
2279 /* Query request header */
2280 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2281 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2282 lrbp->lun, lrbp->task_tag);
2283 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2284 0, query->request.query_func, 0, 0);
2285
Zang Leigang68612852016-08-25 17:39:19 +08002286 /* Data segment length only need for WRITE_DESC */
2287 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2288 ucd_req_ptr->header.dword_2 =
2289 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2290 else
2291 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302292
2293 /* Copy the Query Request buffer as is */
2294 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2295 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302296
2297 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002298 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002299 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002300
Yaniv Gardi51047262016-02-01 15:02:38 +02002301 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302302}
2303
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302304static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2305{
2306 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2307
2308 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2309
2310 /* command descriptor fields */
2311 ucd_req_ptr->header.dword_0 =
2312 UPIU_HEADER_DWORD(
2313 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002314 /* clear rest of the fields of basic header */
2315 ucd_req_ptr->header.dword_1 = 0;
2316 ucd_req_ptr->header.dword_2 = 0;
2317
2318 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302319}
2320
2321/**
Joao Pinto300bb132016-05-11 12:21:27 +01002322 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2323 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002324 * @hba: per adapter instance
2325 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302326 */
Joao Pinto300bb132016-05-11 12:21:27 +01002327static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302328{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302329 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302330 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302331
kehuanlin83dc7e32017-09-06 17:58:39 +08002332 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2333 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002334 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002335 else
2336 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002337
2338 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2339 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2340 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2341 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2342 ufshcd_prepare_utp_nop_upiu(lrbp);
2343 else
2344 ret = -EINVAL;
2345
2346 return ret;
2347}
2348
2349/**
2350 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2351 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002352 * @hba: per adapter instance
2353 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002354 */
2355static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2356{
2357 u32 upiu_flags;
2358 int ret = 0;
2359
kehuanlin83dc7e32017-09-06 17:58:39 +08002360 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2361 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002362 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002363 else
2364 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002365
2366 if (likely(lrbp->cmd)) {
2367 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2368 lrbp->cmd->sc_data_direction);
2369 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2370 } else {
2371 ret = -EINVAL;
2372 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302373
2374 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302375}
2376
2377/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002378 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002379 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002380 *
2381 * Returns SCSI W-LUN id
2382 */
2383static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2384{
2385 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2386}
2387
2388/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302389 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002390 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302391 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302392 *
2393 * Returns 0 for success, non-zero in case of failure
2394 */
2395static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2396{
2397 struct ufshcd_lrb *lrbp;
2398 struct ufs_hba *hba;
2399 unsigned long flags;
2400 int tag;
2401 int err = 0;
2402
2403 hba = shost_priv(host);
2404
2405 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002406 if (!ufshcd_valid_tag(hba, tag)) {
2407 dev_err(hba->dev,
2408 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2409 __func__, tag, cmd, cmd->request);
2410 BUG();
2411 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302412
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002413 if (!down_read_trylock(&hba->clk_scaling_lock))
2414 return SCSI_MLQUEUE_HOST_BUSY;
2415
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302416 spin_lock_irqsave(hba->host->host_lock, flags);
2417 switch (hba->ufshcd_state) {
2418 case UFSHCD_STATE_OPERATIONAL:
2419 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002420 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302421 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302422 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302423 goto out_unlock;
2424 case UFSHCD_STATE_ERROR:
2425 set_host_byte(cmd, DID_ERROR);
2426 cmd->scsi_done(cmd);
2427 goto out_unlock;
2428 default:
2429 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2430 __func__, hba->ufshcd_state);
2431 set_host_byte(cmd, DID_BAD_TARGET);
2432 cmd->scsi_done(cmd);
2433 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302434 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002435
2436 /* if error handling is in progress, don't issue commands */
2437 if (ufshcd_eh_in_progress(hba)) {
2438 set_host_byte(cmd, DID_ERROR);
2439 cmd->scsi_done(cmd);
2440 goto out_unlock;
2441 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302442 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302443
Gilad Broner7fabb772017-02-03 16:56:50 -08002444 hba->req_abort_count = 0;
2445
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302446 /* acquire the tag to make sure device cmds don't use it */
2447 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2448 /*
2449 * Dev manage command in progress, requeue the command.
2450 * Requeuing the command helps in cases where the request *may*
2451 * find different tag instead of waiting for dev manage command
2452 * completion.
2453 */
2454 err = SCSI_MLQUEUE_HOST_BUSY;
2455 goto out;
2456 }
2457
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002458 err = ufshcd_hold(hba, true);
2459 if (err) {
2460 err = SCSI_MLQUEUE_HOST_BUSY;
2461 clear_bit_unlock(tag, &hba->lrb_in_use);
2462 goto out;
2463 }
2464 WARN_ON(hba->clk_gating.state != CLKS_ON);
2465
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302466 lrbp = &hba->lrb[tag];
2467
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302468 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302469 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002470 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302471 lrbp->sense_buffer = cmd->sense_buffer;
2472 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002473 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002474 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002475 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302476
Joao Pinto300bb132016-05-11 12:21:27 +01002477 ufshcd_comp_scsi_upiu(hba, lrbp);
2478
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002479 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302480 if (err) {
2481 lrbp->cmd = NULL;
2482 clear_bit_unlock(tag, &hba->lrb_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302483 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302484 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002485 /* Make sure descriptors are ready before ringing the doorbell */
2486 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302487
2488 /* issue command to the controller */
2489 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002490 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302491 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302492out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302493 spin_unlock_irqrestore(hba->host->host_lock, flags);
2494out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002495 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302496 return err;
2497}
2498
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302499static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2500 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2501{
2502 lrbp->cmd = NULL;
2503 lrbp->sense_bufflen = 0;
2504 lrbp->sense_buffer = NULL;
2505 lrbp->task_tag = tag;
2506 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302507 lrbp->intr_cmd = true; /* No interrupt aggregation */
2508 hba->dev_cmd.type = cmd_type;
2509
Joao Pinto300bb132016-05-11 12:21:27 +01002510 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302511}
2512
2513static int
2514ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2515{
2516 int err = 0;
2517 unsigned long flags;
2518 u32 mask = 1 << tag;
2519
2520 /* clear outstanding transaction before retry */
2521 spin_lock_irqsave(hba->host->host_lock, flags);
2522 ufshcd_utrl_clear(hba, tag);
2523 spin_unlock_irqrestore(hba->host->host_lock, flags);
2524
2525 /*
2526 * wait for for h/w to clear corresponding bit in door-bell.
2527 * max. wait is 1 sec.
2528 */
2529 err = ufshcd_wait_for_register(hba,
2530 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002531 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302532
2533 return err;
2534}
2535
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002536static int
2537ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2538{
2539 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2540
2541 /* Get the UPIU response */
2542 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2543 UPIU_RSP_CODE_OFFSET;
2544 return query_res->response;
2545}
2546
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302547/**
2548 * ufshcd_dev_cmd_completion() - handles device management command responses
2549 * @hba: per adapter instance
2550 * @lrbp: pointer to local reference block
2551 */
2552static int
2553ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2554{
2555 int resp;
2556 int err = 0;
2557
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002558 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302559 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2560
2561 switch (resp) {
2562 case UPIU_TRANSACTION_NOP_IN:
2563 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2564 err = -EINVAL;
2565 dev_err(hba->dev, "%s: unexpected response %x\n",
2566 __func__, resp);
2567 }
2568 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302569 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002570 err = ufshcd_check_query_response(hba, lrbp);
2571 if (!err)
2572 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302573 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302574 case UPIU_TRANSACTION_REJECT_UPIU:
2575 /* TODO: handle Reject UPIU Response */
2576 err = -EPERM;
2577 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2578 __func__);
2579 break;
2580 default:
2581 err = -EINVAL;
2582 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2583 __func__, resp);
2584 break;
2585 }
2586
2587 return err;
2588}
2589
2590static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2591 struct ufshcd_lrb *lrbp, int max_timeout)
2592{
2593 int err = 0;
2594 unsigned long time_left;
2595 unsigned long flags;
2596
2597 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2598 msecs_to_jiffies(max_timeout));
2599
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002600 /* Make sure descriptors are ready before ringing the doorbell */
2601 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302602 spin_lock_irqsave(hba->host->host_lock, flags);
2603 hba->dev_cmd.complete = NULL;
2604 if (likely(time_left)) {
2605 err = ufshcd_get_tr_ocs(lrbp);
2606 if (!err)
2607 err = ufshcd_dev_cmd_completion(hba, lrbp);
2608 }
2609 spin_unlock_irqrestore(hba->host->host_lock, flags);
2610
2611 if (!time_left) {
2612 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002613 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2614 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302615 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002616 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302617 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002618 /*
2619 * in case of an error, after clearing the doorbell,
2620 * we also need to clear the outstanding_request
2621 * field in hba
2622 */
2623 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302624 }
2625
2626 return err;
2627}
2628
2629/**
2630 * ufshcd_get_dev_cmd_tag - Get device management command tag
2631 * @hba: per-adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002632 * @tag_out: pointer to variable with available slot value
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302633 *
2634 * Get a free slot and lock it until device management command
2635 * completes.
2636 *
2637 * Returns false if free slot is unavailable for locking, else
2638 * return true with tag value in @tag.
2639 */
2640static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2641{
2642 int tag;
2643 bool ret = false;
2644 unsigned long tmp;
2645
2646 if (!tag_out)
2647 goto out;
2648
2649 do {
2650 tmp = ~hba->lrb_in_use;
2651 tag = find_last_bit(&tmp, hba->nutrs);
2652 if (tag >= hba->nutrs)
2653 goto out;
2654 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2655
2656 *tag_out = tag;
2657 ret = true;
2658out:
2659 return ret;
2660}
2661
2662static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2663{
2664 clear_bit_unlock(tag, &hba->lrb_in_use);
2665}
2666
2667/**
2668 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002669 * @hba: UFS hba
2670 * @cmd_type: specifies the type (NOP, Query...)
2671 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302672 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302673 * NOTE: Since there is only one available tag for device management commands,
2674 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302675 */
2676static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2677 enum dev_cmd_type cmd_type, int timeout)
2678{
2679 struct ufshcd_lrb *lrbp;
2680 int err;
2681 int tag;
2682 struct completion wait;
2683 unsigned long flags;
2684
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002685 down_read(&hba->clk_scaling_lock);
2686
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302687 /*
2688 * Get free slot, sleep if slots are unavailable.
2689 * Even though we use wait_event() which sleeps indefinitely,
2690 * the maximum wait time is bounded by SCSI request timeout.
2691 */
2692 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2693
2694 init_completion(&wait);
2695 lrbp = &hba->lrb[tag];
2696 WARN_ON(lrbp->cmd);
2697 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2698 if (unlikely(err))
2699 goto out_put_tag;
2700
2701 hba->dev_cmd.complete = &wait;
2702
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002703 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002704 /* Make sure descriptors are ready before ringing the doorbell */
2705 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302706 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002707 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302708 ufshcd_send_command(hba, tag);
2709 spin_unlock_irqrestore(hba->host->host_lock, flags);
2710
2711 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2712
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002713 ufshcd_add_query_upiu_trace(hba, tag,
2714 err ? "query_complete_err" : "query_complete");
2715
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302716out_put_tag:
2717 ufshcd_put_dev_cmd_tag(hba, tag);
2718 wake_up(&hba->dev_cmd.tag_wq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002719 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302720 return err;
2721}
2722
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302723/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002724 * ufshcd_init_query() - init the query response and request parameters
2725 * @hba: per-adapter instance
2726 * @request: address of the request pointer to be initialized
2727 * @response: address of the response pointer to be initialized
2728 * @opcode: operation to perform
2729 * @idn: flag idn to access
2730 * @index: LU number to access
2731 * @selector: query/flag/descriptor further identification
2732 */
2733static inline void ufshcd_init_query(struct ufs_hba *hba,
2734 struct ufs_query_req **request, struct ufs_query_res **response,
2735 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2736{
2737 *request = &hba->dev_cmd.query.request;
2738 *response = &hba->dev_cmd.query.response;
2739 memset(*request, 0, sizeof(struct ufs_query_req));
2740 memset(*response, 0, sizeof(struct ufs_query_res));
2741 (*request)->upiu_req.opcode = opcode;
2742 (*request)->upiu_req.idn = idn;
2743 (*request)->upiu_req.index = index;
2744 (*request)->upiu_req.selector = selector;
2745}
2746
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002747static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2748 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2749{
2750 int ret;
2751 int retries;
2752
2753 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2754 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2755 if (ret)
2756 dev_dbg(hba->dev,
2757 "%s: failed with error %d, retries %d\n",
2758 __func__, ret, retries);
2759 else
2760 break;
2761 }
2762
2763 if (ret)
2764 dev_err(hba->dev,
2765 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2766 __func__, opcode, idn, ret, retries);
2767 return ret;
2768}
2769
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002770/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302771 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002772 * @hba: per-adapter instance
2773 * @opcode: flag query to perform
2774 * @idn: flag idn to access
2775 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302776 *
2777 * Returns 0 for success, non-zero in case of failure
2778 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002779int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302780 enum flag_idn idn, bool *flag_res)
2781{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002782 struct ufs_query_req *request = NULL;
2783 struct ufs_query_res *response = NULL;
2784 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002785 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302786
2787 BUG_ON(!hba);
2788
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002789 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302790 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002791 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2792 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302793
2794 switch (opcode) {
2795 case UPIU_QUERY_OPCODE_SET_FLAG:
2796 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2797 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2798 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2799 break;
2800 case UPIU_QUERY_OPCODE_READ_FLAG:
2801 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2802 if (!flag_res) {
2803 /* No dummy reads */
2804 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2805 __func__);
2806 err = -EINVAL;
2807 goto out_unlock;
2808 }
2809 break;
2810 default:
2811 dev_err(hba->dev,
2812 "%s: Expected query flag opcode but got = %d\n",
2813 __func__, opcode);
2814 err = -EINVAL;
2815 goto out_unlock;
2816 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302817
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002818 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302819
2820 if (err) {
2821 dev_err(hba->dev,
2822 "%s: Sending flag query for idn %d failed, err = %d\n",
2823 __func__, idn, err);
2824 goto out_unlock;
2825 }
2826
2827 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302828 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302829 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2830
2831out_unlock:
2832 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002833 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302834 return err;
2835}
2836
2837/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302838 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002839 * @hba: per-adapter instance
2840 * @opcode: attribute opcode
2841 * @idn: attribute idn to access
2842 * @index: index field
2843 * @selector: selector field
2844 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302845 *
2846 * Returns 0 for success, non-zero in case of failure
2847*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002848int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2849 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302850{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002851 struct ufs_query_req *request = NULL;
2852 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302853 int err;
2854
2855 BUG_ON(!hba);
2856
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002857 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302858 if (!attr_val) {
2859 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2860 __func__, opcode);
2861 err = -EINVAL;
2862 goto out;
2863 }
2864
2865 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002866 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2867 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302868
2869 switch (opcode) {
2870 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2871 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302872 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302873 break;
2874 case UPIU_QUERY_OPCODE_READ_ATTR:
2875 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2876 break;
2877 default:
2878 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2879 __func__, opcode);
2880 err = -EINVAL;
2881 goto out_unlock;
2882 }
2883
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002884 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302885
2886 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002887 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2888 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302889 goto out_unlock;
2890 }
2891
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302892 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302893
2894out_unlock:
2895 mutex_unlock(&hba->dev_cmd.lock);
2896out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002897 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302898 return err;
2899}
2900
2901/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002902 * ufshcd_query_attr_retry() - API function for sending query
2903 * attribute with retries
2904 * @hba: per-adapter instance
2905 * @opcode: attribute opcode
2906 * @idn: attribute idn to access
2907 * @index: index field
2908 * @selector: selector field
2909 * @attr_val: the attribute value after the query request
2910 * completes
2911 *
2912 * Returns 0 for success, non-zero in case of failure
2913*/
2914static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2915 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2916 u32 *attr_val)
2917{
2918 int ret = 0;
2919 u32 retries;
2920
2921 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2922 ret = ufshcd_query_attr(hba, opcode, idn, index,
2923 selector, attr_val);
2924 if (ret)
2925 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2926 __func__, ret, retries);
2927 else
2928 break;
2929 }
2930
2931 if (ret)
2932 dev_err(hba->dev,
2933 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2934 __func__, idn, ret, QUERY_REQ_RETRIES);
2935 return ret;
2936}
2937
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002938static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002939 enum query_opcode opcode, enum desc_idn idn, u8 index,
2940 u8 selector, u8 *desc_buf, int *buf_len)
2941{
2942 struct ufs_query_req *request = NULL;
2943 struct ufs_query_res *response = NULL;
2944 int err;
2945
2946 BUG_ON(!hba);
2947
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002948 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002949 if (!desc_buf) {
2950 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2951 __func__, opcode);
2952 err = -EINVAL;
2953 goto out;
2954 }
2955
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002956 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002957 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2958 __func__, *buf_len);
2959 err = -EINVAL;
2960 goto out;
2961 }
2962
2963 mutex_lock(&hba->dev_cmd.lock);
2964 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2965 selector);
2966 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002967 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002968
2969 switch (opcode) {
2970 case UPIU_QUERY_OPCODE_WRITE_DESC:
2971 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2972 break;
2973 case UPIU_QUERY_OPCODE_READ_DESC:
2974 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2975 break;
2976 default:
2977 dev_err(hba->dev,
2978 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2979 __func__, opcode);
2980 err = -EINVAL;
2981 goto out_unlock;
2982 }
2983
2984 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2985
2986 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002987 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2988 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002989 goto out_unlock;
2990 }
2991
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002992 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002993
2994out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01002995 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002996 mutex_unlock(&hba->dev_cmd.lock);
2997out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002998 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002999 return err;
3000}
3001
3002/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003003 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3004 * @hba: per-adapter instance
3005 * @opcode: attribute opcode
3006 * @idn: attribute idn to access
3007 * @index: index field
3008 * @selector: selector field
3009 * @desc_buf: the buffer that contains the descriptor
3010 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003011 *
3012 * Returns 0 for success, non-zero in case of failure.
3013 * The buf_len parameter will contain, on return, the length parameter
3014 * received on the response.
3015 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003016int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3017 enum query_opcode opcode,
3018 enum desc_idn idn, u8 index,
3019 u8 selector,
3020 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003021{
3022 int err;
3023 int retries;
3024
3025 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3026 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3027 selector, desc_buf, buf_len);
3028 if (!err || err == -EINVAL)
3029 break;
3030 }
3031
3032 return err;
3033}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003034
3035/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003036 * ufshcd_read_desc_length - read the specified descriptor length from header
3037 * @hba: Pointer to adapter instance
3038 * @desc_id: descriptor idn value
3039 * @desc_index: descriptor index
3040 * @desc_length: pointer to variable to read the length of descriptor
3041 *
3042 * Return 0 in case of success, non-zero otherwise
3043 */
3044static int ufshcd_read_desc_length(struct ufs_hba *hba,
3045 enum desc_idn desc_id,
3046 int desc_index,
3047 int *desc_length)
3048{
3049 int ret;
3050 u8 header[QUERY_DESC_HDR_SIZE];
3051 int header_len = QUERY_DESC_HDR_SIZE;
3052
3053 if (desc_id >= QUERY_DESC_IDN_MAX)
3054 return -EINVAL;
3055
3056 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3057 desc_id, desc_index, 0, header,
3058 &header_len);
3059
3060 if (ret) {
3061 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3062 __func__, desc_id);
3063 return ret;
3064 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3065 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3066 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3067 desc_id);
3068 ret = -EINVAL;
3069 }
3070
3071 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3072 return ret;
3073
3074}
3075
3076/**
3077 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3078 * @hba: Pointer to adapter instance
3079 * @desc_id: descriptor idn value
3080 * @desc_len: mapped desc length (out)
3081 *
3082 * Return 0 in case of success, non-zero otherwise
3083 */
3084int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3085 enum desc_idn desc_id, int *desc_len)
3086{
3087 switch (desc_id) {
3088 case QUERY_DESC_IDN_DEVICE:
3089 *desc_len = hba->desc_size.dev_desc;
3090 break;
3091 case QUERY_DESC_IDN_POWER:
3092 *desc_len = hba->desc_size.pwr_desc;
3093 break;
3094 case QUERY_DESC_IDN_GEOMETRY:
3095 *desc_len = hba->desc_size.geom_desc;
3096 break;
3097 case QUERY_DESC_IDN_CONFIGURATION:
3098 *desc_len = hba->desc_size.conf_desc;
3099 break;
3100 case QUERY_DESC_IDN_UNIT:
3101 *desc_len = hba->desc_size.unit_desc;
3102 break;
3103 case QUERY_DESC_IDN_INTERCONNECT:
3104 *desc_len = hba->desc_size.interc_desc;
3105 break;
3106 case QUERY_DESC_IDN_STRING:
3107 *desc_len = QUERY_DESC_MAX_SIZE;
3108 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003109 case QUERY_DESC_IDN_HEALTH:
3110 *desc_len = hba->desc_size.hlth_desc;
3111 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003112 case QUERY_DESC_IDN_RFU_0:
3113 case QUERY_DESC_IDN_RFU_1:
3114 *desc_len = 0;
3115 break;
3116 default:
3117 *desc_len = 0;
3118 return -EINVAL;
3119 }
3120 return 0;
3121}
3122EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3123
3124/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003125 * ufshcd_read_desc_param - read the specified descriptor parameter
3126 * @hba: Pointer to adapter instance
3127 * @desc_id: descriptor idn value
3128 * @desc_index: descriptor index
3129 * @param_offset: offset of the parameter to read
3130 * @param_read_buf: pointer to buffer where parameter would be read
3131 * @param_size: sizeof(param_read_buf)
3132 *
3133 * Return 0 in case of success, non-zero otherwise
3134 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003135int ufshcd_read_desc_param(struct ufs_hba *hba,
3136 enum desc_idn desc_id,
3137 int desc_index,
3138 u8 param_offset,
3139 u8 *param_read_buf,
3140 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003141{
3142 int ret;
3143 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003144 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003145 bool is_kmalloc = true;
3146
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003147 /* Safety check */
3148 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003149 return -EINVAL;
3150
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003151 /* Get the max length of descriptor from structure filled up at probe
3152 * time.
3153 */
3154 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003155
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003156 /* Sanity checks */
3157 if (ret || !buff_len) {
3158 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3159 __func__);
3160 return ret;
3161 }
3162
3163 /* Check whether we need temp memory */
3164 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003165 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3166 if (!desc_buf)
3167 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003168 } else {
3169 desc_buf = param_read_buf;
3170 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003171 }
3172
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003173 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003174 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003175 desc_id, desc_index, 0,
3176 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003177
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003178 if (ret) {
3179 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3180 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003181 goto out;
3182 }
3183
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003184 /* Sanity check */
3185 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3186 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3187 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3188 ret = -EINVAL;
3189 goto out;
3190 }
3191
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003192 /* Check wherher we will not copy more data, than available */
3193 if (is_kmalloc && param_size > buff_len)
3194 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003195
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003196 if (is_kmalloc)
3197 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3198out:
3199 if (is_kmalloc)
3200 kfree(desc_buf);
3201 return ret;
3202}
3203
3204static inline int ufshcd_read_desc(struct ufs_hba *hba,
3205 enum desc_idn desc_id,
3206 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003207 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003208 u32 size)
3209{
3210 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3211}
3212
3213static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3214 u8 *buf,
3215 u32 size)
3216{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003217 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003218}
3219
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003220static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003221{
3222 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3223}
Yaniv Gardib573d482016-03-10 17:37:09 +02003224
3225/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003226 * struct uc_string_id - unicode string
3227 *
3228 * @len: size of this descriptor inclusive
3229 * @type: descriptor type
3230 * @uc: unicode string character
3231 */
3232struct uc_string_id {
3233 u8 len;
3234 u8 type;
3235 wchar_t uc[0];
3236} __packed;
3237
3238/* replace non-printable or non-ASCII characters with spaces */
3239static inline char ufshcd_remove_non_printable(u8 ch)
3240{
3241 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3242}
3243
3244/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003245 * ufshcd_read_string_desc - read string descriptor
3246 * @hba: pointer to adapter instance
3247 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003248 * @buf: pointer to buffer where descriptor would be read,
3249 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003250 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003251 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003252 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003253 * Return:
3254 * * string size on success.
3255 * * -ENOMEM: on allocation failure
3256 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003257 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003258int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3259 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003260{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003261 struct uc_string_id *uc_str;
3262 u8 *str;
3263 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003264
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003265 if (!buf)
3266 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003267
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003268 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3269 if (!uc_str)
3270 return -ENOMEM;
3271
3272 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3273 desc_index, uc_str,
3274 QUERY_DESC_MAX_SIZE);
3275 if (ret < 0) {
3276 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3277 QUERY_REQ_RETRIES, ret);
3278 str = NULL;
3279 goto out;
3280 }
3281
3282 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3283 dev_dbg(hba->dev, "String Desc is of zero length\n");
3284 str = NULL;
3285 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003286 goto out;
3287 }
3288
3289 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003290 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003291 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003292 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003293 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3294 str = kzalloc(ascii_len, GFP_KERNEL);
3295 if (!str) {
3296 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003297 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003298 }
3299
3300 /*
3301 * the descriptor contains string in UTF16 format
3302 * we need to convert to utf-8 so it can be displayed
3303 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003304 ret = utf16s_to_utf8s(uc_str->uc,
3305 uc_str->len - QUERY_DESC_HDR_SIZE,
3306 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003307
3308 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003309 for (i = 0; i < ret; i++)
3310 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003311
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003312 str[ret++] = '\0';
3313
3314 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003315 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003316 if (!str) {
3317 ret = -ENOMEM;
3318 goto out;
3319 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003320 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003321 }
3322out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003323 *buf = str;
3324 kfree(uc_str);
3325 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003326}
Yaniv Gardib573d482016-03-10 17:37:09 +02003327
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003328/**
3329 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3330 * @hba: Pointer to adapter instance
3331 * @lun: lun id
3332 * @param_offset: offset of the parameter to read
3333 * @param_read_buf: pointer to buffer where parameter would be read
3334 * @param_size: sizeof(param_read_buf)
3335 *
3336 * Return 0 in case of success, non-zero otherwise
3337 */
3338static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3339 int lun,
3340 enum unit_desc_param param_offset,
3341 u8 *param_read_buf,
3342 u32 param_size)
3343{
3344 /*
3345 * Unit descriptors are only available for general purpose LUs (LUN id
3346 * from 0 to 7) and RPMB Well known LU.
3347 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003348 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003349 return -EOPNOTSUPP;
3350
3351 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3352 param_offset, param_read_buf, param_size);
3353}
3354
3355/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303356 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3357 * @hba: per adapter instance
3358 *
3359 * 1. Allocate DMA memory for Command Descriptor array
3360 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3361 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3362 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3363 * (UTMRDL)
3364 * 4. Allocate memory for local reference block(lrb).
3365 *
3366 * Returns 0 for success, non-zero in case of failure
3367 */
3368static int ufshcd_memory_alloc(struct ufs_hba *hba)
3369{
3370 size_t utmrdl_size, utrdl_size, ucdl_size;
3371
3372 /* Allocate memory for UTP command descriptors */
3373 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003374 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3375 ucdl_size,
3376 &hba->ucdl_dma_addr,
3377 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303378
3379 /*
3380 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3381 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3382 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3383 * be aligned to 128 bytes as well
3384 */
3385 if (!hba->ucdl_base_addr ||
3386 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303387 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303388 "Command Descriptor Memory allocation failed\n");
3389 goto out;
3390 }
3391
3392 /*
3393 * Allocate memory for UTP Transfer descriptors
3394 * UFSHCI requires 1024 byte alignment of UTRD
3395 */
3396 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003397 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3398 utrdl_size,
3399 &hba->utrdl_dma_addr,
3400 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303401 if (!hba->utrdl_base_addr ||
3402 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303403 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303404 "Transfer Descriptor Memory allocation failed\n");
3405 goto out;
3406 }
3407
3408 /*
3409 * Allocate memory for UTP Task Management descriptors
3410 * UFSHCI requires 1024 byte alignment of UTMRD
3411 */
3412 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003413 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3414 utmrdl_size,
3415 &hba->utmrdl_dma_addr,
3416 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303417 if (!hba->utmrdl_base_addr ||
3418 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303419 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303420 "Task Management Descriptor Memory allocation failed\n");
3421 goto out;
3422 }
3423
3424 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003425 hba->lrb = devm_kcalloc(hba->dev,
3426 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003427 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303428 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303429 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303430 goto out;
3431 }
3432 return 0;
3433out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303434 return -ENOMEM;
3435}
3436
3437/**
3438 * ufshcd_host_memory_configure - configure local reference block with
3439 * memory offsets
3440 * @hba: per adapter instance
3441 *
3442 * Configure Host memory space
3443 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3444 * address.
3445 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3446 * and PRDT offset.
3447 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3448 * into local reference block.
3449 */
3450static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3451{
3452 struct utp_transfer_cmd_desc *cmd_descp;
3453 struct utp_transfer_req_desc *utrdlp;
3454 dma_addr_t cmd_desc_dma_addr;
3455 dma_addr_t cmd_desc_element_addr;
3456 u16 response_offset;
3457 u16 prdt_offset;
3458 int cmd_desc_size;
3459 int i;
3460
3461 utrdlp = hba->utrdl_base_addr;
3462 cmd_descp = hba->ucdl_base_addr;
3463
3464 response_offset =
3465 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3466 prdt_offset =
3467 offsetof(struct utp_transfer_cmd_desc, prd_table);
3468
3469 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3470 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3471
3472 for (i = 0; i < hba->nutrs; i++) {
3473 /* Configure UTRD with command descriptor base address */
3474 cmd_desc_element_addr =
3475 (cmd_desc_dma_addr + (cmd_desc_size * i));
3476 utrdlp[i].command_desc_base_addr_lo =
3477 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3478 utrdlp[i].command_desc_base_addr_hi =
3479 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3480
3481 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003482 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3483 utrdlp[i].response_upiu_offset =
3484 cpu_to_le16(response_offset);
3485 utrdlp[i].prd_table_offset =
3486 cpu_to_le16(prdt_offset);
3487 utrdlp[i].response_upiu_length =
3488 cpu_to_le16(ALIGNED_UPIU_SIZE);
3489 } else {
3490 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303491 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003492 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303493 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003494 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303495 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003496 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303497
3498 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003499 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3500 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303501 hba->lrb[i].ucd_req_ptr =
3502 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003503 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303504 hba->lrb[i].ucd_rsp_ptr =
3505 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003506 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3507 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303508 hba->lrb[i].ucd_prdt_ptr =
3509 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003510 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3511 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303512 }
3513}
3514
3515/**
3516 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3517 * @hba: per adapter instance
3518 *
3519 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3520 * in order to initialize the Unipro link startup procedure.
3521 * Once the Unipro links are up, the device connected to the controller
3522 * is detected.
3523 *
3524 * Returns 0 on success, non-zero value on failure
3525 */
3526static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3527{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303528 struct uic_command uic_cmd = {0};
3529 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303530
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303531 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3532
3533 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3534 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003535 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303536 "dme-link-startup: error code %d\n", ret);
3537 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303538}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303539/**
3540 * ufshcd_dme_reset - UIC command for DME_RESET
3541 * @hba: per adapter instance
3542 *
3543 * DME_RESET command is issued in order to reset UniPro stack.
3544 * This function now deal with cold reset.
3545 *
3546 * Returns 0 on success, non-zero value on failure
3547 */
3548static int ufshcd_dme_reset(struct ufs_hba *hba)
3549{
3550 struct uic_command uic_cmd = {0};
3551 int ret;
3552
3553 uic_cmd.command = UIC_CMD_DME_RESET;
3554
3555 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3556 if (ret)
3557 dev_err(hba->dev,
3558 "dme-reset: error code %d\n", ret);
3559
3560 return ret;
3561}
3562
3563/**
3564 * ufshcd_dme_enable - UIC command for DME_ENABLE
3565 * @hba: per adapter instance
3566 *
3567 * DME_ENABLE command is issued in order to enable UniPro stack.
3568 *
3569 * Returns 0 on success, non-zero value on failure
3570 */
3571static int ufshcd_dme_enable(struct ufs_hba *hba)
3572{
3573 struct uic_command uic_cmd = {0};
3574 int ret;
3575
3576 uic_cmd.command = UIC_CMD_DME_ENABLE;
3577
3578 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3579 if (ret)
3580 dev_err(hba->dev,
3581 "dme-reset: error code %d\n", ret);
3582
3583 return ret;
3584}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303585
Yaniv Gardicad2e032015-03-31 17:37:14 +03003586static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3587{
3588 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3589 unsigned long min_sleep_time_us;
3590
3591 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3592 return;
3593
3594 /*
3595 * last_dme_cmd_tstamp will be 0 only for 1st call to
3596 * this function
3597 */
3598 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3599 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3600 } else {
3601 unsigned long delta =
3602 (unsigned long) ktime_to_us(
3603 ktime_sub(ktime_get(),
3604 hba->last_dme_cmd_tstamp));
3605
3606 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3607 min_sleep_time_us =
3608 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3609 else
3610 return; /* no more delay required */
3611 }
3612
3613 /* allow sleep for extra 50us if needed */
3614 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3615}
3616
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303617/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303618 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3619 * @hba: per adapter instance
3620 * @attr_sel: uic command argument1
3621 * @attr_set: attribute set type as uic command argument2
3622 * @mib_val: setting value as uic command argument3
3623 * @peer: indicate whether peer or local
3624 *
3625 * Returns 0 on success, non-zero value on failure
3626 */
3627int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3628 u8 attr_set, u32 mib_val, u8 peer)
3629{
3630 struct uic_command uic_cmd = {0};
3631 static const char *const action[] = {
3632 "dme-set",
3633 "dme-peer-set"
3634 };
3635 const char *set = action[!!peer];
3636 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003637 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303638
3639 uic_cmd.command = peer ?
3640 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3641 uic_cmd.argument1 = attr_sel;
3642 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3643 uic_cmd.argument3 = mib_val;
3644
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003645 do {
3646 /* for peer attributes we retry upon failure */
3647 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3648 if (ret)
3649 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3650 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3651 } while (ret && peer && --retries);
3652
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003653 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003654 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003655 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3656 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303657
3658 return ret;
3659}
3660EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3661
3662/**
3663 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3664 * @hba: per adapter instance
3665 * @attr_sel: uic command argument1
3666 * @mib_val: the value of the attribute as returned by the UIC command
3667 * @peer: indicate whether peer or local
3668 *
3669 * Returns 0 on success, non-zero value on failure
3670 */
3671int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3672 u32 *mib_val, u8 peer)
3673{
3674 struct uic_command uic_cmd = {0};
3675 static const char *const action[] = {
3676 "dme-get",
3677 "dme-peer-get"
3678 };
3679 const char *get = action[!!peer];
3680 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003681 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003682 struct ufs_pa_layer_attr orig_pwr_info;
3683 struct ufs_pa_layer_attr temp_pwr_info;
3684 bool pwr_mode_change = false;
3685
3686 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3687 orig_pwr_info = hba->pwr_info;
3688 temp_pwr_info = orig_pwr_info;
3689
3690 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3691 orig_pwr_info.pwr_rx == FAST_MODE) {
3692 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3693 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3694 pwr_mode_change = true;
3695 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3696 orig_pwr_info.pwr_rx == SLOW_MODE) {
3697 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3698 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3699 pwr_mode_change = true;
3700 }
3701 if (pwr_mode_change) {
3702 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3703 if (ret)
3704 goto out;
3705 }
3706 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303707
3708 uic_cmd.command = peer ?
3709 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3710 uic_cmd.argument1 = attr_sel;
3711
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003712 do {
3713 /* for peer attributes we retry upon failure */
3714 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3715 if (ret)
3716 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3717 get, UIC_GET_ATTR_ID(attr_sel), ret);
3718 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303719
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003720 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003721 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003722 get, UIC_GET_ATTR_ID(attr_sel),
3723 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003724
3725 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303726 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003727
3728 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3729 && pwr_mode_change)
3730 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303731out:
3732 return ret;
3733}
3734EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3735
3736/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003737 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3738 * state) and waits for it to take effect.
3739 *
3740 * @hba: per adapter instance
3741 * @cmd: UIC command to execute
3742 *
3743 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3744 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3745 * and device UniPro link and hence it's final completion would be indicated by
3746 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3747 * addition to normal UIC command completion Status (UCCS). This function only
3748 * returns after the relevant status bits indicate the completion.
3749 *
3750 * Returns 0 on success, non-zero value on failure
3751 */
3752static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3753{
3754 struct completion uic_async_done;
3755 unsigned long flags;
3756 u8 status;
3757 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003758 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003759
3760 mutex_lock(&hba->uic_cmd_mutex);
3761 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003762 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003763
3764 spin_lock_irqsave(hba->host->host_lock, flags);
3765 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003766 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3767 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3768 /*
3769 * Make sure UIC command completion interrupt is disabled before
3770 * issuing UIC command.
3771 */
3772 wmb();
3773 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003774 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003775 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3776 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003777 if (ret) {
3778 dev_err(hba->dev,
3779 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3780 cmd->command, cmd->argument3, ret);
3781 goto out;
3782 }
3783
3784 if (!wait_for_completion_timeout(hba->uic_async_done,
3785 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3786 dev_err(hba->dev,
3787 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3788 cmd->command, cmd->argument3);
3789 ret = -ETIMEDOUT;
3790 goto out;
3791 }
3792
3793 status = ufshcd_get_upmcrs(hba);
3794 if (status != PWR_LOCAL) {
3795 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003796 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003797 cmd->command, status);
3798 ret = (status != PWR_OK) ? status : -1;
3799 }
3800out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003801 if (ret) {
3802 ufshcd_print_host_state(hba);
3803 ufshcd_print_pwr_info(hba);
3804 ufshcd_print_host_regs(hba);
3805 }
3806
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003807 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003808 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003809 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003810 if (reenable_intr)
3811 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003812 spin_unlock_irqrestore(hba->host->host_lock, flags);
3813 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003814
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003815 return ret;
3816}
3817
3818/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303819 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3820 * using DME_SET primitives.
3821 * @hba: per adapter instance
3822 * @mode: powr mode value
3823 *
3824 * Returns 0 on success, non-zero value on failure
3825 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303826static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303827{
3828 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003829 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303830
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003831 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3832 ret = ufshcd_dme_set(hba,
3833 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3834 if (ret) {
3835 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3836 __func__, ret);
3837 goto out;
3838 }
3839 }
3840
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303841 uic_cmd.command = UIC_CMD_DME_SET;
3842 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3843 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003844 ufshcd_hold(hba, false);
3845 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3846 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303847
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003848out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003849 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003850}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303851
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003852static int ufshcd_link_recovery(struct ufs_hba *hba)
3853{
3854 int ret;
3855 unsigned long flags;
3856
3857 spin_lock_irqsave(hba->host->host_lock, flags);
3858 hba->ufshcd_state = UFSHCD_STATE_RESET;
3859 ufshcd_set_eh_in_progress(hba);
3860 spin_unlock_irqrestore(hba->host->host_lock, flags);
3861
Can Guoebdd1df2019-11-14 22:09:24 -08003862 /* Reset the attached device */
3863 ufshcd_vops_device_reset(hba);
3864
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003865 ret = ufshcd_host_reset_and_restore(hba);
3866
3867 spin_lock_irqsave(hba->host->host_lock, flags);
3868 if (ret)
3869 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3870 ufshcd_clear_eh_in_progress(hba);
3871 spin_unlock_irqrestore(hba->host->host_lock, flags);
3872
3873 if (ret)
3874 dev_err(hba->dev, "%s: link recovery failed, err %d",
3875 __func__, ret);
3876
3877 return ret;
3878}
3879
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003880static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003881{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003882 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003883 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003884 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003885
Kiwoong Kimee32c902016-11-10 21:17:43 +09003886 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3887
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003888 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003889 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003890 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3891 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003892
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003893 if (ret) {
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003894 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3895 __func__, ret);
3896
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003897 /*
3898 * If link recovery fails then return error so that caller
3899 * don't retry the hibern8 enter again.
3900 */
3901 if (ufshcd_link_recovery(hba))
3902 ret = -ENOLINK;
Kiwoong Kimee32c902016-11-10 21:17:43 +09003903 } else
3904 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3905 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003906
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003907 return ret;
3908}
3909
3910static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3911{
3912 int ret = 0, retries;
3913
3914 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3915 ret = __ufshcd_uic_hibern8_enter(hba);
3916 if (!ret || ret == -ENOLINK)
3917 goto out;
3918 }
3919out:
3920 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003921}
3922
3923static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3924{
3925 struct uic_command uic_cmd = {0};
3926 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003927 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003928
Kiwoong Kimee32c902016-11-10 21:17:43 +09003929 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3930
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003931 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3932 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003933 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3934 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3935
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303936 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003937 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3938 __func__, ret);
3939 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003940 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003941 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3942 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003943 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3944 hba->ufs_stats.hibern8_exit_cnt++;
3945 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303946
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303947 return ret;
3948}
3949
Can Guo71d848b2019-11-14 22:09:26 -08003950void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003951{
3952 unsigned long flags;
3953
Stanley Chuee5f1042019-05-21 14:44:52 +08003954 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003955 return;
3956
3957 spin_lock_irqsave(hba->host->host_lock, flags);
3958 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3959 spin_unlock_irqrestore(hba->host->host_lock, flags);
3960}
3961
Yaniv Gardi50646362014-10-23 13:25:13 +03003962 /**
3963 * ufshcd_init_pwr_info - setting the POR (power on reset)
3964 * values in hba power info
3965 * @hba: per-adapter instance
3966 */
3967static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3968{
3969 hba->pwr_info.gear_rx = UFS_PWM_G1;
3970 hba->pwr_info.gear_tx = UFS_PWM_G1;
3971 hba->pwr_info.lane_rx = 1;
3972 hba->pwr_info.lane_tx = 1;
3973 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3974 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3975 hba->pwr_info.hs_rate = 0;
3976}
3977
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303978/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003979 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3980 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303981 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003982static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303983{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003984 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3985
3986 if (hba->max_pwr_info.is_valid)
3987 return 0;
3988
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003989 pwr_info->pwr_tx = FAST_MODE;
3990 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003991 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303992
3993 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003994 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3995 &pwr_info->lane_rx);
3996 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3997 &pwr_info->lane_tx);
3998
3999 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4000 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4001 __func__,
4002 pwr_info->lane_rx,
4003 pwr_info->lane_tx);
4004 return -EINVAL;
4005 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304006
4007 /*
4008 * First, get the maximum gears of HS speed.
4009 * If a zero value, it means there is no HSGEAR capability.
4010 * Then, get the maximum gears of PWM speed.
4011 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004012 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4013 if (!pwr_info->gear_rx) {
4014 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4015 &pwr_info->gear_rx);
4016 if (!pwr_info->gear_rx) {
4017 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4018 __func__, pwr_info->gear_rx);
4019 return -EINVAL;
4020 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004021 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304022 }
4023
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004024 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4025 &pwr_info->gear_tx);
4026 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304027 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004028 &pwr_info->gear_tx);
4029 if (!pwr_info->gear_tx) {
4030 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4031 __func__, pwr_info->gear_tx);
4032 return -EINVAL;
4033 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004034 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004035 }
4036
4037 hba->max_pwr_info.is_valid = true;
4038 return 0;
4039}
4040
4041static int ufshcd_change_power_mode(struct ufs_hba *hba,
4042 struct ufs_pa_layer_attr *pwr_mode)
4043{
4044 int ret;
4045
4046 /* if already configured to the requested pwr_mode */
4047 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4048 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4049 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4050 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4051 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4052 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4053 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4054 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4055 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304056 }
4057
4058 /*
4059 * Configure attributes for power mode change with below.
4060 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4061 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4062 * - PA_HSSERIES
4063 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004064 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4065 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4066 pwr_mode->lane_rx);
4067 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4068 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304069 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004070 else
4071 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304072
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004073 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4074 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4075 pwr_mode->lane_tx);
4076 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4077 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304078 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004079 else
4080 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304081
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004082 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4083 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4084 pwr_mode->pwr_rx == FAST_MODE ||
4085 pwr_mode->pwr_tx == FAST_MODE)
4086 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4087 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304088
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004089 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4090 | pwr_mode->pwr_tx);
4091
4092 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304093 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004094 "%s: power mode change failed %d\n", __func__, ret);
4095 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004096 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4097 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004098
4099 memcpy(&hba->pwr_info, pwr_mode,
4100 sizeof(struct ufs_pa_layer_attr));
4101 }
4102
4103 return ret;
4104}
4105
4106/**
4107 * ufshcd_config_pwr_mode - configure a new power mode
4108 * @hba: per-adapter instance
4109 * @desired_pwr_mode: desired power configuration
4110 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304111int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004112 struct ufs_pa_layer_attr *desired_pwr_mode)
4113{
4114 struct ufs_pa_layer_attr final_params = { 0 };
4115 int ret;
4116
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004117 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4118 desired_pwr_mode, &final_params);
4119
4120 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004121 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4122
4123 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004124 if (!ret)
4125 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304126
4127 return ret;
4128}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304129EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304130
4131/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304132 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004133 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304134 *
4135 * Set fDeviceInit flag and poll until device toggles it.
4136 */
4137static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4138{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004139 int i;
4140 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304141 bool flag_res = 1;
4142
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004143 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4144 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304145 if (err) {
4146 dev_err(hba->dev,
4147 "%s setting fDeviceInit flag failed with error %d\n",
4148 __func__, err);
4149 goto out;
4150 }
4151
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004152 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4153 for (i = 0; i < 1000 && !err && flag_res; i++)
4154 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4155 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4156
Dolev Raviv68078d52013-07-30 00:35:58 +05304157 if (err)
4158 dev_err(hba->dev,
4159 "%s reading fDeviceInit flag failed with error %d\n",
4160 __func__, err);
4161 else if (flag_res)
4162 dev_err(hba->dev,
4163 "%s fDeviceInit was not cleared by the device\n",
4164 __func__);
4165
4166out:
4167 return err;
4168}
4169
4170/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304171 * ufshcd_make_hba_operational - Make UFS controller operational
4172 * @hba: per adapter instance
4173 *
4174 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004175 * 1. Enable required interrupts
4176 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004177 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004178 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304179 *
4180 * Returns 0 on success, non-zero value on failure
4181 */
4182static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4183{
4184 int err = 0;
4185 u32 reg;
4186
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304187 /* Enable required interrupts */
4188 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4189
4190 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004191 if (ufshcd_is_intr_aggr_allowed(hba))
4192 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4193 else
4194 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304195
4196 /* Configure UTRL and UTMRL base address registers */
4197 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4198 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4199 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4200 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4201 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4202 REG_UTP_TASK_REQ_LIST_BASE_L);
4203 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4204 REG_UTP_TASK_REQ_LIST_BASE_H);
4205
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304206 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004207 * Make sure base address and interrupt setup are updated before
4208 * enabling the run/stop registers below.
4209 */
4210 wmb();
4211
4212 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304213 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304214 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004215 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304216 if (!(ufshcd_get_lists_status(reg))) {
4217 ufshcd_enable_run_stop_reg(hba);
4218 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304219 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304220 "Host controller not ready to process requests");
4221 err = -EIO;
4222 goto out;
4223 }
4224
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304225out:
4226 return err;
4227}
4228
4229/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004230 * ufshcd_hba_stop - Send controller to reset state
4231 * @hba: per adapter instance
4232 * @can_sleep: perform sleep or just spin
4233 */
4234static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4235{
4236 int err;
4237
4238 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4239 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4240 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4241 10, 1, can_sleep);
4242 if (err)
4243 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4244}
4245
4246/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304247 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304248 * @hba: per adapter instance
4249 *
4250 * The controller resets itself and controller firmware initialization
4251 * sequence kicks off. When controller is ready it will set
4252 * the Host Controller Enable bit to 1.
4253 *
4254 * Returns 0 on success, non-zero value on failure
4255 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304256static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304257{
4258 int retry;
4259
Yaniv Gardi596585a2016-03-10 17:37:08 +02004260 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304261 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004262 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304263
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004264 /* UniPro link is disabled at this point */
4265 ufshcd_set_link_off(hba);
4266
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004267 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004268
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304269 /* start controller initialization sequence */
4270 ufshcd_hba_start(hba);
4271
4272 /*
4273 * To initialize a UFS host controller HCE bit must be set to 1.
4274 * During initialization the HCE bit value changes from 1->0->1.
4275 * When the host controller completes initialization sequence
4276 * it sets the value of HCE bit to 1. The same HCE bit is read back
4277 * to check if the controller has completed initialization sequence.
4278 * So without this delay the value HCE = 1, set in the previous
4279 * instruction might be read back.
4280 * This delay can be changed based on the controller.
4281 */
Bean Huo838c1ef2019-07-15 11:21:10 +00004282 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304283
4284 /* wait for the host controller to complete initialization */
4285 retry = 10;
4286 while (ufshcd_is_hba_active(hba)) {
4287 if (retry) {
4288 retry--;
4289 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304290 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304291 "Controller enable failed\n");
4292 return -EIO;
4293 }
Bean Huo838c1ef2019-07-15 11:21:10 +00004294 usleep_range(5000, 5100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304295 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004296
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004297 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004298 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004299
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004300 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004301
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304302 return 0;
4303}
4304
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304305static int ufshcd_hba_enable(struct ufs_hba *hba)
4306{
4307 int ret;
4308
4309 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4310 ufshcd_set_link_off(hba);
4311 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4312
4313 /* enable UIC related interrupts */
4314 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4315 ret = ufshcd_dme_reset(hba);
4316 if (!ret) {
4317 ret = ufshcd_dme_enable(hba);
4318 if (!ret)
4319 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4320 if (ret)
4321 dev_err(hba->dev,
4322 "Host controller enable failed with non-hce\n");
4323 }
4324 } else {
4325 ret = ufshcd_hba_execute_hce(hba);
4326 }
4327
4328 return ret;
4329}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004330static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4331{
4332 int tx_lanes, i, err = 0;
4333
4334 if (!peer)
4335 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4336 &tx_lanes);
4337 else
4338 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4339 &tx_lanes);
4340 for (i = 0; i < tx_lanes; i++) {
4341 if (!peer)
4342 err = ufshcd_dme_set(hba,
4343 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4344 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4345 0);
4346 else
4347 err = ufshcd_dme_peer_set(hba,
4348 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4349 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4350 0);
4351 if (err) {
4352 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4353 __func__, peer, i, err);
4354 break;
4355 }
4356 }
4357
4358 return err;
4359}
4360
4361static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4362{
4363 return ufshcd_disable_tx_lcc(hba, true);
4364}
4365
Stanley Chu8808b4e2019-07-10 21:38:21 +08004366static void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4367 u32 reg)
4368{
4369 reg_hist->reg[reg_hist->pos] = reg;
4370 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4371 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4372}
4373
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304374/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304375 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304376 * @hba: per adapter instance
4377 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304378 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304379 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304380static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304381{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304382 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004383 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004384 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304385
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004386 /*
4387 * If UFS device isn't active then we will have to issue link startup
4388 * 2 times to make sure the device state move to active.
4389 */
4390 if (!ufshcd_is_ufs_dev_active(hba))
4391 link_startup_again = true;
4392
4393link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004394 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004395 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304396
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004397 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004398
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004399 /* check if device is detected by inter-connect layer */
4400 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004401 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4402 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004403 dev_err(hba->dev, "%s: Device not present\n", __func__);
4404 ret = -ENXIO;
4405 goto out;
4406 }
4407
4408 /*
4409 * DME link lost indication is only received when link is up,
4410 * but we can't be sure if the link is up until link startup
4411 * succeeds. So reset the local Uni-Pro and try again.
4412 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004413 if (ret && ufshcd_hba_enable(hba)) {
4414 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4415 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004416 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004417 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004418 } while (ret && retries--);
4419
Stanley Chu8808b4e2019-07-10 21:38:21 +08004420 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004421 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004422 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4423 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304424 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004425 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304426
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004427 if (link_startup_again) {
4428 link_startup_again = false;
4429 retries = DME_LINKSTARTUP_RETRIES;
4430 goto link_startup;
4431 }
4432
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004433 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4434 ufshcd_init_pwr_info(hba);
4435 ufshcd_print_pwr_info(hba);
4436
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004437 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4438 ret = ufshcd_disable_device_tx_lcc(hba);
4439 if (ret)
4440 goto out;
4441 }
4442
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004443 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004444 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4445 if (ret)
4446 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004447
4448 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304449out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004450 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304451 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004452 ufshcd_print_host_state(hba);
4453 ufshcd_print_pwr_info(hba);
4454 ufshcd_print_host_regs(hba);
4455 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304456 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304457}
4458
4459/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304460 * ufshcd_verify_dev_init() - Verify device initialization
4461 * @hba: per-adapter instance
4462 *
4463 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4464 * device Transport Protocol (UTP) layer is ready after a reset.
4465 * If the UTP layer at the device side is not initialized, it may
4466 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4467 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4468 */
4469static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4470{
4471 int err = 0;
4472 int retries;
4473
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004474 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304475 mutex_lock(&hba->dev_cmd.lock);
4476 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4477 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4478 NOP_OUT_TIMEOUT);
4479
4480 if (!err || err == -ETIMEDOUT)
4481 break;
4482
4483 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4484 }
4485 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004486 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304487
4488 if (err)
4489 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4490 return err;
4491}
4492
4493/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004494 * ufshcd_set_queue_depth - set lun queue depth
4495 * @sdev: pointer to SCSI device
4496 *
4497 * Read bLUQueueDepth value and activate scsi tagged command
4498 * queueing. For WLUN, queue depth is set to 1. For best-effort
4499 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4500 * value that host can queue.
4501 */
4502static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4503{
4504 int ret = 0;
4505 u8 lun_qdepth;
4506 struct ufs_hba *hba;
4507
4508 hba = shost_priv(sdev->host);
4509
4510 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004511 ret = ufshcd_read_unit_desc_param(hba,
4512 ufshcd_scsi_to_upiu_lun(sdev->lun),
4513 UNIT_DESC_PARAM_LU_Q_DEPTH,
4514 &lun_qdepth,
4515 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004516
4517 /* Some WLUN doesn't support unit descriptor */
4518 if (ret == -EOPNOTSUPP)
4519 lun_qdepth = 1;
4520 else if (!lun_qdepth)
4521 /* eventually, we can figure out the real queue depth */
4522 lun_qdepth = hba->nutrs;
4523 else
4524 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4525
4526 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4527 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004528 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004529}
4530
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004531/*
4532 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4533 * @hba: per-adapter instance
4534 * @lun: UFS device lun id
4535 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4536 *
4537 * Returns 0 in case of success and b_lu_write_protect status would be returned
4538 * @b_lu_write_protect parameter.
4539 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4540 * Returns -EINVAL in case of invalid parameters passed to this function.
4541 */
4542static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4543 u8 lun,
4544 u8 *b_lu_write_protect)
4545{
4546 int ret;
4547
4548 if (!b_lu_write_protect)
4549 ret = -EINVAL;
4550 /*
4551 * According to UFS device spec, RPMB LU can't be write
4552 * protected so skip reading bLUWriteProtect parameter for
4553 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4554 */
4555 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4556 ret = -ENOTSUPP;
4557 else
4558 ret = ufshcd_read_unit_desc_param(hba,
4559 lun,
4560 UNIT_DESC_PARAM_LU_WR_PROTECT,
4561 b_lu_write_protect,
4562 sizeof(*b_lu_write_protect));
4563 return ret;
4564}
4565
4566/**
4567 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4568 * status
4569 * @hba: per-adapter instance
4570 * @sdev: pointer to SCSI device
4571 *
4572 */
4573static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4574 struct scsi_device *sdev)
4575{
4576 if (hba->dev_info.f_power_on_wp_en &&
4577 !hba->dev_info.is_lu_power_on_wp) {
4578 u8 b_lu_write_protect;
4579
4580 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4581 &b_lu_write_protect) &&
4582 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4583 hba->dev_info.is_lu_power_on_wp = true;
4584 }
4585}
4586
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004587/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304588 * ufshcd_slave_alloc - handle initial SCSI device configurations
4589 * @sdev: pointer to SCSI device
4590 *
4591 * Returns success
4592 */
4593static int ufshcd_slave_alloc(struct scsi_device *sdev)
4594{
4595 struct ufs_hba *hba;
4596
4597 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304598
4599 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4600 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304601
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304602 /* allow SCSI layer to restart the device in case of errors */
4603 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004604
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004605 /* REPORT SUPPORTED OPERATION CODES is not supported */
4606 sdev->no_report_opcodes = 1;
4607
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304608 /* WRITE_SAME command is not supported */
4609 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004610
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004611 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004612
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004613 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4614
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004615 return 0;
4616}
4617
4618/**
4619 * ufshcd_change_queue_depth - change queue depth
4620 * @sdev: pointer to SCSI device
4621 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004622 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004623 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004624 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004625static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004626{
4627 struct ufs_hba *hba = shost_priv(sdev->host);
4628
4629 if (depth > hba->nutrs)
4630 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004631 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304632}
4633
4634/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004635 * ufshcd_slave_configure - adjust SCSI device configurations
4636 * @sdev: pointer to SCSI device
4637 */
4638static int ufshcd_slave_configure(struct scsi_device *sdev)
4639{
Stanley Chu49615ba2019-09-16 23:56:50 +08004640 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004641 struct request_queue *q = sdev->request_queue;
4642
4643 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004644
4645 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4646 sdev->rpm_autosuspend = 1;
4647
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004648 return 0;
4649}
4650
4651/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304652 * ufshcd_slave_destroy - remove SCSI device configurations
4653 * @sdev: pointer to SCSI device
4654 */
4655static void ufshcd_slave_destroy(struct scsi_device *sdev)
4656{
4657 struct ufs_hba *hba;
4658
4659 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004660 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004661 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4662 unsigned long flags;
4663
4664 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004665 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004666 spin_unlock_irqrestore(hba->host->host_lock, flags);
4667 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304668}
4669
4670/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304671 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004672 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304673 * @scsi_status: SCSI command status
4674 *
4675 * Returns value base on SCSI command status
4676 */
4677static inline int
4678ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4679{
4680 int result = 0;
4681
4682 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304683 case SAM_STAT_CHECK_CONDITION:
4684 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004685 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304686 case SAM_STAT_GOOD:
4687 result |= DID_OK << 16 |
4688 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304689 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304690 break;
4691 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304692 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304693 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304694 ufshcd_copy_sense_data(lrbp);
4695 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304696 break;
4697 default:
4698 result |= DID_ERROR << 16;
4699 break;
4700 } /* end of switch */
4701
4702 return result;
4703}
4704
4705/**
4706 * ufshcd_transfer_rsp_status - Get overall status of the response
4707 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004708 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304709 *
4710 * Returns result of the command to notify SCSI midlayer
4711 */
4712static inline int
4713ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4714{
4715 int result = 0;
4716 int scsi_status;
4717 int ocs;
4718
4719 /* overall command status of utrd */
4720 ocs = ufshcd_get_tr_ocs(lrbp);
4721
4722 switch (ocs) {
4723 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304724 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004725 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304726 switch (result) {
4727 case UPIU_TRANSACTION_RESPONSE:
4728 /*
4729 * get the response UPIU result to extract
4730 * the SCSI command status
4731 */
4732 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4733
4734 /*
4735 * get the result based on SCSI status response
4736 * to notify the SCSI midlayer of the command status
4737 */
4738 scsi_status = result & MASK_SCSI_STATUS;
4739 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304740
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004741 /*
4742 * Currently we are only supporting BKOPs exception
4743 * events hence we can ignore BKOPs exception event
4744 * during power management callbacks. BKOPs exception
4745 * event is not expected to be raised in runtime suspend
4746 * callback as it allows the urgent bkops.
4747 * During system suspend, we are anyway forcefully
4748 * disabling the bkops and if urgent bkops is needed
4749 * it will be enabled on system resume. Long term
4750 * solution could be to abort the system suspend if
4751 * UFS device needs urgent BKOPs.
4752 */
4753 if (!hba->pm_op_in_progress &&
4754 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304755 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304756 break;
4757 case UPIU_TRANSACTION_REJECT_UPIU:
4758 /* TODO: handle Reject UPIU Response */
4759 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304760 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304761 "Reject UPIU not fully implemented\n");
4762 break;
4763 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304764 dev_err(hba->dev,
4765 "Unexpected request response code = %x\n",
4766 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004767 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304768 break;
4769 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304770 break;
4771 case OCS_ABORTED:
4772 result |= DID_ABORT << 16;
4773 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304774 case OCS_INVALID_COMMAND_STATUS:
4775 result |= DID_REQUEUE << 16;
4776 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304777 case OCS_INVALID_CMD_TABLE_ATTR:
4778 case OCS_INVALID_PRDT_ATTR:
4779 case OCS_MISMATCH_DATA_BUF_SIZE:
4780 case OCS_MISMATCH_RESP_UPIU_SIZE:
4781 case OCS_PEER_COMM_FAILURE:
4782 case OCS_FATAL_ERROR:
4783 default:
4784 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304785 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004786 "OCS error from controller = %x for tag %d\n",
4787 ocs, lrbp->task_tag);
4788 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004789 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304790 break;
4791 } /* end of switch */
4792
Dolev Raviv66cc8202016-12-22 18:39:42 -08004793 if (host_byte(result) != DID_OK)
4794 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304795 return result;
4796}
4797
4798/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304799 * ufshcd_uic_cmd_compl - handle completion of uic command
4800 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304801 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004802 *
4803 * Returns
4804 * IRQ_HANDLED - If interrupt is valid
4805 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304806 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004807static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304808{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004809 irqreturn_t retval = IRQ_NONE;
4810
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304811 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304812 hba->active_uic_cmd->argument2 |=
4813 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304814 hba->active_uic_cmd->argument3 =
4815 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304816 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004817 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304818 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304819
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004820 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004821 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004822 retval = IRQ_HANDLED;
4823 }
4824 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304825}
4826
4827/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004828 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304829 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004830 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304831 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004832static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4833 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304834{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304835 struct ufshcd_lrb *lrbp;
4836 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304837 int result;
4838 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004839
Dolev Ravive9d501b2014-07-01 12:22:37 +03004840 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4841 lrbp = &hba->lrb[index];
4842 cmd = lrbp->cmd;
4843 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004844 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004845 result = ufshcd_transfer_rsp_status(hba, lrbp);
4846 scsi_dma_unmap(cmd);
4847 cmd->result = result;
4848 /* Mark completed command as NULL in LRB */
4849 lrbp->cmd = NULL;
4850 clear_bit_unlock(index, &hba->lrb_in_use);
4851 /* Do not touch lrbp after scsi done */
4852 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004853 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004854 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4855 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004856 if (hba->dev_cmd.complete) {
4857 ufshcd_add_command_trace(hba, index,
4858 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004859 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004860 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004861 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004862 if (ufshcd_is_clkscaling_supported(hba))
4863 hba->clk_scaling.active_reqs--;
Zang Leigang09017182017-09-27 10:06:06 +08004864
4865 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004866 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304867
4868 /* clear corresponding bits of completed commands */
4869 hba->outstanding_reqs ^= completed_reqs;
4870
Sahitya Tummala856b3482014-09-25 15:32:34 +03004871 ufshcd_clk_scaling_update_busy(hba);
4872
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304873 /* we might have free'd some tags above */
4874 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304875}
4876
4877/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004878 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4879 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004880 *
4881 * Returns
4882 * IRQ_HANDLED - If interrupt is valid
4883 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004884 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004885static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004886{
4887 unsigned long completed_reqs;
4888 u32 tr_doorbell;
4889
4890 /* Resetting interrupt aggregation counters first and reading the
4891 * DOOR_BELL afterward allows us to handle all the completed requests.
4892 * In order to prevent other interrupts starvation the DB is read once
4893 * after reset. The down side of this solution is the possibility of
4894 * false interrupt if device completes another request after resetting
4895 * aggregation and before reading the DB.
4896 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304897 if (ufshcd_is_intr_aggr_allowed(hba) &&
4898 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004899 ufshcd_reset_intr_aggr(hba);
4900
4901 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4902 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4903
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004904 if (completed_reqs) {
4905 __ufshcd_transfer_req_compl(hba, completed_reqs);
4906 return IRQ_HANDLED;
4907 } else {
4908 return IRQ_NONE;
4909 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004910}
4911
4912/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304913 * ufshcd_disable_ee - disable exception event
4914 * @hba: per-adapter instance
4915 * @mask: exception event to disable
4916 *
4917 * Disables exception event in the device so that the EVENT_ALERT
4918 * bit is not set.
4919 *
4920 * Returns zero on success, non-zero error value on failure.
4921 */
4922static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4923{
4924 int err = 0;
4925 u32 val;
4926
4927 if (!(hba->ee_ctrl_mask & mask))
4928 goto out;
4929
4930 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004931 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004932 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304933 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4934 if (!err)
4935 hba->ee_ctrl_mask &= ~mask;
4936out:
4937 return err;
4938}
4939
4940/**
4941 * ufshcd_enable_ee - enable exception event
4942 * @hba: per-adapter instance
4943 * @mask: exception event to enable
4944 *
4945 * Enable corresponding exception event in the device to allow
4946 * device to alert host in critical scenarios.
4947 *
4948 * Returns zero on success, non-zero error value on failure.
4949 */
4950static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4951{
4952 int err = 0;
4953 u32 val;
4954
4955 if (hba->ee_ctrl_mask & mask)
4956 goto out;
4957
4958 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004959 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004960 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304961 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4962 if (!err)
4963 hba->ee_ctrl_mask |= mask;
4964out:
4965 return err;
4966}
4967
4968/**
4969 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4970 * @hba: per-adapter instance
4971 *
4972 * Allow device to manage background operations on its own. Enabling
4973 * this might lead to inconsistent latencies during normal data transfers
4974 * as the device is allowed to manage its own way of handling background
4975 * operations.
4976 *
4977 * Returns zero on success, non-zero on failure.
4978 */
4979static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4980{
4981 int err = 0;
4982
4983 if (hba->auto_bkops_enabled)
4984 goto out;
4985
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004986 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304987 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4988 if (err) {
4989 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4990 __func__, err);
4991 goto out;
4992 }
4993
4994 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004995 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304996
4997 /* No need of URGENT_BKOPS exception from the device */
4998 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4999 if (err)
5000 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5001 __func__, err);
5002out:
5003 return err;
5004}
5005
5006/**
5007 * ufshcd_disable_auto_bkops - block device in doing background operations
5008 * @hba: per-adapter instance
5009 *
5010 * Disabling background operations improves command response latency but
5011 * has drawback of device moving into critical state where the device is
5012 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5013 * host is idle so that BKOPS are managed effectively without any negative
5014 * impacts.
5015 *
5016 * Returns zero on success, non-zero on failure.
5017 */
5018static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5019{
5020 int err = 0;
5021
5022 if (!hba->auto_bkops_enabled)
5023 goto out;
5024
5025 /*
5026 * If host assisted BKOPs is to be enabled, make sure
5027 * urgent bkops exception is allowed.
5028 */
5029 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5030 if (err) {
5031 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5032 __func__, err);
5033 goto out;
5034 }
5035
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005036 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305037 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5038 if (err) {
5039 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5040 __func__, err);
5041 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5042 goto out;
5043 }
5044
5045 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005046 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305047out:
5048 return err;
5049}
5050
5051/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005052 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305053 * @hba: per adapter instance
5054 *
5055 * After a device reset the device may toggle the BKOPS_EN flag
5056 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005057 * as well. This function would change the auto-bkops state based on
5058 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305059 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005060static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305061{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005062 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5063 hba->auto_bkops_enabled = false;
5064 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5065 ufshcd_enable_auto_bkops(hba);
5066 } else {
5067 hba->auto_bkops_enabled = true;
5068 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5069 ufshcd_disable_auto_bkops(hba);
5070 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305071}
5072
5073static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5074{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005075 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305076 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5077}
5078
5079/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005080 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5081 * @hba: per-adapter instance
5082 * @status: bkops_status value
5083 *
5084 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5085 * flag in the device to permit background operations if the device
5086 * bkops_status is greater than or equal to "status" argument passed to
5087 * this function, disable otherwise.
5088 *
5089 * Returns 0 for success, non-zero in case of failure.
5090 *
5091 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5092 * to know whether auto bkops is enabled or disabled after this function
5093 * returns control to it.
5094 */
5095static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5096 enum bkops_status status)
5097{
5098 int err;
5099 u32 curr_status = 0;
5100
5101 err = ufshcd_get_bkops_status(hba, &curr_status);
5102 if (err) {
5103 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5104 __func__, err);
5105 goto out;
5106 } else if (curr_status > BKOPS_STATUS_MAX) {
5107 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5108 __func__, curr_status);
5109 err = -EINVAL;
5110 goto out;
5111 }
5112
5113 if (curr_status >= status)
5114 err = ufshcd_enable_auto_bkops(hba);
5115 else
5116 err = ufshcd_disable_auto_bkops(hba);
5117out:
5118 return err;
5119}
5120
5121/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305122 * ufshcd_urgent_bkops - handle urgent bkops exception event
5123 * @hba: per-adapter instance
5124 *
5125 * Enable fBackgroundOpsEn flag in the device to permit background
5126 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005127 *
5128 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5129 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305130 */
5131static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5132{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005133 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305134}
5135
5136static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5137{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005138 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305139 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5140}
5141
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005142static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5143{
5144 int err;
5145 u32 curr_status = 0;
5146
5147 if (hba->is_urgent_bkops_lvl_checked)
5148 goto enable_auto_bkops;
5149
5150 err = ufshcd_get_bkops_status(hba, &curr_status);
5151 if (err) {
5152 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5153 __func__, err);
5154 goto out;
5155 }
5156
5157 /*
5158 * We are seeing that some devices are raising the urgent bkops
5159 * exception events even when BKOPS status doesn't indicate performace
5160 * impacted or critical. Handle these device by determining their urgent
5161 * bkops status at runtime.
5162 */
5163 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5164 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5165 __func__, curr_status);
5166 /* update the current status as the urgent bkops level */
5167 hba->urgent_bkops_lvl = curr_status;
5168 hba->is_urgent_bkops_lvl_checked = true;
5169 }
5170
5171enable_auto_bkops:
5172 err = ufshcd_enable_auto_bkops(hba);
5173out:
5174 if (err < 0)
5175 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5176 __func__, err);
5177}
5178
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305179/**
5180 * ufshcd_exception_event_handler - handle exceptions raised by device
5181 * @work: pointer to work data
5182 *
5183 * Read bExceptionEventStatus attribute from the device and handle the
5184 * exception event accordingly.
5185 */
5186static void ufshcd_exception_event_handler(struct work_struct *work)
5187{
5188 struct ufs_hba *hba;
5189 int err;
5190 u32 status = 0;
5191 hba = container_of(work, struct ufs_hba, eeh_work);
5192
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305193 pm_runtime_get_sync(hba->dev);
Maya Erez2e3611e92018-05-03 16:37:16 +05305194 scsi_block_requests(hba->host);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305195 err = ufshcd_get_ee_status(hba, &status);
5196 if (err) {
5197 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5198 __func__, err);
5199 goto out;
5200 }
5201
5202 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005203
5204 if (status & MASK_EE_URGENT_BKOPS)
5205 ufshcd_bkops_exception_event_handler(hba);
5206
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305207out:
Maya Erez2e3611e92018-05-03 16:37:16 +05305208 scsi_unblock_requests(hba->host);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305209 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305210 return;
5211}
5212
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005213/* Complete requests that have door-bell cleared */
5214static void ufshcd_complete_requests(struct ufs_hba *hba)
5215{
5216 ufshcd_transfer_req_compl(hba);
5217 ufshcd_tmc_handler(hba);
5218}
5219
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305220/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005221 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5222 * to recover from the DL NAC errors or not.
5223 * @hba: per-adapter instance
5224 *
5225 * Returns true if error handling is required, false otherwise
5226 */
5227static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5228{
5229 unsigned long flags;
5230 bool err_handling = true;
5231
5232 spin_lock_irqsave(hba->host->host_lock, flags);
5233 /*
5234 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5235 * device fatal error and/or DL NAC & REPLAY timeout errors.
5236 */
5237 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5238 goto out;
5239
5240 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5241 ((hba->saved_err & UIC_ERROR) &&
5242 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5243 goto out;
5244
5245 if ((hba->saved_err & UIC_ERROR) &&
5246 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5247 int err;
5248 /*
5249 * wait for 50ms to see if we can get any other errors or not.
5250 */
5251 spin_unlock_irqrestore(hba->host->host_lock, flags);
5252 msleep(50);
5253 spin_lock_irqsave(hba->host->host_lock, flags);
5254
5255 /*
5256 * now check if we have got any other severe errors other than
5257 * DL NAC error?
5258 */
5259 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5260 ((hba->saved_err & UIC_ERROR) &&
5261 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5262 goto out;
5263
5264 /*
5265 * As DL NAC is the only error received so far, send out NOP
5266 * command to confirm if link is still active or not.
5267 * - If we don't get any response then do error recovery.
5268 * - If we get response then clear the DL NAC error bit.
5269 */
5270
5271 spin_unlock_irqrestore(hba->host->host_lock, flags);
5272 err = ufshcd_verify_dev_init(hba);
5273 spin_lock_irqsave(hba->host->host_lock, flags);
5274
5275 if (err)
5276 goto out;
5277
5278 /* Link seems to be alive hence ignore the DL NAC errors */
5279 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5280 hba->saved_err &= ~UIC_ERROR;
5281 /* clear NAC error */
5282 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5283 if (!hba->saved_uic_err) {
5284 err_handling = false;
5285 goto out;
5286 }
5287 }
5288out:
5289 spin_unlock_irqrestore(hba->host->host_lock, flags);
5290 return err_handling;
5291}
5292
5293/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305294 * ufshcd_err_handler - handle UFS errors that require s/w attention
5295 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305296 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305297static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305298{
5299 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305300 unsigned long flags;
5301 u32 err_xfer = 0;
5302 u32 err_tm = 0;
5303 int err = 0;
5304 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005305 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305306
5307 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305308
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305309 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005310 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305311
5312 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005313 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305314 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305315
5316 hba->ufshcd_state = UFSHCD_STATE_RESET;
5317 ufshcd_set_eh_in_progress(hba);
5318
5319 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005320 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005321
5322 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5323 bool ret;
5324
5325 spin_unlock_irqrestore(hba->host->host_lock, flags);
5326 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5327 ret = ufshcd_quirk_dl_nac_errors(hba);
5328 spin_lock_irqsave(hba->host->host_lock, flags);
5329 if (!ret)
5330 goto skip_err_handling;
5331 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005332 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005333 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005334 ((hba->saved_err & UIC_ERROR) &&
5335 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5336 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5337 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5338 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305339
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005340 /*
5341 * if host reset is required then skip clearing the pending
5342 * transfers forcefully because they will automatically get
5343 * cleared after link startup.
5344 */
5345 if (needs_reset)
5346 goto skip_pending_xfer_clear;
5347
5348 /* release lock as clear command might sleep */
5349 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305350 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005351 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5352 if (ufshcd_clear_cmd(hba, tag)) {
5353 err_xfer = true;
5354 goto lock_skip_pending_xfer_clear;
5355 }
5356 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305357
5358 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005359 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5360 if (ufshcd_clear_tm_cmd(hba, tag)) {
5361 err_tm = true;
5362 goto lock_skip_pending_xfer_clear;
5363 }
5364 }
5365
5366lock_skip_pending_xfer_clear:
5367 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305368
5369 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005370 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305371
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005372 if (err_xfer || err_tm)
5373 needs_reset = true;
5374
5375skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305376 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005377 if (needs_reset) {
5378 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5379
5380 /*
5381 * ufshcd_reset_and_restore() does the link reinitialization
5382 * which will need atleast one empty doorbell slot to send the
5383 * device management commands (NOP and query commands).
5384 * If there is no slot empty at this moment then free up last
5385 * slot forcefully.
5386 */
5387 if (hba->outstanding_reqs == max_doorbells)
5388 __ufshcd_transfer_req_compl(hba,
5389 (1UL << (hba->nutrs - 1)));
5390
5391 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305392 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005393 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305394 if (err) {
5395 dev_err(hba->dev, "%s: reset and restore failed\n",
5396 __func__);
5397 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5398 }
5399 /*
5400 * Inform scsi mid-layer that we did reset and allow to handle
5401 * Unit Attention properly.
5402 */
5403 scsi_report_bus_reset(hba->host, 0);
5404 hba->saved_err = 0;
5405 hba->saved_uic_err = 0;
5406 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005407
Yaniv Gardi583fa622016-03-10 17:37:13 +02005408skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005409 if (!needs_reset) {
5410 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5411 if (hba->saved_err || hba->saved_uic_err)
5412 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5413 __func__, hba->saved_err, hba->saved_uic_err);
5414 }
5415
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305416 ufshcd_clear_eh_in_progress(hba);
5417
5418out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005419 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305420 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005421 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305422 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305423}
5424
5425/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305426 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5427 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005428 *
5429 * Returns
5430 * IRQ_HANDLED - If interrupt is valid
5431 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305432 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005433static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305434{
5435 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005436 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305437
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005438 /* PHY layer lane error */
5439 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5440 /* Ignore LINERESET indication, as this is not an error */
5441 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005442 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005443 /*
5444 * To know whether this error is fatal or not, DB timeout
5445 * must be checked but this error is handled separately.
5446 */
5447 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005448 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005449 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005450 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005451
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305452 /* PA_INIT_ERROR is fatal and needs UIC reset */
5453 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005454 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5455 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005456 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005457
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005458 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5459 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5460 else if (hba->dev_quirks &
5461 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5462 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5463 hba->uic_error |=
5464 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5465 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5466 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5467 }
5468 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005469 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305470
5471 /* UIC NL/TL/DME errors needs software retry */
5472 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005473 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5474 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005475 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305476 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005477 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005478 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305479
5480 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005481 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5482 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005483 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305484 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005485 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005486 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305487
5488 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005489 if ((reg & UIC_DME_ERROR) &&
5490 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005491 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305492 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005493 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005494 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305495
5496 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5497 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005498 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305499}
5500
Stanley Chu82174442019-05-21 14:44:54 +08005501static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5502 u32 intr_mask)
5503{
5504 if (!ufshcd_is_auto_hibern8_supported(hba))
5505 return false;
5506
5507 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5508 return false;
5509
5510 if (hba->active_uic_cmd &&
5511 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5512 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5513 return false;
5514
5515 return true;
5516}
5517
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305518/**
5519 * ufshcd_check_errors - Check for errors that need s/w attention
5520 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005521 *
5522 * Returns
5523 * IRQ_HANDLED - If interrupt is valid
5524 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305525 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005526static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305527{
5528 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005529 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305530
Stanley Chud3c615b2019-07-10 21:38:19 +08005531 if (hba->errors & INT_FATAL_ERRORS) {
5532 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305533 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005534 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305535
5536 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305537 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005538 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305539 if (hba->uic_error)
5540 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305541 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305542
Stanley Chu82174442019-05-21 14:44:54 +08005543 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5544 dev_err(hba->dev,
5545 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5546 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5547 "Enter" : "Exit",
5548 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005549 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5550 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005551 queue_eh_work = true;
5552 }
5553
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305554 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005555 /*
5556 * update the transfer error masks to sticky bits, let's do this
5557 * irrespective of current ufshcd_state.
5558 */
5559 hba->saved_err |= hba->errors;
5560 hba->saved_uic_err |= hba->uic_error;
5561
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305562 /* handle fatal errors only when link is functional */
5563 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5564 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305565 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305566
Zang Leigang141f8162016-11-16 11:29:37 +08005567 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005568
5569 /* dump controller state before resetting */
5570 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5571 bool pr_prdt = !!(hba->saved_err &
5572 SYSTEM_BUS_FATAL_ERROR);
5573
5574 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5575 __func__, hba->saved_err,
5576 hba->saved_uic_err);
5577
5578 ufshcd_print_host_regs(hba);
5579 ufshcd_print_pwr_info(hba);
5580 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5581 ufshcd_print_trs(hba, hba->outstanding_reqs,
5582 pr_prdt);
5583 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305584 schedule_work(&hba->eh_work);
5585 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005586 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305587 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305588 /*
5589 * if (!queue_eh_work) -
5590 * Other errors are either non-fatal where host recovers
5591 * itself without s/w intervention or errors that will be
5592 * handled by the SCSI core layer.
5593 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005594 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305595}
5596
5597/**
5598 * ufshcd_tmc_handler - handle task management function completion
5599 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005600 *
5601 * Returns
5602 * IRQ_HANDLED - If interrupt is valid
5603 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305604 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005605static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305606{
5607 u32 tm_doorbell;
5608
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305609 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305610 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005611 if (hba->tm_condition) {
5612 wake_up(&hba->tm_wq);
5613 return IRQ_HANDLED;
5614 } else {
5615 return IRQ_NONE;
5616 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305617}
5618
5619/**
5620 * ufshcd_sl_intr - Interrupt service routine
5621 * @hba: per adapter instance
5622 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005623 *
5624 * Returns
5625 * IRQ_HANDLED - If interrupt is valid
5626 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305627 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005628static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305629{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005630 irqreturn_t retval = IRQ_NONE;
5631
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305632 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005633
5634 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5635 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5636
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305637 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005638 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305639
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305640 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005641 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305642
5643 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005644 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305645
5646 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005647 retval |= ufshcd_transfer_req_compl(hba);
5648
5649 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305650}
5651
5652/**
5653 * ufshcd_intr - Main interrupt service routine
5654 * @irq: irq number
5655 * @__hba: pointer to adapter instance
5656 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005657 * Returns
5658 * IRQ_HANDLED - If interrupt is valid
5659 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305660 */
5661static irqreturn_t ufshcd_intr(int irq, void *__hba)
5662{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005663 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305664 irqreturn_t retval = IRQ_NONE;
5665 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305666 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305667
5668 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305669 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305670
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305671 /*
5672 * There could be max of hba->nutrs reqs in flight and in worst case
5673 * if the reqs get finished 1 by 1 after the interrupt status is
5674 * read, make sure we handle them by checking the interrupt status
5675 * again in a loop until we process all of the reqs before returning.
5676 */
5677 do {
5678 enabled_intr_status =
5679 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5680 if (intr_status)
5681 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005682 if (enabled_intr_status)
5683 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005684
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305685 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5686 } while (intr_status && --retries);
5687
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005688 if (retval == IRQ_NONE) {
5689 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5690 __func__, intr_status);
5691 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5692 }
5693
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305694 spin_unlock(hba->host->host_lock);
5695 return retval;
5696}
5697
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305698static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5699{
5700 int err = 0;
5701 u32 mask = 1 << tag;
5702 unsigned long flags;
5703
5704 if (!test_bit(tag, &hba->outstanding_tasks))
5705 goto out;
5706
5707 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305708 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305709 spin_unlock_irqrestore(hba->host->host_lock, flags);
5710
5711 /* poll for max. 1 sec to clear door bell register by h/w */
5712 err = ufshcd_wait_for_register(hba,
5713 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005714 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305715out:
5716 return err;
5717}
5718
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005719static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5720 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305721{
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005722 struct Scsi_Host *host = hba->host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305723 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005724 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305725
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305726 /*
5727 * Get free slot, sleep if slots are unavailable.
5728 * Even though we use wait_event() which sleeps indefinitely,
5729 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5730 */
5731 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005732 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305733
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305734 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305735 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305736
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005737 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5738
5739 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005740 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5741
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305742 /* send command to the controller */
5743 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005744
5745 /* Make sure descriptors are ready before ringing the task doorbell */
5746 wmb();
5747
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305748 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005749 /* Make sure that doorbell is committed immediately */
5750 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305751
5752 spin_unlock_irqrestore(host->host_lock, flags);
5753
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005754 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5755
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305756 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305757 err = wait_event_timeout(hba->tm_wq,
5758 test_bit(free_slot, &hba->tm_condition),
5759 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305760 if (!err) {
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005761 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305762 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5763 __func__, tm_function);
5764 if (ufshcd_clear_tm_cmd(hba, free_slot))
5765 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5766 __func__, free_slot);
5767 err = -ETIMEDOUT;
5768 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005769 err = 0;
5770 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5771
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005772 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305773 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305774
Stanley Chub5572172019-08-19 21:43:28 +08005775 spin_lock_irqsave(hba->host->host_lock, flags);
5776 __clear_bit(free_slot, &hba->outstanding_tasks);
5777 spin_unlock_irqrestore(hba->host->host_lock, flags);
5778
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305779 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305780 ufshcd_put_tm_slot(hba, free_slot);
5781 wake_up(&hba->tm_tag_wq);
5782
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005783 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305784 return err;
5785}
5786
5787/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005788 * ufshcd_issue_tm_cmd - issues task management commands to controller
5789 * @hba: per adapter instance
5790 * @lun_id: LUN ID to which TM command is sent
5791 * @task_id: task ID to which the TM command is applicable
5792 * @tm_function: task management function opcode
5793 * @tm_response: task management service response return value
5794 *
5795 * Returns non-zero value on error, zero on success.
5796 */
5797static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5798 u8 tm_function, u8 *tm_response)
5799{
5800 struct utp_task_req_desc treq = { { 0 }, };
5801 int ocs_value, err;
5802
5803 /* Configure task request descriptor */
5804 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5805 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5806
5807 /* Configure task request UPIU */
5808 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5809 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5810 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5811
5812 /*
5813 * The host shall provide the same value for LUN field in the basic
5814 * header and for Input Parameter.
5815 */
5816 treq.input_param1 = cpu_to_be32(lun_id);
5817 treq.input_param2 = cpu_to_be32(task_id);
5818
5819 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5820 if (err == -ETIMEDOUT)
5821 return err;
5822
5823 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5824 if (ocs_value != OCS_SUCCESS)
5825 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5826 __func__, ocs_value);
5827 else if (tm_response)
5828 *tm_response = be32_to_cpu(treq.output_param1) &
5829 MASK_TM_SERVICE_RESP;
5830 return err;
5831}
5832
5833/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005834 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5835 * @hba: per-adapter instance
5836 * @req_upiu: upiu request
5837 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03005838 * @desc_buff: pointer to descriptor buffer, NULL if NA
5839 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07005840 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03005841 * @desc_op: descriptor operation
5842 *
5843 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5844 * Therefore, it "rides" the device management infrastructure: uses its tag and
5845 * tasks work queues.
5846 *
5847 * Since there is only one available tag for device management commands,
5848 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5849 */
5850static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5851 struct utp_upiu_req *req_upiu,
5852 struct utp_upiu_req *rsp_upiu,
5853 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07005854 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03005855 enum query_opcode desc_op)
5856{
5857 struct ufshcd_lrb *lrbp;
5858 int err = 0;
5859 int tag;
5860 struct completion wait;
5861 unsigned long flags;
5862 u32 upiu_flags;
5863
5864 down_read(&hba->clk_scaling_lock);
5865
5866 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5867
5868 init_completion(&wait);
5869 lrbp = &hba->lrb[tag];
5870 WARN_ON(lrbp->cmd);
5871
5872 lrbp->cmd = NULL;
5873 lrbp->sense_bufflen = 0;
5874 lrbp->sense_buffer = NULL;
5875 lrbp->task_tag = tag;
5876 lrbp->lun = 0;
5877 lrbp->intr_cmd = true;
5878 hba->dev_cmd.type = cmd_type;
5879
5880 switch (hba->ufs_version) {
5881 case UFSHCI_VERSION_10:
5882 case UFSHCI_VERSION_11:
5883 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5884 break;
5885 default:
5886 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5887 break;
5888 }
5889
5890 /* update the task tag in the request upiu */
5891 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5892
5893 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5894
5895 /* just copy the upiu request as it is */
5896 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5897 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5898 /* The Data Segment Area is optional depending upon the query
5899 * function value. for WRITE DESCRIPTOR, the data segment
5900 * follows right after the tsf.
5901 */
5902 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5903 *buff_len = 0;
5904 }
5905
5906 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5907
5908 hba->dev_cmd.complete = &wait;
5909
5910 /* Make sure descriptors are ready before ringing the doorbell */
5911 wmb();
5912 spin_lock_irqsave(hba->host->host_lock, flags);
5913 ufshcd_send_command(hba, tag);
5914 spin_unlock_irqrestore(hba->host->host_lock, flags);
5915
5916 /*
5917 * ignore the returning value here - ufshcd_check_query_response is
5918 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5919 * read the response directly ignoring all errors.
5920 */
5921 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5922
5923 /* just copy the upiu response as it is */
5924 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02005925 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5926 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5927 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5928 MASK_QUERY_DATA_SEG_LEN;
5929
5930 if (*buff_len >= resp_len) {
5931 memcpy(desc_buff, descp, resp_len);
5932 *buff_len = resp_len;
5933 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01005934 dev_warn(hba->dev,
5935 "%s: rsp size %d is bigger than buffer size %d",
5936 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02005937 *buff_len = 0;
5938 err = -EINVAL;
5939 }
5940 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03005941
5942 ufshcd_put_dev_cmd_tag(hba, tag);
5943 wake_up(&hba->dev_cmd.tag_wq);
5944 up_read(&hba->clk_scaling_lock);
5945 return err;
5946}
5947
5948/**
5949 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5950 * @hba: per-adapter instance
5951 * @req_upiu: upiu request
5952 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5953 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5954 * @desc_buff: pointer to descriptor buffer, NULL if NA
5955 * @buff_len: descriptor size, 0 if NA
5956 * @desc_op: descriptor operation
5957 *
5958 * Supports UTP Transfer requests (nop and query), and UTP Task
5959 * Management requests.
5960 * It is up to the caller to fill the upiu conent properly, as it will
5961 * be copied without any further input validations.
5962 */
5963int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5964 struct utp_upiu_req *req_upiu,
5965 struct utp_upiu_req *rsp_upiu,
5966 int msgcode,
5967 u8 *desc_buff, int *buff_len,
5968 enum query_opcode desc_op)
5969{
5970 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07005971 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005972 struct utp_task_req_desc treq = { { 0 }, };
5973 int ocs_value;
5974 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5975
Avri Altman5e0a86e2018-10-07 17:30:37 +03005976 switch (msgcode) {
5977 case UPIU_TRANSACTION_NOP_OUT:
5978 cmd_type = DEV_CMD_TYPE_NOP;
5979 /* fall through */
5980 case UPIU_TRANSACTION_QUERY_REQ:
5981 ufshcd_hold(hba, false);
5982 mutex_lock(&hba->dev_cmd.lock);
5983 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5984 desc_buff, buff_len,
5985 cmd_type, desc_op);
5986 mutex_unlock(&hba->dev_cmd.lock);
5987 ufshcd_release(hba);
5988
5989 break;
5990 case UPIU_TRANSACTION_TASK_REQ:
5991 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5992 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5993
5994 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5995
5996 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5997 if (err == -ETIMEDOUT)
5998 break;
5999
6000 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6001 if (ocs_value != OCS_SUCCESS) {
6002 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6003 ocs_value);
6004 break;
6005 }
6006
6007 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6008
6009 break;
6010 default:
6011 err = -EINVAL;
6012
6013 break;
6014 }
6015
Avri Altman5e0a86e2018-10-07 17:30:37 +03006016 return err;
6017}
6018
6019/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306020 * ufshcd_eh_device_reset_handler - device reset handler registered to
6021 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306022 * @cmd: SCSI command pointer
6023 *
6024 * Returns SUCCESS/FAILED
6025 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306026static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306027{
6028 struct Scsi_Host *host;
6029 struct ufs_hba *hba;
6030 unsigned int tag;
6031 u32 pos;
6032 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306033 u8 resp = 0xF;
6034 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306035 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306036
6037 host = cmd->device->host;
6038 hba = shost_priv(host);
6039 tag = cmd->request->tag;
6040
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306041 lrbp = &hba->lrb[tag];
6042 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6043 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306044 if (!err)
6045 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306046 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306047 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306048
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306049 /* clear the commands that were pending for corresponding LUN */
6050 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6051 if (hba->lrb[pos].lun == lrbp->lun) {
6052 err = ufshcd_clear_cmd(hba, pos);
6053 if (err)
6054 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306055 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306056 }
6057 spin_lock_irqsave(host->host_lock, flags);
6058 ufshcd_transfer_req_compl(hba);
6059 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006060
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306061out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006062 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006063 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306064 if (!err) {
6065 err = SUCCESS;
6066 } else {
6067 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6068 err = FAILED;
6069 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306070 return err;
6071}
6072
Gilad Bronere0b299e2017-02-03 16:56:40 -08006073static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6074{
6075 struct ufshcd_lrb *lrbp;
6076 int tag;
6077
6078 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6079 lrbp = &hba->lrb[tag];
6080 lrbp->req_abort_skip = true;
6081 }
6082}
6083
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306084/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306085 * ufshcd_abort - abort a specific command
6086 * @cmd: SCSI command pointer
6087 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306088 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6089 * command, and in host controller by clearing the door-bell register. There can
6090 * be race between controller sending the command to the device while abort is
6091 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6092 * really issued and then try to abort it.
6093 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306094 * Returns SUCCESS/FAILED
6095 */
6096static int ufshcd_abort(struct scsi_cmnd *cmd)
6097{
6098 struct Scsi_Host *host;
6099 struct ufs_hba *hba;
6100 unsigned long flags;
6101 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306102 int err = 0;
6103 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306104 u8 resp = 0xF;
6105 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006106 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306107
6108 host = cmd->device->host;
6109 hba = shost_priv(host);
6110 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006111 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006112 if (!ufshcd_valid_tag(hba, tag)) {
6113 dev_err(hba->dev,
6114 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6115 __func__, tag, cmd, cmd->request);
6116 BUG();
6117 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306118
Dolev Ravive7d38252016-12-22 18:40:07 -08006119 /*
6120 * Task abort to the device W-LUN is illegal. When this command
6121 * will fail, due to spec violation, scsi err handling next step
6122 * will be to send LU reset which, again, is a spec violation.
6123 * To avoid these unnecessary/illegal step we skip to the last error
6124 * handling stage: reset and restore.
6125 */
6126 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6127 return ufshcd_eh_host_reset_handler(cmd);
6128
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006129 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006130 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006131 /* If command is already aborted/completed, return SUCCESS */
6132 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6133 dev_err(hba->dev,
6134 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6135 __func__, tag, hba->outstanding_reqs, reg);
6136 goto out;
6137 }
6138
Dolev Ravive9d501b2014-07-01 12:22:37 +03006139 if (!(reg & (1 << tag))) {
6140 dev_err(hba->dev,
6141 "%s: cmd was completed, but without a notifying intr, tag = %d",
6142 __func__, tag);
6143 }
6144
Dolev Raviv66cc8202016-12-22 18:39:42 -08006145 /* Print Transfer Request of aborted task */
6146 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006147
Gilad Broner7fabb772017-02-03 16:56:50 -08006148 /*
6149 * Print detailed info about aborted request.
6150 * As more than one request might get aborted at the same time,
6151 * print full information only for the first aborted request in order
6152 * to reduce repeated printouts. For other aborted requests only print
6153 * basic details.
6154 */
6155 scsi_print_command(hba->lrb[tag].cmd);
6156 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006157 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006158 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006159 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006160 ufshcd_print_pwr_info(hba);
6161 ufshcd_print_trs(hba, 1 << tag, true);
6162 } else {
6163 ufshcd_print_trs(hba, 1 << tag, false);
6164 }
6165 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006166
6167 /* Skip task abort in case previous aborts failed and report failure */
6168 if (lrbp->req_abort_skip) {
6169 err = -EIO;
6170 goto out;
6171 }
6172
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306173 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6174 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6175 UFS_QUERY_TASK, &resp);
6176 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6177 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006178 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6179 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306180 break;
6181 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306182 /*
6183 * cmd not pending in the device, check if it is
6184 * in transition.
6185 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006186 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6187 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306188 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6189 if (reg & (1 << tag)) {
6190 /* sleep for max. 200us to stabilize */
6191 usleep_range(100, 200);
6192 continue;
6193 }
6194 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006195 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6196 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306197 goto out;
6198 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006199 dev_err(hba->dev,
6200 "%s: no response from device. tag = %d, err %d\n",
6201 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306202 if (!err)
6203 err = resp; /* service response error */
6204 goto out;
6205 }
6206 }
6207
6208 if (!poll_cnt) {
6209 err = -EBUSY;
6210 goto out;
6211 }
6212
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306213 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6214 UFS_ABORT_TASK, &resp);
6215 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006216 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306217 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006218 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6219 __func__, tag, err);
6220 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306221 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306222 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306223
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306224 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006225 if (err) {
6226 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6227 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306228 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006229 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306230
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306231 scsi_dma_unmap(cmd);
6232
6233 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006234 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306235 hba->lrb[tag].cmd = NULL;
6236 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306237
6238 clear_bit_unlock(tag, &hba->lrb_in_use);
6239 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006240
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306241out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306242 if (!err) {
6243 err = SUCCESS;
6244 } else {
6245 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006246 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306247 err = FAILED;
6248 }
6249
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006250 /*
6251 * This ufshcd_release() corresponds to the original scsi cmd that got
6252 * aborted here (as we won't get any IRQ for it).
6253 */
6254 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306255 return err;
6256}
6257
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306258/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306259 * ufshcd_host_reset_and_restore - reset and restore host controller
6260 * @hba: per-adapter instance
6261 *
6262 * Note that host controller reset may issue DME_RESET to
6263 * local and remote (device) Uni-Pro stack and the attributes
6264 * are reset to default state.
6265 *
6266 * Returns zero on success, non-zero on failure
6267 */
6268static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6269{
6270 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306271 unsigned long flags;
6272
6273 /* Reset the host controller */
6274 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006275 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306276 spin_unlock_irqrestore(hba->host->host_lock, flags);
6277
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006278 /* scale up clocks to max frequency before full reinitialization */
6279 ufshcd_scale_clks(hba, true);
6280
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306281 err = ufshcd_hba_enable(hba);
6282 if (err)
6283 goto out;
6284
6285 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006286 err = ufshcd_probe_hba(hba);
6287
6288 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306289 err = -EIO;
6290out:
6291 if (err)
6292 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006293 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306294 return err;
6295}
6296
6297/**
6298 * ufshcd_reset_and_restore - reset and re-initialize host/device
6299 * @hba: per-adapter instance
6300 *
6301 * Reset and recover device, host and re-establish link. This
6302 * is helpful to recover the communication in fatal error conditions.
6303 *
6304 * Returns zero on success, non-zero on failure
6305 */
6306static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6307{
6308 int err = 0;
6309 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006310 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306311
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006312 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006313 /* Reset the attached device */
6314 ufshcd_vops_device_reset(hba);
6315
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006316 err = ufshcd_host_reset_and_restore(hba);
6317 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306318
6319 /*
6320 * After reset the door-bell might be cleared, complete
6321 * outstanding requests in s/w here.
6322 */
6323 spin_lock_irqsave(hba->host->host_lock, flags);
6324 ufshcd_transfer_req_compl(hba);
6325 ufshcd_tmc_handler(hba);
6326 spin_unlock_irqrestore(hba->host->host_lock, flags);
6327
6328 return err;
6329}
6330
6331/**
6332 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006333 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306334 *
6335 * Returns SUCCESS/FAILED
6336 */
6337static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6338{
6339 int err;
6340 unsigned long flags;
6341 struct ufs_hba *hba;
6342
6343 hba = shost_priv(cmd->device->host);
6344
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006345 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306346 /*
6347 * Check if there is any race with fatal error handling.
6348 * If so, wait for it to complete. Even though fatal error
6349 * handling does reset and restore in some cases, don't assume
6350 * anything out of it. We are just avoiding race here.
6351 */
6352 do {
6353 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306354 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006355 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6356 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306357 break;
6358 spin_unlock_irqrestore(hba->host->host_lock, flags);
6359 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306360 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306361 } while (1);
6362
6363 hba->ufshcd_state = UFSHCD_STATE_RESET;
6364 ufshcd_set_eh_in_progress(hba);
6365 spin_unlock_irqrestore(hba->host->host_lock, flags);
6366
6367 err = ufshcd_reset_and_restore(hba);
6368
6369 spin_lock_irqsave(hba->host->host_lock, flags);
6370 if (!err) {
6371 err = SUCCESS;
6372 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6373 } else {
6374 err = FAILED;
6375 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6376 }
6377 ufshcd_clear_eh_in_progress(hba);
6378 spin_unlock_irqrestore(hba->host->host_lock, flags);
6379
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006380 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306381 return err;
6382}
6383
6384/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006385 * ufshcd_get_max_icc_level - calculate the ICC level
6386 * @sup_curr_uA: max. current supported by the regulator
6387 * @start_scan: row at the desc table to start scan from
6388 * @buff: power descriptor buffer
6389 *
6390 * Returns calculated max ICC level for specific regulator
6391 */
6392static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6393{
6394 int i;
6395 int curr_uA;
6396 u16 data;
6397 u16 unit;
6398
6399 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006400 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006401 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6402 ATTR_ICC_LVL_UNIT_OFFSET;
6403 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6404 switch (unit) {
6405 case UFSHCD_NANO_AMP:
6406 curr_uA = curr_uA / 1000;
6407 break;
6408 case UFSHCD_MILI_AMP:
6409 curr_uA = curr_uA * 1000;
6410 break;
6411 case UFSHCD_AMP:
6412 curr_uA = curr_uA * 1000 * 1000;
6413 break;
6414 case UFSHCD_MICRO_AMP:
6415 default:
6416 break;
6417 }
6418 if (sup_curr_uA >= curr_uA)
6419 break;
6420 }
6421 if (i < 0) {
6422 i = 0;
6423 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6424 }
6425
6426 return (u32)i;
6427}
6428
6429/**
6430 * ufshcd_calc_icc_level - calculate the max ICC level
6431 * In case regulators are not initialized we'll return 0
6432 * @hba: per-adapter instance
6433 * @desc_buf: power descriptor buffer to extract ICC levels from.
6434 * @len: length of desc_buff
6435 *
6436 * Returns calculated ICC level
6437 */
6438static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6439 u8 *desc_buf, int len)
6440{
6441 u32 icc_level = 0;
6442
6443 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6444 !hba->vreg_info.vccq2) {
6445 dev_err(hba->dev,
6446 "%s: Regulator capability was not set, actvIccLevel=%d",
6447 __func__, icc_level);
6448 goto out;
6449 }
6450
Stanley Chu0487fff2019-03-28 17:16:25 +08006451 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006452 icc_level = ufshcd_get_max_icc_level(
6453 hba->vreg_info.vcc->max_uA,
6454 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6455 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6456
Stanley Chu0487fff2019-03-28 17:16:25 +08006457 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006458 icc_level = ufshcd_get_max_icc_level(
6459 hba->vreg_info.vccq->max_uA,
6460 icc_level,
6461 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6462
Stanley Chu0487fff2019-03-28 17:16:25 +08006463 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006464 icc_level = ufshcd_get_max_icc_level(
6465 hba->vreg_info.vccq2->max_uA,
6466 icc_level,
6467 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6468out:
6469 return icc_level;
6470}
6471
6472static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6473{
6474 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006475 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006476 u8 *desc_buf;
6477
6478 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6479 if (!desc_buf)
6480 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006481
6482 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6483 if (ret) {
6484 dev_err(hba->dev,
6485 "%s: Failed reading power descriptor.len = %d ret = %d",
6486 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006487 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006488 }
6489
6490 hba->init_prefetch_data.icc_level =
6491 ufshcd_find_max_sup_active_icc_level(hba,
6492 desc_buf, buff_len);
6493 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6494 __func__, hba->init_prefetch_data.icc_level);
6495
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006496 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6497 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6498 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006499
6500 if (ret)
6501 dev_err(hba->dev,
6502 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6503 __func__, hba->init_prefetch_data.icc_level , ret);
6504
Kees Cookbbe21d72018-05-02 16:58:09 -07006505out:
6506 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006507}
6508
6509/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006510 * ufshcd_scsi_add_wlus - Adds required W-LUs
6511 * @hba: per-adapter instance
6512 *
6513 * UFS device specification requires the UFS devices to support 4 well known
6514 * logical units:
6515 * "REPORT_LUNS" (address: 01h)
6516 * "UFS Device" (address: 50h)
6517 * "RPMB" (address: 44h)
6518 * "BOOT" (address: 30h)
6519 * UFS device's power management needs to be controlled by "POWER CONDITION"
6520 * field of SSU (START STOP UNIT) command. But this "power condition" field
6521 * will take effect only when its sent to "UFS device" well known logical unit
6522 * hence we require the scsi_device instance to represent this logical unit in
6523 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006524 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006525 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6526 * Block) LU so user space process can control this LU. User space may also
6527 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006528 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006529 * This function adds scsi device instances for each of all well known LUs
6530 * (except "REPORT LUNS" LU).
6531 *
6532 * Returns zero on success (all required W-LUs are added successfully),
6533 * non-zero error value on failure (if failed to add any of the required W-LU).
6534 */
6535static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6536{
6537 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006538 struct scsi_device *sdev_rpmb;
6539 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006540
6541 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6542 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6543 if (IS_ERR(hba->sdev_ufs_device)) {
6544 ret = PTR_ERR(hba->sdev_ufs_device);
6545 hba->sdev_ufs_device = NULL;
6546 goto out;
6547 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006548 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006549
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006550 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006551 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006552 if (IS_ERR(sdev_rpmb)) {
6553 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006554 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006555 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006556 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006557
6558 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6559 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6560 if (IS_ERR(sdev_boot))
6561 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6562 else
6563 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006564 goto out;
6565
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006566remove_sdev_ufs_device:
6567 scsi_remove_device(hba->sdev_ufs_device);
6568out:
6569 return ret;
6570}
6571
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006572static int ufs_get_device_desc(struct ufs_hba *hba,
6573 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006574{
6575 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006576 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006577 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006578 u8 *desc_buf;
6579
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006580 if (!dev_desc)
6581 return -EINVAL;
6582
Kees Cookbbe21d72018-05-02 16:58:09 -07006583 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6584 QUERY_DESC_MAX_SIZE + 1);
6585 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6586 if (!desc_buf) {
6587 err = -ENOMEM;
6588 goto out;
6589 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006590
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006591 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006592 if (err) {
6593 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6594 __func__, err);
6595 goto out;
6596 }
6597
6598 /*
6599 * getting vendor (manufacturerID) and Bank Index in big endian
6600 * format
6601 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006602 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006603 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6604
6605 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006606 err = ufshcd_read_string_desc(hba, model_index,
6607 &dev_desc->model, SD_ASCII_STD);
6608 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006609 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6610 __func__, err);
6611 goto out;
6612 }
6613
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006614 /*
6615 * ufshcd_read_string_desc returns size of the string
6616 * reset the error value
6617 */
6618 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006619
6620out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006621 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006622 return err;
6623}
6624
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006625static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc)
6626{
6627 kfree(dev_desc->model);
6628 dev_desc->model = NULL;
6629}
6630
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006631static void ufs_fixup_device_setup(struct ufs_hba *hba,
6632 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006633{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006634 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006635
6636 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006637 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6638 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006639 ((dev_desc->model &&
6640 STR_PRFX_EQUAL(f->card.model, dev_desc->model)) ||
6641 !strcmp(f->card.model, UFS_ANY_MODEL)))
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006642 hba->dev_quirks |= f->quirk;
6643 }
6644}
6645
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006646/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006647 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6648 * @hba: per-adapter instance
6649 *
6650 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6651 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6652 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6653 * the hibern8 exit latency.
6654 *
6655 * Returns zero on success, non-zero error value on failure.
6656 */
6657static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6658{
6659 int ret = 0;
6660 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6661
6662 ret = ufshcd_dme_peer_get(hba,
6663 UIC_ARG_MIB_SEL(
6664 RX_MIN_ACTIVATETIME_CAPABILITY,
6665 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6666 &peer_rx_min_activatetime);
6667 if (ret)
6668 goto out;
6669
6670 /* make sure proper unit conversion is applied */
6671 tuned_pa_tactivate =
6672 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6673 / PA_TACTIVATE_TIME_UNIT_US);
6674 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6675 tuned_pa_tactivate);
6676
6677out:
6678 return ret;
6679}
6680
6681/**
6682 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6683 * @hba: per-adapter instance
6684 *
6685 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6686 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6687 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6688 * This optimal value can help reduce the hibern8 exit latency.
6689 *
6690 * Returns zero on success, non-zero error value on failure.
6691 */
6692static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6693{
6694 int ret = 0;
6695 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6696 u32 max_hibern8_time, tuned_pa_hibern8time;
6697
6698 ret = ufshcd_dme_get(hba,
6699 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6700 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6701 &local_tx_hibern8_time_cap);
6702 if (ret)
6703 goto out;
6704
6705 ret = ufshcd_dme_peer_get(hba,
6706 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6707 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6708 &peer_rx_hibern8_time_cap);
6709 if (ret)
6710 goto out;
6711
6712 max_hibern8_time = max(local_tx_hibern8_time_cap,
6713 peer_rx_hibern8_time_cap);
6714 /* make sure proper unit conversion is applied */
6715 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6716 / PA_HIBERN8_TIME_UNIT_US);
6717 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6718 tuned_pa_hibern8time);
6719out:
6720 return ret;
6721}
6722
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006723/**
6724 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6725 * less than device PA_TACTIVATE time.
6726 * @hba: per-adapter instance
6727 *
6728 * Some UFS devices require host PA_TACTIVATE to be lower than device
6729 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6730 * for such devices.
6731 *
6732 * Returns zero on success, non-zero error value on failure.
6733 */
6734static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6735{
6736 int ret = 0;
6737 u32 granularity, peer_granularity;
6738 u32 pa_tactivate, peer_pa_tactivate;
6739 u32 pa_tactivate_us, peer_pa_tactivate_us;
6740 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6741
6742 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6743 &granularity);
6744 if (ret)
6745 goto out;
6746
6747 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6748 &peer_granularity);
6749 if (ret)
6750 goto out;
6751
6752 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6753 (granularity > PA_GRANULARITY_MAX_VAL)) {
6754 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6755 __func__, granularity);
6756 return -EINVAL;
6757 }
6758
6759 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6760 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6761 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6762 __func__, peer_granularity);
6763 return -EINVAL;
6764 }
6765
6766 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6767 if (ret)
6768 goto out;
6769
6770 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6771 &peer_pa_tactivate);
6772 if (ret)
6773 goto out;
6774
6775 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6776 peer_pa_tactivate_us = peer_pa_tactivate *
6777 gran_to_us_table[peer_granularity - 1];
6778
6779 if (pa_tactivate_us > peer_pa_tactivate_us) {
6780 u32 new_peer_pa_tactivate;
6781
6782 new_peer_pa_tactivate = pa_tactivate_us /
6783 gran_to_us_table[peer_granularity - 1];
6784 new_peer_pa_tactivate++;
6785 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6786 new_peer_pa_tactivate);
6787 }
6788
6789out:
6790 return ret;
6791}
6792
Yaniv Gardi37113102016-03-10 17:37:16 +02006793static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6794{
6795 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6796 ufshcd_tune_pa_tactivate(hba);
6797 ufshcd_tune_pa_hibern8time(hba);
6798 }
6799
6800 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6801 /* set 1ms timeout for PA_TACTIVATE */
6802 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006803
6804 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6805 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006806
6807 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006808}
6809
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006810static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6811{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006812 hba->ufs_stats.hibern8_exit_cnt = 0;
6813 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006814 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006815}
6816
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006817static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6818{
6819 int err;
6820
6821 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6822 &hba->desc_size.dev_desc);
6823 if (err)
6824 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6825
6826 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6827 &hba->desc_size.pwr_desc);
6828 if (err)
6829 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6830
6831 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6832 &hba->desc_size.interc_desc);
6833 if (err)
6834 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6835
6836 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6837 &hba->desc_size.conf_desc);
6838 if (err)
6839 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6840
6841 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6842 &hba->desc_size.unit_desc);
6843 if (err)
6844 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6845
6846 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6847 &hba->desc_size.geom_desc);
6848 if (err)
6849 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00006850
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006851 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6852 &hba->desc_size.hlth_desc);
6853 if (err)
6854 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006855}
6856
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306857static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6858 {19200000, REF_CLK_FREQ_19_2_MHZ},
6859 {26000000, REF_CLK_FREQ_26_MHZ},
6860 {38400000, REF_CLK_FREQ_38_4_MHZ},
6861 {52000000, REF_CLK_FREQ_52_MHZ},
6862 {0, REF_CLK_FREQ_INVAL},
6863};
6864
6865static enum ufs_ref_clk_freq
6866ufs_get_bref_clk_from_hz(unsigned long freq)
6867{
6868 int i;
6869
6870 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6871 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6872 return ufs_ref_clk_freqs[i].val;
6873
6874 return REF_CLK_FREQ_INVAL;
6875}
6876
6877void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6878{
6879 unsigned long freq;
6880
6881 freq = clk_get_rate(refclk);
6882
6883 hba->dev_ref_clk_freq =
6884 ufs_get_bref_clk_from_hz(freq);
6885
6886 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6887 dev_err(hba->dev,
6888 "invalid ref_clk setting = %ld\n", freq);
6889}
6890
6891static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6892{
6893 int err;
6894 u32 ref_clk;
6895 u32 freq = hba->dev_ref_clk_freq;
6896
6897 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6898 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6899
6900 if (err) {
6901 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6902 err);
6903 goto out;
6904 }
6905
6906 if (ref_clk == freq)
6907 goto out; /* nothing to update */
6908
6909 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6910 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6911
6912 if (err) {
6913 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6914 ufs_ref_clk_freqs[freq].freq_hz);
6915 goto out;
6916 }
6917
6918 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6919 ufs_ref_clk_freqs[freq].freq_hz);
6920
6921out:
6922 return err;
6923}
6924
Yaniv Gardi37113102016-03-10 17:37:16 +02006925/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006926 * ufshcd_probe_hba - probe hba to detect device and initialize
6927 * @hba: per-adapter instance
6928 *
6929 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306930 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006931static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306932{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006933 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306934 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006935 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306936
6937 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306938 if (ret)
6939 goto out;
6940
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006941 /* set the default level for urgent bkops */
6942 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6943 hba->is_urgent_bkops_lvl_checked = false;
6944
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006945 /* Debug counters initialization */
6946 ufshcd_clear_dbg_ufs_stats(hba);
6947
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006948 /* UniPro link is active now */
6949 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306950
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306951 ret = ufshcd_verify_dev_init(hba);
6952 if (ret)
6953 goto out;
6954
Dolev Raviv68078d52013-07-30 00:35:58 +05306955 ret = ufshcd_complete_dev_init(hba);
6956 if (ret)
6957 goto out;
6958
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006959 /* Init check for device descriptor sizes */
6960 ufshcd_init_desc_sizes(hba);
6961
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006962 ret = ufs_get_device_desc(hba, &card);
6963 if (ret) {
6964 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6965 __func__, ret);
6966 goto out;
6967 }
6968
6969 ufs_fixup_device_setup(hba, &card);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006970 ufs_put_device_desc(&card);
6971
Yaniv Gardi37113102016-03-10 17:37:16 +02006972 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006973
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006974 /* UFS device is also active now */
6975 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306976 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006977 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306978
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006979 if (ufshcd_get_max_pwr_mode(hba)) {
6980 dev_err(hba->dev,
6981 "%s: Failed getting max supported power mode\n",
6982 __func__);
6983 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306984 /*
6985 * Set the right value to bRefClkFreq before attempting to
6986 * switch to HS gears.
6987 */
6988 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6989 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006990 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006991 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006992 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6993 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006994 goto out;
6995 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006996 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006997
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006998 /* set the state as operational after switching to desired gear */
6999 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007000
Can Guo71d848b2019-11-14 22:09:26 -08007001 /* Enable Auto-Hibernate if configured */
7002 ufshcd_auto_hibern8_enable(hba);
7003
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007004 /*
7005 * If we are in error handling context or in power management callbacks
7006 * context, no need to scan the host
7007 */
7008 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7009 bool flag;
7010
7011 /* clear any previous UFS device information */
7012 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02007013 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7014 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007015 hba->dev_info.f_power_on_wp_en = flag;
7016
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007017 if (!hba->is_init_prefetch)
7018 ufshcd_init_icc_levels(hba);
7019
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007020 /* Add required well known logical units to scsi mid layer */
7021 if (ufshcd_scsi_add_wlus(hba))
7022 goto out;
7023
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007024 /* Initialize devfreq after UFS device is detected */
7025 if (ufshcd_is_clkscaling_supported(hba)) {
7026 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7027 &hba->pwr_info,
7028 sizeof(struct ufs_pa_layer_attr));
7029 hba->clk_scaling.saved_pwr_info.is_valid = true;
7030 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07007031 ret = ufshcd_devfreq_init(hba);
7032 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007033 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007034 }
7035 hba->clk_scaling.is_allowed = true;
7036 }
7037
Avri Altmandf032bf2018-10-07 17:30:35 +03007038 ufs_bsg_probe(hba);
7039
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307040 scsi_scan_host(hba->host);
7041 pm_runtime_put_sync(hba->dev);
7042 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007043
7044 if (!hba->is_init_prefetch)
7045 hba->is_init_prefetch = true;
7046
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307047out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007048 /*
7049 * If we failed to initialize the device or the device is not
7050 * present, turn off the power/clocks etc.
7051 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007052 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7053 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05307054 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007055 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007056 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007057
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007058 trace_ufshcd_init(dev_name(hba->dev), ret,
7059 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007060 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007061 return ret;
7062}
7063
7064/**
7065 * ufshcd_async_scan - asynchronous execution for probing hba
7066 * @data: data pointer to pass to this function
7067 * @cookie: cookie data
7068 */
7069static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7070{
7071 struct ufs_hba *hba = (struct ufs_hba *)data;
7072
7073 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307074}
7075
Yaniv Gardif550c652016-03-10 17:37:07 +02007076static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7077{
7078 unsigned long flags;
7079 struct Scsi_Host *host;
7080 struct ufs_hba *hba;
7081 int index;
7082 bool found = false;
7083
7084 if (!scmd || !scmd->device || !scmd->device->host)
Christoph Hellwig66005932018-05-29 15:52:29 +02007085 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007086
7087 host = scmd->device->host;
7088 hba = shost_priv(host);
7089 if (!hba)
Christoph Hellwig66005932018-05-29 15:52:29 +02007090 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007091
7092 spin_lock_irqsave(host->host_lock, flags);
7093
7094 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7095 if (hba->lrb[index].cmd == scmd) {
7096 found = true;
7097 break;
7098 }
7099 }
7100
7101 spin_unlock_irqrestore(host->host_lock, flags);
7102
7103 /*
7104 * Bypass SCSI error handling and reset the block layer timer if this
7105 * SCSI command was not actually dispatched to UFS driver, otherwise
7106 * let SCSI layer handle the error as usual.
7107 */
Christoph Hellwig66005932018-05-29 15:52:29 +02007108 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
Yaniv Gardif550c652016-03-10 17:37:07 +02007109}
7110
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007111static const struct attribute_group *ufshcd_driver_groups[] = {
7112 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007113 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007114 NULL,
7115};
7116
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307117static struct scsi_host_template ufshcd_driver_template = {
7118 .module = THIS_MODULE,
7119 .name = UFSHCD,
7120 .proc_name = UFSHCD,
7121 .queuecommand = ufshcd_queuecommand,
7122 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007123 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307124 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007125 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307126 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307127 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7128 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02007129 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307130 .this_id = -1,
7131 .sg_tablesize = SG_ALL,
7132 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7133 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007134 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007135 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007136 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007137 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007138 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007139 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307140};
7141
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007142static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7143 int ua)
7144{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007145 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007146
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007147 if (!vreg)
7148 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007149
Stanley Chu0487fff2019-03-28 17:16:25 +08007150 /*
7151 * "set_load" operation shall be required on those regulators
7152 * which specifically configured current limitation. Otherwise
7153 * zero max_uA may cause unexpected behavior when regulator is
7154 * enabled or set as high power mode.
7155 */
7156 if (!vreg->max_uA)
7157 return 0;
7158
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007159 ret = regulator_set_load(vreg->reg, ua);
7160 if (ret < 0) {
7161 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7162 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007163 }
7164
7165 return ret;
7166}
7167
7168static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7169 struct ufs_vreg *vreg)
7170{
Marc Gonzalez73067982019-02-27 11:41:45 +01007171 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007172}
7173
7174static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7175 struct ufs_vreg *vreg)
7176{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007177 if (!vreg)
7178 return 0;
7179
Marc Gonzalez73067982019-02-27 11:41:45 +01007180 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007181}
7182
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007183static int ufshcd_config_vreg(struct device *dev,
7184 struct ufs_vreg *vreg, bool on)
7185{
7186 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007187 struct regulator *reg;
7188 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007189 int min_uV, uA_load;
7190
7191 BUG_ON(!vreg);
7192
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007193 reg = vreg->reg;
7194 name = vreg->name;
7195
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007196 if (regulator_count_voltages(reg) > 0) {
Stanley Chu3b141e82019-03-28 17:16:24 +08007197 if (vreg->min_uV && vreg->max_uV) {
7198 min_uV = on ? vreg->min_uV : 0;
7199 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7200 if (ret) {
7201 dev_err(dev,
7202 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007203 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007204 goto out;
7205 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007206 }
7207
7208 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007209 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7210 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007211 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007212 }
7213out:
7214 return ret;
7215}
7216
7217static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7218{
7219 int ret = 0;
7220
Marc Gonzalez73067982019-02-27 11:41:45 +01007221 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007222 goto out;
7223
7224 ret = ufshcd_config_vreg(dev, vreg, true);
7225 if (!ret)
7226 ret = regulator_enable(vreg->reg);
7227
7228 if (!ret)
7229 vreg->enabled = true;
7230 else
7231 dev_err(dev, "%s: %s enable failed, err=%d\n",
7232 __func__, vreg->name, ret);
7233out:
7234 return ret;
7235}
7236
7237static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7238{
7239 int ret = 0;
7240
Marc Gonzalez73067982019-02-27 11:41:45 +01007241 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007242 goto out;
7243
7244 ret = regulator_disable(vreg->reg);
7245
7246 if (!ret) {
7247 /* ignore errors on applying disable config */
7248 ufshcd_config_vreg(dev, vreg, false);
7249 vreg->enabled = false;
7250 } else {
7251 dev_err(dev, "%s: %s disable failed, err=%d\n",
7252 __func__, vreg->name, ret);
7253 }
7254out:
7255 return ret;
7256}
7257
7258static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7259{
7260 int ret = 0;
7261 struct device *dev = hba->dev;
7262 struct ufs_vreg_info *info = &hba->vreg_info;
7263
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007264 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7265 if (ret)
7266 goto out;
7267
7268 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7269 if (ret)
7270 goto out;
7271
7272 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7273 if (ret)
7274 goto out;
7275
7276out:
7277 if (ret) {
7278 ufshcd_toggle_vreg(dev, info->vccq2, false);
7279 ufshcd_toggle_vreg(dev, info->vccq, false);
7280 ufshcd_toggle_vreg(dev, info->vcc, false);
7281 }
7282 return ret;
7283}
7284
Raviv Shvili6a771a62014-09-25 15:32:24 +03007285static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7286{
7287 struct ufs_vreg_info *info = &hba->vreg_info;
7288
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007289 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007290}
7291
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007292static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7293{
7294 int ret = 0;
7295
7296 if (!vreg)
7297 goto out;
7298
7299 vreg->reg = devm_regulator_get(dev, vreg->name);
7300 if (IS_ERR(vreg->reg)) {
7301 ret = PTR_ERR(vreg->reg);
7302 dev_err(dev, "%s: %s get failed, err=%d\n",
7303 __func__, vreg->name, ret);
7304 }
7305out:
7306 return ret;
7307}
7308
7309static int ufshcd_init_vreg(struct ufs_hba *hba)
7310{
7311 int ret = 0;
7312 struct device *dev = hba->dev;
7313 struct ufs_vreg_info *info = &hba->vreg_info;
7314
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007315 ret = ufshcd_get_vreg(dev, info->vcc);
7316 if (ret)
7317 goto out;
7318
7319 ret = ufshcd_get_vreg(dev, info->vccq);
7320 if (ret)
7321 goto out;
7322
7323 ret = ufshcd_get_vreg(dev, info->vccq2);
7324out:
7325 return ret;
7326}
7327
Raviv Shvili6a771a62014-09-25 15:32:24 +03007328static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7329{
7330 struct ufs_vreg_info *info = &hba->vreg_info;
7331
7332 if (info)
7333 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7334
7335 return 0;
7336}
7337
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007338static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7339 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007340{
7341 int ret = 0;
7342 struct ufs_clk_info *clki;
7343 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007344 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007345 ktime_t start = ktime_get();
7346 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007347
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007348 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007349 goto out;
7350
Subhash Jadavanib3344562018-05-03 16:37:17 +05307351 /*
7352 * vendor specific setup_clocks ops may depend on clocks managed by
7353 * this standard driver hence call the vendor specific setup_clocks
7354 * before disabling the clocks managed here.
7355 */
7356 if (!on) {
7357 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7358 if (ret)
7359 return ret;
7360 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007361
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007362 list_for_each_entry(clki, head, list) {
7363 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007364 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7365 continue;
7366
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007367 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007368 if (on && !clki->enabled) {
7369 ret = clk_prepare_enable(clki->clk);
7370 if (ret) {
7371 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7372 __func__, clki->name, ret);
7373 goto out;
7374 }
7375 } else if (!on && clki->enabled) {
7376 clk_disable_unprepare(clki->clk);
7377 }
7378 clki->enabled = on;
7379 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7380 clki->name, on ? "en" : "dis");
7381 }
7382 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007383
Subhash Jadavanib3344562018-05-03 16:37:17 +05307384 /*
7385 * vendor specific setup_clocks ops may depend on clocks managed by
7386 * this standard driver hence call the vendor specific setup_clocks
7387 * after enabling the clocks managed here.
7388 */
7389 if (on) {
7390 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7391 if (ret)
7392 return ret;
7393 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007394
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007395out:
7396 if (ret) {
7397 list_for_each_entry(clki, head, list) {
7398 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7399 clk_disable_unprepare(clki->clk);
7400 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007401 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007402 spin_lock_irqsave(hba->host->host_lock, flags);
7403 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007404 trace_ufshcd_clk_gating(dev_name(hba->dev),
7405 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007406 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007407 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007408
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007409 if (clk_state_changed)
7410 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7411 (on ? "on" : "off"),
7412 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007413 return ret;
7414}
7415
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007416static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7417{
7418 return __ufshcd_setup_clocks(hba, on, false);
7419}
7420
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007421static int ufshcd_init_clocks(struct ufs_hba *hba)
7422{
7423 int ret = 0;
7424 struct ufs_clk_info *clki;
7425 struct device *dev = hba->dev;
7426 struct list_head *head = &hba->clk_list_head;
7427
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007428 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007429 goto out;
7430
7431 list_for_each_entry(clki, head, list) {
7432 if (!clki->name)
7433 continue;
7434
7435 clki->clk = devm_clk_get(dev, clki->name);
7436 if (IS_ERR(clki->clk)) {
7437 ret = PTR_ERR(clki->clk);
7438 dev_err(dev, "%s: %s clk get failed, %d\n",
7439 __func__, clki->name, ret);
7440 goto out;
7441 }
7442
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307443 /*
7444 * Parse device ref clk freq as per device tree "ref_clk".
7445 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7446 * in ufshcd_alloc_host().
7447 */
7448 if (!strcmp(clki->name, "ref_clk"))
7449 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7450
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007451 if (clki->max_freq) {
7452 ret = clk_set_rate(clki->clk, clki->max_freq);
7453 if (ret) {
7454 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7455 __func__, clki->name,
7456 clki->max_freq, ret);
7457 goto out;
7458 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007459 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007460 }
7461 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7462 clki->name, clk_get_rate(clki->clk));
7463 }
7464out:
7465 return ret;
7466}
7467
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007468static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7469{
7470 int err = 0;
7471
7472 if (!hba->vops)
7473 goto out;
7474
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007475 err = ufshcd_vops_init(hba);
7476 if (err)
7477 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007478
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007479 err = ufshcd_vops_setup_regulators(hba, true);
7480 if (err)
7481 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007482
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007483 goto out;
7484
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007485out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007486 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007487out:
7488 if (err)
7489 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007490 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007491 return err;
7492}
7493
7494static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7495{
7496 if (!hba->vops)
7497 return;
7498
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007499 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007500
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007501 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007502}
7503
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007504static int ufshcd_hba_init(struct ufs_hba *hba)
7505{
7506 int err;
7507
Raviv Shvili6a771a62014-09-25 15:32:24 +03007508 /*
7509 * Handle host controller power separately from the UFS device power
7510 * rails as it will help controlling the UFS host controller power
7511 * collapse easily which is different than UFS device power collapse.
7512 * Also, enable the host controller power before we go ahead with rest
7513 * of the initialization here.
7514 */
7515 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007516 if (err)
7517 goto out;
7518
Raviv Shvili6a771a62014-09-25 15:32:24 +03007519 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007520 if (err)
7521 goto out;
7522
Raviv Shvili6a771a62014-09-25 15:32:24 +03007523 err = ufshcd_init_clocks(hba);
7524 if (err)
7525 goto out_disable_hba_vreg;
7526
7527 err = ufshcd_setup_clocks(hba, true);
7528 if (err)
7529 goto out_disable_hba_vreg;
7530
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007531 err = ufshcd_init_vreg(hba);
7532 if (err)
7533 goto out_disable_clks;
7534
7535 err = ufshcd_setup_vreg(hba, true);
7536 if (err)
7537 goto out_disable_clks;
7538
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007539 err = ufshcd_variant_hba_init(hba);
7540 if (err)
7541 goto out_disable_vreg;
7542
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007543 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007544 goto out;
7545
7546out_disable_vreg:
7547 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007548out_disable_clks:
7549 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007550out_disable_hba_vreg:
7551 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007552out:
7553 return err;
7554}
7555
7556static void ufshcd_hba_exit(struct ufs_hba *hba)
7557{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007558 if (hba->is_powered) {
7559 ufshcd_variant_hba_exit(hba);
7560 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007561 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307562 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007563 if (hba->devfreq)
7564 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007565 ufshcd_setup_clocks(hba, false);
7566 ufshcd_setup_hba_vreg(hba, false);
7567 hba->is_powered = false;
7568 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007569}
7570
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007571static int
7572ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307573{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007574 unsigned char cmd[6] = {REQUEST_SENSE,
7575 0,
7576 0,
7577 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007578 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007579 0};
7580 char *buffer;
7581 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307582
Avri Altman09a5a242018-11-22 20:04:56 +02007583 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007584 if (!buffer) {
7585 ret = -ENOMEM;
7586 goto out;
7587 }
7588
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007589 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007590 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007591 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007592 if (ret)
7593 pr_err("%s: failed with err %d\n", __func__, ret);
7594
7595 kfree(buffer);
7596out:
7597 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307598}
7599
7600/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007601 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7602 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307603 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007604 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307605 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007606 * Returns 0 if requested power mode is set successfully
7607 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307608 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007609static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7610 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307611{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007612 unsigned char cmd[6] = { START_STOP };
7613 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007614 struct scsi_device *sdp;
7615 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007616 int ret;
7617
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007618 spin_lock_irqsave(hba->host->host_lock, flags);
7619 sdp = hba->sdev_ufs_device;
7620 if (sdp) {
7621 ret = scsi_device_get(sdp);
7622 if (!ret && !scsi_device_online(sdp)) {
7623 ret = -ENODEV;
7624 scsi_device_put(sdp);
7625 }
7626 } else {
7627 ret = -ENODEV;
7628 }
7629 spin_unlock_irqrestore(hba->host->host_lock, flags);
7630
7631 if (ret)
7632 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007633
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307634 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007635 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7636 * handling, which would wait for host to be resumed. Since we know
7637 * we are functional while we are here, skip host resume in error
7638 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307639 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007640 hba->host->eh_noresume = 1;
7641 if (hba->wlun_dev_clr_ua) {
7642 ret = ufshcd_send_request_sense(hba, sdp);
7643 if (ret)
7644 goto out;
7645 /* Unit attention condition is cleared now */
7646 hba->wlun_dev_clr_ua = false;
7647 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307648
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007649 cmd[4] = pwr_mode << 4;
7650
7651 /*
7652 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007653 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007654 * already suspended childs.
7655 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007656 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7657 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007658 if (ret) {
7659 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007660 "START_STOP failed for power mode: %d, result %x\n",
7661 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007662 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007663 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007664 }
7665
7666 if (!ret)
7667 hba->curr_dev_pwr_mode = pwr_mode;
7668out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007669 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007670 hba->host->eh_noresume = 0;
7671 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307672}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307673
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007674static int ufshcd_link_state_transition(struct ufs_hba *hba,
7675 enum uic_link_state req_link_state,
7676 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307677{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007678 int ret = 0;
7679
7680 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307681 return 0;
7682
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007683 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7684 ret = ufshcd_uic_hibern8_enter(hba);
7685 if (!ret)
7686 ufshcd_set_link_hibern8(hba);
7687 else
7688 goto out;
7689 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307690 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007691 * If autobkops is enabled, link can't be turned off because
7692 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307693 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007694 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7695 (!check_for_bkops || (check_for_bkops &&
7696 !hba->auto_bkops_enabled))) {
7697 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007698 * Let's make sure that link is in low power mode, we are doing
7699 * this currently by putting the link in Hibern8. Otherway to
7700 * put the link in low power mode is to send the DME end point
7701 * to device and then send the DME reset command to local
7702 * unipro. But putting the link in hibern8 is much faster.
7703 */
7704 ret = ufshcd_uic_hibern8_enter(hba);
7705 if (ret)
7706 goto out;
7707 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007708 * Change controller state to "reset state" which
7709 * should also put the link in off/reset state
7710 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007711 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007712 /*
7713 * TODO: Check if we need any delay to make sure that
7714 * controller is reset
7715 */
7716 ufshcd_set_link_off(hba);
7717 }
7718
7719out:
7720 return ret;
7721}
7722
7723static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7724{
7725 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007726 * It seems some UFS devices may keep drawing more than sleep current
7727 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7728 * To avoid this situation, add 2ms delay before putting these UFS
7729 * rails in LPM mode.
7730 */
7731 if (!ufshcd_is_link_active(hba) &&
7732 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7733 usleep_range(2000, 2100);
7734
7735 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007736 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7737 * power.
7738 *
7739 * If UFS device and link is in OFF state, all power supplies (VCC,
7740 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7741 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7742 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7743 *
7744 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7745 * in low power state which would save some power.
7746 */
7747 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7748 !hba->dev_info.is_lu_power_on_wp) {
7749 ufshcd_setup_vreg(hba, false);
7750 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7751 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7752 if (!ufshcd_is_link_active(hba)) {
7753 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7754 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7755 }
7756 }
7757}
7758
7759static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7760{
7761 int ret = 0;
7762
7763 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7764 !hba->dev_info.is_lu_power_on_wp) {
7765 ret = ufshcd_setup_vreg(hba, true);
7766 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007767 if (!ret && !ufshcd_is_link_active(hba)) {
7768 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7769 if (ret)
7770 goto vcc_disable;
7771 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7772 if (ret)
7773 goto vccq_lpm;
7774 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007775 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007776 }
7777 goto out;
7778
7779vccq_lpm:
7780 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7781vcc_disable:
7782 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7783out:
7784 return ret;
7785}
7786
7787static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7788{
7789 if (ufshcd_is_link_off(hba))
7790 ufshcd_setup_hba_vreg(hba, false);
7791}
7792
7793static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7794{
7795 if (ufshcd_is_link_off(hba))
7796 ufshcd_setup_hba_vreg(hba, true);
7797}
7798
7799/**
7800 * ufshcd_suspend - helper function for suspend operations
7801 * @hba: per adapter instance
7802 * @pm_op: desired low power operation type
7803 *
7804 * This function will try to put the UFS device and link into low power
7805 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7806 * (System PM level).
7807 *
7808 * If this function is called during shutdown, it will make sure that
7809 * both UFS device and UFS link is powered off.
7810 *
7811 * NOTE: UFS device & link must be active before we enter in this function.
7812 *
7813 * Returns 0 for success and non-zero for failure
7814 */
7815static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7816{
7817 int ret = 0;
7818 enum ufs_pm_level pm_lvl;
7819 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7820 enum uic_link_state req_link_state;
7821
7822 hba->pm_op_in_progress = 1;
7823 if (!ufshcd_is_shutdown_pm(pm_op)) {
7824 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7825 hba->rpm_lvl : hba->spm_lvl;
7826 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7827 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7828 } else {
7829 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7830 req_link_state = UIC_LINK_OFF_STATE;
7831 }
7832
7833 /*
7834 * If we can't transition into any of the low power modes
7835 * just gate the clocks.
7836 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007837 ufshcd_hold(hba, false);
7838 hba->clk_gating.is_suspended = true;
7839
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007840 if (hba->clk_scaling.is_allowed) {
7841 cancel_work_sync(&hba->clk_scaling.suspend_work);
7842 cancel_work_sync(&hba->clk_scaling.resume_work);
7843 ufshcd_suspend_clkscaling(hba);
7844 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007845
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007846 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7847 req_link_state == UIC_LINK_ACTIVE_STATE) {
7848 goto disable_clks;
7849 }
7850
7851 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7852 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007853 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007854
7855 /* UFS device & link must be active before we enter in this function */
7856 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7857 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007858 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007859 }
7860
7861 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007862 if (ufshcd_can_autobkops_during_suspend(hba)) {
7863 /*
7864 * The device is idle with no requests in the queue,
7865 * allow background operations if bkops status shows
7866 * that performance might be impacted.
7867 */
7868 ret = ufshcd_urgent_bkops(hba);
7869 if (ret)
7870 goto enable_gating;
7871 } else {
7872 /* make sure that auto bkops is disabled */
7873 ufshcd_disable_auto_bkops(hba);
7874 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007875 }
7876
7877 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7878 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7879 !ufshcd_is_runtime_pm(pm_op))) {
7880 /* ensure that bkops is disabled */
7881 ufshcd_disable_auto_bkops(hba);
7882 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7883 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007884 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007885 }
7886
7887 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7888 if (ret)
7889 goto set_dev_active;
7890
7891 ufshcd_vreg_set_lpm(hba);
7892
7893disable_clks:
7894 /*
7895 * Call vendor specific suspend callback. As these callbacks may access
7896 * vendor specific host controller register space call them before the
7897 * host clocks are ON.
7898 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007899 ret = ufshcd_vops_suspend(hba, pm_op);
7900 if (ret)
7901 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007902
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007903 if (!ufshcd_is_link_active(hba))
7904 ufshcd_setup_clocks(hba, false);
7905 else
7906 /* If link is active, device ref_clk can't be switched off */
7907 __ufshcd_setup_clocks(hba, false, true);
7908
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007909 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007910 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007911 /*
7912 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007913 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007914 */
7915 ufshcd_disable_irq(hba);
7916 /* Put the host controller in low power mode if possible */
7917 ufshcd_hba_vreg_set_lpm(hba);
7918 goto out;
7919
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007920set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007921 if (hba->clk_scaling.is_allowed)
7922 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007923 ufshcd_vreg_set_hpm(hba);
7924 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7925 ufshcd_set_link_active(hba);
7926 else if (ufshcd_is_link_off(hba))
7927 ufshcd_host_reset_and_restore(hba);
7928set_dev_active:
7929 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7930 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007931enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007932 if (hba->clk_scaling.is_allowed)
7933 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007934 hba->clk_gating.is_suspended = false;
7935 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007936out:
7937 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08007938 if (ret)
7939 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007940 return ret;
7941}
7942
7943/**
7944 * ufshcd_resume - helper function for resume operations
7945 * @hba: per adapter instance
7946 * @pm_op: runtime PM or system PM
7947 *
7948 * This function basically brings the UFS device, UniPro link and controller
7949 * to active state.
7950 *
7951 * Returns 0 for success and non-zero for failure
7952 */
7953static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7954{
7955 int ret;
7956 enum uic_link_state old_link_state;
7957
7958 hba->pm_op_in_progress = 1;
7959 old_link_state = hba->uic_link_state;
7960
7961 ufshcd_hba_vreg_set_hpm(hba);
7962 /* Make sure clocks are enabled before accessing controller */
7963 ret = ufshcd_setup_clocks(hba, true);
7964 if (ret)
7965 goto out;
7966
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007967 /* enable the host irq as host controller would be active soon */
7968 ret = ufshcd_enable_irq(hba);
7969 if (ret)
7970 goto disable_irq_and_vops_clks;
7971
7972 ret = ufshcd_vreg_set_hpm(hba);
7973 if (ret)
7974 goto disable_irq_and_vops_clks;
7975
7976 /*
7977 * Call vendor specific resume callback. As these callbacks may access
7978 * vendor specific host controller register space call them when the
7979 * host clocks are ON.
7980 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007981 ret = ufshcd_vops_resume(hba, pm_op);
7982 if (ret)
7983 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007984
7985 if (ufshcd_is_link_hibern8(hba)) {
7986 ret = ufshcd_uic_hibern8_exit(hba);
7987 if (!ret)
7988 ufshcd_set_link_active(hba);
7989 else
7990 goto vendor_suspend;
7991 } else if (ufshcd_is_link_off(hba)) {
7992 ret = ufshcd_host_reset_and_restore(hba);
7993 /*
7994 * ufshcd_host_reset_and_restore() should have already
7995 * set the link state as active
7996 */
7997 if (ret || !ufshcd_is_link_active(hba))
7998 goto vendor_suspend;
7999 }
8000
8001 if (!ufshcd_is_ufs_dev_active(hba)) {
8002 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8003 if (ret)
8004 goto set_old_link_state;
8005 }
8006
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08008007 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8008 ufshcd_enable_auto_bkops(hba);
8009 else
8010 /*
8011 * If BKOPs operations are urgently needed at this moment then
8012 * keep auto-bkops enabled or else disable it.
8013 */
8014 ufshcd_urgent_bkops(hba);
8015
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008016 hba->clk_gating.is_suspended = false;
8017
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008018 if (hba->clk_scaling.is_allowed)
8019 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008020
Adrian Hunterad448372018-03-20 15:07:38 +02008021 /* Enable Auto-Hibernate if configured */
8022 ufshcd_auto_hibern8_enable(hba);
8023
Can Guo71d848b2019-11-14 22:09:26 -08008024 /* Schedule clock gating in case of no access to UFS device yet */
8025 ufshcd_release(hba);
8026
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008027 goto out;
8028
8029set_old_link_state:
8030 ufshcd_link_state_transition(hba, old_link_state, 0);
8031vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008032 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008033disable_vreg:
8034 ufshcd_vreg_set_lpm(hba);
8035disable_irq_and_vops_clks:
8036 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008037 if (hba->clk_scaling.is_allowed)
8038 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008039 ufshcd_setup_clocks(hba, false);
8040out:
8041 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008042 if (ret)
8043 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008044 return ret;
8045}
8046
8047/**
8048 * ufshcd_system_suspend - system suspend routine
8049 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008050 *
8051 * Check the description of ufshcd_suspend() function for more details.
8052 *
8053 * Returns 0 for success and non-zero for failure
8054 */
8055int ufshcd_system_suspend(struct ufs_hba *hba)
8056{
8057 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008058 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008059
8060 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008061 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008062
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008063 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8064 hba->curr_dev_pwr_mode) &&
8065 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8066 hba->uic_link_state))
8067 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008068
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008069 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008070 /*
8071 * UFS device and/or UFS link low power states during runtime
8072 * suspend seems to be different than what is expected during
8073 * system suspend. Hence runtime resume the devic & link and
8074 * let the system suspend low power states to take effect.
8075 * TODO: If resume takes longer time, we might have optimize
8076 * it in future by not resuming everything if possible.
8077 */
8078 ret = ufshcd_runtime_resume(hba);
8079 if (ret)
8080 goto out;
8081 }
8082
8083 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8084out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008085 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8086 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008087 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008088 if (!ret)
8089 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008090 return ret;
8091}
8092EXPORT_SYMBOL(ufshcd_system_suspend);
8093
8094/**
8095 * ufshcd_system_resume - system resume routine
8096 * @hba: per adapter instance
8097 *
8098 * Returns 0 for success and non-zero for failure
8099 */
8100
8101int ufshcd_system_resume(struct ufs_hba *hba)
8102{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008103 int ret = 0;
8104 ktime_t start = ktime_get();
8105
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008106 if (!hba)
8107 return -EINVAL;
8108
8109 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008110 /*
8111 * Let the runtime resume take care of resuming
8112 * if runtime suspended.
8113 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008114 goto out;
8115 else
8116 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8117out:
8118 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8119 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008120 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008121 if (!ret)
8122 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008123 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008124}
8125EXPORT_SYMBOL(ufshcd_system_resume);
8126
8127/**
8128 * ufshcd_runtime_suspend - runtime suspend routine
8129 * @hba: per adapter instance
8130 *
8131 * Check the description of ufshcd_suspend() function for more details.
8132 *
8133 * Returns 0 for success and non-zero for failure
8134 */
8135int ufshcd_runtime_suspend(struct ufs_hba *hba)
8136{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008137 int ret = 0;
8138 ktime_t start = ktime_get();
8139
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008140 if (!hba)
8141 return -EINVAL;
8142
8143 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008144 goto out;
8145 else
8146 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8147out:
8148 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8149 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008150 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008151 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308152}
8153EXPORT_SYMBOL(ufshcd_runtime_suspend);
8154
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008155/**
8156 * ufshcd_runtime_resume - runtime resume routine
8157 * @hba: per adapter instance
8158 *
8159 * This function basically brings the UFS device, UniPro link and controller
8160 * to active state. Following operations are done in this function:
8161 *
8162 * 1. Turn on all the controller related clocks
8163 * 2. Bring the UniPro link out of Hibernate state
8164 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8165 * to active state.
8166 * 4. If auto-bkops is enabled on the device, disable it.
8167 *
8168 * So following would be the possible power state after this function return
8169 * successfully:
8170 * S1: UFS device in Active state with VCC rail ON
8171 * UniPro link in Active state
8172 * All the UFS/UniPro controller clocks are ON
8173 *
8174 * Returns 0 for success and non-zero for failure
8175 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308176int ufshcd_runtime_resume(struct ufs_hba *hba)
8177{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008178 int ret = 0;
8179 ktime_t start = ktime_get();
8180
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008181 if (!hba)
8182 return -EINVAL;
8183
8184 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008185 goto out;
8186 else
8187 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8188out:
8189 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8190 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008191 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008192 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308193}
8194EXPORT_SYMBOL(ufshcd_runtime_resume);
8195
8196int ufshcd_runtime_idle(struct ufs_hba *hba)
8197{
8198 return 0;
8199}
8200EXPORT_SYMBOL(ufshcd_runtime_idle);
8201
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308202/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008203 * ufshcd_shutdown - shutdown routine
8204 * @hba: per adapter instance
8205 *
8206 * This function would power off both UFS device and UFS link.
8207 *
8208 * Returns 0 always to allow force shutdown even in case of errors.
8209 */
8210int ufshcd_shutdown(struct ufs_hba *hba)
8211{
8212 int ret = 0;
8213
Stanley Chuf51913e2019-09-18 12:20:38 +08008214 if (!hba->is_powered)
8215 goto out;
8216
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008217 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8218 goto out;
8219
8220 if (pm_runtime_suspended(hba->dev)) {
8221 ret = ufshcd_runtime_resume(hba);
8222 if (ret)
8223 goto out;
8224 }
8225
8226 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8227out:
8228 if (ret)
8229 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8230 /* allow force shutdown even in case of errors */
8231 return 0;
8232}
8233EXPORT_SYMBOL(ufshcd_shutdown);
8234
8235/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308236 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308237 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008238 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308239 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308240void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308241{
Avri Altmandf032bf2018-10-07 17:30:35 +03008242 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008243 ufs_sysfs_remove_nodes(hba->dev);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308244 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308245 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308246 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008247 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308248
Vivek Gautameebcc192018-08-07 23:17:39 +05308249 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008250 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008251 if (ufshcd_is_clkscaling_supported(hba))
8252 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008253 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308254}
8255EXPORT_SYMBOL_GPL(ufshcd_remove);
8256
8257/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008258 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8259 * @hba: pointer to Host Bus Adapter (HBA)
8260 */
8261void ufshcd_dealloc_host(struct ufs_hba *hba)
8262{
8263 scsi_host_put(hba->host);
8264}
8265EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8266
8267/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008268 * ufshcd_set_dma_mask - Set dma mask based on the controller
8269 * addressing capability
8270 * @hba: per adapter instance
8271 *
8272 * Returns 0 for success, non-zero for failure
8273 */
8274static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8275{
8276 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8277 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8278 return 0;
8279 }
8280 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8281}
8282
8283/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008284 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308285 * @dev: pointer to device handle
8286 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308287 * Returns 0 on success, non-zero value on failure
8288 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008289int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308290{
8291 struct Scsi_Host *host;
8292 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008293 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308294
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308295 if (!dev) {
8296 dev_err(dev,
8297 "Invalid memory reference for dev is NULL\n");
8298 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308299 goto out_error;
8300 }
8301
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308302 host = scsi_host_alloc(&ufshcd_driver_template,
8303 sizeof(struct ufs_hba));
8304 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308305 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308306 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308307 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308308 }
8309 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308310 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308311 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008312 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308313 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008314
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008315 INIT_LIST_HEAD(&hba->clk_list_head);
8316
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008317out_error:
8318 return err;
8319}
8320EXPORT_SYMBOL(ufshcd_alloc_host);
8321
8322/**
8323 * ufshcd_init - Driver initialization routine
8324 * @hba: per-adapter instance
8325 * @mmio_base: base register address
8326 * @irq: Interrupt line of device
8327 * Returns 0 on success, non-zero value on failure
8328 */
8329int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8330{
8331 int err;
8332 struct Scsi_Host *host = hba->host;
8333 struct device *dev = hba->dev;
8334
8335 if (!mmio_base) {
8336 dev_err(hba->dev,
8337 "Invalid memory reference for mmio_base is NULL\n");
8338 err = -ENODEV;
8339 goto out_error;
8340 }
8341
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308342 hba->mmio_base = mmio_base;
8343 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308344
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008345 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008346 if (err)
8347 goto out_error;
8348
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308349 /* Read capabilities registers */
8350 ufshcd_hba_capabilities(hba);
8351
8352 /* Get UFS version supported by the controller */
8353 hba->ufs_version = ufshcd_get_ufs_version(hba);
8354
Yaniv Gardic01848c2016-12-05 19:25:02 -08008355 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8356 (hba->ufs_version != UFSHCI_VERSION_11) &&
8357 (hba->ufs_version != UFSHCI_VERSION_20) &&
8358 (hba->ufs_version != UFSHCI_VERSION_21))
8359 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8360 hba->ufs_version);
8361
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308362 /* Get Interrupt bit mask per version */
8363 hba->intr_mask = ufshcd_get_intr_mask(hba);
8364
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008365 err = ufshcd_set_dma_mask(hba);
8366 if (err) {
8367 dev_err(hba->dev, "set dma mask failed\n");
8368 goto out_disable;
8369 }
8370
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308371 /* Allocate memory for host memory space */
8372 err = ufshcd_memory_alloc(hba);
8373 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308374 dev_err(hba->dev, "Memory allocation failed\n");
8375 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308376 }
8377
8378 /* Configure LRB */
8379 ufshcd_host_memory_configure(hba);
8380
8381 host->can_queue = hba->nutrs;
8382 host->cmd_per_lun = hba->nutrs;
8383 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008384 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308385 host->max_channel = UFSHCD_MAX_CHANNEL;
8386 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008387 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308388
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008389 hba->max_pwr_info.is_valid = false;
8390
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308391 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05308392 init_waitqueue_head(&hba->tm_wq);
8393 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308394
8395 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308396 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308397 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308398
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308399 /* Initialize UIC command mutex */
8400 mutex_init(&hba->uic_cmd_mutex);
8401
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308402 /* Initialize mutex for device management commands */
8403 mutex_init(&hba->dev_cmd.lock);
8404
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008405 init_rwsem(&hba->clk_scaling_lock);
8406
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308407 /* Initialize device management tag acquire wait queue */
8408 init_waitqueue_head(&hba->dev_cmd.tag_wq);
8409
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008410 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008411
Vivek Gautameebcc192018-08-07 23:17:39 +05308412 ufshcd_init_clk_scaling(hba);
8413
Yaniv Gardi199ef132016-03-10 17:37:06 +02008414 /*
8415 * In order to avoid any spurious interrupt immediately after
8416 * registering UFS controller interrupt handler, clear any pending UFS
8417 * interrupt status and disable all the UFS interrupts.
8418 */
8419 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8420 REG_INTERRUPT_STATUS);
8421 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8422 /*
8423 * Make sure that UFS interrupts are disabled and any pending interrupt
8424 * status is cleared before registering UFS interrupt handler.
8425 */
8426 mb();
8427
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308428 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008429 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308430 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308431 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008432 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008433 } else {
8434 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308435 }
8436
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308437 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308438 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308439 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008440 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308441 }
8442
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008443 /* Reset the attached device */
8444 ufshcd_vops_device_reset(hba);
8445
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308446 /* Host controller enable */
8447 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308448 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308449 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008450 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008451 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308452 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308453 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308454
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008455 /*
8456 * Set the default power management level for runtime and system PM.
8457 * Default power saving mode is to keep UFS link in Hibern8 state
8458 * and UFS device in sleep state.
8459 */
8460 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8461 UFS_SLEEP_PWR_MODE,
8462 UIC_LINK_HIBERN8_STATE);
8463 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8464 UFS_SLEEP_PWR_MODE,
8465 UIC_LINK_HIBERN8_STATE);
8466
Adrian Hunterad448372018-03-20 15:07:38 +02008467 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008468 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008469 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8470 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8471 }
8472
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308473 /* Hold auto suspend until async scan completes */
8474 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308475 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008476 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008477 * We are assuming that device wasn't put in sleep/power-down
8478 * state exclusively during the boot stage before kernel.
8479 * This assumption helps avoid doing link startup twice during
8480 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008481 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008482 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008483
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308484 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008485 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308486
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308487 return 0;
8488
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308489out_remove_scsi_host:
8490 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008491exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308492 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008493 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308494out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008495 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008496 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308497out_error:
8498 return err;
8499}
8500EXPORT_SYMBOL_GPL(ufshcd_init);
8501
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308502MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8503MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308504MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308505MODULE_LICENSE("GPL");
8506MODULE_VERSION(UFSHCD_DRIVER_VERSION);