Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Dave Airlie | c0e0920 | 2008-05-29 10:09:59 +1000 | [diff] [blame] | 2 | # |
| 3 | # Makefile for the drm device driver. This driver provides support for the |
| 4 | # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. |
| 5 | |
Chris Wilson | 39bf4de | 2017-10-24 19:15:47 +0100 | [diff] [blame] | 6 | # Add a set of useful warning flags and enable -Werror for CI to prevent |
| 7 | # trivial mistakes from creeping in. We have to do this piecemeal as we reject |
| 8 | # any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we |
| 9 | # need to filter out dubious warnings. Still it is our interest |
| 10 | # to keep running locally with W=1 C=1 until we are completely clean. |
| 11 | # |
| 12 | # Note the danger in using -Wall -Wextra is that when CI updates gcc we |
| 13 | # will most likely get a sudden build breakage... Hopefully we will fix |
| 14 | # new warnings before CI updates! |
Kees Cook | 0bb95f8 | 2018-06-25 15:59:34 -0700 | [diff] [blame] | 15 | subdir-ccflags-y := -Wall -Wextra |
Chris Wilson | 4ab09d0 | 2017-10-30 17:29:27 +0000 | [diff] [blame] | 16 | subdir-ccflags-y += $(call cc-disable-warning, unused-parameter) |
| 17 | subdir-ccflags-y += $(call cc-disable-warning, type-limits) |
| 18 | subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers) |
Chris Wilson | 6a05d29 | 2018-02-08 16:16:39 +0000 | [diff] [blame] | 19 | subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable) |
Matthias Kaehlcke | 46e2068 | 2018-05-01 11:24:40 -0700 | [diff] [blame] | 20 | # clang warnings |
| 21 | subdir-ccflags-y += $(call cc-disable-warning, sign-compare) |
| 22 | subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized) |
| 23 | subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides) |
Nathan Chancellor | c562746 | 2019-01-26 00:11:23 -0700 | [diff] [blame] | 24 | subdir-ccflags-y += $(call cc-disable-warning, uninitialized) |
Chris Wilson | 39bf4de | 2017-10-24 19:15:47 +0100 | [diff] [blame] | 25 | subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror |
| 26 | |
| 27 | # Fine grained warnings disable |
Chris Wilson | 4ab09d0 | 2017-10-30 17:29:27 +0000 | [diff] [blame] | 28 | CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init) |
Masahiro Yamada | 54b8ae6 | 2019-08-30 13:34:01 +0900 | [diff] [blame] | 29 | CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init) |
Chris Wilson | 39bf4de | 2017-10-24 19:15:47 +0100 | [diff] [blame] | 30 | |
Chris Wilson | 0b1de5d | 2016-08-12 12:39:59 +0100 | [diff] [blame] | 31 | subdir-ccflags-y += \ |
| 32 | $(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA) |
Chris Wilson | 0a793ad | 2016-04-13 17:35:00 +0100 | [diff] [blame] | 33 | |
Jani Nikula | 9ef424e | 2019-06-26 17:36:17 +0300 | [diff] [blame] | 34 | subdir-ccflags-y += -I$(srctree)/$(src) |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 35 | |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 36 | # Please keep these build lists sorted! |
| 37 | |
| 38 | # core driver code |
Jani Nikula | c2400ec | 2019-04-03 16:52:36 +0300 | [diff] [blame] | 39 | i915-y += i915_drv.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 40 | i915_irq.o \ |
Chris Wilson | 26f0051 | 2019-08-07 15:20:41 +0100 | [diff] [blame] | 41 | i915_getparam.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 42 | i915_params.o \ |
Chris Wilson | 42f5551 | 2016-06-24 14:00:26 +0100 | [diff] [blame] | 43 | i915_pci.o \ |
Chris Wilson | 37d63f8 | 2019-05-28 10:29:50 +0100 | [diff] [blame] | 44 | i915_scatterlist.o \ |
Pedro Tammela | 7996022 | 2018-12-05 09:06:08 -0200 | [diff] [blame] | 45 | i915_suspend.o \ |
Jani Nikula | 63bf830 | 2019-10-04 15:20:18 +0300 | [diff] [blame] | 46 | i915_switcheroo.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 47 | i915_sysfs.o \ |
Jani Nikula | 358c855 | 2019-08-08 16:42:43 +0300 | [diff] [blame] | 48 | i915_utils.o \ |
Chris Wilson | 94b4f3b | 2016-07-05 10:40:20 +0100 | [diff] [blame] | 49 | intel_device_info.o \ |
Jani Nikula | d28ae3b | 2020-02-25 13:15:07 +0200 | [diff] [blame] | 50 | intel_dram.o \ |
Matthew Auld | 232a6eb | 2019-10-08 17:01:14 +0100 | [diff] [blame] | 51 | intel_memory_region.o \ |
Jani Nikula | 707d26d | 2019-08-07 15:04:15 +0300 | [diff] [blame] | 52 | intel_pch.o \ |
Daniel Vetter | 9c065a7 | 2014-09-30 10:56:38 +0200 | [diff] [blame] | 53 | intel_pm.o \ |
Oscar Mateo | 7d3c425 | 2018-04-10 09:12:46 -0700 | [diff] [blame] | 54 | intel_runtime_pm.o \ |
Jani Nikula | df0566a | 2019-06-13 11:44:16 +0300 | [diff] [blame] | 55 | intel_sideband.o \ |
| 56 | intel_uncore.o \ |
Jani Nikula | fb5f432 | 2020-02-12 16:40:57 +0200 | [diff] [blame] | 57 | intel_wakeref.o \ |
| 58 | vlv_suspend.o |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 59 | |
| 60 | # core library code |
| 61 | i915-y += \ |
| 62 | i915_memcpy.o \ |
| 63 | i915_mm.o \ |
| 64 | i915_sw_fence.o \ |
Chris Wilson | 8e458fe | 2019-08-21 20:16:06 +0100 | [diff] [blame] | 65 | i915_sw_fence_work.o \ |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 66 | i915_syncmap.o \ |
| 67 | i915_user_extensions.o |
Daniel Vetter | 9c065a7 | 2014-09-30 10:56:38 +0200 | [diff] [blame] | 68 | |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 69 | i915-$(CONFIG_COMPAT) += i915_ioc32.o |
Jani Nikula | c43c5a8 | 2019-12-05 17:43:40 +0200 | [diff] [blame] | 70 | i915-$(CONFIG_DEBUG_FS) += \ |
| 71 | i915_debugfs.o \ |
| 72 | i915_debugfs_params.o \ |
Jani Nikula | 926b005 | 2020-02-11 18:14:51 +0200 | [diff] [blame] | 73 | display/intel_display_debugfs.o \ |
Jani Nikula | c43c5a8 | 2019-12-05 17:43:40 +0200 | [diff] [blame] | 74 | display/intel_pipe_crc.o |
Tvrtko Ursulin | b46a33e | 2017-11-21 18:18:45 +0000 | [diff] [blame] | 75 | i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 76 | |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 77 | # "Graphics Technology" (aka we talk to the gpu) |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 78 | gt-y += \ |
Andi Shyti | 9dd4b06 | 2019-12-22 14:40:46 +0000 | [diff] [blame] | 79 | gt/debugfs_engines.o \ |
| 80 | gt/debugfs_gt.o \ |
| 81 | gt/debugfs_gt_pm.o \ |
Matthew Auld | 2c86e55 | 2020-01-07 13:40:09 +0000 | [diff] [blame] | 82 | gt/gen6_ppgtt.o \ |
Prathap Kumar Valsan | 47f8253 | 2020-03-06 00:09:57 +0000 | [diff] [blame] | 83 | gt/gen7_renderclear.o \ |
Matthew Auld | 2c86e55 | 2020-01-07 13:40:09 +0000 | [diff] [blame] | 84 | gt/gen8_ppgtt.o \ |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 85 | gt/intel_breadcrumbs.o \ |
| 86 | gt/intel_context.o \ |
Chris Wilson | 88be76c | 2020-02-25 19:22:05 +0000 | [diff] [blame] | 87 | gt/intel_context_param.o \ |
Chris Wilson | b4d3aca | 2020-01-31 10:45:42 +0000 | [diff] [blame] | 88 | gt/intel_context_sseu.o \ |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 89 | gt/intel_engine_cs.o \ |
Chris Wilson | b5e8e95 | 2019-10-21 18:43:39 +0100 | [diff] [blame] | 90 | gt/intel_engine_heartbeat.o \ |
Chris Wilson | 79ffac85 | 2019-04-24 21:07:17 +0100 | [diff] [blame] | 91 | gt/intel_engine_pm.o \ |
Chris Wilson | b5e8e95 | 2019-10-21 18:43:39 +0100 | [diff] [blame] | 92 | gt/intel_engine_pool.o \ |
Chris Wilson | 750e76b | 2019-08-06 13:43:00 +0100 | [diff] [blame] | 93 | gt/intel_engine_user.o \ |
Matthew Auld | 2c86e55 | 2020-01-07 13:40:09 +0000 | [diff] [blame] | 94 | gt/intel_ggtt.o \ |
Tvrtko Ursulin | 24635c5 | 2019-06-21 08:07:41 +0100 | [diff] [blame] | 95 | gt/intel_gt.o \ |
Andi Shyti | cf1c97d | 2019-08-11 22:06:33 +0100 | [diff] [blame] | 96 | gt/intel_gt_irq.o \ |
Chris Wilson | 79ffac85 | 2019-04-24 21:07:17 +0100 | [diff] [blame] | 97 | gt/intel_gt_pm.o \ |
Andi Shyti | d762043 | 2019-08-11 15:28:00 +0100 | [diff] [blame] | 98 | gt/intel_gt_pm_irq.o \ |
Chris Wilson | 6610197 | 2019-10-04 14:40:06 +0100 | [diff] [blame] | 99 | gt/intel_gt_requests.o \ |
Matthew Auld | 2c86e55 | 2020-01-07 13:40:09 +0000 | [diff] [blame] | 100 | gt/intel_gtt.o \ |
Andi Shyti | 0dc3c56 | 2019-10-20 19:41:39 +0100 | [diff] [blame] | 101 | gt/intel_llc.o \ |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 102 | gt/intel_lrc.o \ |
Chris Wilson | 2871ea8 | 2019-10-24 11:03:44 +0100 | [diff] [blame] | 103 | gt/intel_mocs.o \ |
Matthew Auld | 2c86e55 | 2020-01-07 13:40:09 +0000 | [diff] [blame] | 104 | gt/intel_ppgtt.o \ |
Andi Shyti | c113236 | 2019-09-27 12:08:49 +0100 | [diff] [blame] | 105 | gt/intel_rc6.o \ |
Chris Wilson | 2006058 | 2019-07-04 10:19:25 +0100 | [diff] [blame] | 106 | gt/intel_renderstate.o \ |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 107 | gt/intel_reset.o \ |
Chris Wilson | 2871ea8 | 2019-10-24 11:03:44 +0100 | [diff] [blame] | 108 | gt/intel_ring.o \ |
| 109 | gt/intel_ring_submission.o \ |
Andi Shyti | 3e7abf8 | 2019-10-24 22:16:41 +0100 | [diff] [blame] | 110 | gt/intel_rps.o \ |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 111 | gt/intel_sseu.o \ |
Tvrtko Ursulin | f0c02c1 | 2019-06-21 08:08:10 +0100 | [diff] [blame] | 112 | gt/intel_timeline.o \ |
Chris Wilson | 4ec76db | 2020-02-28 13:17:10 +0000 | [diff] [blame] | 113 | gt/intel_workarounds.o \ |
| 114 | gt/sysfs_engines.o |
Chris Wilson | 2006058 | 2019-07-04 10:19:25 +0100 | [diff] [blame] | 115 | # autogenerated null render state |
| 116 | gt-y += \ |
| 117 | gt/gen6_renderstate.o \ |
| 118 | gt/gen7_renderstate.o \ |
| 119 | gt/gen8_renderstate.o \ |
| 120 | gt/gen9_renderstate.o |
Chris Wilson | 112ed2d | 2019-04-24 18:48:39 +0100 | [diff] [blame] | 121 | i915-y += $(gt-y) |
| 122 | |
| 123 | # GEM (Graphics Execution Management) code |
Chris Wilson | 9893214 | 2019-05-28 10:29:44 +0100 | [diff] [blame] | 124 | gem-y += \ |
Chris Wilson | 3f43c87 | 2019-05-28 10:29:53 +0100 | [diff] [blame] | 125 | gem/i915_gem_busy.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 126 | gem/i915_gem_clflush.o \ |
Matthew Auld | 6501aa4 | 2019-05-29 13:31:08 +0100 | [diff] [blame] | 127 | gem/i915_gem_client_blt.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 128 | gem/i915_gem_context.o \ |
| 129 | gem/i915_gem_dmabuf.o \ |
Chris Wilson | f0e4a06 | 2019-05-28 10:29:48 +0100 | [diff] [blame] | 130 | gem/i915_gem_domain.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 131 | gem/i915_gem_execbuffer.o \ |
Chris Wilson | 6951e58 | 2019-05-28 10:29:51 +0100 | [diff] [blame] | 132 | gem/i915_gem_fence.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 133 | gem/i915_gem_internal.o \ |
Chris Wilson | 8475355 | 2019-05-28 10:29:45 +0100 | [diff] [blame] | 134 | gem/i915_gem_object.o \ |
Matthew Auld | 6501aa4 | 2019-05-29 13:31:08 +0100 | [diff] [blame] | 135 | gem/i915_gem_object_blt.o \ |
Matthew Auld | b908be5 | 2019-10-25 16:37:22 +0100 | [diff] [blame] | 136 | gem/i915_gem_lmem.o \ |
Chris Wilson | b414fcd | 2019-05-28 10:29:47 +0100 | [diff] [blame] | 137 | gem/i915_gem_mman.o \ |
Chris Wilson | f033428 | 2019-05-28 10:29:46 +0100 | [diff] [blame] | 138 | gem/i915_gem_pages.o \ |
| 139 | gem/i915_gem_phys.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 140 | gem/i915_gem_pm.o \ |
Matthew Auld | 232a6eb | 2019-10-08 17:01:14 +0100 | [diff] [blame] | 141 | gem/i915_gem_region.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 142 | gem/i915_gem_shmem.o \ |
| 143 | gem/i915_gem_shrinker.o \ |
| 144 | gem/i915_gem_stolen.o \ |
Chris Wilson | 446e2d1 | 2019-05-28 10:29:54 +0100 | [diff] [blame] | 145 | gem/i915_gem_throttle.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 146 | gem/i915_gem_tiling.o \ |
| 147 | gem/i915_gem_userptr.o \ |
Chris Wilson | d45a1a5 | 2019-05-28 10:29:52 +0100 | [diff] [blame] | 148 | gem/i915_gem_wait.o \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 149 | gem/i915_gemfs.o |
Chris Wilson | 64d6c50 | 2019-02-05 13:00:02 +0000 | [diff] [blame] | 150 | i915-y += \ |
Chris Wilson | 9893214 | 2019-05-28 10:29:44 +0100 | [diff] [blame] | 151 | $(gem-y) \ |
Chris Wilson | 64d6c50 | 2019-02-05 13:00:02 +0000 | [diff] [blame] | 152 | i915_active.o \ |
Matthew Auld | 14d1b9a | 2019-08-09 21:29:24 +0100 | [diff] [blame] | 153 | i915_buddy.o \ |
Chris Wilson | 64d6c50 | 2019-02-05 13:00:02 +0000 | [diff] [blame] | 154 | i915_cmd_parser.o \ |
Chris Wilson | b47eb4a | 2010-08-07 11:01:23 +0100 | [diff] [blame] | 155 | i915_gem_evict.o \ |
Joonas Lahtinen | b42fe9c | 2016-11-11 12:43:54 +0200 | [diff] [blame] | 156 | i915_gem_fence_reg.o \ |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 157 | i915_gem_gtt.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 158 | i915_gem.o \ |
Chris Wilson | 32eb6bc | 2019-02-28 10:20:33 +0000 | [diff] [blame] | 159 | i915_globals.o \ |
Lionel Landwerlin | a446ae2 | 2018-03-06 12:28:56 +0000 | [diff] [blame] | 160 | i915_query.o \ |
Chris Wilson | e61e0f5 | 2018-02-21 09:56:36 +0000 | [diff] [blame] | 161 | i915_request.o \ |
Chris Wilson | e2f3496 | 2018-10-01 15:47:54 +0100 | [diff] [blame] | 162 | i915_scheduler.o \ |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 163 | i915_trace_points.o \ |
Joonas Lahtinen | b42fe9c | 2016-11-11 12:43:54 +0200 | [diff] [blame] | 164 | i915_vma.o \ |
Matthew Auld | b908be5 | 2019-10-25 16:37:22 +0100 | [diff] [blame] | 165 | intel_region_lmem.o \ |
Jackie Li | 6b0478f | 2018-03-13 17:32:50 -0700 | [diff] [blame] | 166 | intel_wopcm.o |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 167 | |
Alex Dai | 33a732f | 2015-08-12 15:43:36 +0100 | [diff] [blame] | 168 | # general-purpose microcontroller (GuC) support |
Daniele Ceraolo Spurio | 0f261b2 | 2019-07-13 11:00:11 +0100 | [diff] [blame] | 169 | i915-y += gt/uc/intel_uc.o \ |
| 170 | gt/uc/intel_uc_fw.o \ |
| 171 | gt/uc/intel_guc.o \ |
| 172 | gt/uc/intel_guc_ads.o \ |
| 173 | gt/uc/intel_guc_ct.o \ |
| 174 | gt/uc/intel_guc_fw.o \ |
| 175 | gt/uc/intel_guc_log.o \ |
| 176 | gt/uc/intel_guc_submission.o \ |
| 177 | gt/uc/intel_huc.o \ |
| 178 | gt/uc/intel_huc_fw.o |
Alex Dai | 33a732f | 2015-08-12 15:43:36 +0100 | [diff] [blame] | 179 | |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 180 | # modesetting core code |
Jani Nikula | df0566a | 2019-06-13 11:44:16 +0300 | [diff] [blame] | 181 | i915-y += \ |
| 182 | display/intel_atomic.o \ |
| 183 | display/intel_atomic_plane.o \ |
| 184 | display/intel_audio.o \ |
| 185 | display/intel_bios.o \ |
| 186 | display/intel_bw.o \ |
| 187 | display/intel_cdclk.o \ |
| 188 | display/intel_color.o \ |
| 189 | display/intel_combo_phy.o \ |
| 190 | display/intel_connector.o \ |
Jani Nikula | 06d3ff6 | 2020-02-11 18:14:50 +0200 | [diff] [blame] | 191 | display/intel_csr.o \ |
Jani Nikula | df0566a | 2019-06-13 11:44:16 +0300 | [diff] [blame] | 192 | display/intel_display.o \ |
| 193 | display/intel_display_power.o \ |
| 194 | display/intel_dpio_phy.o \ |
| 195 | display/intel_dpll_mgr.o \ |
Animesh Manna | 67f3b58 | 2019-09-20 17:29:22 +0530 | [diff] [blame] | 196 | display/intel_dsb.o \ |
Jani Nikula | df0566a | 2019-06-13 11:44:16 +0300 | [diff] [blame] | 197 | display/intel_fbc.o \ |
| 198 | display/intel_fifo_underrun.o \ |
| 199 | display/intel_frontbuffer.o \ |
Ville Syrjälä | 0ef1905 | 2020-01-20 19:47:24 +0200 | [diff] [blame] | 200 | display/intel_global_state.o \ |
Jani Nikula | df0566a | 2019-06-13 11:44:16 +0300 | [diff] [blame] | 201 | display/intel_hdcp.o \ |
| 202 | display/intel_hotplug.o \ |
| 203 | display/intel_lpe_audio.o \ |
| 204 | display/intel_overlay.o \ |
| 205 | display/intel_psr.o \ |
| 206 | display/intel_quirks.o \ |
Imre Deak | bc85328 | 2019-06-28 17:36:15 +0300 | [diff] [blame] | 207 | display/intel_sprite.o \ |
Jani Nikula | 4fb8783 | 2019-10-01 18:25:06 +0300 | [diff] [blame] | 208 | display/intel_tc.o \ |
| 209 | display/intel_vga.o |
Jani Nikula | df0566a | 2019-06-13 11:44:16 +0300 | [diff] [blame] | 210 | i915-$(CONFIG_ACPI) += \ |
| 211 | display/intel_acpi.o \ |
| 212 | display/intel_opregion.o |
| 213 | i915-$(CONFIG_DRM_FBDEV_EMULATION) += \ |
| 214 | display/intel_fbdev.o |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 215 | |
| 216 | # modesetting output/encoder code |
Jani Nikula | 379bc10 | 2019-06-13 11:44:15 +0300 | [diff] [blame] | 217 | i915-y += \ |
| 218 | display/dvo_ch7017.o \ |
| 219 | display/dvo_ch7xxx.o \ |
| 220 | display/dvo_ivch.o \ |
| 221 | display/dvo_ns2501.o \ |
| 222 | display/dvo_sil164.o \ |
| 223 | display/dvo_tfp410.o \ |
| 224 | display/icl_dsi.o \ |
| 225 | display/intel_crt.o \ |
| 226 | display/intel_ddi.o \ |
| 227 | display/intel_dp.o \ |
| 228 | display/intel_dp_aux_backlight.o \ |
| 229 | display/intel_dp_link_training.o \ |
| 230 | display/intel_dp_mst.o \ |
| 231 | display/intel_dsi.o \ |
| 232 | display/intel_dsi_dcs_backlight.o \ |
| 233 | display/intel_dsi_vbt.o \ |
| 234 | display/intel_dvo.o \ |
| 235 | display/intel_gmbus.o \ |
| 236 | display/intel_hdmi.o \ |
| 237 | display/intel_lspcon.o \ |
| 238 | display/intel_lvds.o \ |
| 239 | display/intel_panel.o \ |
| 240 | display/intel_sdvo.o \ |
| 241 | display/intel_tv.o \ |
| 242 | display/intel_vdsc.o \ |
| 243 | display/vlv_dsi.o \ |
| 244 | display/vlv_dsi_pll.o |
Dave Airlie | c0e0920 | 2008-05-29 10:09:59 +1000 | [diff] [blame] | 245 | |
Michal Wajdeczko | 5ed7a0c | 2019-06-26 12:38:26 +0000 | [diff] [blame] | 246 | # perf code |
Michal Wajdeczko | 5ed7a0c | 2019-06-26 12:38:26 +0000 | [diff] [blame] | 247 | i915-y += \ |
| 248 | oa/i915_oa_hsw.o \ |
| 249 | oa/i915_oa_bdw.o \ |
| 250 | oa/i915_oa_chv.o \ |
| 251 | oa/i915_oa_sklgt2.o \ |
| 252 | oa/i915_oa_sklgt3.o \ |
| 253 | oa/i915_oa_sklgt4.o \ |
| 254 | oa/i915_oa_bxt.o \ |
| 255 | oa/i915_oa_kblgt2.o \ |
| 256 | oa/i915_oa_kblgt3.o \ |
| 257 | oa/i915_oa_glk.o \ |
| 258 | oa/i915_oa_cflgt2.o \ |
| 259 | oa/i915_oa_cflgt3.o \ |
| 260 | oa/i915_oa_cnl.o \ |
Lionel Landwerlin | 00a7f0d | 2019-10-25 12:37:46 -0700 | [diff] [blame] | 261 | oa/i915_oa_icl.o \ |
| 262 | oa/i915_oa_tgl.o |
Michal Wajdeczko | 5ed7a0c | 2019-06-26 12:38:26 +0000 | [diff] [blame] | 263 | i915-y += i915_perf.o |
| 264 | |
Chris Wilson | 98a2f41 | 2016-10-12 10:05:18 +0100 | [diff] [blame] | 265 | # Post-mortem debug and GPU hang state capture |
| 266 | i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o |
Chris Wilson | 953c7f8 | 2017-02-13 17:15:12 +0000 | [diff] [blame] | 267 | i915-$(CONFIG_DRM_I915_SELFTEST) += \ |
Chris Wilson | 10be98a | 2019-05-28 10:29:49 +0100 | [diff] [blame] | 268 | gem/selftests/igt_gem_utils.o \ |
Chris Wilson | 953c7f8 | 2017-02-13 17:15:12 +0000 | [diff] [blame] | 269 | selftests/i915_random.o \ |
Chris Wilson | 98dc045 | 2018-05-05 10:10:13 +0100 | [diff] [blame] | 270 | selftests/i915_selftest.o \ |
Chris Wilson | f3bc632 | 2020-01-03 10:45:15 +0000 | [diff] [blame] | 271 | selftests/igt_atomic.o \ |
Tvrtko Ursulin | 8d2f6e2 | 2018-11-30 08:02:53 +0000 | [diff] [blame] | 272 | selftests/igt_flush_test.o \ |
Chris Wilson | e4a8c81 | 2019-01-21 22:20:47 +0000 | [diff] [blame] | 273 | selftests/igt_live_test.o \ |
Chris Wilson | 6fedafa | 2019-11-07 18:06:00 +0000 | [diff] [blame] | 274 | selftests/igt_mmap.o \ |
Tvrtko Ursulin | 28d6ccc | 2018-12-03 12:50:11 +0000 | [diff] [blame] | 275 | selftests/igt_reset.o \ |
Tvrtko Ursulin | 8d2f6e2 | 2018-11-30 08:02:53 +0000 | [diff] [blame] | 276 | selftests/igt_spinner.o |
Chris Wilson | 98a2f41 | 2016-10-12 10:05:18 +0100 | [diff] [blame] | 277 | |
Yu Zhang | cf9d289 | 2015-02-10 19:05:47 +0800 | [diff] [blame] | 278 | # virtual gpu code |
| 279 | i915-y += i915_vgpu.o |
| 280 | |
Zhi Wang | 0ad35fe | 2016-06-16 08:07:00 -0400 | [diff] [blame] | 281 | ifeq ($(CONFIG_DRM_I915_GVT),y) |
| 282 | i915-y += intel_gvt.o |
| 283 | include $(src)/gvt/Makefile |
| 284 | endif |
| 285 | |
Chris Wilson | c58305a | 2016-08-19 16:54:28 +0100 | [diff] [blame] | 286 | obj-$(CONFIG_DRM_I915) += i915.o |
Zhenyu Wang | 9bdb073 | 2018-12-07 16:16:53 +0800 | [diff] [blame] | 287 | obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o |
Masahiro Yamada | c6d4a09 | 2019-12-19 17:56:52 +0200 | [diff] [blame] | 288 | |
| 289 | # header test |
| 290 | |
| 291 | # exclude some broken headers from the test coverage |
| 292 | no-header-test := \ |
| 293 | display/intel_vbt_defs.h \ |
Masahiro Yamada | c6d4a09 | 2019-12-19 17:56:52 +0200 | [diff] [blame] | 294 | gvt/execlist.h \ |
| 295 | gvt/fb_decoder.h \ |
| 296 | gvt/gtt.h \ |
| 297 | gvt/gvt.h \ |
| 298 | gvt/interrupt.h \ |
| 299 | gvt/mmio_context.h \ |
| 300 | gvt/mpt.h \ |
Chris Wilson | b2fcaac | 2020-01-03 10:45:16 +0000 | [diff] [blame] | 301 | gvt/scheduler.h |
Masahiro Yamada | c6d4a09 | 2019-12-19 17:56:52 +0200 | [diff] [blame] | 302 | |
| 303 | extra-$(CONFIG_DRM_I915_WERROR) += \ |
| 304 | $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \ |
| 305 | $(shell cd $(srctree)/$(src) && find * -name '*.h'))) |
| 306 | |
| 307 | quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@) |
Jani Nikula | 408c1b3 | 2020-02-21 12:54:14 +0200 | [diff] [blame] | 308 | cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; touch $@ |
Masahiro Yamada | c6d4a09 | 2019-12-19 17:56:52 +0200 | [diff] [blame] | 309 | |
| 310 | $(obj)/%.hdrtest: $(src)/%.h FORCE |
| 311 | $(call if_changed_dep,hdrtest) |