blob: 9bee52a949a9442449b950693be038a3ee07ddb6 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Dave Airliec0e09202008-05-29 10:09:59 +10002#
3# Makefile for the drm device driver. This driver provides support for the
4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
5
Chris Wilson39bf4de2017-10-24 19:15:47 +01006# Add a set of useful warning flags and enable -Werror for CI to prevent
7# trivial mistakes from creeping in. We have to do this piecemeal as we reject
8# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
9# need to filter out dubious warnings. Still it is our interest
10# to keep running locally with W=1 C=1 until we are completely clean.
11#
12# Note the danger in using -Wall -Wextra is that when CI updates gcc we
13# will most likely get a sudden build breakage... Hopefully we will fix
14# new warnings before CI updates!
Chris Wilsonc5c2b112018-03-13 00:40:55 +000015subdir-ccflags-y := -Wall -Wextra -Wvla
Chris Wilson4ab09d02017-10-30 17:29:27 +000016subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)
17subdir-ccflags-y += $(call cc-disable-warning, type-limits)
18subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
19subdir-ccflags-y += $(call cc-disable-warning, implicit-fallthrough)
Chris Wilson6a05d292018-02-08 16:16:39 +000020subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
Chris Wilson39bf4de2017-10-24 19:15:47 +010021subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
22
23# Fine grained warnings disable
Chris Wilson4ab09d02017-10-30 17:29:27 +000024CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
25CFLAGS_intel_fbdev.o = $(call cc-disable-warning, override-init)
Chris Wilson39bf4de2017-10-24 19:15:47 +010026
Chris Wilson0b1de5d2016-08-12 12:39:59 +010027subdir-ccflags-y += \
28 $(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
Chris Wilson0a793ad2016-04-13 17:35:00 +010029
Daniel Vetter2fae6a82014-03-07 09:17:21 +010030# Please keep these build lists sorted!
31
32# core driver code
33i915-y := i915_drv.o \
Daniel Vetter042794b2015-07-24 13:55:10 +020034 i915_irq.o \
Chris Wilson0b1de5d2016-08-12 12:39:59 +010035 i915_memcpy.o \
Chris Wilsonc58305a2016-08-19 16:54:28 +010036 i915_mm.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010037 i915_params.o \
Chris Wilson42f55512016-06-24 14:00:26 +010038 i915_pci.o \
Eric Anholt673a3942008-07-30 12:06:12 -070039 i915_suspend.o \
Chris Wilson47979482017-05-03 10:39:21 +010040 i915_syncmap.o \
Chris Wilsone68a1392016-09-09 14:11:41 +010041 i915_sw_fence.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010042 i915_sysfs.o \
Daniel Vetter042794b2015-07-24 13:55:10 +020043 intel_csr.o \
Chris Wilson94b4f3b2016-07-05 10:40:20 +010044 intel_device_info.o \
Daniel Vetter9c065a72014-09-30 10:56:38 +020045 intel_pm.o \
Oscar Mateo7d3c4252018-04-10 09:12:46 -070046 intel_runtime_pm.o \
47 intel_workarounds.o
Daniel Vetter9c065a72014-09-30 10:56:38 +020048
Daniel Vetter2fae6a82014-03-07 09:17:21 +010049i915-$(CONFIG_COMPAT) += i915_ioc32.o
Tomeu Vizoso731035f2016-12-12 13:29:48 +010050i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o intel_pipe_crc.o
Tvrtko Ursulinb46a33e2017-11-21 18:18:45 +000051i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +010052
53# GEM code
54i915-y += i915_cmd_parser.o \
Brad Volkin493018d2014-12-11 12:13:08 -080055 i915_gem_batch_pool.o \
Chris Wilson57822dc2017-02-22 11:40:48 +000056 i915_gem_clflush.o \
Ben Widawsky254f9652012-06-04 14:42:42 -070057 i915_gem_context.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010058 i915_gem_dmabuf.o \
Chris Wilsonb47eb4a2010-08-07 11:01:23 +010059 i915_gem_evict.o \
Chris Wilson54cf91d2010-11-25 18:00:26 +000060 i915_gem_execbuffer.o \
Joonas Lahtinenb42fe9c2016-11-11 12:43:54 +020061 i915_gem_fence_reg.o \
Chris Wilson54cf91d2010-11-25 18:00:26 +000062 i915_gem_gtt.o \
Chris Wilson920cf412016-10-28 13:58:30 +010063 i915_gem_internal.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010064 i915_gem.o \
Chris Wilsonb8f55be2017-08-11 12:11:16 +010065 i915_gem_object.o \
Daniel Vetter042794b2015-07-24 13:55:10 +020066 i915_gem_render_state.o \
Daniel Vetterbe6a0372015-03-18 10:46:04 +010067 i915_gem_shrinker.o \
Chris Wilson9797fbf2012-04-24 15:47:39 +010068 i915_gem_stolen.o \
Jesse Barnes79e53942008-11-07 14:24:08 -080069 i915_gem_tiling.o \
Chris Wilson73cb9702016-10-28 13:58:46 +010070 i915_gem_timeline.o \
Chris Wilson5cc9ed42014-05-16 14:22:37 +010071 i915_gem_userptr.o \
Matthew Auld465c4032017-10-06 23:18:14 +010072 i915_gemfs.o \
Lionel Landwerlina446ae22018-03-06 12:28:56 +000073 i915_query.o \
Chris Wilsone61e0f52018-02-21 09:56:36 +000074 i915_request.o \
Chris Wilson1c5d22f2009-08-25 11:15:50 +010075 i915_trace_points.o \
Joonas Lahtinenb42fe9c2016-11-11 12:43:54 +020076 i915_vma.o \
Chris Wilson688e6c72016-07-01 17:23:15 +010077 intel_breadcrumbs.o \
Tvrtko Ursulin88d2ba22016-07-13 16:03:40 +010078 intel_engine_cs.o \
Mika Kuoppala3ac168a2016-11-01 18:43:03 +020079 intel_hangcheck.o \
Oscar Mateob20385f2014-07-24 17:04:10 +010080 intel_lrc.o \
Peter Antoine3bbaba02015-07-10 20:13:11 +030081 intel_mocs.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010082 intel_ringbuffer.o \
Jackie Li6b0478f2018-03-13 17:32:50 -070083 intel_uncore.o \
84 intel_wopcm.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +010085
Alex Dai33a732f2015-08-12 15:43:36 +010086# general-purpose microcontroller (GuC) support
Arkadiusz Hiler2d803c22016-11-25 18:59:35 +010087i915-y += intel_uc.o \
Michal Wajdeczkoa16b4312017-10-04 15:33:25 +000088 intel_uc_fw.o \
Michal Wajdeczko9bf384c2017-10-04 18:13:41 +000089 intel_guc.o \
Sujaritha Sundaresanc24f0c12018-01-02 13:20:24 -080090 intel_guc_ads.o \
Michal Wajdeczkof8a58d62017-05-26 11:13:25 +000091 intel_guc_ct.o \
Michal Wajdeczkoe8668bb2017-10-16 14:47:14 +000092 intel_guc_fw.o \
Sagar Arun Kamblea2695742017-11-16 19:02:41 +053093 intel_guc_log.o \
94 intel_guc_submission.o \
Sagar Arun Kamble57312ea2018-03-01 22:15:45 +053095 intel_huc.o \
96 intel_huc_fw.o
Alex Dai33a732f2015-08-12 15:43:36 +010097
Mika Kuoppala9d0a6fa2014-05-14 17:02:16 +030098# autogenerated null render state
99i915-y += intel_renderstate_gen6.o \
100 intel_renderstate_gen7.o \
Armin Reeseff7a60f2014-10-23 08:34:28 -0700101 intel_renderstate_gen8.o \
102 intel_renderstate_gen9.o
Mika Kuoppala9d0a6fa2014-05-14 17:02:16 +0300103
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100104# modesetting core code
Jani Nikula7c10a2b2014-10-27 16:26:43 +0200105i915-y += intel_audio.o \
Daniel Vetter042794b2015-07-24 13:55:10 +0200106 intel_atomic.o \
107 intel_atomic_plane.o \
Jani Nikula7c10a2b2014-10-27 16:26:43 +0200108 intel_bios.o \
Ville Syrjälä7ff89ca2017-02-07 20:33:05 +0200109 intel_cdclk.o \
Lionel Landwerlin8563b1e2016-03-16 10:57:14 +0000110 intel_color.o \
Jesse Barnes79e53942008-11-07 14:24:08 -0800111 intel_display.o \
Ander Conselvan de Oliveirab7fa22d2016-04-27 15:44:17 +0300112 intel_dpio_phy.o \
Ander Conselvan de Oliveira7abd4b32016-03-08 17:46:15 +0200113 intel_dpll_mgr.o \
Rodrigo Vivi7ff0ebc2014-12-08 14:09:10 -0200114 intel_fbc.o \
Daniel Vetter47339cd2014-09-30 10:56:46 +0200115 intel_fifo_underrun.o \
Daniel Vetterb680c372014-09-19 18:27:27 +0200116 intel_frontbuffer.o \
Sean Paulee5e5e72018-01-08 14:55:39 -0500117 intel_hdcp.o \
Daniel Vetter042794b2015-07-24 13:55:10 +0200118 intel_hotplug.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100119 intel_modes.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100120 intel_overlay.o \
Rodrigo Vivi0bc12bc2014-11-14 08:52:28 -0800121 intel_psr.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100122 intel_sideband.o \
123 intel_sprite.o
Daniel Vettere19b9132014-03-18 09:43:56 +0100124i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o
Daniel Vetter06957262015-08-10 13:34:08 +0200125i915-$(CONFIG_DRM_FBDEV_EMULATION) += intel_fbdev.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100126
127# modesetting output/encoder code
128i915-y += dvo_ch7017.o \
129 dvo_ch7xxx.o \
130 dvo_ivch.o \
131 dvo_ns2501.o \
132 dvo_sil164.o \
133 dvo_tfp410.o \
Jesse Barnes79e53942008-11-07 14:24:08 -0800134 intel_crt.o \
Eugeni Dodonov45244b82012-05-09 15:37:20 -0300135 intel_ddi.o \
Yetunde Adebisie7156c82016-04-05 15:10:52 +0100136 intel_dp_aux_backlight.o \
Ander Conselvan de Oliveira94223d02015-10-23 13:01:48 +0300137 intel_dp_link_training.o \
Dave Airlie0e32b392014-05-02 14:02:48 +1000138 intel_dp_mst.o \
Daniel Vetter042794b2015-07-24 13:55:10 +0200139 intel_dp.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100140 intel_dsi.o \
Jani Nikula90198352016-04-26 16:14:25 +0300141 intel_dsi_dcs_backlight.o \
Daniel Vetter042794b2015-07-24 13:55:10 +0200142 intel_dsi_pll.o \
Jani Nikula5431fc02017-03-06 16:31:29 +0200143 intel_dsi_vbt.o \
Jesse Barnes79e53942008-11-07 14:24:08 -0800144 intel_dvo.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100145 intel_hdmi.o \
146 intel_i2c.o \
Shashank Sharmadbe9e612016-10-14 19:56:49 +0530147 intel_lspcon.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100148 intel_lvds.o \
149 intel_panel.o \
150 intel_sdvo.o \
151 intel_tv.o
Dave Airliec0e09202008-05-29 10:09:59 +1000152
Chris Wilson98a2f412016-10-12 10:05:18 +0100153# Post-mortem debug and GPU hang state capture
154i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
Chris Wilson953c7f82017-02-13 17:15:12 +0000155i915-$(CONFIG_DRM_I915_SELFTEST) += \
156 selftests/i915_random.o \
157 selftests/i915_selftest.o
Chris Wilson98a2f412016-10-12 10:05:18 +0100158
Yu Zhangcf9d2892015-02-10 19:05:47 +0800159# virtual gpu code
160i915-y += i915_vgpu.o
161
Robert Braggeec688e2016-11-07 19:49:47 +0000162# perf code
Robert Bragg8a3003d2016-11-07 19:49:51 +0000163i915-y += i915_perf.o \
Robert Bragg5182f642017-06-13 12:23:02 +0100164 i915_oa_hsw.o \
165 i915_oa_bdw.o \
166 i915_oa_chv.o \
167 i915_oa_sklgt2.o \
168 i915_oa_sklgt3.o \
169 i915_oa_sklgt4.o \
Lionel Landwerlin6c5c1d82017-06-13 12:23:08 +0100170 i915_oa_bxt.o \
171 i915_oa_kblgt2.o \
Lionel Landwerlin28c7ef92017-06-13 12:23:09 +0100172 i915_oa_kblgt3.o \
Lionel Landwerlin22ea4f32017-09-18 12:21:24 +0100173 i915_oa_glk.o \
Lionel Landwerlin4407eaa2017-11-10 19:08:40 +0000174 i915_oa_cflgt2.o \
Lionel Landwerlin95690a02017-11-10 19:08:43 +0000175 i915_oa_cflgt3.o \
Lionel Landwerlin1de401c2018-03-26 14:39:48 +0100176 i915_oa_cnl.o \
177 i915_oa_icl.o
Robert Braggeec688e2016-11-07 19:49:47 +0000178
Zhi Wang0ad35fe2016-06-16 08:07:00 -0400179ifeq ($(CONFIG_DRM_I915_GVT),y)
180i915-y += intel_gvt.o
181include $(src)/gvt/Makefile
182endif
183
Jerome Anandeef57322017-01-25 04:27:49 +0530184# LPE Audio for VLV and CHT
185i915-y += intel_lpe_audio.o
186
Chris Wilsonc58305a2016-08-19 16:54:28 +0100187obj-$(CONFIG_DRM_I915) += i915.o