blob: 327fc448b2d5323e3f48faae78ad0fe99f7731bf [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Dave Airliec0e09202008-05-29 10:09:59 +10002#
3# Makefile for the drm device driver. This driver provides support for the
4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
5
Chris Wilson39bf4de2017-10-24 19:15:47 +01006# Add a set of useful warning flags and enable -Werror for CI to prevent
7# trivial mistakes from creeping in. We have to do this piecemeal as we reject
8# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
9# need to filter out dubious warnings. Still it is our interest
10# to keep running locally with W=1 C=1 until we are completely clean.
11#
12# Note the danger in using -Wall -Wextra is that when CI updates gcc we
13# will most likely get a sudden build breakage... Hopefully we will fix
14# new warnings before CI updates!
Kees Cook0bb95f82018-06-25 15:59:34 -070015subdir-ccflags-y := -Wall -Wextra
Chris Wilson4ab09d02017-10-30 17:29:27 +000016subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)
17subdir-ccflags-y += $(call cc-disable-warning, type-limits)
18subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
19subdir-ccflags-y += $(call cc-disable-warning, implicit-fallthrough)
Chris Wilson6a05d292018-02-08 16:16:39 +000020subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
Matthias Kaehlcke46e20682018-05-01 11:24:40 -070021# clang warnings
22subdir-ccflags-y += $(call cc-disable-warning, sign-compare)
23subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized)
24subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
Nathan Chancellorc5627462019-01-26 00:11:23 -070025subdir-ccflags-y += $(call cc-disable-warning, uninitialized)
Chris Wilson39bf4de2017-10-24 19:15:47 +010026subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
27
28# Fine grained warnings disable
Chris Wilson4ab09d02017-10-30 17:29:27 +000029CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
30CFLAGS_intel_fbdev.o = $(call cc-disable-warning, override-init)
Chris Wilson39bf4de2017-10-24 19:15:47 +010031
Chris Wilson0b1de5d2016-08-12 12:39:59 +010032subdir-ccflags-y += \
33 $(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
Chris Wilson0a793ad2016-04-13 17:35:00 +010034
Jani Nikulac2400ec2019-04-03 16:52:36 +030035# Extra header tests
Jani Nikula1032a2a2019-07-29 17:08:47 +030036header-test-pattern-$(CONFIG_DRM_I915_WERROR) := *.h
Jani Nikulac2400ec2019-04-03 16:52:36 +030037
Jani Nikula9ef424e2019-06-26 17:36:17 +030038subdir-ccflags-y += -I$(srctree)/$(src)
Chris Wilson112ed2d2019-04-24 18:48:39 +010039
Daniel Vetter2fae6a82014-03-07 09:17:21 +010040# Please keep these build lists sorted!
41
42# core driver code
Jani Nikulac2400ec2019-04-03 16:52:36 +030043i915-y += i915_drv.o \
Daniel Vetter042794b2015-07-24 13:55:10 +020044 i915_irq.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010045 i915_params.o \
Chris Wilson42f55512016-06-24 14:00:26 +010046 i915_pci.o \
Chris Wilson37d63f82019-05-28 10:29:50 +010047 i915_scatterlist.o \
Pedro Tammela79960222018-12-05 09:06:08 -020048 i915_suspend.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010049 i915_sysfs.o \
Daniel Vetter042794b2015-07-24 13:55:10 +020050 intel_csr.o \
Chris Wilson94b4f3b2016-07-05 10:40:20 +010051 intel_device_info.o \
Daniel Vetter9c065a72014-09-30 10:56:38 +020052 intel_pm.o \
Oscar Mateo7d3c4252018-04-10 09:12:46 -070053 intel_runtime_pm.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +030054 intel_sideband.o \
55 intel_uncore.o \
56 intel_wakeref.o
Chris Wilson112ed2d2019-04-24 18:48:39 +010057
58# core library code
59i915-y += \
60 i915_memcpy.o \
61 i915_mm.o \
62 i915_sw_fence.o \
63 i915_syncmap.o \
64 i915_user_extensions.o
Daniel Vetter9c065a72014-09-30 10:56:38 +020065
Daniel Vetter2fae6a82014-03-07 09:17:21 +010066i915-$(CONFIG_COMPAT) += i915_ioc32.o
Jani Nikuladf0566a2019-06-13 11:44:16 +030067i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o display/intel_pipe_crc.o
Tvrtko Ursulinb46a33e2017-11-21 18:18:45 +000068i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +010069
Chris Wilson112ed2d2019-04-24 18:48:39 +010070# "Graphics Technology" (aka we talk to the gpu)
71obj-y += gt/
72gt-y += \
73 gt/intel_breadcrumbs.o \
74 gt/intel_context.o \
75 gt/intel_engine_cs.o \
Chris Wilson750e76b2019-08-06 13:43:00 +010076 gt/intel_engine_pool.o \
Chris Wilson79ffac852019-04-24 21:07:17 +010077 gt/intel_engine_pm.o \
Chris Wilson750e76b2019-08-06 13:43:00 +010078 gt/intel_engine_user.o \
Tvrtko Ursulin24635c52019-06-21 08:07:41 +010079 gt/intel_gt.o \
Chris Wilson79ffac852019-04-24 21:07:17 +010080 gt/intel_gt_pm.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010081 gt/intel_hangcheck.o \
82 gt/intel_lrc.o \
Chris Wilson20060582019-07-04 10:19:25 +010083 gt/intel_renderstate.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010084 gt/intel_reset.o \
85 gt/intel_ringbuffer.o \
86 gt/intel_mocs.o \
87 gt/intel_sseu.o \
Tvrtko Ursulinf0c02c12019-06-21 08:08:10 +010088 gt/intel_timeline.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010089 gt/intel_workarounds.o
Chris Wilson20060582019-07-04 10:19:25 +010090# autogenerated null render state
91gt-y += \
92 gt/gen6_renderstate.o \
93 gt/gen7_renderstate.o \
94 gt/gen8_renderstate.o \
95 gt/gen9_renderstate.o
Chris Wilson112ed2d2019-04-24 18:48:39 +010096gt-$(CONFIG_DRM_I915_SELFTEST) += \
97 gt/mock_engine.o
98i915-y += $(gt-y)
99
100# GEM (Graphics Execution Management) code
Chris Wilson5e5d2e22019-05-28 10:29:42 +0100101obj-y += gem/
Chris Wilson98932142019-05-28 10:29:44 +0100102gem-y += \
Chris Wilson3f43c872019-05-28 10:29:53 +0100103 gem/i915_gem_busy.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100104 gem/i915_gem_clflush.o \
Matthew Auld6501aa42019-05-29 13:31:08 +0100105 gem/i915_gem_client_blt.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100106 gem/i915_gem_context.o \
107 gem/i915_gem_dmabuf.o \
Chris Wilsonf0e4a062019-05-28 10:29:48 +0100108 gem/i915_gem_domain.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100109 gem/i915_gem_execbuffer.o \
Chris Wilson6951e582019-05-28 10:29:51 +0100110 gem/i915_gem_fence.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100111 gem/i915_gem_internal.o \
Chris Wilson84753552019-05-28 10:29:45 +0100112 gem/i915_gem_object.o \
Matthew Auld6501aa42019-05-29 13:31:08 +0100113 gem/i915_gem_object_blt.o \
Chris Wilsonb414fcd2019-05-28 10:29:47 +0100114 gem/i915_gem_mman.o \
Chris Wilsonf0334282019-05-28 10:29:46 +0100115 gem/i915_gem_pages.o \
116 gem/i915_gem_phys.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100117 gem/i915_gem_pm.o \
118 gem/i915_gem_shmem.o \
119 gem/i915_gem_shrinker.o \
120 gem/i915_gem_stolen.o \
Chris Wilson446e2d12019-05-28 10:29:54 +0100121 gem/i915_gem_throttle.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100122 gem/i915_gem_tiling.o \
123 gem/i915_gem_userptr.o \
Chris Wilsond45a1a52019-05-28 10:29:52 +0100124 gem/i915_gem_wait.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100125 gem/i915_gemfs.o
Chris Wilson64d6c502019-02-05 13:00:02 +0000126i915-y += \
Chris Wilson98932142019-05-28 10:29:44 +0100127 $(gem-y) \
Chris Wilson64d6c502019-02-05 13:00:02 +0000128 i915_active.o \
129 i915_cmd_parser.o \
Chris Wilsonb47eb4a2010-08-07 11:01:23 +0100130 i915_gem_evict.o \
Joonas Lahtinenb42fe9c2016-11-11 12:43:54 +0200131 i915_gem_fence_reg.o \
Chris Wilson54cf91d2010-11-25 18:00:26 +0000132 i915_gem_gtt.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100133 i915_gem.o \
Chris Wilson32eb6bc2019-02-28 10:20:33 +0000134 i915_globals.o \
Lionel Landwerlina446ae22018-03-06 12:28:56 +0000135 i915_query.o \
Chris Wilsone61e0f52018-02-21 09:56:36 +0000136 i915_request.o \
Chris Wilsone2f34962018-10-01 15:47:54 +0100137 i915_scheduler.o \
Chris Wilson1c5d22f2009-08-25 11:15:50 +0100138 i915_trace_points.o \
Joonas Lahtinenb42fe9c2016-11-11 12:43:54 +0200139 i915_vma.o \
Jackie Li6b0478f2018-03-13 17:32:50 -0700140 intel_wopcm.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100141
Alex Dai33a732f2015-08-12 15:43:36 +0100142# general-purpose microcontroller (GuC) support
Daniele Ceraolo Spurio0f261b22019-07-13 11:00:11 +0100143obj-y += gt/uc/
144i915-y += gt/uc/intel_uc.o \
145 gt/uc/intel_uc_fw.o \
146 gt/uc/intel_guc.o \
147 gt/uc/intel_guc_ads.o \
148 gt/uc/intel_guc_ct.o \
149 gt/uc/intel_guc_fw.o \
150 gt/uc/intel_guc_log.o \
151 gt/uc/intel_guc_submission.o \
152 gt/uc/intel_huc.o \
153 gt/uc/intel_huc_fw.o
Alex Dai33a732f2015-08-12 15:43:36 +0100154
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100155# modesetting core code
Jani Nikuladf0566a2019-06-13 11:44:16 +0300156obj-y += display/
157i915-y += \
158 display/intel_atomic.o \
159 display/intel_atomic_plane.o \
160 display/intel_audio.o \
161 display/intel_bios.o \
162 display/intel_bw.o \
163 display/intel_cdclk.o \
164 display/intel_color.o \
165 display/intel_combo_phy.o \
166 display/intel_connector.o \
167 display/intel_display.o \
168 display/intel_display_power.o \
169 display/intel_dpio_phy.o \
170 display/intel_dpll_mgr.o \
171 display/intel_fbc.o \
172 display/intel_fifo_underrun.o \
173 display/intel_frontbuffer.o \
174 display/intel_hdcp.o \
175 display/intel_hotplug.o \
176 display/intel_lpe_audio.o \
177 display/intel_overlay.o \
178 display/intel_psr.o \
179 display/intel_quirks.o \
Imre Deakbc853282019-06-28 17:36:15 +0300180 display/intel_sprite.o \
181 display/intel_tc.o
Jani Nikuladf0566a2019-06-13 11:44:16 +0300182i915-$(CONFIG_ACPI) += \
183 display/intel_acpi.o \
184 display/intel_opregion.o
185i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
186 display/intel_fbdev.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100187
188# modesetting output/encoder code
Jani Nikula379bc102019-06-13 11:44:15 +0300189i915-y += \
190 display/dvo_ch7017.o \
191 display/dvo_ch7xxx.o \
192 display/dvo_ivch.o \
193 display/dvo_ns2501.o \
194 display/dvo_sil164.o \
195 display/dvo_tfp410.o \
196 display/icl_dsi.o \
197 display/intel_crt.o \
198 display/intel_ddi.o \
199 display/intel_dp.o \
200 display/intel_dp_aux_backlight.o \
201 display/intel_dp_link_training.o \
202 display/intel_dp_mst.o \
203 display/intel_dsi.o \
204 display/intel_dsi_dcs_backlight.o \
205 display/intel_dsi_vbt.o \
206 display/intel_dvo.o \
207 display/intel_gmbus.o \
208 display/intel_hdmi.o \
209 display/intel_lspcon.o \
210 display/intel_lvds.o \
211 display/intel_panel.o \
212 display/intel_sdvo.o \
213 display/intel_tv.o \
214 display/intel_vdsc.o \
215 display/vlv_dsi.o \
216 display/vlv_dsi_pll.o
Dave Airliec0e09202008-05-29 10:09:59 +1000217
Michal Wajdeczko5ed7a0c2019-06-26 12:38:26 +0000218# perf code
219obj-y += oa/
220i915-y += \
221 oa/i915_oa_hsw.o \
222 oa/i915_oa_bdw.o \
223 oa/i915_oa_chv.o \
224 oa/i915_oa_sklgt2.o \
225 oa/i915_oa_sklgt3.o \
226 oa/i915_oa_sklgt4.o \
227 oa/i915_oa_bxt.o \
228 oa/i915_oa_kblgt2.o \
229 oa/i915_oa_kblgt3.o \
230 oa/i915_oa_glk.o \
231 oa/i915_oa_cflgt2.o \
232 oa/i915_oa_cflgt3.o \
233 oa/i915_oa_cnl.o \
234 oa/i915_oa_icl.o
235i915-y += i915_perf.o
236
Chris Wilson98a2f412016-10-12 10:05:18 +0100237# Post-mortem debug and GPU hang state capture
238i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
Chris Wilson953c7f82017-02-13 17:15:12 +0000239i915-$(CONFIG_DRM_I915_SELFTEST) += \
Chris Wilson10be98a2019-05-28 10:29:49 +0100240 gem/selftests/igt_gem_utils.o \
Chris Wilson953c7f82017-02-13 17:15:12 +0000241 selftests/i915_random.o \
Chris Wilson98dc0452018-05-05 10:10:13 +0100242 selftests/i915_selftest.o \
Tvrtko Ursulin8d2f6e22018-11-30 08:02:53 +0000243 selftests/igt_flush_test.o \
Chris Wilsone4a8c812019-01-21 22:20:47 +0000244 selftests/igt_live_test.o \
Tvrtko Ursulin28d6ccc2018-12-03 12:50:11 +0000245 selftests/igt_reset.o \
Tvrtko Ursulin8d2f6e22018-11-30 08:02:53 +0000246 selftests/igt_spinner.o
Chris Wilson98a2f412016-10-12 10:05:18 +0100247
Yu Zhangcf9d2892015-02-10 19:05:47 +0800248# virtual gpu code
249i915-y += i915_vgpu.o
250
Zhi Wang0ad35fe2016-06-16 08:07:00 -0400251ifeq ($(CONFIG_DRM_I915_GVT),y)
252i915-y += intel_gvt.o
253include $(src)/gvt/Makefile
254endif
255
Chris Wilsonc58305a2016-08-19 16:54:28 +0100256obj-$(CONFIG_DRM_I915) += i915.o
Zhenyu Wang9bdb0732018-12-07 16:16:53 +0800257obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o