Paul Walmsley | 7b9487a | 2019-04-30 13:50:58 -0700 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Jean-Christop PLAGNIOL-VILLARD | 6d803ba | 2010-11-17 10:04:33 +0100 | [diff] [blame] | 2 | |
| 3 | config CLKDEV_LOOKUP |
| 4 | bool |
| 5 | select HAVE_CLK |
Kyungmin Park | aa3831c | 2011-07-18 16:34:54 +0900 | [diff] [blame] | 6 | |
Shawn Guo | 5c77f56 | 2011-12-20 14:46:38 +0800 | [diff] [blame] | 7 | config HAVE_CLK_PREPARE |
| 8 | bool |
| 9 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 10 | config COMMON_CLK |
| 11 | bool |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 12 | select HAVE_CLK_PREPARE |
Rob Herring | 01033be | 2012-04-09 15:24:58 -0500 | [diff] [blame] | 13 | select CLKDEV_LOOKUP |
Pranith Kumar | 83fe27e | 2014-12-05 11:24:45 -0500 | [diff] [blame] | 14 | select SRCU |
Andy Shevchenko | 0777591 | 2015-09-22 18:54:11 +0300 | [diff] [blame] | 15 | select RATIONAL |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 16 | ---help--- |
| 17 | The common clock framework is a single definition of struct |
| 18 | clk, useful across many platforms, as well as an |
| 19 | implementation of the clock API in include/linux/clk.h. |
| 20 | Architectures utilizing the common struct clk should select |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 21 | this option. |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 22 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 23 | menu "Common Clock Framework" |
| 24 | depends on COMMON_CLK |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 25 | |
Mark Brown | f05259a | 2012-05-17 10:04:57 +0100 | [diff] [blame] | 26 | config COMMON_CLK_WM831X |
| 27 | tristate "Clock driver for WM831x/2x PMICs" |
| 28 | depends on MFD_WM831X |
| 29 | ---help--- |
| 30 | Supports the clocking subsystem of the WM831x/2x series of |
Masanari Iida | fe4e437 | 2014-10-17 00:09:24 +0900 | [diff] [blame] | 31 | PMICs from Wolfson Microelectronics. |
Mark Brown | f05259a | 2012-05-17 10:04:57 +0100 | [diff] [blame] | 32 | |
Pawel Moll | 5ee2b87 | 2013-09-17 17:16:15 +0100 | [diff] [blame] | 33 | source "drivers/clk/versatile/Kconfig" |
Linus Walleij | f9a6aa4 | 2012-08-06 18:32:08 +0200 | [diff] [blame] | 34 | |
Eugeniy Paltsev | daeeb43 | 2017-08-25 20:39:14 +0300 | [diff] [blame] | 35 | config CLK_HSDK |
| 36 | bool "PLL Driver for HSDK platform" |
| 37 | depends on OF || COMPILE_TEST |
| 38 | ---help--- |
| 39 | This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs |
| 40 | control. |
| 41 | |
Jonghwa Lee | 73118e6 | 2012-08-28 17:54:28 +0900 | [diff] [blame] | 42 | config COMMON_CLK_MAX77686 |
Laxman Dewangan | 5a227cd | 2016-06-17 16:21:07 +0530 | [diff] [blame] | 43 | tristate "Clock driver for Maxim 77620/77686/77802 MFD" |
Krzysztof Kozlowski | 9c1b305 | 2016-10-02 22:58:14 +0200 | [diff] [blame] | 44 | depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST |
Jonghwa Lee | 73118e6 | 2012-08-28 17:54:28 +0900 | [diff] [blame] | 45 | ---help--- |
Laxman Dewangan | 5a227cd | 2016-06-17 16:21:07 +0530 | [diff] [blame] | 46 | This driver supports Maxim 77620/77686/77802 crystal oscillator |
| 47 | clock. |
Javier Martinez Canillas | 83ccf16 | 2014-08-18 10:33:03 +0200 | [diff] [blame] | 48 | |
Daniel Mack | 33f5104 | 2018-07-06 20:53:03 +0200 | [diff] [blame] | 49 | config COMMON_CLK_MAX9485 |
| 50 | tristate "Maxim 9485 Programmable Clock Generator" |
| 51 | depends on I2C |
| 52 | help |
| 53 | This driver supports Maxim 9485 Programmable Audio Clock Generator |
| 54 | |
Chris Zhong | 038b892 | 2014-10-13 15:52:44 -0700 | [diff] [blame] | 55 | config COMMON_CLK_RK808 |
Tony Xie | 8ed14401 | 2019-06-21 06:34:55 -0400 | [diff] [blame] | 56 | tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" |
Chris Zhong | 038b892 | 2014-10-13 15:52:44 -0700 | [diff] [blame] | 57 | depends on MFD_RK808 |
| 58 | ---help--- |
Tony Xie | 8ed14401 | 2019-06-21 06:34:55 -0400 | [diff] [blame] | 59 | This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. |
| 60 | These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. |
| 61 | Clkout1 is always on, Clkout2 can off by control register. |
Chris Zhong | 038b892 | 2014-10-13 15:52:44 -0700 | [diff] [blame] | 62 | |
Daniel Lezcano | b68adc2 | 2017-04-17 19:19:25 +0200 | [diff] [blame] | 63 | config COMMON_CLK_HI655X |
Riku Voipio | 3a49afb | 2018-03-12 12:49:45 +0200 | [diff] [blame] | 64 | tristate "Clock driver for Hi655x" if EXPERT |
| 65 | depends on (MFD_HI655X_PMIC || COMPILE_TEST) |
| 66 | depends on REGMAP |
| 67 | default MFD_HI655X_PMIC |
Daniel Lezcano | b68adc2 | 2017-04-17 19:19:25 +0200 | [diff] [blame] | 68 | ---help--- |
| 69 | This driver supports the hi655x PMIC clock. This |
| 70 | multi-function device has one fixed-rate oscillator, clocked |
| 71 | at 32KHz. |
| 72 | |
Sudeep Holla | 6d6a1d8 | 2017-06-13 17:19:36 +0100 | [diff] [blame] | 73 | config COMMON_CLK_SCMI |
| 74 | tristate "Clock driver controlled via SCMI interface" |
| 75 | depends on ARM_SCMI_PROTOCOL || COMPILE_TEST |
| 76 | ---help--- |
| 77 | This driver provides support for clocks that are controlled |
| 78 | by firmware that implements the SCMI interface. |
| 79 | |
| 80 | This driver uses SCMI Message Protocol to interact with the |
| 81 | firmware providing all the clock controls. |
| 82 | |
Sudeep Holla | cd52c2a | 2015-03-30 10:59:52 +0100 | [diff] [blame] | 83 | config COMMON_CLK_SCPI |
| 84 | tristate "Clock driver controlled via SCPI interface" |
| 85 | depends on ARM_SCPI_PROTOCOL || COMPILE_TEST |
| 86 | ---help--- |
| 87 | This driver provides support for clocks that are controlled |
| 88 | by firmware that implements the SCPI interface. |
| 89 | |
| 90 | This driver uses SCPI Message Protocol to interact with the |
| 91 | firmware providing all the clock controls. |
| 92 | |
Mike Looijmans | 3044a86 | 2019-05-17 15:23:52 +0200 | [diff] [blame] | 93 | config COMMON_CLK_SI5341 |
| 94 | tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" |
| 95 | depends on I2C |
| 96 | select REGMAP_I2C |
| 97 | help |
| 98 | This driver supports Silicon Labs Si5341 and Si5340 programmable clock |
| 99 | generators. Not all features of these chips are currently supported |
| 100 | by the driver, in particular it only supports XTAL input. The chip can |
| 101 | be pre-programmed to support other configurations and features not yet |
| 102 | implemented in the driver. |
| 103 | |
Sebastian Hesselbarth | 9abd5f0 | 2013-04-11 21:42:29 +0200 | [diff] [blame] | 104 | config COMMON_CLK_SI5351 |
| 105 | tristate "Clock driver for SiLabs 5351A/B/C" |
| 106 | depends on I2C |
| 107 | select REGMAP_I2C |
| 108 | select RATIONAL |
| 109 | ---help--- |
| 110 | This driver supports Silicon Labs 5351A/B/C programmable clock |
| 111 | generators. |
| 112 | |
Mike Looijmans | 8ce20e6 | 2015-10-02 09:15:29 +0200 | [diff] [blame] | 113 | config COMMON_CLK_SI514 |
| 114 | tristate "Clock driver for SiLabs 514 devices" |
| 115 | depends on I2C |
| 116 | depends on OF |
| 117 | select REGMAP_I2C |
| 118 | help |
Mike Looijmans | 8ce20e6 | 2015-10-02 09:15:29 +0200 | [diff] [blame] | 119 | This driver supports the Silicon Labs 514 programmable clock |
| 120 | generator. |
| 121 | |
Mike Looijmans | 953cc3e | 2018-03-20 09:15:41 +0100 | [diff] [blame] | 122 | config COMMON_CLK_SI544 |
| 123 | tristate "Clock driver for SiLabs 544 devices" |
| 124 | depends on I2C |
| 125 | select REGMAP_I2C |
| 126 | help |
Mike Looijmans | 953cc3e | 2018-03-20 09:15:41 +0100 | [diff] [blame] | 127 | This driver supports the Silicon Labs 544 programmable clock |
| 128 | generator. |
| 129 | |
Soren Brinkmann | 1459c83 | 2013-09-21 16:40:39 -0700 | [diff] [blame] | 130 | config COMMON_CLK_SI570 |
| 131 | tristate "Clock driver for SiLabs 570 and compatible devices" |
| 132 | depends on I2C |
| 133 | depends on OF |
| 134 | select REGMAP_I2C |
| 135 | help |
Soren Brinkmann | 1459c83 | 2013-09-21 16:40:39 -0700 | [diff] [blame] | 136 | This driver supports Silicon Labs 570/571/598/599 programmable |
| 137 | clock generators. |
| 138 | |
Manivannan Sadhasivam | 1ab4601 | 2019-11-15 21:59:00 +0530 | [diff] [blame] | 139 | config COMMON_CLK_BM1880 |
| 140 | bool "Clock driver for Bitmain BM1880 SoC" |
| 141 | depends on ARCH_BITMAIN || COMPILE_TEST |
| 142 | default ARCH_BITMAIN |
| 143 | help |
| 144 | This driver supports the clocks on Bitmain BM1880 SoC. |
| 145 | |
Mike Looijmans | c7d5a46b | 2015-11-03 12:55:54 +0100 | [diff] [blame] | 146 | config COMMON_CLK_CDCE706 |
| 147 | tristate "Clock driver for TI CDCE706 clock synthesizer" |
| 148 | depends on I2C |
| 149 | select REGMAP_I2C |
| 150 | select RATIONAL |
| 151 | ---help--- |
| 152 | This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. |
| 153 | |
Mike Looijmans | 19fbbbb | 2015-06-03 07:25:19 +0200 | [diff] [blame] | 154 | config COMMON_CLK_CDCE925 |
Akinobu Mita | 5508124 | 2017-01-01 03:04:36 +0900 | [diff] [blame] | 155 | tristate "Clock driver for TI CDCE913/925/937/949 devices" |
Mike Looijmans | 19fbbbb | 2015-06-03 07:25:19 +0200 | [diff] [blame] | 156 | depends on I2C |
| 157 | depends on OF |
| 158 | select REGMAP_I2C |
| 159 | help |
Akinobu Mita | 5508124 | 2017-01-01 03:04:36 +0900 | [diff] [blame] | 160 | This driver supports the TI CDCE913/925/937/949 programmable clock |
| 161 | synthesizer. Each chip has different number of PLLs and outputs. |
| 162 | For example, the CDCE925 contains two PLLs with spread-spectrum |
| 163 | clocking support and five output dividers. The driver only supports |
| 164 | the following setup, and uses a fixed setting for the output muxes. |
Mike Looijmans | 19fbbbb | 2015-06-03 07:25:19 +0200 | [diff] [blame] | 165 | Y1 is derived from the input clock |
| 166 | Y2 and Y3 derive from PLL1 |
| 167 | Y4 and Y5 derive from PLL2 |
| 168 | Given a target output frequency, the driver will set the PLL and |
| 169 | divider to best approximate the desired output. |
| 170 | |
Kuninori Morimoto | 64dfbe2 | 2015-11-10 01:15:09 +0000 | [diff] [blame] | 171 | config COMMON_CLK_CS2000_CP |
| 172 | tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" |
| 173 | depends on I2C |
| 174 | help |
| 175 | If you say yes here you get support for the CS2000 clock multiplier. |
| 176 | |
Linus Walleij | 846423f | 2017-06-21 09:59:52 +0200 | [diff] [blame] | 177 | config COMMON_CLK_GEMINI |
| 178 | bool "Clock driver for Cortina Systems Gemini SoC" |
| 179 | depends on ARCH_GEMINI || COMPILE_TEST |
| 180 | select MFD_SYSCON |
| 181 | select RESET_CONTROLLER |
| 182 | ---help--- |
| 183 | This driver supports the SoC clocks on the Cortina Systems Gemini |
| 184 | platform, also known as SL3516 or CS3516. |
| 185 | |
Joel Stanley | 5eda5d7 | 2017-12-22 13:15:18 +1030 | [diff] [blame] | 186 | config COMMON_CLK_ASPEED |
| 187 | bool "Clock driver for Aspeed BMC SoCs" |
| 188 | depends on ARCH_ASPEED || COMPILE_TEST |
| 189 | default ARCH_ASPEED |
| 190 | select MFD_SYSCON |
| 191 | select RESET_CONTROLLER |
| 192 | ---help--- |
| 193 | This driver supports the SoC clocks on the Aspeed BMC platforms. |
| 194 | |
| 195 | The G4 and G5 series, including the ast2400 and ast2500, are supported |
| 196 | by this driver. |
| 197 | |
Yadwinder Singh Brar | 7cc560d | 2013-07-07 17:14:20 +0530 | [diff] [blame] | 198 | config COMMON_CLK_S2MPS11 |
Krzysztof Kozlowski | e8b60a4 | 2014-05-21 13:23:01 +0200 | [diff] [blame] | 199 | tristate "Clock driver for S2MPS1X/S5M8767 MFD" |
Krzysztof Kozlowski | 9c1b305 | 2016-10-02 22:58:14 +0200 | [diff] [blame] | 200 | depends on MFD_SEC_CORE || COMPILE_TEST |
Yadwinder Singh Brar | 7cc560d | 2013-07-07 17:14:20 +0530 | [diff] [blame] | 201 | ---help--- |
Krzysztof Kozlowski | e8b60a4 | 2014-05-21 13:23:01 +0200 | [diff] [blame] | 202 | This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator |
| 203 | clock. These multi-function devices have two (S2MPS14) or three |
| 204 | (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. |
Yadwinder Singh Brar | 7cc560d | 2013-07-07 17:14:20 +0530 | [diff] [blame] | 205 | |
Peter Ujfalusi | f9f8c04 | 2012-09-14 17:30:27 +0300 | [diff] [blame] | 206 | config CLK_TWL6040 |
| 207 | tristate "External McPDM functional clock from twl6040" |
| 208 | depends on TWL6040_CORE |
| 209 | ---help--- |
| 210 | Enable the external functional clock support on OMAP4+ platforms for |
| 211 | McPDM. McPDM module is using the external bit clock on the McPDM bus |
| 212 | as functional clock. |
| 213 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 214 | config COMMON_CLK_AXI_CLKGEN |
| 215 | tristate "AXI clkgen driver" |
Javier Martinez Canillas | 4a7748c | 2015-10-13 16:18:18 +0200 | [diff] [blame] | 216 | depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 217 | help |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 218 | Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx |
| 219 | FPGAs. It is commonly used in Analog Devices' reference designs. |
| 220 | |
Tang Yuantian | 93a17c0 | 2015-01-15 14:03:41 +0800 | [diff] [blame] | 221 | config CLK_QORIQ |
| 222 | bool "Clock driver for Freescale QorIQ platforms" |
Linus Torvalds | 2f4bf52 | 2015-11-05 23:38:43 -0800 | [diff] [blame] | 223 | depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF |
Tang Yuantian | 555eae9 | 2013-04-09 16:46:26 +0800 | [diff] [blame] | 224 | ---help--- |
Tang Yuantian | 93a17c0 | 2015-01-15 14:03:41 +0800 | [diff] [blame] | 225 | This adds the clock driver support for Freescale QorIQ platforms |
| 226 | using common clock framework. |
Tang Yuantian | 555eae9 | 2013-04-09 16:46:26 +0800 | [diff] [blame] | 227 | |
Loc Ho | 308964c | 2013-06-26 11:56:09 -0600 | [diff] [blame] | 228 | config COMMON_CLK_XGENE |
| 229 | bool "Clock driver for APM XGene SoC" |
Marc Gonzalez | ce9a104 | 2019-06-12 17:03:56 +0200 | [diff] [blame] | 230 | default ARCH_XGENE |
Javier Martinez Canillas | 4a7748c | 2015-10-13 16:18:18 +0200 | [diff] [blame] | 231 | depends on ARM64 || COMPILE_TEST |
Loc Ho | 308964c | 2013-06-26 11:56:09 -0600 | [diff] [blame] | 232 | ---help--- |
| 233 | Sypport for the APM X-Gene SoC reference, PLL, and device clocks. |
| 234 | |
Charles Keepax | 76c5478 | 2019-03-19 13:37:00 +0000 | [diff] [blame] | 235 | config COMMON_CLK_LOCHNAGAR |
| 236 | tristate "Cirrus Logic Lochnagar clock driver" |
| 237 | depends on MFD_LOCHNAGAR |
| 238 | help |
| 239 | This driver supports the clocking features of the Cirrus Logic |
| 240 | Lochnagar audio development board. |
| 241 | |
Vladimir Zapolskiy | f7c82a6 | 2015-12-06 12:45:57 +0200 | [diff] [blame] | 242 | config COMMON_CLK_NXP |
| 243 | def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) |
| 244 | select REGMAP_MMIO if ARCH_LPC32XX |
Ezequiel Garcia | 72ad679 | 2016-05-16 12:45:36 -0300 | [diff] [blame] | 245 | select MFD_SYSCON if ARCH_LPC18XX |
Vladimir Zapolskiy | f7c82a6 | 2015-12-06 12:45:57 +0200 | [diff] [blame] | 246 | ---help--- |
| 247 | Support for clock providers on NXP platforms. |
| 248 | |
Peter Ujfalusi | 942d1d6 | 2014-06-27 09:01:11 +0300 | [diff] [blame] | 249 | config COMMON_CLK_PALMAS |
| 250 | tristate "Clock driver for TI Palmas devices" |
| 251 | depends on MFD_PALMAS |
| 252 | ---help--- |
| 253 | This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO |
| 254 | using common clock framework. |
| 255 | |
Philipp Zabel | 9a74ccd | 2015-02-13 20:18:52 +0100 | [diff] [blame] | 256 | config COMMON_CLK_PWM |
| 257 | tristate "Clock driver for PWMs used as clock outputs" |
| 258 | depends on PWM |
| 259 | ---help--- |
| 260 | Adapter driver so that any PWM output can be (mis)used as clock signal |
| 261 | at 50% duty cycle. |
| 262 | |
Robert Jarzmik | 98d147f | 2014-10-01 23:39:29 +0200 | [diff] [blame] | 263 | config COMMON_CLK_PXA |
| 264 | def_bool COMMON_CLK && ARCH_PXA |
| 265 | ---help--- |
Mike Looijmans | 048c58b | 2015-11-03 12:55:53 +0100 | [diff] [blame] | 266 | Support for the Marvell PXA SoC. |
Robert Jarzmik | 98d147f | 2014-10-01 23:39:29 +0200 | [diff] [blame] | 267 | |
Purna Chandra Mandal | ce6e118 | 2016-05-13 13:22:40 +0530 | [diff] [blame] | 268 | config COMMON_CLK_PIC32 |
| 269 | def_bool COMMON_CLK && MACH_PIC32 |
| 270 | |
Neil Armstrong | 0bbd72b | 2016-04-18 12:01:35 +0200 | [diff] [blame] | 271 | config COMMON_CLK_OXNAS |
| 272 | bool "Clock driver for the OXNAS SoC Family" |
Jean Delvare | 821f994 | 2016-07-07 09:18:44 +0200 | [diff] [blame] | 273 | depends on ARCH_OXNAS || COMPILE_TEST |
Neil Armstrong | 0bbd72b | 2016-04-18 12:01:35 +0200 | [diff] [blame] | 274 | select MFD_SYSCON |
| 275 | ---help--- |
| 276 | Support for the OXNAS SoC Family clocks. |
| 277 | |
Marek Vasut | 3e1aec4e | 2017-01-12 02:03:24 +0100 | [diff] [blame] | 278 | config COMMON_CLK_VC5 |
Marek Vasut | dbf6b16 | 2017-07-09 15:28:14 +0200 | [diff] [blame] | 279 | tristate "Clock driver for IDT VersaClock 5,6 devices" |
Marek Vasut | 3e1aec4e | 2017-01-12 02:03:24 +0100 | [diff] [blame] | 280 | depends on I2C |
| 281 | depends on OF |
| 282 | select REGMAP_I2C |
| 283 | help |
Marek Vasut | dbf6b16 | 2017-07-09 15:28:14 +0200 | [diff] [blame] | 284 | This driver supports the IDT VersaClock 5 and VersaClock 6 |
| 285 | programmable clock generators. |
Marek Vasut | 3e1aec4e | 2017-01-12 02:03:24 +0100 | [diff] [blame] | 286 | |
Gabriel Fernandez | 9bee94e | 2018-03-08 17:53:55 +0100 | [diff] [blame] | 287 | config COMMON_CLK_STM32MP157 |
| 288 | def_bool COMMON_CLK && MACH_STM32MP157 |
| 289 | help |
Gabriel Fernandez | 9bee94e | 2018-03-08 17:53:55 +0100 | [diff] [blame] | 290 | Support for stm32mp157 SoC family clocks |
| 291 | |
Benjamin Gaignard | da32d35 | 2018-03-12 10:32:48 +0100 | [diff] [blame] | 292 | config COMMON_CLK_STM32F |
Gabriel Fernandez | 9a16060 | 2018-05-03 08:40:09 +0200 | [diff] [blame] | 293 | def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) |
Benjamin Gaignard | da32d35 | 2018-03-12 10:32:48 +0100 | [diff] [blame] | 294 | help |
Benjamin Gaignard | da32d35 | 2018-03-12 10:32:48 +0100 | [diff] [blame] | 295 | Support for stm32f4 and stm32f7 SoC families clocks |
| 296 | |
| 297 | config COMMON_CLK_STM32H7 |
Gabriel Fernandez | 9a16060 | 2018-05-03 08:40:09 +0200 | [diff] [blame] | 298 | def_bool COMMON_CLK && MACH_STM32H743 |
Benjamin Gaignard | da32d35 | 2018-03-12 10:32:48 +0100 | [diff] [blame] | 299 | help |
Benjamin Gaignard | da32d35 | 2018-03-12 10:32:48 +0100 | [diff] [blame] | 300 | Support for stm32h7 SoC family clocks |
| 301 | |
Matti Vaittinen | 2e62246 | 2018-12-07 12:01:44 +0200 | [diff] [blame] | 302 | config COMMON_CLK_BD718XX |
| 303 | tristate "Clock driver for ROHM BD718x7 PMIC" |
Matti Vaittinen | 0dae7f5 | 2019-06-03 10:25:39 +0300 | [diff] [blame] | 304 | depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 |
Matti Vaittinen | 2e62246 | 2018-12-07 12:01:44 +0200 | [diff] [blame] | 305 | help |
Matti Vaittinen | 0dae7f5 | 2019-06-03 10:25:39 +0300 | [diff] [blame] | 306 | This driver supports ROHM BD71837, ROHM BD71847 and |
| 307 | ROHM BD70528 PMICs clock gates. |
Matti Vaittinen | 2e62246 | 2018-12-07 12:01:44 +0200 | [diff] [blame] | 308 | |
Jan Kotas | 50cc4ca | 2018-12-13 12:49:29 +0000 | [diff] [blame] | 309 | config COMMON_CLK_FIXED_MMIO |
| 310 | bool "Clock driver for Memory Mapped Fixed values" |
| 311 | depends on COMMON_CLK && OF |
| 312 | help |
| 313 | Support for Memory Mapped IO Fixed clocks |
| 314 | |
Manivannan Sadhasivam | 3495e29 | 2018-03-26 23:08:57 +0530 | [diff] [blame] | 315 | source "drivers/clk/actions/Kconfig" |
Paul Walmsley | 7b9487a | 2019-04-30 13:50:58 -0700 | [diff] [blame] | 316 | source "drivers/clk/analogbits/Kconfig" |
Stephen Boyd | 64a12c5 | 2015-05-14 17:38:21 -0700 | [diff] [blame] | 317 | source "drivers/clk/bcm/Kconfig" |
Bintian Wang | 72ea486 | 2015-05-29 10:08:38 +0800 | [diff] [blame] | 318 | source "drivers/clk/hisilicon/Kconfig" |
Paul Burton | 6b0fd6c | 2017-06-17 13:52:47 -0700 | [diff] [blame] | 319 | source "drivers/clk/imgtec/Kconfig" |
Aisheng Dong | 3a48d91 | 2018-12-13 15:42:50 +0000 | [diff] [blame] | 320 | source "drivers/clk/imx/Kconfig" |
Paul Cercueil | 0880fb8 | 2018-08-23 15:17:41 +0200 | [diff] [blame] | 321 | source "drivers/clk/ingenic/Kconfig" |
Tero Kristo | b745c07 | 2017-06-13 10:09:27 +0300 | [diff] [blame] | 322 | source "drivers/clk/keystone/Kconfig" |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 323 | source "drivers/clk/mediatek/Kconfig" |
Michael Turquette | cb7c47d | 2016-05-23 14:29:13 -0700 | [diff] [blame] | 324 | source "drivers/clk/meson/Kconfig" |
Sebastian Hesselbarth | 97fa4cf | 2012-11-17 15:22:22 +0100 | [diff] [blame] | 325 | source "drivers/clk/mvebu/Kconfig" |
James Liao | b9e65eb | 2016-01-28 16:58:57 +0800 | [diff] [blame] | 326 | source "drivers/clk/qcom/Kconfig" |
Geert Uytterhoeven | a5bd7f7 | 2016-04-13 11:08:42 +0200 | [diff] [blame] | 327 | source "drivers/clk/renesas/Kconfig" |
Pankaj Dubey | 4ce9b85e | 2014-05-08 13:07:08 +0900 | [diff] [blame] | 328 | source "drivers/clk/samsung/Kconfig" |
Paul Walmsley | 30b8e27 | 2019-04-30 13:51:00 -0700 | [diff] [blame] | 329 | source "drivers/clk/sifive/Kconfig" |
Chunyan Zhang | d41f59f | 2017-12-07 20:57:05 +0800 | [diff] [blame] | 330 | source "drivers/clk/sprd/Kconfig" |
Maxime Ripard | 49c726d | 2019-03-19 15:37:59 +0100 | [diff] [blame] | 331 | source "drivers/clk/sunxi/Kconfig" |
Maxime Ripard | 1d80c14 | 2016-06-29 21:05:23 +0200 | [diff] [blame] | 332 | source "drivers/clk/sunxi-ng/Kconfig" |
Thierry Reding | 31b52ba | 2015-04-01 09:10:58 +0200 | [diff] [blame] | 333 | source "drivers/clk/tegra/Kconfig" |
Tony Lindgren | 2133049 | 2016-02-26 09:35:05 -0800 | [diff] [blame] | 334 | source "drivers/clk/ti/Kconfig" |
Masahiro Yamada | 734d82f | 2016-09-16 16:40:03 +0900 | [diff] [blame] | 335 | source "drivers/clk/uniphier/Kconfig" |
Jolly Shah | 3fde0e1 | 2018-10-08 11:21:46 -0700 | [diff] [blame] | 336 | source "drivers/clk/zynqmp/Kconfig" |
James Liao | b9e65eb | 2016-01-28 16:58:57 +0800 | [diff] [blame] | 337 | |
| 338 | endmenu |