blob: 91849dd6422384c5e7ea44e76533bf9a34173752 [file] [log] [blame]
Michael Barkowski23308c52007-03-19 09:15:28 -05001/*
2 * MPC832x RDB Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/ {
13 model = "MPC8323ERDB";
14 compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB";
15 #address-cells = <1>;
16 #size-cells = <1>;
17
18 cpus {
19 #address-cells = <1>;
20 #size-cells = <0>;
21
22 PowerPC,8323@0 {
23 device_type = "cpu";
24 reg = <0>;
25 d-cache-line-size = <20>; // 32 bytes
26 i-cache-line-size = <20>; // 32 bytes
27 d-cache-size = <4000>; // L1, 16K
28 i-cache-size = <4000>; // L1, 16K
29 timebase-frequency = <0>;
30 bus-frequency = <0>;
31 clock-frequency = <0>;
Michael Barkowski23308c52007-03-19 09:15:28 -050032 };
33 };
34
35 memory {
36 device_type = "memory";
37 reg = <00000000 04000000>;
38 };
39
40 soc8323@e0000000 {
41 #address-cells = <1>;
42 #size-cells = <1>;
Michael Barkowski23308c52007-03-19 09:15:28 -050043 device_type = "soc";
44 ranges = <0 e0000000 00100000>;
45 reg = <e0000000 00000200>;
46 bus-frequency = <0>;
47
48 wdt@200 {
49 device_type = "watchdog";
50 compatible = "mpc83xx_wdt";
51 reg = <200 100>;
52 };
53
54 i2c@3000 {
Kumar Galaec9686c2007-12-11 23:17:24 -060055 #address-cells = <1>;
56 #size-cells = <0>;
57 cell-index = <0>;
Michael Barkowski23308c52007-03-19 09:15:28 -050058 compatible = "fsl-i2c";
59 reg = <3000 100>;
60 interrupts = <e 8>;
61 interrupt-parent = <&pic>;
62 dfsrr;
63 };
64
65 serial@4500 {
66 device_type = "serial";
67 compatible = "ns16550";
68 reg = <4500 100>;
69 clock-frequency = <0>;
70 interrupts = <9 8>;
71 interrupt-parent = <&pic>;
72 };
73
74 serial@4600 {
75 device_type = "serial";
76 compatible = "ns16550";
77 reg = <4600 100>;
78 clock-frequency = <0>;
79 interrupts = <a 8>;
80 interrupt-parent = <&pic>;
81 };
82
83 crypto@30000 {
84 device_type = "crypto";
85 model = "SEC2";
86 compatible = "talitos";
87 reg = <30000 7000>;
88 interrupts = <b 8>;
89 interrupt-parent = <&pic>;
90 /* Rev. 2.2 */
91 num-channels = <1>;
92 channel-fifo-len = <18>;
93 exec-units-mask = <0000004c>;
94 descriptor-types-mask = <0122003f>;
95 };
96
Michael Barkowski23308c52007-03-19 09:15:28 -050097 pic:pic@700 {
98 interrupt-controller;
99 #address-cells = <0>;
100 #interrupt-cells = <2>;
101 reg = <700 100>;
Michael Barkowski23308c52007-03-19 09:15:28 -0500102 device_type = "ipic";
103 };
104
105 par_io@1400 {
106 reg = <1400 100>;
107 device_type = "par_io";
108 num-ports = <7>;
109
110 ucc2pio:ucc_pin@02 {
111 pio-map = <
112 /* port pin dir open_drain assignment has_irq */
113 3 4 3 0 2 0 /* MDIO */
114 3 5 1 0 2 0 /* MDC */
115 3 15 2 0 1 0 /* RX_CLK (CLK16) */
116 3 17 2 0 1 0 /* TX_CLK (CLK3) */
117 0 12 1 0 1 0 /* TxD0 */
118 0 13 1 0 1 0 /* TxD1 */
119 0 14 1 0 1 0 /* TxD2 */
120 0 15 1 0 1 0 /* TxD3 */
121 0 16 2 0 1 0 /* RxD0 */
122 0 17 2 0 1 0 /* RxD1 */
123 0 18 2 0 1 0 /* RxD2 */
124 0 19 2 0 1 0 /* RxD3 */
125 0 1a 2 0 1 0 /* RX_ER */
126 0 1b 1 0 1 0 /* TX_ER */
127 0 1c 2 0 1 0 /* RX_DV */
128 0 1d 2 0 1 0 /* COL */
129 0 1e 1 0 1 0 /* TX_EN */
130 0 1f 2 0 1 0>; /* CRS */
131 };
132 ucc3pio:ucc_pin@03 {
133 pio-map = <
134 /* port pin dir open_drain assignment has_irq */
135 0 d 2 0 1 0 /* RX_CLK (CLK9) */
136 3 18 2 0 1 0 /* TX_CLK (CLK10) */
137 1 0 1 0 1 0 /* TxD0 */
138 1 1 1 0 1 0 /* TxD1 */
139 1 2 1 0 1 0 /* TxD2 */
140 1 3 1 0 1 0 /* TxD3 */
141 1 4 2 0 1 0 /* RxD0 */
142 1 5 2 0 1 0 /* RxD1 */
143 1 6 2 0 1 0 /* RxD2 */
144 1 7 2 0 1 0 /* RxD3 */
145 1 8 2 0 1 0 /* RX_ER */
146 1 9 1 0 1 0 /* TX_ER */
147 1 a 2 0 1 0 /* RX_DV */
148 1 b 2 0 1 0 /* COL */
149 1 c 1 0 1 0 /* TX_EN */
150 1 d 2 0 1 0>; /* CRS */
151 };
152 };
153 };
154
155 qe@e0100000 {
156 #address-cells = <1>;
157 #size-cells = <1>;
158 device_type = "qe";
159 model = "QE";
160 ranges = <0 e0100000 00100000>;
161 reg = <e0100000 480>;
162 brg-frequency = <0>;
163 bus-frequency = <BCD3D80>;
164
165 muram@10000 {
166 device_type = "muram";
167 ranges = <0 00010000 00004000>;
168
169 data-only@0 {
170 reg = <0 4000>;
171 };
172 };
173
174 spi@4c0 {
175 device_type = "spi";
176 compatible = "fsl_spi";
177 reg = <4c0 40>;
178 interrupts = <2>;
179 interrupt-parent = <&qeic>;
Anton Vorontsov8237bf02007-08-23 15:36:00 +0400180 mode = "cpu-qe";
Michael Barkowski23308c52007-03-19 09:15:28 -0500181 };
182
183 spi@500 {
184 device_type = "spi";
185 compatible = "fsl_spi";
186 reg = <500 40>;
187 interrupts = <1>;
188 interrupt-parent = <&qeic>;
189 mode = "cpu";
190 };
191
192 ucc@3000 {
193 device_type = "network";
194 compatible = "ucc_geth";
195 model = "UCC";
196 device-id = <2>;
197 reg = <3000 200>;
198 interrupts = <21>;
199 interrupt-parent = <&qeic>;
Timur Tabieae98262007-06-22 14:33:15 -0500200 /*
201 * mac-address is deprecated and will be removed
202 * in 2.6.25. Only recent versions of
203 * U-Boot support local-mac-address, however.
204 */
205 mac-address = [ 00 00 00 00 00 00 ];
206 local-mac-address = [ 00 00 00 00 00 00 ];
Michael Barkowski23308c52007-03-19 09:15:28 -0500207 rx-clock = <20>;
208 tx-clock = <13>;
209 phy-handle = <&phy00>;
210 pio-handle = <&ucc2pio>;
211 };
212
213 ucc@2200 {
214 device_type = "network";
215 compatible = "ucc_geth";
216 model = "UCC";
217 device-id = <3>;
218 reg = <2200 200>;
219 interrupts = <22>;
220 interrupt-parent = <&qeic>;
Timur Tabieae98262007-06-22 14:33:15 -0500221 /*
222 * mac-address is deprecated and will be removed
223 * in 2.6.25. Only recent versions of
224 * U-Boot support local-mac-address, however.
225 */
226 mac-address = [ 00 00 00 00 00 00 ];
227 local-mac-address = [ 00 00 00 00 00 00 ];
Michael Barkowski23308c52007-03-19 09:15:28 -0500228 rx-clock = <19>;
229 tx-clock = <1a>;
230 phy-handle = <&phy04>;
231 pio-handle = <&ucc3pio>;
232 };
233
234 mdio@3120 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 reg = <3120 18>;
238 device_type = "mdio";
239 compatible = "ucc_geth_phy";
240
241 phy00:ethernet-phy@00 {
242 interrupt-parent = <&pic>;
243 interrupts = <0>;
244 reg = <0>;
245 device_type = "ethernet-phy";
Michael Barkowski23308c52007-03-19 09:15:28 -0500246 };
247 phy04:ethernet-phy@04 {
248 interrupt-parent = <&pic>;
249 interrupts = <0>;
250 reg = <4>;
251 device_type = "ethernet-phy";
Michael Barkowski23308c52007-03-19 09:15:28 -0500252 };
253 };
254
255 qeic:qeic@80 {
256 interrupt-controller;
257 device_type = "qeic";
258 #address-cells = <0>;
259 #interrupt-cells = <1>;
260 reg = <80 80>;
Michael Barkowski23308c52007-03-19 09:15:28 -0500261 big-endian;
262 interrupts = <20 8 21 8>; //high:32 low:33
263 interrupt-parent = <&pic>;
264 };
265 };
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500266
267 pci@e0008500 {
268 interrupt-map-mask = <f800 0 0 7>;
269 interrupt-map = <
270 /* IDSEL 0x10 AD16 (USB) */
271 8000 0 0 1 &pic 11 8
272
273 /* IDSEL 0x11 AD17 (Mini1)*/
274 8800 0 0 1 &pic 12 8
275 8800 0 0 2 &pic 13 8
276 8800 0 0 3 &pic 14 8
277 8800 0 0 4 &pic 30 8
278
279 /* IDSEL 0x12 AD18 (PCI/Mini2) */
280 9000 0 0 1 &pic 13 8
281 9000 0 0 2 &pic 14 8
282 9000 0 0 3 &pic 30 8
283 9000 0 0 4 &pic 11 8>;
284
285 interrupt-parent = <&pic>;
286 interrupts = <42 8>;
287 bus-range = <0 0>;
288 ranges = <42000000 0 80000000 80000000 0 10000000
289 02000000 0 90000000 90000000 0 10000000
290 01000000 0 d0000000 d0000000 0 04000000>;
291 clock-frequency = <0>;
292 #interrupt-cells = <1>;
293 #size-cells = <2>;
294 #address-cells = <3>;
295 reg = <e0008500 100>;
296 compatible = "fsl,mpc8349-pci";
297 device_type = "pci";
298 };
Michael Barkowski23308c52007-03-19 09:15:28 -0500299};