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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002config MIPS
3 bool
4 default y
Yury Norov942fa982018-05-16 11:18:49 +03005 select ARCH_32BIT_OFF_T if !64BIT
Paul Burtonea6a3732018-11-07 23:14:09 +00006 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
Matt Redfearn12597982017-05-15 10:46:35 +01007 select ARCH_CLOCKSOURCE_DATA
Matt Redfearn12597982017-05-15 10:46:35 +01008 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Hassan Naveed1e359182018-11-19 16:49:37 -08009 select ARCH_HAS_UBSAN_SANITIZE_ALL
Dmitry Korotina2ecb232019-09-12 22:53:45 +000010 select ARCH_HAS_FORTIFY_SOURCE
Matt Redfearn12597982017-05-15 10:46:35 +010011 select ARCH_SUPPORTS_UPROBES
Ralf Baechle1ee36302015-09-29 12:19:48 +020012 select ARCH_USE_BUILTIN_BSWAP
Matt Redfearn12597982017-05-15 10:46:35 +010013 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
Paul Burton25da4e92017-06-09 17:26:42 -070014 select ARCH_USE_QUEUED_RWLOCKS
Paul Burton0b17c962017-06-09 17:26:43 -070015 select ARCH_USE_QUEUED_SPINLOCKS
Alexandre Ghiti9035bd22019-09-23 15:39:18 -070016 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
Matt Redfearn12597982017-05-15 10:46:35 +010017 select ARCH_WANT_IPC_PARSE_VERSION
18 select BUILDTIME_EXTABLE_SORT
19 select CLONE_BACKWARDS
Paul Burton57eeaced2018-11-08 23:44:55 +000020 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
Matt Redfearn12597982017-05-15 10:46:35 +010021 select CPU_PM if CPU_IDLE
22 select GENERIC_ATOMIC64 if !64BIT
23 select GENERIC_CLOCKEVENTS
24 select GENERIC_CMOS_UPDATE
25 select GENERIC_CPU_AUTOPROBE
Vincenzo Frascino24640f22019-06-21 10:52:46 +010026 select GENERIC_GETTIMEOFDAY
Paul Burtonb962aeb2018-08-29 14:54:00 -070027 select GENERIC_IOMAP
Matt Redfearn12597982017-05-15 10:46:35 +010028 select GENERIC_IRQ_PROBE
29 select GENERIC_IRQ_SHOW
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010030 select GENERIC_ISA_DMA if EISA
Antony Pavlov740129b2018-04-11 08:50:19 +010031 select GENERIC_LIB_ASHLDI3
32 select GENERIC_LIB_ASHRDI3
33 select GENERIC_LIB_CMPDI2
34 select GENERIC_LIB_LSHRDI3
35 select GENERIC_LIB_UCMPDI2
Matt Redfearn12597982017-05-15 10:46:35 +010036 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
37 select GENERIC_SMP_IDLE_THREAD
38 select GENERIC_TIME_VSYSCALL
Christoph Hellwig446f0622019-07-11 20:56:52 -070039 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
Matt Redfearn12597982017-05-15 10:46:35 +010040 select HANDLE_DOMAIN_IRQ
Paul Burton906d4412018-08-20 15:36:18 -070041 select HAVE_ARCH_COMPILER_H
Matt Redfearn12597982017-05-15 10:46:35 +010042 select HAVE_ARCH_JUMP_LABEL
Jason Wessel88547002008-07-29 15:58:53 -050043 select HAVE_ARCH_KGDB
Matt Redfearn109c32f2016-11-24 17:32:45 +000044 select HAVE_ARCH_MMAP_RND_BITS if MMU
45 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
Markos Chandras490b0042014-01-22 14:40:04 +000046 select HAVE_ARCH_SECCOMP_FILTER
Ralf Baechlec0ff3c52012-08-17 08:22:04 +020047 select HAVE_ARCH_TRACEHOOK
Daniel Silsby45e03e62019-07-15 17:40:01 -040048 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
Masahiro Yamada2ff2b7e2019-08-19 14:54:20 +090049 select HAVE_ASM_MODVERSIONS
Hassan Naveed716850a2019-03-12 22:48:12 +000050 select HAVE_EBPF_JIT if (!CPU_MICROMIPS)
Matt Redfearn12597982017-05-15 10:46:35 +010051 select HAVE_CONTEXT_TRACKING
52 select HAVE_COPY_THREAD_TLS
Wu Zhangjin64575f92010-10-27 18:59:09 +080053 select HAVE_C_RECORDMCOUNT
Matt Redfearn12597982017-05-15 10:46:35 +010054 select HAVE_DEBUG_KMEMLEAK
55 select HAVE_DEBUG_STACKOVERFLOW
Matt Redfearn12597982017-05-15 10:46:35 +010056 select HAVE_DMA_CONTIGUOUS
57 select HAVE_DYNAMIC_FTRACE
58 select HAVE_EXIT_THREAD
Christoph Hellwig67a929e2019-07-11 20:57:14 -070059 select HAVE_FAST_GUP
Matt Redfearn12597982017-05-15 10:46:35 +010060 select HAVE_FTRACE_MCOUNT_RECORD
Wu Zhangjin29c5d342009-11-20 20:34:34 +080061 select HAVE_FUNCTION_GRAPH_TRACER
Matt Redfearn12597982017-05-15 10:46:35 +010062 select HAVE_FUNCTION_TRACER
Matt Redfearn12597982017-05-15 10:46:35 +010063 select HAVE_IDE
Hassan Naveedb3a428b2018-10-29 18:27:41 -070064 select HAVE_IOREMAP_PROT
Matt Redfearn12597982017-05-15 10:46:35 +010065 select HAVE_IRQ_EXIT_ON_IRQ_STACK
66 select HAVE_IRQ_TIME_ACCOUNTING
David Daneyc1bf2072010-08-03 11:22:20 -070067 select HAVE_KPROBES
68 select HAVE_KRETPROBES
Paul Burtonc0436b52018-11-21 21:56:36 +000069 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
Tejun Heo9d15ffc2011-12-08 10:22:09 -080070 select HAVE_MEMBLOCK_NODE_MAP
David Howells786d35d2012-09-28 14:31:03 +093071 select HAVE_MOD_ARCH_SPECIFIC
Petr Mladek42a0bb32016-05-20 17:00:33 -070072 select HAVE_NMI
Matt Redfearn12597982017-05-15 10:46:35 +010073 select HAVE_OPROFILE
74 select HAVE_PERF_EVENTS
Marcin Nowakowski08bccf42016-09-02 10:13:21 +020075 select HAVE_REGS_AND_STACK_ACCESS_API
Paul Burton9ea141a2018-06-14 10:13:53 -070076 select HAVE_RSEQ
Masahiro Yamadad148eac2018-06-14 19:36:45 +090077 select HAVE_STACKPROTECTOR
Matt Redfearn12597982017-05-15 10:46:35 +010078 select HAVE_SYSCALL_TRACEPOINTS
Ben Hutchingsa3f14312017-10-04 03:46:14 +010079 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
Vincenzo Frascino24640f22019-06-21 10:52:46 +010080 select HAVE_GENERIC_VDSO
Matt Redfearn12597982017-05-15 10:46:35 +010081 select IRQ_FORCED_THREADING
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010082 select ISA if EISA
Matt Redfearn12597982017-05-15 10:46:35 +010083 select MODULES_USE_ELF_RELA if MODULES && 64BIT
84 select MODULES_USE_ELF_REL if MODULES
85 select PERF_USE_VMALLOC
Arnd Bergmann05a0a342018-08-28 16:26:30 +020086 select RTC_LIB
Matt Redfearn12597982017-05-15 10:46:35 +010087 select SYSCTL_EXCEPTION_TRACE
88 select VIRT_TO_BUS
Paul Burtond1af2ab2019-09-18 22:03:27 +000089 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
Alexey Khoroshilovdcf78ee2019-11-06 20:28:42 +030090 select ARCH_HAS_KCOV
91 select HAVE_GCC_PLUGINS
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
Linus Torvalds1da177e2005-04-16 15:20:36 -070093menu "Machine selection"
94
Ralf Baechle5e83d432005-10-29 19:32:41 +010095choice
96 prompt "System type"
Matt Redfearnd41e6852016-12-14 15:09:42 +000097 default MIPS_GENERIC
Linus Torvalds1da177e2005-04-16 15:20:36 -070098
Paul Burtoneed0eab2016-10-05 18:18:20 +010099config MIPS_GENERIC
100 bool "Generic board-agnostic MIPS kernel"
101 select BOOT_RAW
102 select BUILTIN_DTB
103 select CEVT_R4K
104 select CLKSRC_MIPS_GIC
105 select COMMON_CLK
106 select CPU_MIPSR2_IRQ_VI
107 select CPU_MIPSR2_IRQ_EI
108 select CSRC_R4K
109 select DMA_PERDEV_COHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100110 select HAVE_PCI
Paul Burtoneed0eab2016-10-05 18:18:20 +0100111 select IRQ_MIPS_CPU
112 select LIBFDT
Paul Burton0211d492018-07-27 18:23:21 -0700113 select MIPS_AUTO_PFN_OFFSET
Paul Burtoneed0eab2016-10-05 18:18:20 +0100114 select MIPS_CPU_SCACHE
115 select MIPS_GIC
116 select MIPS_L1_CACHE_SHIFT_7
117 select NO_EXCEPT_FILL
118 select PCI_DRIVERS_GENERIC
119 select PINCTRL
120 select SMP_UP if SMP
Matt Redfearna3078e52017-01-23 14:08:13 +0000121 select SWAP_IO_SPACE
Paul Burtoneed0eab2016-10-05 18:18:20 +0100122 select SYS_HAS_CPU_MIPS32_R1
123 select SYS_HAS_CPU_MIPS32_R2
124 select SYS_HAS_CPU_MIPS32_R6
125 select SYS_HAS_CPU_MIPS64_R1
126 select SYS_HAS_CPU_MIPS64_R2
127 select SYS_HAS_CPU_MIPS64_R6
128 select SYS_SUPPORTS_32BIT_KERNEL
129 select SYS_SUPPORTS_64BIT_KERNEL
130 select SYS_SUPPORTS_BIG_ENDIAN
131 select SYS_SUPPORTS_HIGHMEM
132 select SYS_SUPPORTS_LITTLE_ENDIAN
133 select SYS_SUPPORTS_MICROMIPS
134 select SYS_SUPPORTS_MIPS_CPS
135 select SYS_SUPPORTS_MIPS16
136 select SYS_SUPPORTS_MULTITHREADING
137 select SYS_SUPPORTS_RELOCATABLE
138 select SYS_SUPPORTS_SMARTMIPS
Corentin Labbe2e6522c2018-01-17 19:56:38 +0100139 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
140 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
141 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
142 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
143 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
144 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Paul Burtoneed0eab2016-10-05 18:18:20 +0100145 select USE_OF
Dengcheng Zhu2fe8ea32018-09-11 14:49:24 -0700146 select UHI_BOOT
Paul Burtoneed0eab2016-10-05 18:18:20 +0100147 help
148 Select this to build a kernel which aims to support multiple boards,
149 generally using a flattened device tree passed from the bootloader
150 using the boot protocol defined in the UHI (Unified Hosting
151 Interface) specification.
152
Manuel Lauss42a4f172010-07-15 21:45:04 +0200153config MIPS_ALCHEMY
Yoichi Yuasac3543e22007-05-11 20:44:30 +0900154 bool "Alchemy processor based machines"
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200155 select PHYS_ADDR_T_64BIT
Ralf Baechlef772cdb2012-11-30 17:27:27 +0100156 select CEVT_R4K
Steven J. Hilld7ea3352012-11-14 23:34:17 -0600157 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200158 select IRQ_MIPS_CPU
Manuel Lauss88e9a932014-02-20 14:59:23 +0100159 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
Manuel Lauss42a4f172010-07-15 21:45:04 +0200160 select SYS_HAS_CPU_MIPS32_R1
161 select SYS_SUPPORTS_32BIT_KERNEL
162 select SYS_SUPPORTS_APM_EMULATION
Linus Walleijd30a2b42016-04-19 11:23:22 +0200163 select GPIOLIB
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800164 select SYS_SUPPORTS_ZBOOT
Manuel Lauss47440222014-07-23 16:36:48 +0200165 select COMMON_CLK
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200167config AR7
168 bool "Texas Instruments AR7"
169 select BOOT_ELF32
170 select DMA_NONCOHERENT
171 select CEVT_R4K
172 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200173 select IRQ_MIPS_CPU
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200174 select NO_EXCEPT_FILL
175 select SWAP_IO_SPACE
176 select SYS_HAS_CPU_MIPS32_R1
177 select SYS_HAS_EARLY_PRINTK
178 select SYS_SUPPORTS_32BIT_KERNEL
179 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200180 select SYS_SUPPORTS_MIPS16
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800181 select SYS_SUPPORTS_ZBOOT_UART16550
Linus Walleijd30a2b42016-04-19 11:23:22 +0200182 select GPIOLIB
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200183 select VLYNQ
Yoichi Yuasa8551fb62012-08-01 15:38:00 +0900184 select HAVE_CLK
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200185 help
186 Support for the Texas Instruments AR7 System-on-a-Chip
187 family: TNETD7100, 7200 and 7300.
188
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400189config ATH25
190 bool "Atheros AR231x/AR531x SoC support"
191 select CEVT_R4K
192 select CSRC_R4K
193 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200194 select IRQ_MIPS_CPU
Sergey Ryazanov1753e742014-10-29 03:18:41 +0400195 select IRQ_DOMAIN
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400196 select SYS_HAS_CPU_MIPS32_R1
197 select SYS_SUPPORTS_BIG_ENDIAN
198 select SYS_SUPPORTS_32BIT_KERNEL
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +0400199 select SYS_HAS_EARLY_PRINTK
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400200 help
201 Support for Atheros AR231x and Atheros AR531x based boards
202
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100203config ATH79
204 bool "Atheros AR71XX/AR724X/AR913X based boards"
Alban Bedelff591a92015-08-03 19:23:52 +0200205 select ARCH_HAS_RESET_CONTROLLER
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100206 select BOOT_RAW
207 select CEVT_R4K
208 select CSRC_R4K
209 select DMA_NONCOHERENT
Linus Walleijd30a2b42016-04-19 11:23:22 +0200210 select GPIOLIB
John Crispina08227a2018-07-20 13:58:20 +0200211 select PINCTRL
Gabor Juhos94638062012-08-04 18:01:26 +0200212 select HAVE_CLK
Alban Bedel411520a2015-04-19 14:30:04 +0200213 select COMMON_CLK
Gabor Juhos2c4f1ac2013-08-28 10:41:47 +0200214 select CLKDEV_LOOKUP
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200215 select IRQ_MIPS_CPU
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100216 select SYS_HAS_CPU_MIPS32_R2
217 select SYS_HAS_EARLY_PRINTK
218 select SYS_SUPPORTS_32BIT_KERNEL
219 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200220 select SYS_SUPPORTS_MIPS16
Alban Bedelb3f0a252016-01-26 09:38:29 +0100221 select SYS_SUPPORTS_ZBOOT_UART_PROM
Alban Bedel03c8c402015-05-31 01:52:25 +0200222 select USE_OF
Alban Bedel53d473f2018-03-24 23:47:22 +0100223 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100224 help
225 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
226
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800227config BMIPS_GENERIC
228 bool "Broadcom Generic BMIPS kernel"
Christoph Hellwigd59098a2018-06-15 13:08:52 +0200229 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
230 select ARCH_HAS_PHYS_TO_DMA
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700231 select BOOT_RAW
232 select NO_EXCEPT_FILL
233 select USE_OF
234 select CEVT_R4K
235 select CSRC_R4K
236 select SYNC_R4K
237 select COMMON_CLK
Simon Arlottc7c42ec2015-11-22 14:30:14 +0000238 select BCM6345_L1_IRQ
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800239 select BCM7038_L1_IRQ
240 select BCM7120_L2_IRQ
241 select BRCMSTB_L2_IRQ
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200242 select IRQ_MIPS_CPU
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800243 select DMA_NONCOHERENT
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700244 select SYS_SUPPORTS_32BIT_KERNEL
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800245 select SYS_SUPPORTS_LITTLE_ENDIAN
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700246 select SYS_SUPPORTS_BIG_ENDIAN
247 select SYS_SUPPORTS_HIGHMEM
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800248 select SYS_HAS_CPU_BMIPS32_3300
249 select SYS_HAS_CPU_BMIPS4350
250 select SYS_HAS_CPU_BMIPS4380
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700251 select SYS_HAS_CPU_BMIPS5000
252 select SWAP_IO_SPACE
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800253 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
254 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
255 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
256 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Justin Chen4dc47042017-05-24 10:55:16 -0700257 select HARDIRQS_SW_RESEND
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700258 help
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800259 Build a generic DT-based kernel image that boots on select
260 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
261 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
262 must be set appropriately for your board.
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700263
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200264config BCM47XX
Florian Fainellic6193662010-03-25 11:42:41 +0100265 bool "Broadcom BCM47XX based boards"
Hauke Mehrtensfe08f8c2012-12-26 20:06:17 +0000266 select BOOT_RAW
Ralf Baechle42f77542007-10-18 17:48:11 +0100267 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000268 select CSRC_R4K
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200269 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100270 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200271 select IRQ_MIPS_CPU
Markos Chandras314878d2013-07-23 15:40:37 +0100272 select SYS_HAS_CPU_MIPS32_R1
Hauke Mehrtensdd54ded2012-12-26 20:06:18 +0000273 select NO_EXCEPT_FILL
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200274 select SYS_SUPPORTS_32BIT_KERNEL
275 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200276 select SYS_SUPPORTS_MIPS16
Aaro Koskinen65078312018-01-17 00:21:44 +0200277 select SYS_SUPPORTS_ZBOOT
Aurelien Jarno25e5fb92007-09-25 15:41:24 +0200278 select SYS_HAS_EARLY_PRINTK
Ralf Baechlee6086552014-03-26 21:40:25 +0100279 select USE_GENERIC_EARLY_PRINTK_8250
Rafał Miłeckic949c0b2014-06-17 16:36:50 +0200280 select GPIOLIB
281 select LEDS_GPIO_REGISTER
Rafał Miłeckif6e734a2015-06-10 23:05:08 +0200282 select BCM47XX_NVRAM
Rafał Miłecki2ab71a02016-01-25 09:50:29 +0100283 select BCM47XX_SPROM
Matt Redfearndfe00492017-11-14 17:16:27 +0000284 select BCM47XX_SSB if !BCM47XX_BCMA
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200285 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100286 Support for BCM47XX based boards
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200287
Maxime Bizone7300d02009-08-18 13:23:37 +0100288config BCM63XX
289 bool "Broadcom BCM63XX based boards"
Florian Fainelliae8de612013-06-18 16:55:39 +0000290 select BOOT_RAW
Maxime Bizone7300d02009-08-18 13:23:37 +0100291 select CEVT_R4K
292 select CSRC_R4K
Jonas Gorskifc264022014-07-08 16:26:13 +0200293 select SYNC_R4K
Maxime Bizone7300d02009-08-18 13:23:37 +0100294 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200295 select IRQ_MIPS_CPU
Maxime Bizone7300d02009-08-18 13:23:37 +0100296 select SYS_SUPPORTS_32BIT_KERNEL
297 select SYS_SUPPORTS_BIG_ENDIAN
298 select SYS_HAS_EARLY_PRINTK
299 select SWAP_IO_SPACE
Linus Walleijd30a2b42016-04-19 11:23:22 +0200300 select GPIOLIB
Yoichi Yuasa3e82eee2012-08-01 15:39:52 +0900301 select HAVE_CLK
Florian Fainelliaf2418b2014-01-14 09:54:40 -0800302 select MIPS_L1_CACHE_SHIFT_4
Jonas Gorskic5af3c22017-09-20 13:14:01 +0200303 select CLKDEV_LOOKUP
Maxime Bizone7300d02009-08-18 13:23:37 +0100304 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100305 Support for BCM63XX based boards
Maxime Bizone7300d02009-08-18 13:23:37 +0100306
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307config MIPS_COBALT
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200308 bool "Cobalt Server"
Ralf Baechle42f77542007-10-18 17:48:11 +0100309 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000310 select CSRC_R4K
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +0900311 select CEVT_GT641XX
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100313 select FORCE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100314 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315 select I8259
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200316 select IRQ_MIPS_CPU
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +0900317 select IRQ_GT641XX
Yoichi Yuasa252161e2007-03-14 21:51:26 +0900318 select PCI_GT64XXX_PCI0
Ralf Baechle7cf80532005-10-20 22:33:09 +0100319 select SYS_HAS_CPU_NEVADA
Yoichi Yuasa0a22e0d2007-03-02 12:42:33 +0900320 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700321 select SYS_SUPPORTS_32BIT_KERNEL
Florian Fainelli0e8774b2008-01-15 19:42:57 +0100322 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100323 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlee6086552014-03-26 21:40:25 +0100324 select USE_GENERIC_EARLY_PRINTK_8250
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325
326config MACH_DECSTATION
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200327 bool "DECstations"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700328 select BOOT_ELF32
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +0900329 select CEVT_DS1287
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100330 select CEVT_R4K if CPU_R4X00
Yoichi Yuasa42474172008-04-24 09:48:40 +0900331 select CSRC_IOASIC
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100332 select CSRC_R4K if CPU_R4X00
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +0100333 select CPU_DADDI_WORKAROUNDS if 64BIT
334 select CPU_R4000_WORKAROUNDS if 64BIT
335 select CPU_R4400_WORKAROUNDS if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 select DMA_NONCOHERENT
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700337 select NO_IOPORT_MAP
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200338 select IRQ_MIPS_CPU
Ralf Baechle7cf80532005-10-20 22:33:09 +0100339 select SYS_HAS_CPU_R3000
340 select SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700341 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800342 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100343 select SYS_SUPPORTS_LITTLE_ENDIAN
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900344 select SYS_SUPPORTS_128HZ
345 select SYS_SUPPORTS_256HZ
346 select SYS_SUPPORTS_1024HZ
Florian Fainelli930beb52014-01-14 09:54:38 -0800347 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle5e83d432005-10-29 19:32:41 +0100348 help
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 This enables support for DEC's MIPS based workstations. For details
350 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
351 DECstation porting pages on <http://decstation.unix-ag.org/>.
352
353 If you have one of the following DECstation Models you definitely
354 want to choose R4xx0 for the CPU Type:
355
Ralf Baechle93088162007-08-29 14:21:45 +0100356 DECstation 5000/50
357 DECstation 5000/150
358 DECstation 5000/260
359 DECsystem 5900/260
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360
361 otherwise choose R3000.
362
Ralf Baechle5e83d432005-10-29 19:32:41 +0100363config MACH_JAZZ
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200364 bool "Jazz family of machines"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200365 select ARC_MEMORY
366 select ARC_PROMLIB
Ralf Baechlea211a0822018-02-05 15:37:43 +0100367 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100368 select ARCH_MIGHT_HAVE_PC_SERIO
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100369 select FW_ARC
370 select FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100371 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechle42f77542007-10-18 17:48:11 +0100372 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000373 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100374 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100375 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100376 select HAVE_PCSPKR_PLATFORM
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200377 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100378 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100379 select I8259
380 select ISA
Ralf Baechle7cf80532005-10-20 22:33:09 +0100381 select SYS_HAS_CPU_R4X00
Ralf Baechle5e83d432005-10-29 19:32:41 +0100382 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800383 select SYS_SUPPORTS_64BIT_KERNEL
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900384 select SYS_SUPPORTS_100HZ
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100386 This a family of machines based on the MIPS R4030 chipset which was
387 used by several vendors to build RISC/os and Windows NT workstations.
388 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
389 Olivetti M700-10 workstations.
Ralf Baechle5e83d432005-10-29 19:32:41 +0100390
Paul Burtonde361e82015-05-24 16:11:13 +0100391config MACH_INGENIC
392 bool "Ingenic SoC based machines"
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000393 select SYS_SUPPORTS_32BIT_KERNEL
394 select SYS_SUPPORTS_LITTLE_ENDIAN
Lluís Batlle i Rossellf9c9aff2012-03-30 16:48:05 +0200395 select SYS_SUPPORTS_ZBOOT_UART16550
Daniel Silsbyb35d2652019-07-15 17:40:02 -0400396 select CPU_SUPPORTS_HUGEPAGES
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000397 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200398 select IRQ_MIPS_CPU
Paul Cercueil37b4c3c2017-05-12 18:52:58 +0200399 select PINCTRL
Linus Walleijd30a2b42016-04-19 11:23:22 +0200400 select GPIOLIB
Paul Burtonff1930c2015-05-24 16:11:36 +0100401 select COMMON_CLK
Lars-Peter Clausen83bc7692011-09-24 02:29:46 +0200402 select GENERIC_IRQ_CHIP
Paul Cercueil15205fc2019-02-21 19:43:10 -0300403 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
Paul Burtonffb1843d052015-05-24 16:11:15 +0100404 select USE_OF
Paul Burton6ec127f2015-05-24 16:11:42 +0100405 select LIBFDT
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000406
John Crispin171bb2f2011-03-30 09:27:47 +0200407config LANTIQ
408 bool "Lantiq based platforms"
409 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200410 select IRQ_MIPS_CPU
John Crispin171bb2f2011-03-30 09:27:47 +0200411 select CEVT_R4K
412 select CSRC_R4K
413 select SYS_HAS_CPU_MIPS32_R1
414 select SYS_HAS_CPU_MIPS32_R2
415 select SYS_SUPPORTS_BIG_ENDIAN
416 select SYS_SUPPORTS_32BIT_KERNEL
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200417 select SYS_SUPPORTS_MIPS16
John Crispin171bb2f2011-03-30 09:27:47 +0200418 select SYS_SUPPORTS_MULTITHREADING
James Hoganf35764e2018-01-15 20:54:35 +0000419 select SYS_SUPPORTS_VPE_LOADER
John Crispin171bb2f2011-03-30 09:27:47 +0200420 select SYS_HAS_EARLY_PRINTK
Linus Walleijd30a2b42016-04-19 11:23:22 +0200421 select GPIOLIB
John Crispin171bb2f2011-03-30 09:27:47 +0200422 select SWAP_IO_SPACE
423 select BOOT_RAW
John Crispin287e3f32012-04-17 15:53:19 +0200424 select CLKDEV_LOOKUP
John Crispina0392222012-04-13 20:56:13 +0200425 select USE_OF
John Crispin3f8c50c2012-08-28 12:44:59 +0200426 select PINCTRL
427 select PINCTRL_LANTIQ
John Crispinc5307812013-09-03 13:18:12 +0200428 select ARCH_HAS_RESET_CONTROLLER
429 select RESET_CONTROLLER
John Crispin171bb2f2011-03-30 09:27:47 +0200430
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200431config LASAT
432 bool "LASAT Networks platforms"
Ralf Baechle42f77542007-10-18 17:48:11 +0100433 select CEVT_R4K
Ralf Baechle16f0bbb2014-06-26 14:43:01 +0100434 select CRC32
Ralf Baechle940f6b42007-11-24 22:33:28 +0000435 select CSRC_R4K
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200436 select DMA_NONCOHERENT
437 select SYS_HAS_EARLY_PRINTK
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100438 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200439 select IRQ_MIPS_CPU
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200440 select PCI_GT64XXX_PCI0
441 select MIPS_NILE4
442 select R5000_CPU_SCACHE
443 select SYS_HAS_CPU_R5000
444 select SYS_SUPPORTS_32BIT_KERNEL
445 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
446 select SYS_SUPPORTS_LITTLE_ENDIAN
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200447
Huacai Chen30ad29b2015-04-21 10:00:35 +0800448config MACH_LOONGSON32
Huacai Chencaed1d12019-11-04 14:11:21 +0800449 bool "Loongson 32-bit family of machines"
Wu Zhangjinc7e8c662010-01-04 17:16:46 +0800450 select SYS_SUPPORTS_ZBOOT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900451 help
Huacai Chen30ad29b2015-04-21 10:00:35 +0800452 This enables support for the Loongson-1 family of machines.
Wu Zhangjin85749d22009-07-02 23:26:45 +0800453
Huacai Chen30ad29b2015-04-21 10:00:35 +0800454 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
455 the Institute of Computing Technology (ICT), Chinese Academy of
456 Sciences (CAS).
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900457
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800458config MACH_LOONGSON2EF
459 bool "Loongson-2E/F family of machines"
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200460 select SYS_SUPPORTS_ZBOOT
461 help
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800462 This enables the support of early Loongson-2E/F family of machines.
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200463
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800464config MACH_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +0800465 bool "Loongson 64-bit family of machines"
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800466 select ARCH_SPARSEMEM_ENABLE
467 select ARCH_MIGHT_HAVE_PC_PARPORT
468 select ARCH_MIGHT_HAVE_PC_SERIO
469 select GENERIC_ISA_DMA_SUPPORT_BROKEN
470 select BOOT_ELF32
471 select BOARD_SCACHE
472 select CSRC_R4K
473 select CEVT_R4K
474 select CPU_HAS_WB
475 select FORCE_PCI
476 select ISA
477 select I8259
478 select IRQ_MIPS_CPU
479 select NR_CPUS_DEFAULT_4
480 select USE_GENERIC_EARLY_PRINTK_8250
481 select SYS_HAS_CPU_LOONGSON64
482 select SYS_HAS_EARLY_PRINTK
483 select SYS_SUPPORTS_SMP
484 select SYS_SUPPORTS_HOTPLUG_CPU
485 select SYS_SUPPORTS_NUMA
486 select SYS_SUPPORTS_64BIT_KERNEL
487 select SYS_SUPPORTS_HIGHMEM
488 select SYS_SUPPORTS_LITTLE_ENDIAN
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800489 select SYS_SUPPORTS_ZBOOT
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800490 select LOONGSON_MC146818
491 select ZONE_DMA32
492 select NUMA
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800493 help
Huacai Chencaed1d12019-11-04 14:11:21 +0800494 This enables the support of Loongson-2/3 family of machines.
495
496 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
497 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
498 and Loongson-2F which will be removed), developed by the Institute
499 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200500
Andrew Bresticker6a438302015-03-16 14:43:10 -0700501config MACH_PISTACHIO
502 bool "IMG Pistachio SoC based boards"
Andrew Bresticker6a438302015-03-16 14:43:10 -0700503 select BOOT_ELF32
504 select BOOT_RAW
505 select CEVT_R4K
506 select CLKSRC_MIPS_GIC
507 select COMMON_CLK
508 select CSRC_R4K
Zubair Lutfullah Kakakhel645c7822016-06-03 09:35:00 +0100509 select DMA_NONCOHERENT
Linus Walleijd30a2b42016-04-19 11:23:22 +0200510 select GPIOLIB
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200511 select IRQ_MIPS_CPU
Andrew Bresticker6a438302015-03-16 14:43:10 -0700512 select LIBFDT
513 select MFD_SYSCON
514 select MIPS_CPU_SCACHE
515 select MIPS_GIC
516 select PINCTRL
517 select REGULATOR
518 select SYS_HAS_CPU_MIPS32_R2
519 select SYS_SUPPORTS_32BIT_KERNEL
520 select SYS_SUPPORTS_LITTLE_ENDIAN
521 select SYS_SUPPORTS_MIPS_CPS
522 select SYS_SUPPORTS_MULTITHREADING
Matt Redfearn41cc07b2016-05-25 12:58:40 +0100523 select SYS_SUPPORTS_RELOCATABLE
Andrew Bresticker6a438302015-03-16 14:43:10 -0700524 select SYS_SUPPORTS_ZBOOT
Ezequiel Garcia018f62e2015-04-28 19:08:35 -0300525 select SYS_HAS_EARLY_PRINTK
526 select USE_GENERIC_EARLY_PRINTK_8250
Andrew Bresticker6a438302015-03-16 14:43:10 -0700527 select USE_OF
528 help
529 This enables support for the IMG Pistachio SoC platform.
530
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531config MIPS_MALTA
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200532 bool "MIPS Malta board"
Ralf Baechle61ed2422005-09-15 08:52:34 +0000533 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100534 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100535 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536 select BOOT_ELF32
Ralf Baechlefa71c962008-01-29 10:15:00 +0000537 select BOOT_RAW
Paul Burtone8823d22015-05-22 16:51:02 +0100538 select BUILTIN_DTB
Ralf Baechle42f77542007-10-18 17:48:11 +0100539 select CEVT_R4K
Andrew Brestickerfa5635a2014-10-20 12:03:58 -0700540 select CLKSRC_MIPS_GIC
Guenter Roeck42b002a2015-08-22 02:40:41 -0700541 select COMMON_CLK
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200542 select CSRC_R4K
Felix Fietkau885014b2013-09-27 14:41:44 +0200543 select DMA_MAYBE_COHERENT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100545 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100546 select HAVE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100547 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548 select I8259
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200549 select IRQ_MIPS_CPU
550 select LIBFDT
Ralf Baechle5e83d432005-10-29 19:32:41 +0100551 select MIPS_BONITO64
Chris Dearman9318c512006-06-20 17:15:20 +0100552 select MIPS_CPU_SCACHE
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200553 select MIPS_GIC
Kevin Cernekeea7ef1ea2014-10-20 21:27:57 -0700554 select MIPS_L1_CACHE_SHIFT_6
Ralf Baechle5e83d432005-10-29 19:32:41 +0100555 select MIPS_MSC
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200556 select PCI_GT64XXX_PCI0
Paul Burtonecafe3e2015-09-22 11:58:43 -0700557 select SMP_UP if SMP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100559 select SYS_HAS_CPU_MIPS32_R1
560 select SYS_HAS_CPU_MIPS32_R2
Markos Chandrasbfc3c5a2014-01-16 13:12:36 +0000561 select SYS_HAS_CPU_MIPS32_R3_5
Steven J. Hillc5b36782015-02-26 18:16:38 -0600562 select SYS_HAS_CPU_MIPS32_R5
Markos Chandras575509b2014-11-19 11:31:56 +0000563 select SYS_HAS_CPU_MIPS32_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100564 select SYS_HAS_CPU_MIPS64_R1
Leonid Yegoshin5d9fbed2012-07-19 09:11:15 +0200565 select SYS_HAS_CPU_MIPS64_R2
Markos Chandras575509b2014-11-19 11:31:56 +0000566 select SYS_HAS_CPU_MIPS64_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100567 select SYS_HAS_CPU_NEVADA
568 select SYS_HAS_CPU_RM7000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700569 select SYS_SUPPORTS_32BIT_KERNEL
570 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100571 select SYS_SUPPORTS_BIG_ENDIAN
Steven J. Hillc5b36782015-02-26 18:16:38 -0600572 select SYS_SUPPORTS_HIGHMEM
Ralf Baechle5e83d432005-10-29 19:32:41 +0100573 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki424ebcd2014-11-15 22:07:07 +0000574 select SYS_SUPPORTS_MICROMIPS
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200575 select SYS_SUPPORTS_MIPS16
Tim Anderson03650702009-06-17 16:22:53 -0700576 select SYS_SUPPORTS_MIPS_CMP
Paul Burtone56b6aa2014-01-15 10:31:56 +0000577 select SYS_SUPPORTS_MIPS_CPS
Ralf Baechlef41ae0b2006-06-05 17:24:46 +0100578 select SYS_SUPPORTS_MULTITHREADING
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200579 select SYS_SUPPORTS_RELOCATABLE
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100580 select SYS_SUPPORTS_SMARTMIPS
James Hoganf35764e2018-01-15 20:54:35 +0000581 select SYS_SUPPORTS_VPE_LOADER
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800582 select SYS_SUPPORTS_ZBOOT
Paul Burtone8823d22015-05-22 16:51:02 +0100583 select USE_OF
James Hoganabcc82b2015-04-27 15:07:19 +0100584 select ZONE_DMA32 if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585 help
Maciej W. Rozyckif638d192005-02-02 22:23:46 +0000586 This enables support for the MIPS Technologies Malta evaluation
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 board.
588
Joshua Henderson2572f002016-01-13 18:15:39 -0700589config MACH_PIC32
590 bool "Microchip PIC32 Family"
591 help
592 This enables support for the Microchip PIC32 family of platforms.
593
594 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
595 microcontrollers.
596
Ralf Baechlea83860c2009-03-13 21:17:57 +0100597config NEC_MARKEINS
598 bool "NEC EMMA2RH Mark-eins board"
599 select SOC_EMMA2RH
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100600 select HAVE_PCI
Ralf Baechlea83860c2009-03-13 21:17:57 +0100601 help
602 This enables support for the NEC Electronics Mark-eins boards.
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900603
Ralf Baechle5e83d432005-10-29 19:32:41 +0100604config MACH_VR41XX
Yoichi Yuasa74142d62007-04-26 19:45:09 +0900605 bool "NEC VR4100 series based machines"
Ralf Baechle42f77542007-10-18 17:48:11 +0100606 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000607 select CSRC_R4K
Ralf Baechle7cf80532005-10-20 22:33:09 +0100608 select SYS_HAS_CPU_VR41XX
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200609 select SYS_SUPPORTS_MIPS16
Linus Walleijd30a2b42016-04-19 11:23:22 +0200610 select GPIOLIB
Ralf Baechle5e83d432005-10-29 19:32:41 +0100611
Daniel Lairdedb63102008-06-16 15:49:21 +0100612config NXP_STB220
613 bool "NXP STB220 board"
614 select SOC_PNX833X
615 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100616 Support for NXP Semiconductors STB220 Development Board.
Daniel Lairdedb63102008-06-16 15:49:21 +0100617
618config NXP_STB225
619 bool "NXP 225 board"
620 select SOC_PNX833X
621 select SOC_PNX8335
622 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100623 Support for NXP Semiconductors STB225 Development Board.
Daniel Lairdedb63102008-06-16 15:49:21 +0100624
Marc St-Jean9267a302007-06-14 15:55:31 -0600625config PMC_MSP
626 bool "PMC-Sierra MSP chipsets"
Anoop P A39d30c12010-11-18 13:42:28 +0530627 select CEVT_R4K
628 select CSRC_R4K
Marc St-Jean9267a302007-06-14 15:55:31 -0600629 select DMA_NONCOHERENT
630 select SWAP_IO_SPACE
631 select NO_EXCEPT_FILL
632 select BOOT_RAW
633 select SYS_HAS_CPU_MIPS32_R1
634 select SYS_HAS_CPU_MIPS32_R2
635 select SYS_SUPPORTS_32BIT_KERNEL
636 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200637 select SYS_SUPPORTS_MIPS16
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200638 select IRQ_MIPS_CPU
Marc St-Jean9267a302007-06-14 15:55:31 -0600639 select SERIAL_8250
640 select SERIAL_8250_CONSOLE
Florian Fainelli9296d942013-04-09 14:29:26 +0200641 select USB_EHCI_BIG_ENDIAN_MMIO
642 select USB_EHCI_BIG_ENDIAN_DESC
Marc St-Jean9267a302007-06-14 15:55:31 -0600643 help
644 This adds support for the PMC-Sierra family of Multi-Service
645 Processor System-On-A-Chips. These parts include a number
646 of integrated peripherals, interfaces and DSPs in addition to
647 a variety of MIPS cores.
648
John Crispinae2b5bb2013-01-20 22:05:30 +0100649config RALINK
650 bool "Ralink based machines"
651 select CEVT_R4K
652 select CSRC_R4K
653 select BOOT_RAW
654 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200655 select IRQ_MIPS_CPU
John Crispinae2b5bb2013-01-20 22:05:30 +0100656 select USE_OF
657 select SYS_HAS_CPU_MIPS32_R1
658 select SYS_HAS_CPU_MIPS32_R2
659 select SYS_SUPPORTS_32BIT_KERNEL
660 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200661 select SYS_SUPPORTS_MIPS16
John Crispinae2b5bb2013-01-20 22:05:30 +0100662 select SYS_HAS_EARLY_PRINTK
John Crispinae2b5bb2013-01-20 22:05:30 +0100663 select CLKDEV_LOOKUP
John Crispin2a153f12013-09-04 00:16:59 +0200664 select ARCH_HAS_RESET_CONTROLLER
665 select RESET_CONTROLLER
John Crispinae2b5bb2013-01-20 22:05:30 +0100666
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667config SGI_IP22
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200668 bool "SGI IP22 (Indy/Indigo2)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200669 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200670 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100671 select FW_ARC
672 select FW_ARC32
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100673 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100675 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000676 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100677 select DEFAULT_SGI_PARTITION
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678 select DMA_NONCOHERENT
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100679 select HAVE_EISA
Ralf Baechled865bea2007-10-11 23:46:10 +0100680 select I8253
Thomas Bogendoerfer68de4802007-11-23 20:34:16 +0100681 select I8259
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682 select IP22_CPU_SCACHE
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200683 select IRQ_MIPS_CPU
Ralf Baechleaa414df2006-11-30 01:14:51 +0000684 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100685 select SGI_HAS_I8042
686 select SGI_HAS_INDYDOG
Thomas Bogendoerfer36e5c212008-07-16 14:06:15 +0200687 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100688 select SGI_HAS_SEEQ
689 select SGI_HAS_WD93
690 select SGI_HAS_ZILOG
Linus Torvalds1da177e2005-04-16 15:20:36 -0700691 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100692 select SYS_HAS_CPU_R4X00
693 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200694 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700695 select SYS_SUPPORTS_32BIT_KERNEL
696 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100697 select SYS_SUPPORTS_BIG_ENDIAN
Florian Fainelli930beb52014-01-14 09:54:38 -0800698 select MIPS_L1_CACHE_SHIFT_7
Linus Torvalds1da177e2005-04-16 15:20:36 -0700699 help
700 This are the SGI Indy, Challenge S and Indigo2, as well as certain
701 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
702 that runs on these, say Y here.
703
704config SGI_IP27
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200705 bool "SGI IP27 (Origin200/2000)"
Christoph Hellwig54aed4d2018-06-15 13:08:44 +0200706 select ARCH_HAS_PHYS_TO_DMA
Mike Rapoport397dc002019-09-16 14:13:10 +0300707 select ARCH_SPARSEMEM_ENABLE
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100708 select FW_ARC
709 select FW_ARC64
Thomas Bogendoerfere9422422019-10-22 18:13:15 +0200710 select ARC_CMDLINE_ONLY
Ralf Baechle5e83d432005-10-29 19:32:41 +0100711 select BOOT_ELF64
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100712 select DEFAULT_SGI_PARTITION
Ralf Baechle36a88532007-03-01 11:56:43 +0000713 select SYS_HAS_EARLY_PRINTK
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100714 select HAVE_PCI
Thomas Bogendoerfer69a07a42019-02-19 16:57:20 +0100715 select IRQ_MIPS_CPU
Thomas Bogendoerfere6308b62019-05-07 23:09:15 +0200716 select IRQ_DOMAIN_HIERARCHY
Ralf Baechle130e2fb2007-02-06 16:53:15 +0000717 select NR_CPUS_DEFAULT_64
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +0200718 select PCI_DRIVERS_GENERIC
719 select PCI_XTALK_BRIDGE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100720 select SYS_HAS_CPU_R10000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700721 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100722 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechled8cb4e12006-06-11 23:03:08 +0100723 select SYS_SUPPORTS_NUMA
Ralf Baechle1a5c5de2006-11-02 17:23:33 +0000724 select SYS_SUPPORTS_SMP
Florian Fainelli930beb52014-01-14 09:54:38 -0800725 select MIPS_L1_CACHE_SHIFT_7
Linus Torvalds1da177e2005-04-16 15:20:36 -0700726 help
727 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
728 workstations. To compile a Linux kernel that runs on these, say Y
729 here.
730
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100731config SGI_IP28
Kees Cook7d607172013-01-16 18:53:19 -0800732 bool "SGI IP28 (Indigo2 R10k)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200733 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200734 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100735 select FW_ARC
736 select FW_ARC64
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100737 select ARCH_MIGHT_HAVE_PC_SERIO
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100738 select BOOT_ELF64
739 select CEVT_R4K
740 select CSRC_R4K
741 select DEFAULT_SGI_PARTITION
742 select DMA_NONCOHERENT
743 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200744 select IRQ_MIPS_CPU
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100745 select HAVE_EISA
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100746 select I8253
747 select I8259
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100748 select SGI_HAS_I8042
749 select SGI_HAS_INDYDOG
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +0200750 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100751 select SGI_HAS_SEEQ
752 select SGI_HAS_WD93
753 select SGI_HAS_ZILOG
754 select SWAP_IO_SPACE
755 select SYS_HAS_CPU_R10000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200756 select SYS_HAS_EARLY_PRINTK
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100757 select SYS_SUPPORTS_64BIT_KERNEL
758 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerferdc24d682014-08-19 22:00:07 +0200759 select MIPS_L1_CACHE_SHIFT_7
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100760 help
761 This is the SGI Indigo2 with R10000 processor. To compile a Linux
762 kernel that runs on these, say Y here.
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100763
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200764config SGI_IP30
765 bool "SGI IP30 (Octane/Octane2)"
766 select ARCH_HAS_PHYS_TO_DMA
767 select FW_ARC
768 select FW_ARC64
769 select BOOT_ELF64
770 select CEVT_R4K
771 select CSRC_R4K
772 select SYNC_R4K if SMP
773 select ZONE_DMA32
774 select HAVE_PCI
775 select IRQ_MIPS_CPU
776 select IRQ_DOMAIN_HIERARCHY
777 select NR_CPUS_DEFAULT_2
778 select PCI_DRIVERS_GENERIC
779 select PCI_XTALK_BRIDGE
780 select SYS_HAS_EARLY_PRINTK
781 select SYS_HAS_CPU_R10000
782 select SYS_SUPPORTS_64BIT_KERNEL
783 select SYS_SUPPORTS_BIG_ENDIAN
784 select SYS_SUPPORTS_SMP
785 select MIPS_L1_CACHE_SHIFT_7
786 select ARC_MEMORY
787 help
788 These are the SGI Octane and Octane2 graphics workstations. To
789 compile a Linux kernel that runs on these, say Y here.
790
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791config SGI_IP32
Ralf Baechlecfd2afc2007-07-10 17:33:00 +0100792 bool "SGI IP32 (O2)"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200793 select ARC_MEMORY
794 select ARC_PROMLIB
Christoph Hellwig03df8222018-06-15 13:08:48 +0200795 select ARCH_HAS_PHYS_TO_DMA
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100796 select FW_ARC
797 select FW_ARC32
Linus Torvalds1da177e2005-04-16 15:20:36 -0700798 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100799 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000800 select CSRC_R4K
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100802 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200803 select IRQ_MIPS_CPU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804 select R5000_CPU_SCACHE
805 select RM7000_CPU_SCACHE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100806 select SYS_HAS_CPU_R5000
807 select SYS_HAS_CPU_R10000 if BROKEN
808 select SYS_HAS_CPU_RM7000
Ralf Baechledd2f18f2006-01-19 14:55:42 +0000809 select SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700810 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100811 select SYS_SUPPORTS_BIG_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812 help
813 If you want this kernel to run on SGI O2 workstation, say Y here.
814
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900815config SIBYTE_CRHINE
816 bool "Sibyte BCM91120C-CRhine"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100817 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100818 select SIBYTE_BCM1120
819 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100820 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100821 select SYS_SUPPORTS_BIG_ENDIAN
822 select SYS_SUPPORTS_LITTLE_ENDIAN
823
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900824config SIBYTE_CARMEL
825 bool "Sibyte BCM91120x-Carmel"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100826 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100827 select SIBYTE_BCM1120
828 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100829 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100830 select SYS_SUPPORTS_BIG_ENDIAN
831 select SYS_SUPPORTS_LITTLE_ENDIAN
832
833config SIBYTE_CRHONE
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200834 bool "Sibyte BCM91125C-CRhone"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100835 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100836 select SIBYTE_BCM1125
837 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100838 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100839 select SYS_SUPPORTS_BIG_ENDIAN
840 select SYS_SUPPORTS_HIGHMEM
841 select SYS_SUPPORTS_LITTLE_ENDIAN
842
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900843config SIBYTE_RHONE
844 bool "Sibyte BCM91125E-Rhone"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900845 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900846 select SIBYTE_BCM1125H
847 select SWAP_IO_SPACE
848 select SYS_HAS_CPU_SB1
849 select SYS_SUPPORTS_BIG_ENDIAN
850 select SYS_SUPPORTS_LITTLE_ENDIAN
851
852config SIBYTE_SWARM
853 bool "Sibyte BCM91250A-SWARM"
854 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200855 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900856 select SIBYTE_SB1250
857 select SWAP_IO_SPACE
858 select SYS_HAS_CPU_SB1
859 select SYS_SUPPORTS_BIG_ENDIAN
860 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900861 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000862 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000863 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900864
865config SIBYTE_LITTLESUR
866 bool "Sibyte BCM91250C2-LittleSur"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900867 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200868 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900869 select SIBYTE_SB1250
870 select SWAP_IO_SPACE
871 select SYS_HAS_CPU_SB1
872 select SYS_SUPPORTS_BIG_ENDIAN
873 select SYS_SUPPORTS_HIGHMEM
874 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki756d6d82018-11-13 22:42:37 +0000875 select ZONE_DMA32 if 64BIT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900876
877config SIBYTE_SENTOSA
878 bool "Sibyte BCM91250E-Sentosa"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900879 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900880 select SIBYTE_SB1250
881 select SWAP_IO_SPACE
882 select SYS_HAS_CPU_SB1
883 select SYS_SUPPORTS_BIG_ENDIAN
884 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000885 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900886
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900887config SIBYTE_BIGSUR
888 bool "Sibyte BCM91480B-BigSur"
889 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900890 select NR_CPUS_DEFAULT_4
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900891 select SIBYTE_BCM1x80
892 select SWAP_IO_SPACE
893 select SYS_HAS_CPU_SB1
894 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle651194f2007-11-01 21:55:39 +0000895 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900896 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000897 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000898 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900899
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100900config SNI_RM
901 bool "SNI RM200/300/400"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200902 select ARC_MEMORY
903 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100904 select FW_ARC if CPU_LITTLE_ENDIAN
905 select FW_ARC32 if CPU_LITTLE_ENDIAN
Paul Bolleaaa9fad2013-03-25 09:39:54 +0000906 select FW_SNIPROM if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100907 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100908 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100909 select ARCH_MIGHT_HAVE_PC_SERIO
Ralf Baechle5e83d432005-10-29 19:32:41 +0100910 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100911 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000912 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100913 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100914 select DMA_NONCOHERENT
915 select GENERIC_ISA_DMA
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100916 select HAVE_EISA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100917 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100918 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200919 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100920 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100921 select I8259
922 select ISA
Thomas Bogendoerfer4a0312f2006-06-13 13:59:01 +0200923 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
Ralf Baechle7cf80532005-10-20 22:33:09 +0100924 select SYS_HAS_CPU_R4X00
Thomas Bogendoerfer4a0312f2006-06-13 13:59:01 +0200925 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc066a322006-12-28 18:22:32 +0100926 select SYS_HAS_CPU_R10000
Thomas Bogendoerfer4a0312f2006-06-13 13:59:01 +0200927 select R5000_CPU_SCACHE
Ralf Baechle36a88532007-03-01 11:56:43 +0000928 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700929 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800930 select SYS_SUPPORTS_64BIT_KERNEL
Thomas Bogendoerfer4a0312f2006-06-13 13:59:01 +0200931 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100932 select SYS_SUPPORTS_HIGHMEM
933 select SYS_SUPPORTS_LITTLE_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 help
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100935 The SNI RM200/300/400 are MIPS-based machines manufactured by
936 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
Ralf Baechle5e83d432005-10-29 19:32:41 +0100937 Technology and now in turn merged with Fujitsu. Say Y here to
938 support this machine type.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900940config MACH_TX39XX
941 bool "Toshiba TX39 series based machines"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100942
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900943config MACH_TX49XX
944 bool "Toshiba TX49 series based machines"
Ralf Baechle23fbee92005-07-25 22:45:45 +0000945
Ralf Baechle73b43902008-07-16 16:12:25 +0100946config MIKROTIK_RB532
947 bool "Mikrotik RB532 boards"
948 select CEVT_R4K
949 select CSRC_R4K
950 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100951 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200952 select IRQ_MIPS_CPU
Ralf Baechle73b43902008-07-16 16:12:25 +0100953 select SYS_HAS_CPU_MIPS32_R1
954 select SYS_SUPPORTS_32BIT_KERNEL
955 select SYS_SUPPORTS_LITTLE_ENDIAN
956 select SWAP_IO_SPACE
957 select BOOT_RAW
Linus Walleijd30a2b42016-04-19 11:23:22 +0200958 select GPIOLIB
Florian Fainelli930beb52014-01-14 09:54:38 -0800959 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle73b43902008-07-16 16:12:25 +0100960 help
961 Support the Mikrotik(tm) RouterBoard 532 series,
962 based on the IDT RC32434 SoC.
963
David Daney9ddebc42013-05-22 15:10:46 +0000964config CAVIUM_OCTEON_SOC
965 bool "Cavium Networks Octeon SoC based boards"
David Daneya86c7f72008-12-11 15:33:38 -0800966 select CEVT_R4K
Christoph Hellwigea8c64a2018-01-10 16:21:13 +0100967 select ARCH_HAS_PHYS_TO_DMA
Christoph Hellwig1753d502018-11-15 20:05:36 +0100968 select HAVE_RAPIDIO
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200969 select PHYS_ADDR_T_64BIT
David Daneya86c7f72008-12-11 15:33:38 -0800970 select SYS_SUPPORTS_64BIT_KERNEL
971 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechlef65aad42012-10-17 00:39:09 +0200972 select EDAC_SUPPORT
Borislav Petkovb01aec92015-05-21 19:59:31 +0200973 select EDAC_ATOMIC_SCRUB
David Daney73569d82015-03-20 19:11:58 +0300974 select SYS_SUPPORTS_LITTLE_ENDIAN
975 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
David Daneya86c7f72008-12-11 15:33:38 -0800976 select SYS_HAS_EARLY_PRINTK
David Daney5e683382009-02-02 11:30:59 -0800977 select SYS_HAS_CPU_CAVIUM_OCTEON
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100978 select HAVE_PCI
David Daneyf00e0012010-10-01 13:27:30 -0700979 select ZONE_DMA32
David Daney465aaed2011-08-20 08:44:00 -0700980 select HOLES_IN_ZONE
Linus Walleijd30a2b42016-04-19 11:23:22 +0200981 select GPIOLIB
David Daney6e511162014-05-28 23:52:05 +0200982 select LIBFDT
983 select USE_OF
984 select ARCH_SPARSEMEM_ENABLE
985 select SYS_SUPPORTS_SMP
David Daney7820b842017-09-28 12:34:04 -0500986 select NR_CPUS_DEFAULT_64
987 select MIPS_NR_CPU_NR_MAP_1024
Andrew Brestickere3264792014-08-21 13:04:22 -0700988 select BUILTIN_DTB
David Daney8c1e6b12015-03-05 17:31:30 +0300989 select MTD_COMPLEX_MAPPINGS
Christoph Hellwig09230cb2018-04-24 09:00:54 +0200990 select SWIOTLB
Steven J. Hill3ff72be2016-12-13 14:25:37 -0600991 select SYS_SUPPORTS_RELOCATABLE
David Daneya86c7f72008-12-11 15:33:38 -0800992 help
993 This option supports all of the Octeon reference boards from Cavium
994 Networks. It builds a kernel that dynamically determines the Octeon
995 CPU type and supports all known board reference implementations.
996 Some of the supported boards are:
997 EBT3000
998 EBH3000
999 EBH3100
1000 Thunder
1001 Kodama
1002 Hikari
1003 Say Y here for most Octeon reference boards.
1004
Jayachandran C7f058e82011-05-07 01:36:57 +05301005config NLM_XLR_BOARD
1006 bool "Netlogic XLR/XLS based systems"
Jayachandran C7f058e82011-05-07 01:36:57 +05301007 select BOOT_ELF32
1008 select NLM_COMMON
Jayachandran C7f058e82011-05-07 01:36:57 +05301009 select SYS_HAS_CPU_XLR
1010 select SYS_SUPPORTS_SMP
Christoph Hellwigeb01d422018-11-15 20:05:32 +01001011 select HAVE_PCI
Jayachandran C7f058e82011-05-07 01:36:57 +05301012 select SWAP_IO_SPACE
1013 select SYS_SUPPORTS_32BIT_KERNEL
1014 select SYS_SUPPORTS_64BIT_KERNEL
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001015 select PHYS_ADDR_T_64BIT
Jayachandran C7f058e82011-05-07 01:36:57 +05301016 select SYS_SUPPORTS_BIG_ENDIAN
1017 select SYS_SUPPORTS_HIGHMEM
Jayachandran C7f058e82011-05-07 01:36:57 +05301018 select NR_CPUS_DEFAULT_32
1019 select CEVT_R4K
1020 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001021 select IRQ_MIPS_CPU
Jayachandran Cb97215f2012-10-31 12:01:33 +00001022 select ZONE_DMA32 if 64BIT
Jayachandran C7f058e82011-05-07 01:36:57 +05301023 select SYNC_R4K
1024 select SYS_HAS_EARLY_PRINTK
Jayachandran C8f0b0432013-06-10 06:33:26 +00001025 select SYS_SUPPORTS_ZBOOT
1026 select SYS_SUPPORTS_ZBOOT_UART16550
Jayachandran C7f058e82011-05-07 01:36:57 +05301027 help
1028 Support for systems based on Netlogic XLR and XLS processors.
1029 Say Y here if you have a XLR or XLS based board.
1030
Jayachandran C1c773ea2011-11-16 00:21:28 +00001031config NLM_XLP_BOARD
1032 bool "Netlogic XLP based systems"
Jayachandran C1c773ea2011-11-16 00:21:28 +00001033 select BOOT_ELF32
1034 select NLM_COMMON
1035 select SYS_HAS_CPU_XLP
1036 select SYS_SUPPORTS_SMP
Christoph Hellwigeb01d422018-11-15 20:05:32 +01001037 select HAVE_PCI
Jayachandran C1c773ea2011-11-16 00:21:28 +00001038 select SYS_SUPPORTS_32BIT_KERNEL
1039 select SYS_SUPPORTS_64BIT_KERNEL
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001040 select PHYS_ADDR_T_64BIT
Linus Walleijd30a2b42016-04-19 11:23:22 +02001041 select GPIOLIB
Jayachandran C1c773ea2011-11-16 00:21:28 +00001042 select SYS_SUPPORTS_BIG_ENDIAN
1043 select SYS_SUPPORTS_LITTLE_ENDIAN
1044 select SYS_SUPPORTS_HIGHMEM
Jayachandran C1c773ea2011-11-16 00:21:28 +00001045 select NR_CPUS_DEFAULT_32
1046 select CEVT_R4K
1047 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001048 select IRQ_MIPS_CPU
Jayachandran Cb97215f2012-10-31 12:01:33 +00001049 select ZONE_DMA32 if 64BIT
Jayachandran C1c773ea2011-11-16 00:21:28 +00001050 select SYNC_R4K
1051 select SYS_HAS_EARLY_PRINTK
Jayachandran C2f6528e2012-07-13 21:53:22 +05301052 select USE_OF
Jayachandran C8f0b0432013-06-10 06:33:26 +00001053 select SYS_SUPPORTS_ZBOOT
1054 select SYS_SUPPORTS_ZBOOT_UART16550
Jayachandran C1c773ea2011-11-16 00:21:28 +00001055 help
1056 This board is based on Netlogic XLP Processor.
1057 Say Y here if you have a XLP based board.
1058
David Daney9bc463b2014-05-28 23:52:15 +02001059config MIPS_PARAVIRT
1060 bool "Para-Virtualized guest system"
1061 select CEVT_R4K
1062 select CSRC_R4K
David Daney9bc463b2014-05-28 23:52:15 +02001063 select SYS_SUPPORTS_64BIT_KERNEL
1064 select SYS_SUPPORTS_32BIT_KERNEL
1065 select SYS_SUPPORTS_BIG_ENDIAN
1066 select SYS_SUPPORTS_SMP
1067 select NR_CPUS_DEFAULT_4
1068 select SYS_HAS_EARLY_PRINTK
1069 select SYS_HAS_CPU_MIPS32_R2
1070 select SYS_HAS_CPU_MIPS64_R2
1071 select SYS_HAS_CPU_CAVIUM_OCTEON
Christoph Hellwigeb01d422018-11-15 20:05:32 +01001072 select HAVE_PCI
David Daney9bc463b2014-05-28 23:52:15 +02001073 select SWAP_IO_SPACE
1074 help
1075 This option supports guest running under ????
1076
Linus Torvalds1da177e2005-04-16 15:20:36 -07001077endchoice
1078
Ralf Baechlee8c7c482008-09-16 19:12:16 +02001079source "arch/mips/alchemy/Kconfig"
Sergey Ryazanov3b12308f2014-10-29 03:18:39 +04001080source "arch/mips/ath25/Kconfig"
Gabor Juhosd4a67d92011-01-04 21:28:14 +01001081source "arch/mips/ath79/Kconfig"
Hauke Mehrtensa656ffc2011-07-23 01:20:13 +02001082source "arch/mips/bcm47xx/Kconfig"
Maxime Bizone7300d02009-08-18 13:23:37 +01001083source "arch/mips/bcm63xx/Kconfig"
Kevin Cernekee8945e372014-12-25 09:49:20 -08001084source "arch/mips/bmips/Kconfig"
Paul Burtoneed0eab2016-10-05 18:18:20 +01001085source "arch/mips/generic/Kconfig"
Ralf Baechle5e83d432005-10-29 19:32:41 +01001086source "arch/mips/jazz/Kconfig"
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +00001087source "arch/mips/jz4740/Kconfig"
John Crispin8ec6d932011-03-30 09:27:48 +02001088source "arch/mips/lantiq/Kconfig"
Brian Murphy1f21d2b2007-08-21 22:34:16 +02001089source "arch/mips/lasat/Kconfig"
Joshua Henderson2572f002016-01-13 18:15:39 -07001090source "arch/mips/pic32/Kconfig"
Ezequiel Garciaaf0cfb22015-08-06 12:22:43 +01001091source "arch/mips/pistachio/Kconfig"
Ralf Baechle0f3a05cb2012-12-15 11:52:10 +01001092source "arch/mips/pmcs-msp71xx/Kconfig"
John Crispinae2b5bb2013-01-20 22:05:30 +01001093source "arch/mips/ralink/Kconfig"
Ralf Baechle29c48692005-02-07 01:27:14 +00001094source "arch/mips/sgi-ip27/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001095source "arch/mips/sibyte/Kconfig"
Atsushi Nemoto22b1d702008-07-11 00:31:36 +09001096source "arch/mips/txx9/Kconfig"
Ralf Baechle5e83d432005-10-29 19:32:41 +01001097source "arch/mips/vr41xx/Kconfig"
David Daneya86c7f72008-12-11 15:33:38 -08001098source "arch/mips/cavium-octeon/Kconfig"
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +08001099source "arch/mips/loongson2ef/Kconfig"
Huacai Chen30ad29b2015-04-21 10:00:35 +08001100source "arch/mips/loongson32/Kconfig"
1101source "arch/mips/loongson64/Kconfig"
Jayachandran C7f058e82011-05-07 01:36:57 +05301102source "arch/mips/netlogic/Kconfig"
David Daneyae6e7e62014-05-28 23:52:14 +02001103source "arch/mips/paravirt/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001104
Ralf Baechle5e83d432005-10-29 19:32:41 +01001105endmenu
1106
Akinobu Mita3c9ee7e2006-03-26 01:39:30 -08001107config GENERIC_HWEIGHT
1108 bool
1109 default y
1110
Linus Torvalds1da177e2005-04-16 15:20:36 -07001111config GENERIC_CALIBRATE_DELAY
1112 bool
1113 default y
1114
Ingo Molnarae1e9132008-11-11 09:05:16 +01001115config SCHED_OMIT_FRAME_POINTER
Atsushi Nemoto1cc89032006-04-04 13:11:45 +09001116 bool
1117 default y
1118
Linus Torvalds1da177e2005-04-16 15:20:36 -07001119#
1120# Select some configuration options automatically based on user selections.
1121#
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001122config FW_ARC
Linus Torvalds1da177e2005-04-16 15:20:36 -07001123 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124
Ralf Baechle61ed2422005-09-15 08:52:34 +00001125config ARCH_MAY_HAVE_PC_FDC
1126 bool
1127
Marc St-Jean9267a302007-06-14 15:55:31 -06001128config BOOT_RAW
1129 bool
1130
Ralf Baechle217dd112007-11-01 01:57:55 +00001131config CEVT_BCM1480
1132 bool
1133
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +09001134config CEVT_DS1287
1135 bool
1136
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +09001137config CEVT_GT641XX
1138 bool
1139
Ralf Baechle42f77542007-10-18 17:48:11 +01001140config CEVT_R4K
1141 bool
1142
Ralf Baechle217dd112007-11-01 01:57:55 +00001143config CEVT_SB1250
1144 bool
1145
Atsushi Nemoto229f7732007-10-25 01:34:09 +09001146config CEVT_TXX9
1147 bool
1148
Ralf Baechle217dd112007-11-01 01:57:55 +00001149config CSRC_BCM1480
1150 bool
1151
Yoichi Yuasa42474172008-04-24 09:48:40 +09001152config CSRC_IOASIC
1153 bool
1154
Ralf Baechle940f6b42007-11-24 22:33:28 +00001155config CSRC_R4K
1156 bool
1157
Ralf Baechle217dd112007-11-01 01:57:55 +00001158config CSRC_SB1250
1159 bool
1160
Alex Smitha7f4df42015-10-21 09:57:44 +01001161config MIPS_CLOCK_VSYSCALL
1162 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1163
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001164config GPIO_TXX9
Linus Walleijd30a2b42016-04-19 11:23:22 +02001165 select GPIOLIB
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001166 bool
1167
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001168config FW_CFE
Aurelien Jarnodf78b5c2007-09-05 08:58:26 +02001169 bool
1170
Ralf Baechle40e084a2015-07-29 22:44:53 +02001171config ARCH_SUPPORTS_UPROBES
1172 bool
1173
Felix Fietkau885014b2013-09-27 14:41:44 +02001174config DMA_MAYBE_COHERENT
Christoph Hellwigf3ecc0f2018-08-19 14:53:20 +02001175 select ARCH_HAS_DMA_COHERENCE_H
Felix Fietkau885014b2013-09-27 14:41:44 +02001176 select DMA_NONCOHERENT
1177 bool
1178
Paul Burton20d33062016-10-05 18:18:16 +01001179config DMA_PERDEV_COHERENT
1180 bool
Christoph Hellwig347cb6a2019-01-07 13:36:20 -05001181 select ARCH_HAS_SETUP_DMA_OPS
Christoph Hellwig5748e1b2018-08-16 16:47:53 +03001182 select DMA_NONCOHERENT
Paul Burton20d33062016-10-05 18:18:16 +01001183
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001184config DMA_NONCOHERENT
1185 bool
Christoph Hellwigdb914272019-08-26 09:22:13 +02001186 #
1187 # MIPS allows mixing "slightly different" Cacheability and Coherency
1188 # Attribute bits. It is believed that the uncached access through
1189 # KSEG1 and the implementation specific "uncached accelerated" used
1190 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1191 # significant advantages.
1192 #
Christoph Hellwig419e2f12019-08-26 09:03:44 +02001193 select ARCH_HAS_DMA_WRITE_COMBINE
Christoph Hellwigf8c55dc2018-06-15 13:08:46 +02001194 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
Christoph Hellwig2ee7a4e2019-06-30 18:43:47 +02001195 select ARCH_HAS_UNCACHED_SEGMENT
FUJITA Tomonorie1e02b32010-03-10 15:23:25 -08001196 select NEED_DMA_MAP_STATE
Christoph Hellwig58b04402018-09-11 08:55:28 +02001197 select ARCH_HAS_DMA_COHERENT_TO_PFN
Christoph Hellwigf8c55dc2018-06-15 13:08:46 +02001198 select DMA_NONCOHERENT_CACHE_SYNC
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001199
Ralf Baechle36a88532007-03-01 11:56:43 +00001200config SYS_HAS_EARLY_PRINTK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001201 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001202
Ralf Baechle1b2bc752009-06-23 10:00:31 +01001203config SYS_SUPPORTS_HOTPLUG_CPU
Ralf Baechledbb74542007-08-07 14:52:17 +01001204 bool
Ralf Baechledbb74542007-08-07 14:52:17 +01001205
Linus Torvalds1da177e2005-04-16 15:20:36 -07001206config MIPS_BONITO64
1207 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001208
1209config MIPS_MSC
1210 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001211
Brian Murphy1f21d2b2007-08-21 22:34:16 +02001212config MIPS_NILE4
1213 bool
1214
Ralf Baechle39b8d522008-04-28 17:14:26 +01001215config SYNC_R4K
1216 bool
1217
Gabor Juhos487d70d2010-11-23 16:06:25 +01001218config MIPS_MACHINE
1219 def_bool n
1220
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -07001221config NO_IOPORT_MAP
Maciej W. Rozyckid388d682007-05-29 15:08:07 +01001222 def_bool n
1223
Markos Chandras4e0748f2014-11-13 11:25:27 +00001224config GENERIC_CSUM
1225 bool
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001226 default y if !CPU_HAS_LOAD_STORE_LR
Markos Chandras4e0748f2014-11-13 11:25:27 +00001227
Ralf Baechle8313da32007-08-24 16:48:30 +01001228config GENERIC_ISA_DMA
1229 bool
1230 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
Namhyung Kima35bee82010-10-18 12:55:21 +09001231 select ISA_DMA_API
Ralf Baechle8313da32007-08-24 16:48:30 +01001232
Ralf Baechleaa414df2006-11-30 01:14:51 +00001233config GENERIC_ISA_DMA_SUPPORT_BROKEN
1234 bool
Ralf Baechle8313da32007-08-24 16:48:30 +01001235 select GENERIC_ISA_DMA
Ralf Baechleaa414df2006-11-30 01:14:51 +00001236
Namhyung Kima35bee82010-10-18 12:55:21 +09001237config ISA_DMA_API
1238 bool
1239
David Daney465aaed2011-08-20 08:44:00 -07001240config HOLES_IN_ZONE
1241 bool
1242
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001243config SYS_SUPPORTS_RELOCATABLE
1244 bool
1245 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01001246 Selected if the platform supports relocating the kernel.
1247 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1248 to allow access to command line and entropy sources.
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001249
David Daneyf381bf62017-06-13 15:28:46 -07001250config MIPS_CBPF_JIT
1251 def_bool y
1252 depends on BPF_JIT && HAVE_CBPF_JIT
1253
1254config MIPS_EBPF_JIT
1255 def_bool y
1256 depends on BPF_JIT && HAVE_EBPF_JIT
1257
1258
Ralf Baechle5e83d432005-10-29 19:32:41 +01001259#
Masanari Iida6b2aac42012-04-14 00:14:11 +09001260# Endianness selection. Sufficiently obscure so many users don't know what to
Ralf Baechle5e83d432005-10-29 19:32:41 +01001261# answer,so we try hard to limit the available choices. Also the use of a
1262# choice statement should be more obvious to the user.
1263#
1264choice
Masanari Iida6b2aac42012-04-14 00:14:11 +09001265 prompt "Endianness selection"
Linus Torvalds1da177e2005-04-16 15:20:36 -07001266 help
1267 Some MIPS machines can be configured for either little or big endian
Ralf Baechle5e83d432005-10-29 19:32:41 +01001268 byte order. These modes require different kernels and a different
Matt LaPlante3cb2fcc2006-11-30 05:22:59 +01001269 Linux distribution. In general there is one preferred byteorder for a
Ralf Baechle5e83d432005-10-29 19:32:41 +01001270 particular system but some systems are just as commonly used in the
David Sterba3dde6ad2007-05-09 07:12:20 +02001271 one or the other endianness.
Ralf Baechle5e83d432005-10-29 19:32:41 +01001272
1273config CPU_BIG_ENDIAN
1274 bool "Big endian"
1275 depends on SYS_SUPPORTS_BIG_ENDIAN
1276
1277config CPU_LITTLE_ENDIAN
1278 bool "Little endian"
1279 depends on SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +01001280
1281endchoice
1282
David Daney22b07632010-07-23 18:41:43 -07001283config EXPORT_UASM
1284 bool
1285
Ralf Baechle21162452007-02-09 17:08:58 +00001286config SYS_SUPPORTS_APM_EMULATION
1287 bool
1288
Ralf Baechle5e83d432005-10-29 19:32:41 +01001289config SYS_SUPPORTS_BIG_ENDIAN
1290 bool
1291
1292config SYS_SUPPORTS_LITTLE_ENDIAN
1293 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001294
David Daney9cffd1542009-05-27 17:47:46 -07001295config SYS_SUPPORTS_HUGETLBFS
1296 bool
Daniel Silsby45e03e62019-07-15 17:40:01 -04001297 depends on CPU_SUPPORTS_HUGEPAGES
David Daney9cffd1542009-05-27 17:47:46 -07001298 default y
1299
David Daneyaa1762f2012-10-17 00:48:10 +02001300config MIPS_HUGE_TLB_SUPPORT
1301 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1302
Linus Torvalds1da177e2005-04-16 15:20:36 -07001303config IRQ_CPU_RM7K
1304 bool
1305
Marc St-Jean9267a302007-06-14 15:55:31 -06001306config IRQ_MSP_SLP
1307 bool
1308
1309config IRQ_MSP_CIC
1310 bool
1311
Atsushi Nemoto8420fd02007-08-02 23:35:53 +09001312config IRQ_TXX9
1313 bool
1314
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +09001315config IRQ_GT641XX
1316 bool
1317
Yoichi Yuasa252161e2007-03-14 21:51:26 +09001318config PCI_GT64XXX_PCI0
Linus Torvalds1da177e2005-04-16 15:20:36 -07001319 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001320
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +02001321config PCI_XTALK_BRIDGE
1322 bool
1323
Marc St-Jean9267a302007-06-14 15:55:31 -06001324config NO_EXCEPT_FILL
1325 bool
1326
Ralf Baechlea83860c2009-03-13 21:17:57 +01001327config SOC_EMMA2RH
1328 bool
1329 select CEVT_R4K
1330 select CSRC_R4K
1331 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001332 select IRQ_MIPS_CPU
Ralf Baechlea83860c2009-03-13 21:17:57 +01001333 select SWAP_IO_SPACE
1334 select SYS_HAS_CPU_R5500
1335 select SYS_SUPPORTS_32BIT_KERNEL
1336 select SYS_SUPPORTS_64BIT_KERNEL
1337 select SYS_SUPPORTS_BIG_ENDIAN
1338
Daniel Lairdedb63102008-06-16 15:49:21 +01001339config SOC_PNX833X
1340 bool
1341 select CEVT_R4K
1342 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001343 select IRQ_MIPS_CPU
Daniel Lairdedb63102008-06-16 15:49:21 +01001344 select DMA_NONCOHERENT
1345 select SYS_HAS_CPU_MIPS32_R2
1346 select SYS_SUPPORTS_32BIT_KERNEL
1347 select SYS_SUPPORTS_LITTLE_ENDIAN
1348 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +02001349 select SYS_SUPPORTS_MIPS16
Daniel Lairdedb63102008-06-16 15:49:21 +01001350 select CPU_MIPSR2_IRQ_VI
1351
1352config SOC_PNX8335
1353 bool
1354 select SOC_PNX833X
1355
Markos Chandrasa7e07b12014-11-13 13:32:03 +00001356config MIPS_SPRAM
1357 bool
1358
Linus Torvalds1da177e2005-04-16 15:20:36 -07001359config SWAP_IO_SPACE
1360 bool
1361
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001362config SGI_HAS_INDYDOG
1363 bool
1364
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +02001365config SGI_HAS_HAL2
1366 bool
1367
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001368config SGI_HAS_SEEQ
1369 bool
1370
1371config SGI_HAS_WD93
1372 bool
1373
1374config SGI_HAS_ZILOG
1375 bool
1376
1377config SGI_HAS_I8042
1378 bool
1379
1380config DEFAULT_SGI_PARTITION
1381 bool
1382
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001383config FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +01001384 bool
1385
Paul Bolleaaa9fad2013-03-25 09:39:54 +00001386config FW_SNIPROM
Thomas Bogendoerfer231a35d2008-01-04 23:31:07 +01001387 bool
1388
Linus Torvalds1da177e2005-04-16 15:20:36 -07001389config BOOT_ELF32
1390 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001391
Florian Fainelli930beb52014-01-14 09:54:38 -08001392config MIPS_L1_CACHE_SHIFT_4
1393 bool
1394
1395config MIPS_L1_CACHE_SHIFT_5
1396 bool
1397
1398config MIPS_L1_CACHE_SHIFT_6
1399 bool
1400
1401config MIPS_L1_CACHE_SHIFT_7
1402 bool
1403
Linus Torvalds1da177e2005-04-16 15:20:36 -07001404config MIPS_L1_CACHE_SHIFT
1405 int
Florian Fainellia4c02012014-01-14 09:54:39 -08001406 default "7" if MIPS_L1_CACHE_SHIFT_7
Kevin Cernekee5432eeb2014-12-25 09:49:09 -08001407 default "6" if MIPS_L1_CACHE_SHIFT_6
1408 default "5" if MIPS_L1_CACHE_SHIFT_5
1409 default "4" if MIPS_L1_CACHE_SHIFT_4
Linus Torvalds1da177e2005-04-16 15:20:36 -07001410 default "5"
1411
Linus Torvalds1da177e2005-04-16 15:20:36 -07001412config HAVE_STD_PC_SERIAL_PORT
1413 bool
1414
Thomas Bogendoerfere9422422019-10-22 18:13:15 +02001415config ARC_CMDLINE_ONLY
1416 bool
1417
Linus Torvalds1da177e2005-04-16 15:20:36 -07001418config ARC_CONSOLE
1419 bool "ARC console support"
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001420 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421
1422config ARC_MEMORY
1423 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001424
1425config ARC_PROMLIB
1426 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001428config FW_ARC64
Linus Torvalds1da177e2005-04-16 15:20:36 -07001429 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001430
1431config BOOT_ELF64
1432 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001433
Linus Torvalds1da177e2005-04-16 15:20:36 -07001434menu "CPU selection"
1435
1436choice
1437 prompt "CPU type"
1438 default CPU_R4X00
1439
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001440config CPU_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +08001441 bool "Loongson 64-bit CPU"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001442 depends on SYS_HAS_CPU_LOONGSON64
Christoph Hellwigd3bc81b2018-06-15 13:08:41 +02001443 select ARCH_HAS_PHYS_TO_DMA
Huacai Chen0e476d92014-03-21 18:44:07 +08001444 select CPU_SUPPORTS_64BIT_KERNEL
1445 select CPU_SUPPORTS_HIGHMEM
1446 select CPU_SUPPORTS_HUGEPAGES
Huacai Chen75074452019-09-21 21:50:27 +08001447 select CPU_SUPPORTS_MSA
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001448 select CPU_HAS_LOAD_STORE_LR
Huacai Chen0e476d92014-03-21 18:44:07 +08001449 select WEAK_ORDERING
1450 select WEAK_REORDERING_BEYOND_LLSC
Huacai Chen75074452019-09-21 21:50:27 +08001451 select MIPS_ASID_BITS_VARIABLE
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001452 select MIPS_PGD_C0_CONTEXT
Huacai Chen17c99d92017-03-16 21:00:28 +08001453 select MIPS_L1_CACHE_SHIFT_6
Linus Walleijd30a2b42016-04-19 11:23:22 +02001454 select GPIOLIB
Christoph Hellwig09230cb2018-04-24 09:00:54 +02001455 select SWIOTLB
Huacai Chen0e476d92014-03-21 18:44:07 +08001456 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001457 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1458 cores implements the MIPS64R2 instruction set with many extensions,
1459 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1460 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1461 Loongson-2E/2F is not covered here and will be removed in future.
Huacai Chen0e476d92014-03-21 18:44:07 +08001462
Huacai Chencaed1d12019-11-04 14:11:21 +08001463config LOONGSON3_ENHANCEMENT
1464 bool "New Loongson-3 CPU Enhancements"
Huacai Chen1e820da32016-03-03 09:45:13 +08001465 default n
1466 select CPU_MIPSR2
1467 select CPU_HAS_PREFETCH
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001468 depends on CPU_LOONGSON64
Huacai Chen1e820da32016-03-03 09:45:13 +08001469 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001470 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
Huacai Chen1e820da32016-03-03 09:45:13 +08001471 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001472 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
Huacai Chen1e820da32016-03-03 09:45:13 +08001473 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1474 Fast TLB refill support, etc.
1475
1476 This option enable those enhancements which are not probed at run
1477 time. If you want a generic kernel to run on all Loongson 3 machines,
1478 please say 'N' here. If you want a high-performance kernel to run on
Huacai Chencaed1d12019-11-04 14:11:21 +08001479 new Loongson-3 machines only, please say 'Y' here.
Huacai Chen1e820da32016-03-03 09:45:13 +08001480
Huacai Chene02e07e2019-01-15 16:04:54 +08001481config CPU_LOONGSON3_WORKAROUNDS
Huacai Chencaed1d12019-11-04 14:11:21 +08001482 bool "Old Loongson-3 LLSC Workarounds"
Huacai Chene02e07e2019-01-15 16:04:54 +08001483 default y if SMP
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001484 depends on CPU_LOONGSON64
Huacai Chene02e07e2019-01-15 16:04:54 +08001485 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001486 Loongson-3 processors have the llsc issues which require workarounds.
Huacai Chene02e07e2019-01-15 16:04:54 +08001487 Without workarounds the system may hang unexpectedly.
1488
Huacai Chencaed1d12019-11-04 14:11:21 +08001489 Newer Loongson-3 will fix these issues and no workarounds are needed.
Huacai Chene02e07e2019-01-15 16:04:54 +08001490 The workarounds have no significant side effect on them but may
1491 decrease the performance of the system so this option should be
1492 disabled unless the kernel is intended to be run on old systems.
1493
1494 If unsure, please say Y.
1495
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001496config CPU_LOONGSON2E
1497 bool "Loongson 2E"
1498 depends on SYS_HAS_CPU_LOONGSON2E
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001499 select CPU_LOONGSON2EF
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001500 help
1501 The Loongson 2E processor implements the MIPS III instruction set
1502 with many extensions.
1503
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001504 It has an internal FPGA northbridge, which is compatible to
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001505 bonito64.
1506
1507config CPU_LOONGSON2F
1508 bool "Loongson 2F"
1509 depends on SYS_HAS_CPU_LOONGSON2F
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001510 select CPU_LOONGSON2EF
Linus Walleijd30a2b42016-04-19 11:23:22 +02001511 select GPIOLIB
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001512 help
1513 The Loongson 2F processor implements the MIPS III instruction set
1514 with many extensions.
1515
1516 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1517 have a similar programming interface with FPGA northbridge used in
1518 Loongson2E.
1519
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001520config CPU_LOONGSON1B
1521 bool "Loongson 1B"
1522 depends on SYS_HAS_CPU_LOONGSON1B
Huacai Chenb2afb642019-11-04 14:11:20 +08001523 select CPU_LOONGSON32
Kelvin Cheung9ec88b62016-04-06 20:34:54 +08001524 select LEDS_GPIO_REGISTER
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001525 help
1526 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001527 Release 1 instruction set and part of the MIPS32 Release 2
1528 instruction set.
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001529
Yang Ling12e32802016-05-19 12:29:30 +08001530config CPU_LOONGSON1C
1531 bool "Loongson 1C"
1532 depends on SYS_HAS_CPU_LOONGSON1C
Huacai Chenb2afb642019-11-04 14:11:20 +08001533 select CPU_LOONGSON32
Yang Ling12e32802016-05-19 12:29:30 +08001534 select LEDS_GPIO_REGISTER
1535 help
1536 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001537 Release 1 instruction set and part of the MIPS32 Release 2
1538 instruction set.
Yang Ling12e32802016-05-19 12:29:30 +08001539
Ralf Baechle6e760c82005-07-06 12:08:11 +00001540config CPU_MIPS32_R1
1541 bool "MIPS32 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001542 depends on SYS_HAS_CPU_MIPS32_R1
Ralf Baechle6e760c82005-07-06 12:08:11 +00001543 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001544 select CPU_HAS_LOAD_STORE_LR
Ralf Baechle797798c2005-08-10 15:17:11 +00001545 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001546 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle6e760c82005-07-06 12:08:11 +00001547 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001548 Choose this option to build a kernel for release 1 or later of the
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001549 MIPS32 architecture. Most modern embedded systems with a 32-bit
1550 MIPS processor are based on a MIPS32 processor. If you know the
1551 specific type of processor in your system, choose those that one
1552 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1553 Release 2 of the MIPS32 architecture is available since several
1554 years so chances are you even have a MIPS32 Release 2 processor
1555 in which case you should choose CPU_MIPS32_R2 instead for better
1556 performance.
1557
1558config CPU_MIPS32_R2
1559 bool "MIPS32 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001560 depends on SYS_HAS_CPU_MIPS32_R2
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001561 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001562 select CPU_HAS_LOAD_STORE_LR
Ralf Baechle797798c2005-08-10 15:17:11 +00001563 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001564 select CPU_SUPPORTS_HIGHMEM
Paul Burtona5e9a692014-01-27 15:23:10 +00001565 select CPU_SUPPORTS_MSA
Sanjay Lal2235a542012-11-21 18:33:59 -08001566 select HAVE_KVM
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001567 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001568 Choose this option to build a kernel for release 2 or later of the
Ralf Baechle6e760c82005-07-06 12:08:11 +00001569 MIPS32 architecture. Most modern embedded systems with a 32-bit
1570 MIPS processor are based on a MIPS32 processor. If you know the
1571 specific type of processor in your system, choose those that one
1572 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001573
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001574config CPU_MIPS32_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001575 bool "MIPS32 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001576 depends on SYS_HAS_CPU_MIPS32_R6
1577 select CPU_HAS_PREFETCH
1578 select CPU_SUPPORTS_32BIT_KERNEL
1579 select CPU_SUPPORTS_HIGHMEM
1580 select CPU_SUPPORTS_MSA
1581 select HAVE_KVM
1582 select MIPS_O32_FP64_SUPPORT
1583 help
1584 Choose this option to build a kernel for release 6 or later of the
1585 MIPS32 architecture. New MIPS processors, starting with the Warrior
1586 family, are based on a MIPS32r6 processor. If you own an older
1587 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1588
Ralf Baechle6e760c82005-07-06 12:08:11 +00001589config CPU_MIPS64_R1
1590 bool "MIPS64 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001591 depends on SYS_HAS_CPU_MIPS64_R1
Ralf Baechle797798c2005-08-10 15:17:11 +00001592 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001593 select CPU_HAS_LOAD_STORE_LR
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001594 select CPU_SUPPORTS_32BIT_KERNEL
1595 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001596 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001597 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle6e760c82005-07-06 12:08:11 +00001598 help
1599 Choose this option to build a kernel for release 1 or later of the
1600 MIPS64 architecture. Many modern embedded systems with a 64-bit
1601 MIPS processor are based on a MIPS64 processor. If you know the
1602 specific type of processor in your system, choose those that one
1603 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001604 Release 2 of the MIPS64 architecture is available since several
1605 years so chances are you even have a MIPS64 Release 2 processor
1606 in which case you should choose CPU_MIPS64_R2 instead for better
1607 performance.
1608
1609config CPU_MIPS64_R2
1610 bool "MIPS64 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001611 depends on SYS_HAS_CPU_MIPS64_R2
Ralf Baechle797798c2005-08-10 15:17:11 +00001612 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001613 select CPU_HAS_LOAD_STORE_LR
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001614 select CPU_SUPPORTS_32BIT_KERNEL
1615 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001616 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001617 select CPU_SUPPORTS_HUGEPAGES
Paul Burtona5e9a692014-01-27 15:23:10 +00001618 select CPU_SUPPORTS_MSA
James Hogan40a2df42016-07-08 11:53:31 +01001619 select HAVE_KVM
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001620 help
1621 Choose this option to build a kernel for release 2 or later of the
1622 MIPS64 architecture. Many modern embedded systems with a 64-bit
1623 MIPS processor are based on a MIPS64 processor. If you know the
1624 specific type of processor in your system, choose those that one
1625 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001626
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001627config CPU_MIPS64_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001628 bool "MIPS64 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001629 depends on SYS_HAS_CPU_MIPS64_R6
1630 select CPU_HAS_PREFETCH
1631 select CPU_SUPPORTS_32BIT_KERNEL
1632 select CPU_SUPPORTS_64BIT_KERNEL
1633 select CPU_SUPPORTS_HIGHMEM
Paul Burtonafd375d2019-02-02 02:21:53 +00001634 select CPU_SUPPORTS_HUGEPAGES
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001635 select CPU_SUPPORTS_MSA
James Hogan2e6c7742017-02-16 12:39:01 +00001636 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
James Hogan40a2df42016-07-08 11:53:31 +01001637 select HAVE_KVM
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001638 help
1639 Choose this option to build a kernel for release 6 or later of the
1640 MIPS64 architecture. New MIPS processors, starting with the Warrior
1641 family, are based on a MIPS64r6 processor. If you own an older
1642 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1643
Linus Torvalds1da177e2005-04-16 15:20:36 -07001644config CPU_R3000
1645 bool "R3000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001646 depends on SYS_HAS_CPU_R3000
Ralf Baechlef7062dd2006-04-24 14:58:53 +01001647 select CPU_HAS_WB
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001648 select CPU_HAS_LOAD_STORE_LR
Paul Burton54746822019-08-31 15:40:43 +00001649 select CPU_R3K_TLB
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001650 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001651 select CPU_SUPPORTS_HIGHMEM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001652 help
1653 Please make sure to pick the right CPU type. Linux/MIPS is not
1654 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1655 *not* work on R4000 machines and vice versa. However, since most
1656 of the supported machines have an R4000 (or similar) CPU, R4x00
1657 might be a safe bet. If the resulting kernel does not work,
1658 try to recompile with R3000.
1659
1660config CPU_TX39XX
1661 bool "R39XX"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001662 depends on SYS_HAS_CPU_TX39XX
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001663 select CPU_SUPPORTS_32BIT_KERNEL
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001664 select CPU_HAS_LOAD_STORE_LR
Paul Burton54746822019-08-31 15:40:43 +00001665 select CPU_R3K_TLB
Linus Torvalds1da177e2005-04-16 15:20:36 -07001666
1667config CPU_VR41XX
1668 bool "R41xx"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001669 depends on SYS_HAS_CPU_VR41XX
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001670 select CPU_SUPPORTS_32BIT_KERNEL
1671 select CPU_SUPPORTS_64BIT_KERNEL
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001672 select CPU_HAS_LOAD_STORE_LR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001673 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001674 The options selects support for the NEC VR4100 series of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001675 Only choose this option if you have one of these processors as a
1676 kernel built with this option will not run on any other type of
1677 processor or vice versa.
1678
Linus Torvalds1da177e2005-04-16 15:20:36 -07001679config CPU_R4X00
1680 bool "R4x00"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001681 depends on SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001682 select CPU_SUPPORTS_32BIT_KERNEL
1683 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001684 select CPU_SUPPORTS_HUGEPAGES
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001685 select CPU_HAS_LOAD_STORE_LR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001686 help
1687 MIPS Technologies R4000-series processors other than 4300, including
1688 the R4000, R4400, R4600, and 4700.
1689
1690config CPU_TX49XX
1691 bool "R49XX"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001692 depends on SYS_HAS_CPU_TX49XX
Atsushi Nemotode862b42006-03-17 12:59:22 +09001693 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001694 select CPU_HAS_LOAD_STORE_LR
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001695 select CPU_SUPPORTS_32BIT_KERNEL
1696 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001697 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001698
1699config CPU_R5000
1700 bool "R5000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001701 depends on SYS_HAS_CPU_R5000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001702 select CPU_SUPPORTS_32BIT_KERNEL
1703 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001704 select CPU_SUPPORTS_HUGEPAGES
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001705 select CPU_HAS_LOAD_STORE_LR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001706 help
1707 MIPS Technologies R5000-series processors other than the Nevada.
1708
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001709config CPU_R5500
1710 bool "R5500"
1711 depends on SYS_HAS_CPU_R5500
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001712 select CPU_SUPPORTS_32BIT_KERNEL
1713 select CPU_SUPPORTS_64BIT_KERNEL
David Daney9cffd1542009-05-27 17:47:46 -07001714 select CPU_SUPPORTS_HUGEPAGES
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001715 select CPU_HAS_LOAD_STORE_LR
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001716 help
1717 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1718 instruction set.
1719
Linus Torvalds1da177e2005-04-16 15:20:36 -07001720config CPU_NEVADA
1721 bool "RM52xx"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001722 depends on SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001723 select CPU_SUPPORTS_32BIT_KERNEL
1724 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001725 select CPU_SUPPORTS_HUGEPAGES
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001726 select CPU_HAS_LOAD_STORE_LR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001727 help
1728 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1729
Linus Torvalds1da177e2005-04-16 15:20:36 -07001730config CPU_R10000
1731 bool "R10000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001732 depends on SYS_HAS_CPU_R10000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001733 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001734 select CPU_HAS_LOAD_STORE_LR
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001735 select CPU_SUPPORTS_32BIT_KERNEL
1736 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001737 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001738 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001739 help
1740 MIPS Technologies R10000-series processors.
1741
1742config CPU_RM7000
1743 bool "RM7000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001744 depends on SYS_HAS_CPU_RM7000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001745 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001746 select CPU_HAS_LOAD_STORE_LR
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001747 select CPU_SUPPORTS_32BIT_KERNEL
1748 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001749 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001750 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001751
1752config CPU_SB1
1753 bool "SB1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001754 depends on SYS_HAS_CPU_SB1
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001755 select CPU_HAS_LOAD_STORE_LR
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001756 select CPU_SUPPORTS_32BIT_KERNEL
1757 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001758 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001759 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle0004a9d2006-10-31 03:45:07 +00001760 select WEAK_ORDERING
Linus Torvalds1da177e2005-04-16 15:20:36 -07001761
David Daneya86c7f72008-12-11 15:33:38 -08001762config CPU_CAVIUM_OCTEON
1763 bool "Cavium Octeon processor"
David Daney5e683382009-02-02 11:30:59 -08001764 depends on SYS_HAS_CPU_CAVIUM_OCTEON
David Daneya86c7f72008-12-11 15:33:38 -08001765 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001766 select CPU_HAS_LOAD_STORE_LR
David Daneya86c7f72008-12-11 15:33:38 -08001767 select CPU_SUPPORTS_64BIT_KERNEL
David Daneya86c7f72008-12-11 15:33:38 -08001768 select WEAK_ORDERING
David Daneya86c7f72008-12-11 15:33:38 -08001769 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001770 select CPU_SUPPORTS_HUGEPAGES
Ben Hutchingsdf115f32015-05-25 20:27:29 +01001771 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1772 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Florian Fainelli930beb52014-01-14 09:54:38 -08001773 select MIPS_L1_CACHE_SHIFT_7
James Hogan0ae3abc2017-03-14 10:25:51 +00001774 select HAVE_KVM
David Daneya86c7f72008-12-11 15:33:38 -08001775 help
1776 The Cavium Octeon processor is a highly integrated chip containing
1777 many ethernet hardware widgets for networking tasks. The processor
1778 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1779 Full details can be found at http://www.caviumnetworks.com.
1780
Jonas Gorskicd746242013-12-18 14:12:02 +01001781config CPU_BMIPS
1782 bool "Broadcom BMIPS"
1783 depends on SYS_HAS_CPU_BMIPS
1784 select CPU_MIPS32
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001785 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
Jonas Gorskicd746242013-12-18 14:12:02 +01001786 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1787 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1788 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1789 select CPU_SUPPORTS_32BIT_KERNEL
1790 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001791 select IRQ_MIPS_CPU
Jonas Gorskicd746242013-12-18 14:12:02 +01001792 select SWAP_IO_SPACE
1793 select WEAK_ORDERING
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001794 select CPU_SUPPORTS_HIGHMEM
Jonas Gorski69aaf9c2013-12-18 14:12:04 +01001795 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001796 select CPU_HAS_LOAD_STORE_LR
Markus Mayera8d709b2017-02-07 13:58:54 -08001797 select CPU_SUPPORTS_CPUFREQ
1798 select MIPS_EXTERNAL_TIMER
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001799 help
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001800 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001801
Jayachandran C7f058e82011-05-07 01:36:57 +05301802config CPU_XLR
1803 bool "Netlogic XLR SoC"
1804 depends on SYS_HAS_CPU_XLR
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001805 select CPU_HAS_LOAD_STORE_LR
Jayachandran C7f058e82011-05-07 01:36:57 +05301806 select CPU_SUPPORTS_32BIT_KERNEL
1807 select CPU_SUPPORTS_64BIT_KERNEL
1808 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001809 select CPU_SUPPORTS_HUGEPAGES
Jayachandran C7f058e82011-05-07 01:36:57 +05301810 select WEAK_ORDERING
1811 select WEAK_REORDERING_BEYOND_LLSC
Jayachandran C7f058e82011-05-07 01:36:57 +05301812 help
1813 Netlogic Microsystems XLR/XLS processors.
Jayachandran C1c773ea2011-11-16 00:21:28 +00001814
1815config CPU_XLP
1816 bool "Netlogic XLP SoC"
1817 depends on SYS_HAS_CPU_XLP
1818 select CPU_SUPPORTS_32BIT_KERNEL
1819 select CPU_SUPPORTS_64BIT_KERNEL
1820 select CPU_SUPPORTS_HIGHMEM
Jayachandran C1c773ea2011-11-16 00:21:28 +00001821 select WEAK_ORDERING
1822 select WEAK_REORDERING_BEYOND_LLSC
1823 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001824 select CPU_HAS_LOAD_STORE_LR
Jayachandran Cd6504842012-10-31 12:01:29 +00001825 select CPU_MIPSR2
Prem Mallappaddba6832015-01-07 16:58:32 +05301826 select CPU_SUPPORTS_HUGEPAGES
Paul Burton2db003a2016-05-06 14:36:24 +01001827 select MIPS_ASID_BITS_VARIABLE
Jayachandran C1c773ea2011-11-16 00:21:28 +00001828 help
1829 Netlogic Microsystems XLP processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001830endchoice
1831
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001832config CPU_MIPS32_3_5_FEATURES
1833 bool "MIPS32 Release 3.5 Features"
1834 depends on SYS_HAS_CPU_MIPS32_R3_5
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001835 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001836 help
1837 Choose this option to build a kernel for release 2 or later of the
1838 MIPS32 architecture including features from the 3.5 release such as
1839 support for Enhanced Virtual Addressing (EVA).
1840
1841config CPU_MIPS32_3_5_EVA
1842 bool "Enhanced Virtual Addressing (EVA)"
1843 depends on CPU_MIPS32_3_5_FEATURES
1844 select EVA
1845 default y
1846 help
1847 Choose this option if you want to enable the Enhanced Virtual
1848 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1849 One of its primary benefits is an increase in the maximum size
1850 of lowmem (up to 3GB). If unsure, say 'N' here.
1851
Steven J. Hillc5b36782015-02-26 18:16:38 -06001852config CPU_MIPS32_R5_FEATURES
1853 bool "MIPS32 Release 5 Features"
1854 depends on SYS_HAS_CPU_MIPS32_R5
1855 depends on CPU_MIPS32_R2
1856 help
1857 Choose this option to build a kernel for release 2 or later of the
1858 MIPS32 architecture including features from release 5 such as
1859 support for Extended Physical Addressing (XPA).
1860
1861config CPU_MIPS32_R5_XPA
1862 bool "Extended Physical Addressing (XPA)"
1863 depends on CPU_MIPS32_R5_FEATURES
1864 depends on !EVA
1865 depends on !PAGE_SIZE_4KB
1866 depends on SYS_SUPPORTS_HIGHMEM
1867 select XPA
1868 select HIGHMEM
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001869 select PHYS_ADDR_T_64BIT
Steven J. Hillc5b36782015-02-26 18:16:38 -06001870 default n
1871 help
1872 Choose this option if you want to enable the Extended Physical
1873 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1874 benefit is to increase physical addressing equal to or greater
1875 than 40 bits. Note that this has the side effect of turning on
1876 64-bit addressing which in turn makes the PTEs 64-bit in size.
1877 If unsure, say 'N' here.
1878
Wu Zhangjin622844b2010-04-10 20:04:42 +08001879if CPU_LOONGSON2F
1880config CPU_NOP_WORKAROUNDS
1881 bool
1882
1883config CPU_JUMP_WORKAROUNDS
1884 bool
1885
1886config CPU_LOONGSON2F_WORKAROUNDS
1887 bool "Loongson 2F Workarounds"
1888 default y
1889 select CPU_NOP_WORKAROUNDS
1890 select CPU_JUMP_WORKAROUNDS
1891 help
1892 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1893 require workarounds. Without workarounds the system may hang
1894 unexpectedly. For more information please refer to the gas
1895 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1896
1897 Loongson 2F03 and later have fixed these issues and no workarounds
1898 are needed. The workarounds have no significant side effect on them
1899 but may decrease the performance of the system so this option should
1900 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1901 systems.
1902
1903 If unsure, please say Y.
1904endif # CPU_LOONGSON2F
1905
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001906config SYS_SUPPORTS_ZBOOT
1907 bool
1908 select HAVE_KERNEL_GZIP
1909 select HAVE_KERNEL_BZIP2
Florian Fainelli31c48672013-09-16 16:55:20 +01001910 select HAVE_KERNEL_LZ4
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001911 select HAVE_KERNEL_LZMA
Wu Zhangjinfe1d45e2010-01-15 20:34:46 +08001912 select HAVE_KERNEL_LZO
Florian Fainelli4e23eb62013-09-11 11:51:41 +01001913 select HAVE_KERNEL_XZ
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001914
1915config SYS_SUPPORTS_ZBOOT_UART16550
1916 bool
1917 select SYS_SUPPORTS_ZBOOT
1918
Alban Bedeldbb98312015-12-10 10:57:21 +01001919config SYS_SUPPORTS_ZBOOT_UART_PROM
1920 bool
1921 select SYS_SUPPORTS_ZBOOT
1922
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001923config CPU_LOONGSON2EF
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001924 bool
1925 select CPU_SUPPORTS_32BIT_KERNEL
1926 select CPU_SUPPORTS_64BIT_KERNEL
1927 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001928 select CPU_SUPPORTS_HUGEPAGES
Christoph Hellwige9050862018-06-20 09:11:15 +02001929 select ARCH_HAS_PHYS_TO_DMA
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001930 select CPU_HAS_LOAD_STORE_LR
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001931
Huacai Chenb2afb642019-11-04 14:11:20 +08001932config CPU_LOONGSON32
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001933 bool
1934 select CPU_MIPS32
Jiaxun Yang7e280f62019-01-22 21:04:12 +08001935 select CPU_MIPSR2
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001936 select CPU_HAS_PREFETCH
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03001937 select CPU_HAS_LOAD_STORE_LR
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001938 select CPU_SUPPORTS_32BIT_KERNEL
1939 select CPU_SUPPORTS_HIGHMEM
Kelvin Cheungf29ad102014-10-10 11:40:01 +08001940 select CPU_SUPPORTS_CPUFREQ
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001941
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001942config CPU_BMIPS32_3300
Jonas Gorski04fa8bf2013-12-18 14:12:06 +01001943 select SMP_UP if SMP
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001944 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001945
1946config CPU_BMIPS4350
1947 bool
1948 select SYS_SUPPORTS_SMP
1949 select SYS_SUPPORTS_HOTPLUG_CPU
1950
1951config CPU_BMIPS4380
1952 bool
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001953 select MIPS_L1_CACHE_SHIFT_6
Jonas Gorskicd746242013-12-18 14:12:02 +01001954 select SYS_SUPPORTS_SMP
1955 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001956 select CPU_HAS_RIXI
Jonas Gorskicd746242013-12-18 14:12:02 +01001957
1958config CPU_BMIPS5000
1959 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001960 select MIPS_CPU_SCACHE
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001961 select MIPS_L1_CACHE_SHIFT_7
Jonas Gorskicd746242013-12-18 14:12:02 +01001962 select SYS_SUPPORTS_SMP
1963 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001964 select CPU_HAS_RIXI
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001965
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001966config SYS_HAS_CPU_LOONGSON64
Huacai Chen0e476d92014-03-21 18:44:07 +08001967 bool
1968 select CPU_SUPPORTS_CPUFREQ
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001969 select CPU_HAS_RIXI
Huacai Chen0e476d92014-03-21 18:44:07 +08001970
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001971config SYS_HAS_CPU_LOONGSON2E
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001972 bool
1973
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001974config SYS_HAS_CPU_LOONGSON2F
1975 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08001976 select CPU_SUPPORTS_CPUFREQ
1977 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001978
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001979config SYS_HAS_CPU_LOONGSON1B
1980 bool
1981
Yang Ling12e32802016-05-19 12:29:30 +08001982config SYS_HAS_CPU_LOONGSON1C
1983 bool
1984
Ralf Baechle7cf80532005-10-20 22:33:09 +01001985config SYS_HAS_CPU_MIPS32_R1
1986 bool
1987
1988config SYS_HAS_CPU_MIPS32_R2
1989 bool
1990
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001991config SYS_HAS_CPU_MIPS32_R3_5
1992 bool
1993
Steven J. Hillc5b36782015-02-26 18:16:38 -06001994config SYS_HAS_CPU_MIPS32_R5
1995 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08001996 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Steven J. Hillc5b36782015-02-26 18:16:38 -06001997
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001998config SYS_HAS_CPU_MIPS32_R6
1999 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08002000 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002001
Ralf Baechle7cf80532005-10-20 22:33:09 +01002002config SYS_HAS_CPU_MIPS64_R1
2003 bool
2004
2005config SYS_HAS_CPU_MIPS64_R2
2006 bool
2007
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002008config SYS_HAS_CPU_MIPS64_R6
2009 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08002010 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002011
Ralf Baechle7cf80532005-10-20 22:33:09 +01002012config SYS_HAS_CPU_R3000
2013 bool
2014
2015config SYS_HAS_CPU_TX39XX
2016 bool
2017
2018config SYS_HAS_CPU_VR41XX
2019 bool
2020
Ralf Baechle7cf80532005-10-20 22:33:09 +01002021config SYS_HAS_CPU_R4X00
2022 bool
2023
2024config SYS_HAS_CPU_TX49XX
2025 bool
2026
2027config SYS_HAS_CPU_R5000
2028 bool
2029
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09002030config SYS_HAS_CPU_R5500
2031 bool
2032
Ralf Baechle7cf80532005-10-20 22:33:09 +01002033config SYS_HAS_CPU_NEVADA
2034 bool
2035
Ralf Baechle7cf80532005-10-20 22:33:09 +01002036config SYS_HAS_CPU_R10000
2037 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08002038 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Ralf Baechle7cf80532005-10-20 22:33:09 +01002039
2040config SYS_HAS_CPU_RM7000
2041 bool
2042
Ralf Baechle7cf80532005-10-20 22:33:09 +01002043config SYS_HAS_CPU_SB1
2044 bool
2045
David Daney5e683382009-02-02 11:30:59 -08002046config SYS_HAS_CPU_CAVIUM_OCTEON
2047 bool
2048
Jonas Gorskicd746242013-12-18 14:12:02 +01002049config SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002050 bool
2051
Jonas Gorskife7f62c2013-12-18 14:12:05 +01002052config SYS_HAS_CPU_BMIPS32_3300
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002053 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002054 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002055
2056config SYS_HAS_CPU_BMIPS4350
2057 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002058 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002059
2060config SYS_HAS_CPU_BMIPS4380
2061 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002062 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002063
2064config SYS_HAS_CPU_BMIPS5000
2065 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002066 select SYS_HAS_CPU_BMIPS
Hauke Mehrtensf263f2a2018-12-09 16:49:57 +01002067 select ARCH_HAS_SYNC_DMA_FOR_CPU
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002068
Jayachandran C7f058e82011-05-07 01:36:57 +05302069config SYS_HAS_CPU_XLR
2070 bool
2071
Jayachandran C1c773ea2011-11-16 00:21:28 +00002072config SYS_HAS_CPU_XLP
2073 bool
2074
Ralf Baechle17099b12007-07-14 13:24:05 +01002075#
2076# CPU may reorder R->R, R->W, W->R, W->W
2077# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2078#
Ralf Baechle0004a9d2006-10-31 03:45:07 +00002079config WEAK_ORDERING
2080 bool
Ralf Baechle17099b12007-07-14 13:24:05 +01002081
2082#
2083# CPU may reorder reads and writes beyond LL/SC
2084# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2085#
2086config WEAK_REORDERING_BEYOND_LLSC
2087 bool
Ralf Baechle5e83d432005-10-29 19:32:41 +01002088endmenu
2089
2090#
Chris Dearmanc09b47d2006-06-20 17:15:20 +01002091# These two indicate any level of the MIPS32 and MIPS64 architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01002092#
2093config CPU_MIPS32
2094 bool
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002095 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
Ralf Baechle5e83d432005-10-29 19:32:41 +01002096
2097config CPU_MIPS64
2098 bool
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002099 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
Ralf Baechle5e83d432005-10-29 19:32:41 +01002100
2101#
Paul Burton57eeaced2018-11-08 23:44:55 +00002102# These indicate the revision of the architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01002103#
2104config CPU_MIPSR1
2105 bool
2106 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2107
2108config CPU_MIPSR2
2109 bool
David Daneya86c7f72008-12-11 15:33:38 -08002110 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
Florian Fainelli8256b172016-02-09 12:55:51 -08002111 select CPU_HAS_RIXI
Markos Chandrasa7e07b12014-11-13 13:32:03 +00002112 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01002113
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002114config CPU_MIPSR6
2115 bool
2116 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
Florian Fainelli8256b172016-02-09 12:55:51 -08002117 select CPU_HAS_RIXI
Paul Burton87321fd2016-05-06 13:35:03 +01002118 select HAVE_ARCH_BITREVERSE
Paul Burton2db003a2016-05-06 14:36:24 +01002119 select MIPS_ASID_BITS_VARIABLE
Marcin Nowakowski4a5dc512018-02-09 22:11:06 +00002120 select MIPS_CRC_SUPPORT
Markos Chandrasa7e07b12014-11-13 13:32:03 +00002121 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01002122
Paul Burton57eeaced2018-11-08 23:44:55 +00002123config TARGET_ISA_REV
2124 int
2125 default 1 if CPU_MIPSR1
2126 default 2 if CPU_MIPSR2
2127 default 6 if CPU_MIPSR6
2128 default 0
2129 help
2130 Reflects the ISA revision being targeted by the kernel build. This
2131 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2132
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002133config EVA
2134 bool
2135
Steven J. Hillc5b36782015-02-26 18:16:38 -06002136config XPA
2137 bool
2138
Ralf Baechle5e83d432005-10-29 19:32:41 +01002139config SYS_SUPPORTS_32BIT_KERNEL
2140 bool
2141config SYS_SUPPORTS_64BIT_KERNEL
2142 bool
2143config CPU_SUPPORTS_32BIT_KERNEL
2144 bool
2145config CPU_SUPPORTS_64BIT_KERNEL
2146 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08002147config CPU_SUPPORTS_CPUFREQ
2148 bool
2149config CPU_SUPPORTS_ADDRWINCFG
2150 bool
David Daney9cffd1542009-05-27 17:47:46 -07002151config CPU_SUPPORTS_HUGEPAGES
2152 bool
Daniel Silsby171543e2019-07-15 17:39:59 -04002153 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
David Daney82622282009-10-14 12:16:56 -07002154config MIPS_PGD_C0_CONTEXT
2155 bool
Paul Burtoncebf8c02017-06-02 15:38:03 -07002156 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
Ralf Baechle5e83d432005-10-29 19:32:41 +01002157
David Daney8192c9e2008-09-23 00:04:26 -07002158#
2159# Set to y for ptrace access to watch registers.
2160#
2161config HARDWARE_WATCHPOINTS
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002162 bool
2163 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
David Daney8192c9e2008-09-23 00:04:26 -07002164
Ralf Baechle5e83d432005-10-29 19:32:41 +01002165menu "Kernel type"
2166
2167choice
Ralf Baechle5e83d432005-10-29 19:32:41 +01002168 prompt "Kernel code model"
2169 help
2170 You should only select this option if you have a workload that
2171 actually benefits from 64-bit processing or if your machine has
2172 large memory. You will only be presented a single option in this
2173 menu if your system does not support both 32-bit and 64-bit kernels.
2174
2175config 32BIT
2176 bool "32-bit kernel"
2177 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2178 select TRAD_SIGNALS
2179 help
2180 Select this option if you want to build a 32-bit kernel.
Ralf Baechlef17c4ca2015-07-23 12:02:09 +02002181
Ralf Baechle5e83d432005-10-29 19:32:41 +01002182config 64BIT
2183 bool "64-bit kernel"
2184 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2185 help
2186 Select this option if you want to build a 64-bit kernel.
2187
2188endchoice
2189
Sanjay Lal2235a542012-11-21 18:33:59 -08002190config KVM_GUEST
2191 bool "KVM Guest Kernel"
James Hoganf2a5b1d2013-07-12 10:26:11 +00002192 depends on BROKEN_ON_SMP
Sanjay Lal2235a542012-11-21 18:33:59 -08002193 help
James Hogancaa1faa2015-12-16 23:49:26 +00002194 Select this option if building a guest kernel for KVM (Trap & Emulate)
2195 mode.
Sanjay Lal2235a542012-11-21 18:33:59 -08002196
James Hoganeda3d332014-05-29 10:16:36 +01002197config KVM_GUEST_TIMER_FREQ
2198 int "Count/Compare Timer Frequency (MHz)"
Sanjay Lal2235a542012-11-21 18:33:59 -08002199 depends on KVM_GUEST
James Hoganeda3d332014-05-29 10:16:36 +01002200 default 100
Sanjay Lal2235a542012-11-21 18:33:59 -08002201 help
James Hoganeda3d332014-05-29 10:16:36 +01002202 Set this to non-zero if building a guest kernel for KVM to skip RTC
2203 emulation when determining guest CPU Frequency. Instead, the guest's
2204 timer frequency is specified directly.
Sanjay Lal2235a542012-11-21 18:33:59 -08002205
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002206config MIPS_VA_BITS_48
2207 bool "48 bits virtual memory"
2208 depends on 64BIT
2209 help
Alex Belits3377e222017-02-16 17:27:34 -08002210 Support a maximum at least 48 bits of application virtual
2211 memory. Default is 40 bits or less, depending on the CPU.
2212 For page sizes 16k and above, this option results in a small
2213 memory overhead for page tables. For 4k page size, a fourth
2214 level of page tables is added which imposes both a memory
2215 overhead as well as slower TLB fault handling.
2216
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002217 If unsure, say N.
2218
Linus Torvalds1da177e2005-04-16 15:20:36 -07002219choice
2220 prompt "Kernel page size"
2221 default PAGE_SIZE_4KB
2222
2223config PAGE_SIZE_4KB
2224 bool "4kB"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002225 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
Linus Torvalds1da177e2005-04-16 15:20:36 -07002226 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002227 This option select the standard 4kB Linux page size. On some
2228 R3000-family processors this is the only available page size. Using
2229 4kB page size will minimize memory consumption and is therefore
2230 recommended for low memory systems.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002231
2232config PAGE_SIZE_8KB
2233 bool "8kB"
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002234 depends on CPU_CAVIUM_OCTEON
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002235 depends on !MIPS_VA_BITS_48
Linus Torvalds1da177e2005-04-16 15:20:36 -07002236 help
2237 Using 8kB page size will result in higher performance kernel at
2238 the price of higher memory consumption. This option is available
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002239 only on cnMIPS processors. Note that you will need a suitable Linux
2240 distribution to support this.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002241
2242config PAGE_SIZE_16KB
2243 bool "16kB"
Ralf Baechle714bfad2006-05-17 14:04:30 +01002244 depends on !CPU_R3000 && !CPU_TX39XX
Linus Torvalds1da177e2005-04-16 15:20:36 -07002245 help
2246 Using 16kB page size will result in higher performance kernel at
2247 the price of higher memory consumption. This option is available on
Ralf Baechle714bfad2006-05-17 14:04:30 +01002248 all non-R3000 family processors. Note that you will need a suitable
2249 Linux distribution to support this.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002250
Ralf Baechlec52399b2009-04-02 14:07:10 +02002251config PAGE_SIZE_32KB
2252 bool "32kB"
2253 depends on CPU_CAVIUM_OCTEON
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002254 depends on !MIPS_VA_BITS_48
Ralf Baechlec52399b2009-04-02 14:07:10 +02002255 help
2256 Using 32kB page size will result in higher performance kernel at
2257 the price of higher memory consumption. This option is available
2258 only on cnMIPS cores. Note that you will need a suitable Linux
2259 distribution to support this.
2260
Linus Torvalds1da177e2005-04-16 15:20:36 -07002261config PAGE_SIZE_64KB
2262 bool "64kB"
Paul Burton3b2db172017-06-05 11:21:27 -07002263 depends on !CPU_R3000 && !CPU_TX39XX
Linus Torvalds1da177e2005-04-16 15:20:36 -07002264 help
2265 Using 64kB page size will result in higher performance kernel at
2266 the price of higher memory consumption. This option is available on
2267 all non-R3000 family processor. Not that at the time of this
Ralf Baechle714bfad2006-05-17 14:04:30 +01002268 writing this option is still high experimental.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002269
2270endchoice
2271
David Daneyc9bace72010-10-11 14:52:45 -07002272config FORCE_MAX_ZONEORDER
2273 int "Maximum zone order"
Alex Smithe4362d12014-01-21 11:22:35 +00002274 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2275 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2276 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2277 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2278 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2279 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
David Daneyc9bace72010-10-11 14:52:45 -07002280 range 11 64
2281 default "11"
2282 help
2283 The kernel memory allocator divides physically contiguous memory
2284 blocks into "zones", where each zone is a power of two number of
2285 pages. This option selects the largest power of two that the kernel
2286 keeps in the memory allocator. If you need to allocate very large
2287 blocks of physically contiguous memory, then you may need to
2288 increase this value.
2289
2290 This config option is actually maximum order plus one. For example,
2291 a value of 11 means that the largest free memory block is 2^10 pages.
2292
2293 The page size is not necessarily 4KB. Keep this in mind
2294 when choosing a value for this option.
2295
Linus Torvalds1da177e2005-04-16 15:20:36 -07002296config BOARD_SCACHE
2297 bool
2298
2299config IP22_CPU_SCACHE
2300 bool
2301 select BOARD_SCACHE
2302
Chris Dearman9318c512006-06-20 17:15:20 +01002303#
2304# Support for a MIPS32 / MIPS64 style S-caches
2305#
2306config MIPS_CPU_SCACHE
2307 bool
2308 select BOARD_SCACHE
2309
Linus Torvalds1da177e2005-04-16 15:20:36 -07002310config R5000_CPU_SCACHE
2311 bool
2312 select BOARD_SCACHE
2313
2314config RM7000_CPU_SCACHE
2315 bool
2316 select BOARD_SCACHE
2317
2318config SIBYTE_DMA_PAGEOPS
2319 bool "Use DMA to clear/copy pages"
2320 depends on CPU_SB1
2321 help
2322 Instead of using the CPU to zero and copy pages, use a Data Mover
2323 channel. These DMA channels are otherwise unused by the standard
2324 SiByte Linux port. Seems to give a small performance benefit.
2325
2326config CPU_HAS_PREFETCH
Ralf Baechlec8094b52005-08-05 14:28:54 +00002327 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002328
Florian Fainelli3165c842012-01-31 18:18:43 +01002329config CPU_GENERIC_DUMP_TLB
2330 bool
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002331 default y if !(CPU_R3000 || CPU_TX39XX)
Florian Fainelli3165c842012-01-31 18:18:43 +01002332
Paul Burtonc92e47e2018-11-07 23:14:02 +00002333config MIPS_FP_SUPPORT
Paul Burton183b40f2018-11-07 23:14:11 +00002334 bool "Floating Point support" if EXPERT
2335 default y
2336 help
2337 Select y to include support for floating point in the kernel
2338 including initialization of FPU hardware, FP context save & restore
2339 and emulation of an FPU where necessary. Without this support any
2340 userland program attempting to use floating point instructions will
2341 receive a SIGILL.
2342
2343 If you know that your userland will not attempt to use floating point
2344 instructions then you can say n here to shrink the kernel a little.
2345
2346 If unsure, say y.
Paul Burtonc92e47e2018-11-07 23:14:02 +00002347
Paul Burton97f7dcb2018-11-07 23:14:02 +00002348config CPU_R2300_FPU
2349 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002350 depends on MIPS_FP_SUPPORT
Paul Burton97f7dcb2018-11-07 23:14:02 +00002351 default y if CPU_R3000 || CPU_TX39XX
2352
Paul Burton54746822019-08-31 15:40:43 +00002353config CPU_R3K_TLB
2354 bool
2355
Florian Fainelli91405eb2012-01-31 18:18:44 +01002356config CPU_R4K_FPU
2357 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002358 depends on MIPS_FP_SUPPORT
Paul Burton97f7dcb2018-11-07 23:14:02 +00002359 default y if !CPU_R2300_FPU
Florian Fainelli91405eb2012-01-31 18:18:44 +01002360
Florian Fainelli62cedc42012-01-31 18:18:45 +01002361config CPU_R4K_CACHE_TLB
2362 bool
Paul Burton54746822019-08-31 15:40:43 +00002363 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
Florian Fainelli62cedc42012-01-31 18:18:45 +01002364
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002365config MIPS_MT_SMP
Markos Chandrasa92b7f82014-04-08 11:59:10 +01002366 bool "MIPS MT SMP support (1 TC on each available VPE)"
Paul Burton5cbf9682017-08-07 16:01:16 -07002367 default y
Paul Burton527f1022017-08-07 16:18:04 -07002368 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002369 select CPU_MIPSR2_IRQ_VI
Chris Dearmand725cf32007-05-08 14:05:39 +01002370 select CPU_MIPSR2_IRQ_EI
Steven J. Hillc080faa2013-10-04 16:23:28 -05002371 select SYNC_R4K
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002372 select MIPS_MT
2373 select SMP
Ralf Baechle87353d82007-11-19 12:23:51 +00002374 select SMP_UP
Steven J. Hillc080faa2013-10-04 16:23:28 -05002375 select SYS_SUPPORTS_SMP
2376 select SYS_SUPPORTS_SCHED_SMT
Al Cooper399aaa22012-07-13 16:44:53 -04002377 select MIPS_PERF_SHARED_TC_COUNTERS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002378 help
Steven J. Hillc080faa2013-10-04 16:23:28 -05002379 This is a kernel model which is known as SMVP. This is supported
2380 on cores with the MT ASE and uses the available VPEs to implement
2381 virtual processors which supports SMP. This is equivalent to the
2382 Intel Hyperthreading feature. For further information go to
2383 <http://www.imgtec.com/mips/mips-multithreading.asp>.
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002384
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002385config MIPS_MT
2386 bool
2387
Ralf Baechle0ab7aef2007-03-02 20:42:04 +00002388config SCHED_SMT
2389 bool "SMT (multithreading) scheduler support"
2390 depends on SYS_SUPPORTS_SCHED_SMT
2391 default n
2392 help
2393 SMT scheduler support improves the CPU scheduler's decision making
2394 when dealing with MIPS MT enabled cores at a cost of slightly
2395 increased overhead in some places. If unsure say N here.
2396
2397config SYS_SUPPORTS_SCHED_SMT
2398 bool
2399
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002400config SYS_SUPPORTS_MULTITHREADING
2401 bool
2402
Ralf Baechlef088fc82006-04-05 09:45:47 +01002403config MIPS_MT_FPAFF
2404 bool "Dynamic FPU affinity for FP-intensive threads"
Ralf Baechlef088fc82006-04-05 09:45:47 +01002405 default y
Ralf Baechleb6336482014-05-23 16:29:44 +02002406 depends on MIPS_MT_SMP
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002407
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002408config MIPSR2_TO_R6_EMULATOR
2409 bool "MIPS R2-to-R6 emulator"
Paul Burton9eaa9a82016-10-17 15:34:37 +01002410 depends on CPU_MIPSR6
Paul Burtonc92e47e2018-11-07 23:14:02 +00002411 depends on MIPS_FP_SUPPORT
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002412 default y
2413 help
2414 Choose this option if you want to run non-R6 MIPS userland code.
2415 Even if you say 'Y' here, the emulator will still be disabled by
Markos Chandras07edf0d2015-03-10 12:30:56 +00002416 default. You can enable it using the 'mipsr2emu' kernel option.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002417 The only reason this is a build-time option is to save ~14K from the
2418 final kernel image.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002419
James Hoganf35764e2018-01-15 20:54:35 +00002420config SYS_SUPPORTS_VPE_LOADER
2421 bool
2422 depends on SYS_SUPPORTS_MULTITHREADING
2423 help
2424 Indicates that the platform supports the VPE loader, and provides
2425 physical_memsize.
2426
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002427config MIPS_VPE_LOADER
2428 bool "VPE loader support."
James Hoganf35764e2018-01-15 20:54:35 +00002429 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002430 select CPU_MIPSR2_IRQ_VI
2431 select CPU_MIPSR2_IRQ_EI
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002432 select MIPS_MT
2433 help
2434 Includes a loader for loading an elf relocatable object
2435 onto another VPE and running it.
Ralf Baechlef088fc82006-04-05 09:45:47 +01002436
Deng-Cheng Zhu17a1d522013-10-30 15:52:07 -05002437config MIPS_VPE_LOADER_CMP
2438 bool
2439 default "y"
2440 depends on MIPS_VPE_LOADER && MIPS_CMP
2441
Deng-Cheng Zhu1a2a6d72013-10-30 15:52:06 -05002442config MIPS_VPE_LOADER_MT
2443 bool
2444 default "y"
2445 depends on MIPS_VPE_LOADER && !MIPS_CMP
2446
Ralf Baechlee01402b2005-07-14 15:57:16 +00002447config MIPS_VPE_LOADER_TOM
2448 bool "Load VPE program into memory hidden from linux"
2449 depends on MIPS_VPE_LOADER
2450 default y
2451 help
2452 The loader can use memory that is present but has been hidden from
2453 Linux using the kernel command line option "mem=xxMB". It's up to
2454 you to ensure the amount you put in the option and the space your
2455 program requires is less or equal to the amount physically present.
2456
Ralf Baechlee01402b2005-07-14 15:57:16 +00002457config MIPS_VPE_APSP_API
Ralf Baechle5e83d432005-10-29 19:32:41 +01002458 bool "Enable support for AP/SP API (RTLX)"
2459 depends on MIPS_VPE_LOADER
Ralf Baechlee01402b2005-07-14 15:57:16 +00002460
Deng-Cheng Zhuda615cf2014-01-01 16:29:03 +01002461config MIPS_VPE_APSP_API_CMP
2462 bool
2463 default "y"
2464 depends on MIPS_VPE_APSP_API && MIPS_CMP
2465
Deng-Cheng Zhu2c973ef2014-01-01 16:26:46 +01002466config MIPS_VPE_APSP_API_MT
2467 bool
2468 default "y"
2469 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2470
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002471config MIPS_CMP
Paul Burton5cac93b2014-01-15 10:32:00 +00002472 bool "MIPS CMP framework support (DEPRECATED)"
Markos Chandras56763192015-07-09 10:40:38 +01002473 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
Markos Chandrasb10b43b2014-07-22 09:29:34 +01002474 select SMP
Tim Andersoneb9b5142009-06-17 16:40:34 -07002475 select SYNC_R4K
Markos Chandrasb10b43b2014-07-22 09:29:34 +01002476 select SYS_SUPPORTS_SMP
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002477 select WEAK_ORDERING
2478 default n
2479 help
Paul Burton044505c2014-01-15 10:31:58 +00002480 Select this if you are using a bootloader which implements the "CMP
2481 framework" protocol (ie. YAMON) and want your kernel to make use of
2482 its ability to start secondary CPUs.
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002483
Paul Burton5cac93b2014-01-15 10:32:00 +00002484 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2485 instead of this.
2486
Paul Burton0ee958e2014-01-15 10:31:53 +00002487config MIPS_CPS
2488 bool "MIPS Coherent Processing System support"
Paul Burton5a3e7c02016-02-03 03:15:33 +00002489 depends on SYS_SUPPORTS_MIPS_CPS
Paul Burton0ee958e2014-01-15 10:31:53 +00002490 select MIPS_CM
Paul Burton1d8f1f52014-04-14 14:13:57 +01002491 select MIPS_CPS_PM if HOTPLUG_CPU
Paul Burton0ee958e2014-01-15 10:31:53 +00002492 select SMP
2493 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
Paul Burton1d8f1f52014-04-14 14:13:57 +01002494 select SYS_SUPPORTS_HOTPLUG_CPU
Paul Burtonc8b77122017-06-02 14:48:52 -07002495 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
Paul Burton0ee958e2014-01-15 10:31:53 +00002496 select SYS_SUPPORTS_SMP
2497 select WEAK_ORDERING
2498 help
2499 Select this if you wish to run an SMP kernel across multiple cores
2500 within a MIPS Coherent Processing System. When this option is
2501 enabled the kernel will probe for other cores and boot them with
2502 no external assistance. It is safe to enable this when hardware
2503 support is unavailable.
2504
Paul Burton3179d372014-04-14 11:00:56 +01002505config MIPS_CPS_PM
Markos Chandras39a59592014-09-18 16:09:49 +01002506 depends on MIPS_CPS
Paul Burton3179d372014-04-14 11:00:56 +01002507 bool
2508
Paul Burton9f98f3d2014-01-15 10:31:51 +00002509config MIPS_CM
2510 bool
Paul Burton3c9b4162017-08-12 19:49:42 -07002511 select MIPS_CPC
Paul Burton9f98f3d2014-01-15 10:31:51 +00002512
Paul Burton9c38cf42014-01-15 10:31:52 +00002513config MIPS_CPC
2514 bool
Ralf Baechle26009902006-04-05 09:45:45 +01002515
Linus Torvalds1da177e2005-04-16 15:20:36 -07002516config SB1_PASS_2_WORKAROUNDS
2517 bool
2518 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2519 default y
2520
2521config SB1_PASS_2_1_WORKAROUNDS
2522 bool
2523 depends on CPU_SB1 && CPU_SB1_PASS_2
2524 default y
2525
Markos Chandras9e2b5372014-07-21 08:46:14 +01002526choice
2527 prompt "SmartMIPS or microMIPS ASE support"
2528
2529config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2530 bool "None"
2531 help
2532 Select this if you want neither microMIPS nor SmartMIPS support
2533
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002534config CPU_HAS_SMARTMIPS
2535 depends on SYS_SUPPORTS_SMARTMIPS
Markos Chandras9e2b5372014-07-21 08:46:14 +01002536 bool "SmartMIPS"
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002537 help
2538 SmartMIPS is a extension of the MIPS32 architecture aimed at
2539 increased security at both hardware and software level for
2540 smartcards. Enabling this option will allow proper use of the
2541 SmartMIPS instructions by Linux applications. However a kernel with
2542 this option will not work on a MIPS core without SmartMIPS core. If
2543 you don't know you probably don't have SmartMIPS and should say N
2544 here.
2545
Steven J. Hillbce86082013-03-25 13:27:11 -05002546config CPU_MICROMIPS
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002547 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
Markos Chandras9e2b5372014-07-21 08:46:14 +01002548 bool "microMIPS"
Steven J. Hillbce86082013-03-25 13:27:11 -05002549 help
2550 When this option is enabled the kernel will be built using the
2551 microMIPS ISA
2552
Markos Chandras9e2b5372014-07-21 08:46:14 +01002553endchoice
2554
Paul Burtona5e9a692014-01-27 15:23:10 +00002555config CPU_HAS_MSA
Paul Burton0ce34172015-07-27 12:58:27 -07002556 bool "Support for the MIPS SIMD Architecture"
Paul Burtona5e9a692014-01-27 15:23:10 +00002557 depends on CPU_SUPPORTS_MSA
Paul Burtonc92e47e2018-11-07 23:14:02 +00002558 depends on MIPS_FP_SUPPORT
Paul Burton2a6cb6692014-07-11 16:47:14 +01002559 depends on 64BIT || MIPS_O32_FP64_SUPPORT
Paul Burtona5e9a692014-01-27 15:23:10 +00002560 help
2561 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2562 and a set of SIMD instructions to operate on them. When this option
Paul Burton1db1af82014-01-27 15:23:11 +00002563 is enabled the kernel will support allocating & switching MSA
2564 vector register contexts. If you know that your kernel will only be
2565 running on CPUs which do not support MSA or that your userland will
2566 not be making use of it then you may wish to say N here to reduce
2567 the size & complexity of your kernel.
Paul Burtona5e9a692014-01-27 15:23:10 +00002568
2569 If unsure, say Y.
2570
Linus Torvalds1da177e2005-04-16 15:20:36 -07002571config CPU_HAS_WB
Ralf Baechlef7062dd2006-04-24 14:58:53 +01002572 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002573
Kevin Cernekeedf0ac8a2011-11-16 01:25:45 +00002574config XKS01
2575 bool
2576
Florian Fainelli8256b172016-02-09 12:55:51 -08002577config CPU_HAS_RIXI
2578 bool
2579
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002580config CPU_HAS_LOAD_STORE_LR
2581 bool
2582 help
2583 CPU has support for unaligned load and store instructions:
2584 LWL, LWR, SWL, SWR (Load/store word left/right).
2585 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
2586
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002587#
2588# Vectored interrupt mode is an R2 feature
2589#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002590config CPU_MIPSR2_IRQ_VI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002591 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002592
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002593#
2594# Extended interrupt mode is an R2 feature
2595#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002596config CPU_MIPSR2_IRQ_EI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002597 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002598
Linus Torvalds1da177e2005-04-16 15:20:36 -07002599config CPU_HAS_SYNC
2600 bool
2601 depends on !CPU_R3000
2602 default y
2603
2604#
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002605# CPU non-features
2606#
2607config CPU_DADDI_WORKAROUNDS
2608 bool
2609
2610config CPU_R4000_WORKAROUNDS
2611 bool
2612 select CPU_R4400_WORKAROUNDS
2613
2614config CPU_R4400_WORKAROUNDS
2615 bool
2616
Paul Burton071d2f02019-10-01 23:04:32 +00002617config CPU_R4X00_BUGS64
2618 bool
2619 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2620
Paul Burton4edf00a2016-05-06 14:36:23 +01002621config MIPS_ASID_SHIFT
2622 int
2623 default 6 if CPU_R3000 || CPU_TX39XX
Paul Burton4edf00a2016-05-06 14:36:23 +01002624 default 0
2625
2626config MIPS_ASID_BITS
2627 int
Paul Burton2db003a2016-05-06 14:36:24 +01002628 default 0 if MIPS_ASID_BITS_VARIABLE
Paul Burton4edf00a2016-05-06 14:36:23 +01002629 default 6 if CPU_R3000 || CPU_TX39XX
2630 default 8
2631
Paul Burton2db003a2016-05-06 14:36:24 +01002632config MIPS_ASID_BITS_VARIABLE
2633 bool
2634
Marcin Nowakowski4a5dc512018-02-09 22:11:06 +00002635config MIPS_CRC_SUPPORT
2636 bool
2637
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002638#
Linus Torvalds1da177e2005-04-16 15:20:36 -07002639# - Highmem only makes sense for the 32-bit kernel.
2640# - The current highmem code will only work properly on physically indexed
2641# caches such as R3000, SB1, R7000 or those that look like they're virtually
2642# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2643# moment we protect the user and offer the highmem option only on machines
2644# where it's known to be safe. This will not offer highmem on a few systems
2645# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2646# indexed CPUs but we're playing safe.
Ralf Baechle797798c2005-08-10 15:17:11 +00002647# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2648# know they might have memory configurations that could make use of highmem
2649# support.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002650#
2651config HIGHMEM
2652 bool "High Memory Support"
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002653 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
Ralf Baechle797798c2005-08-10 15:17:11 +00002654
2655config CPU_SUPPORTS_HIGHMEM
2656 bool
2657
2658config SYS_SUPPORTS_HIGHMEM
2659 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002660
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002661config SYS_SUPPORTS_SMARTMIPS
2662 bool
2663
Steven J. Hilla6a48342013-02-05 16:52:02 -06002664config SYS_SUPPORTS_MICROMIPS
2665 bool
2666
Ralf Baechle377cb1b2014-04-29 01:49:24 +02002667config SYS_SUPPORTS_MIPS16
2668 bool
2669 help
2670 This option must be set if a kernel might be executed on a MIPS16-
2671 enabled CPU even if MIPS16 is not actually being used. In other
2672 words, it makes the kernel MIPS16-tolerant.
2673
Paul Burtona5e9a692014-01-27 15:23:10 +00002674config CPU_SUPPORTS_MSA
2675 bool
2676
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002677config ARCH_FLATMEM_ENABLE
2678 def_bool y
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002679 depends on !NUMA && !CPU_LOONGSON2EF
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002680
Atsushi Nemotob1c6cd42006-07-03 00:09:47 +09002681config ARCH_SPARSEMEM_ENABLE
2682 bool
Mike Rapoport397dc002019-09-16 14:13:10 +03002683 select SPARSEMEM_STATIC if !SGI_IP27
Atsushi Nemoto31473742006-07-03 00:09:47 +09002684
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002685config NUMA
2686 bool "NUMA Support"
2687 depends on SYS_SUPPORTS_NUMA
2688 help
2689 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2690 Access). This option improves performance on systems with more
2691 than two nodes; on two node systems it is generally better to
2692 leave it disabled; on single node systems disable this option
2693 disabled.
2694
2695config SYS_SUPPORTS_NUMA
2696 bool
2697
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002698config RELOCATABLE
2699 bool "Relocatable kernel"
Steven J. Hill3ff72be2016-12-13 14:25:37 -06002700 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002701 help
2702 This builds a kernel image that retains relocation information
2703 so it can be loaded someplace besides the default 1MB.
2704 The relocations make the kernel binary about 15% larger,
2705 but are discarded at runtime
2706
Matt Redfearn069fd762016-03-31 10:05:34 +01002707config RELOCATION_TABLE_SIZE
2708 hex "Relocation table size"
2709 depends on RELOCATABLE
2710 range 0x0 0x01000000
2711 default "0x00100000"
2712 ---help---
2713 A table of relocation data will be appended to the kernel binary
2714 and parsed at boot to fix up the relocated kernel.
2715
2716 This option allows the amount of space reserved for the table to be
2717 adjusted, although the default of 1Mb should be ok in most cases.
2718
2719 The build will fail and a valid size suggested if this is too small.
2720
2721 If unsure, leave at the default value.
2722
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002723config RANDOMIZE_BASE
2724 bool "Randomize the address of the kernel image"
2725 depends on RELOCATABLE
2726 ---help---
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002727 Randomizes the physical and virtual address at which the
2728 kernel image is loaded, as a security feature that
2729 deters exploit attempts relying on knowledge of the location
2730 of kernel internals.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002731
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002732 Entropy is generated using any coprocessor 0 registers available.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002733
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002734 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002735
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002736 If unsure, say N.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002737
2738config RANDOMIZE_BASE_MAX_OFFSET
2739 hex "Maximum kASLR offset" if EXPERT
2740 depends on RANDOMIZE_BASE
2741 range 0x0 0x40000000 if EVA || 64BIT
2742 range 0x0 0x08000000
2743 default "0x01000000"
2744 ---help---
2745 When kASLR is active, this provides the maximum offset that will
2746 be applied to the kernel image. It should be set according to the
2747 amount of physical RAM available in the target system minus
2748 PHYSICAL_START and must be a power of 2.
2749
2750 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2751 EVA or 64-bit. The default is 16Mb.
2752
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07002753config NODES_SHIFT
2754 int
2755 default "6"
2756 depends on NEED_MULTIPLE_NODES
2757
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002758config HW_PERF_EVENTS
2759 bool "Enable hardware performance counter support for perf events"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002760 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002761 default y
2762 help
2763 Enable hardware performance counter support for perf events. If
2764 disabled, perf events will use software events only.
2765
Linus Torvalds1da177e2005-04-16 15:20:36 -07002766config SMP
2767 bool "Multi-Processing support"
Ralf Baechlee73ea272006-06-04 11:51:46 +01002768 depends on SYS_SUPPORTS_SMP
2769 help
Linus Torvalds1da177e2005-04-16 15:20:36 -07002770 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08002771 a system with only one CPU, say N. If you have a system with more
2772 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002773
Robert Graffham4a474152014-01-23 15:55:29 -08002774 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07002775 machines, but will use only one CPU of a multiprocessor machine. If
2776 you say Y here, the kernel will run on many, but not all,
Robert Graffham4a474152014-01-23 15:55:29 -08002777 uniprocessor machines. On a uniprocessor machine, the kernel
Linus Torvalds1da177e2005-04-16 15:20:36 -07002778 will run faster if you say N here.
2779
2780 People using multiprocessor machines who say Y here should also say
2781 Y to "Enhanced Real Time Clock Support", below.
2782
Adrian Bunk03502fa2008-02-03 15:50:21 +02002783 See also the SMP-HOWTO available at
2784 <http://www.tldp.org/docs.html#howto>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002785
2786 If you don't know what to do here, say N.
2787
Matt Redfearn7840d612016-07-07 08:50:40 +01002788config HOTPLUG_CPU
2789 bool "Support for hot-pluggable CPUs"
2790 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2791 help
2792 Say Y here to allow turning CPUs off and on. CPUs can be
2793 controlled through /sys/devices/system/cpu.
2794 (Note: power management support will enable this option
2795 automatically on SMP systems. )
2796 Say N if you want to disable CPU hotplug.
2797
Ralf Baechle87353d82007-11-19 12:23:51 +00002798config SMP_UP
2799 bool
2800
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002801config SYS_SUPPORTS_MIPS_CMP
2802 bool
2803
Paul Burton0ee958e2014-01-15 10:31:53 +00002804config SYS_SUPPORTS_MIPS_CPS
2805 bool
2806
Ralf Baechlee73ea272006-06-04 11:51:46 +01002807config SYS_SUPPORTS_SMP
2808 bool
2809
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002810config NR_CPUS_DEFAULT_4
2811 bool
2812
2813config NR_CPUS_DEFAULT_8
2814 bool
2815
2816config NR_CPUS_DEFAULT_16
2817 bool
2818
2819config NR_CPUS_DEFAULT_32
2820 bool
2821
2822config NR_CPUS_DEFAULT_64
2823 bool
2824
Linus Torvalds1da177e2005-04-16 15:20:36 -07002825config NR_CPUS
Jayachandran Ca91796a2014-04-29 20:07:40 +05302826 int "Maximum number of CPUs (2-256)"
2827 range 2 256
Linus Torvalds1da177e2005-04-16 15:20:36 -07002828 depends on SMP
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002829 default "4" if NR_CPUS_DEFAULT_4
2830 default "8" if NR_CPUS_DEFAULT_8
2831 default "16" if NR_CPUS_DEFAULT_16
2832 default "32" if NR_CPUS_DEFAULT_32
2833 default "64" if NR_CPUS_DEFAULT_64
Linus Torvalds1da177e2005-04-16 15:20:36 -07002834 help
2835 This allows you to specify the maximum number of CPUs which this
2836 kernel will support. The maximum supported value is 32 for 32-bit
2837 kernel and 64 for 64-bit kernels; the minimum value which makes
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002838 sense is 1 for Qemu (useful only for kernel debugging purposes)
2839 and 2 for all others.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002840
2841 This is purely to save memory - each supported CPU adds
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002842 approximately eight kilobytes to the kernel image. For best
2843 performance should round up your number of processors to the next
2844 power of two.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002845
Al Cooper399aaa22012-07-13 16:44:53 -04002846config MIPS_PERF_SHARED_TC_COUNTERS
2847 bool
2848
David Daney7820b842017-09-28 12:34:04 -05002849config MIPS_NR_CPU_NR_MAP_1024
2850 bool
2851
2852config MIPS_NR_CPU_NR_MAP
2853 int
2854 depends on SMP
2855 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2856 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2857
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002858#
2859# Timer Interrupt Frequency Configuration
2860#
2861
2862choice
2863 prompt "Timer frequency"
2864 default HZ_250
2865 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002866 Allows the configuration of the timer frequency.
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002867
Paul Burton67596572015-09-22 10:16:39 -07002868 config HZ_24
2869 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2870
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002871 config HZ_48
Ralf Baechle0f873582008-02-25 16:55:29 +00002872 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002873
2874 config HZ_100
2875 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2876
2877 config HZ_128
2878 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2879
2880 config HZ_250
2881 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2882
2883 config HZ_256
2884 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2885
2886 config HZ_1000
2887 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2888
2889 config HZ_1024
2890 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2891
2892endchoice
2893
Paul Burton67596572015-09-22 10:16:39 -07002894config SYS_SUPPORTS_24HZ
2895 bool
2896
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002897config SYS_SUPPORTS_48HZ
2898 bool
2899
2900config SYS_SUPPORTS_100HZ
2901 bool
2902
2903config SYS_SUPPORTS_128HZ
2904 bool
2905
2906config SYS_SUPPORTS_250HZ
2907 bool
2908
2909config SYS_SUPPORTS_256HZ
2910 bool
2911
2912config SYS_SUPPORTS_1000HZ
2913 bool
2914
2915config SYS_SUPPORTS_1024HZ
2916 bool
2917
2918config SYS_SUPPORTS_ARBIT_HZ
2919 bool
Paul Burton67596572015-09-22 10:16:39 -07002920 default y if !SYS_SUPPORTS_24HZ && \
2921 !SYS_SUPPORTS_48HZ && \
2922 !SYS_SUPPORTS_100HZ && \
2923 !SYS_SUPPORTS_128HZ && \
2924 !SYS_SUPPORTS_250HZ && \
2925 !SYS_SUPPORTS_256HZ && \
2926 !SYS_SUPPORTS_1000HZ && \
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002927 !SYS_SUPPORTS_1024HZ
2928
2929config HZ
2930 int
Paul Burton67596572015-09-22 10:16:39 -07002931 default 24 if HZ_24
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002932 default 48 if HZ_48
2933 default 100 if HZ_100
2934 default 128 if HZ_128
2935 default 250 if HZ_250
2936 default 256 if HZ_256
2937 default 1000 if HZ_1000
2938 default 1024 if HZ_1024
2939
Deng-Cheng Zhu96685b12015-03-07 10:30:19 -08002940config SCHED_HRTICK
2941 def_bool HIGH_RES_TIMERS
2942
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002943config KEXEC
Kees Cook7d607172013-01-16 18:53:19 -08002944 bool "Kexec system call"
Dave Young2965faa2015-09-09 15:38:55 -07002945 select KEXEC_CORE
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002946 help
2947 kexec is a system call that implements the ability to shutdown your
2948 current kernel, and to start another kernel. It is like a reboot
David Sterba3dde6ad2007-05-09 07:12:20 +02002949 but it is independent of the system firmware. And like a reboot
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002950 you can start any kernel with it, not just Linux.
2951
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02002952 The name comes from the similarity to the exec system call.
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002953
2954 It is an ongoing process to be certain the hardware in a machine
2955 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02002956 initially work for you. As of this writing the exact hardware
2957 interface is strongly in flux, so no good recommendation can be
2958 made.
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002959
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002960config CRASH_DUMP
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002961 bool "Kernel crash dumps"
2962 help
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002963 Generate crash dump after being started by kexec.
2964 This should be normally only set in special crash dump kernels
2965 which are loaded in the main kernel with kexec-tools into
2966 a specially reserved region and then later executed after
2967 a crash by kdump/kexec. The crash dump kernel must be compiled
2968 to a memory address not used by the main kernel or firmware using
2969 PHYSICAL_START.
2970
2971config PHYSICAL_START
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002972 hex "Physical address where the kernel is loaded"
Maciej W. Rozycki8bda3e22018-03-26 19:11:51 +01002973 default "0xffffffff84000000"
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002974 depends on CRASH_DUMP
2975 help
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002976 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2977 If you plan to use kernel for capturing the crash dump change
2978 this value to start of the reserved region (the "X" value as
2979 specified in the "crashkernel=YM@XM" command line boot parameter
2980 passed to the panic-ed kernel).
2981
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002982config SECCOMP
2983 bool "Enable seccomp to safely compute untrusted bytecode"
Ralf Baechle293c5bd2007-07-25 16:19:33 +01002984 depends on PROC_FS
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002985 default y
2986 help
2987 This kernel feature is useful for number crunching applications
2988 that may need to compute untrusted bytecode during their
2989 execution. By using pipes or other transports made available to
2990 the process as file descriptors supporting the read/write
2991 syscalls, it's possible to isolate those applications in
2992 their own address space using seccomp. Once seccomp is
2993 enabled via /proc/<pid>/seccomp, it cannot be disabled
2994 and the task is only allowed to execute a few safe syscalls
2995 defined by each seccomp mode.
2996
2997 If unsure, say Y. Only embedded should say N here.
2998
Paul Burton597ce172013-11-22 13:12:07 +00002999config MIPS_O32_FP64_SUPPORT
Paul Burtonb7f1e272018-11-07 23:13:58 +00003000 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
Paul Burton597ce172013-11-22 13:12:07 +00003001 depends on 32BIT || MIPS32_O32
Paul Burton597ce172013-11-22 13:12:07 +00003002 help
3003 When this is enabled, the kernel will support use of 64-bit floating
3004 point registers with binaries using the O32 ABI along with the
3005 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3006 32-bit MIPS systems this support is at the cost of increasing the
3007 size and complexity of the compiled FPU emulator. Thus if you are
3008 running a MIPS32 system and know that none of your userland binaries
3009 will require 64-bit floating point, you may wish to reduce the size
3010 of your kernel & potentially improve FP emulation performance by
3011 saying N here.
3012
Paul Burton06e2e882014-02-14 17:55:18 +00003013 Although binutils currently supports use of this flag the details
3014 concerning its effect upon the O32 ABI in userland are still being
3015 worked on. In order to avoid userland becoming dependant upon current
3016 behaviour before the details have been finalised, this option should
3017 be considered experimental and only enabled by those working upon
3018 said details.
3019
3020 If unsure, say N.
Paul Burton597ce172013-11-22 13:12:07 +00003021
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003022config USE_OF
Jonas Gorski0b3e06f2012-09-18 11:28:54 +02003023 bool
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003024 select OF
Stephen Neuendorffere6ce1322010-11-18 15:54:56 -08003025 select OF_EARLY_FLATTREE
Grant Likelyabd23632012-02-24 08:07:06 -07003026 select IRQ_DOMAIN
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003027
Dengcheng Zhu2fe8ea32018-09-11 14:49:24 -07003028config UHI_BOOT
3029 bool
3030
Andrew Bresticker7fafb062014-08-21 13:04:20 -07003031config BUILTIN_DTB
3032 bool
3033
Jonas Gorski1da8f172015-04-12 12:24:58 +02003034choice
Jonas Gorski5b24d522015-10-12 13:13:01 +02003035 prompt "Kernel appended dtb support" if USE_OF
Jonas Gorski1da8f172015-04-12 12:24:58 +02003036 default MIPS_NO_APPENDED_DTB
3037
3038 config MIPS_NO_APPENDED_DTB
3039 bool "None"
3040 help
3041 Do not enable appended dtb support.
3042
Aaro Koskinen87db5372015-09-11 17:46:14 +03003043 config MIPS_ELF_APPENDED_DTB
3044 bool "vmlinux"
3045 help
3046 With this option, the boot code will look for a device tree binary
3047 DTB) included in the vmlinux ELF section .appended_dtb. By default
3048 it is empty and the DTB can be appended using binutils command
3049 objcopy:
3050
3051 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3052
3053 This is meant as a backward compatiblity convenience for those
3054 systems with a bootloader that can't be upgraded to accommodate
3055 the documented boot protocol using a device tree.
3056
Jonas Gorski1da8f172015-04-12 12:24:58 +02003057 config MIPS_RAW_APPENDED_DTB
Jonas Gorskib8f54f22016-06-20 11:27:36 +02003058 bool "vmlinux.bin or vmlinuz.bin"
Jonas Gorski1da8f172015-04-12 12:24:58 +02003059 help
3060 With this option, the boot code will look for a device tree binary
Jonas Gorskib8f54f22016-06-20 11:27:36 +02003061 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
Jonas Gorski1da8f172015-04-12 12:24:58 +02003062 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3063
3064 This is meant as a backward compatibility convenience for those
3065 systems with a bootloader that can't be upgraded to accommodate
3066 the documented boot protocol using a device tree.
3067
3068 Beware that there is very little in terms of protection against
3069 this option being confused by leftover garbage in memory that might
3070 look like a DTB header after a reboot if no actual DTB is appended
3071 to vmlinux.bin. Do not leave this option active in a production kernel
3072 if you don't intend to always append a DTB.
3073endchoice
3074
Jonas Gorski20249722015-10-12 13:13:02 +02003075choice
3076 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02003077 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
Paul Burton3f5f0a42016-10-05 18:18:21 +01003078 !MIPS_MALTA && \
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02003079 !CAVIUM_OCTEON_SOC
Jonas Gorski20249722015-10-12 13:13:02 +02003080 default MIPS_CMDLINE_FROM_BOOTLOADER
3081
3082 config MIPS_CMDLINE_FROM_DTB
3083 depends on USE_OF
3084 bool "Dtb kernel arguments if available"
3085
3086 config MIPS_CMDLINE_DTB_EXTEND
3087 depends on USE_OF
3088 bool "Extend dtb kernel arguments with bootloader arguments"
3089
3090 config MIPS_CMDLINE_FROM_BOOTLOADER
3091 bool "Bootloader kernel arguments if available"
Rabin Vincented47e152016-04-28 11:03:09 +02003092
3093 config MIPS_CMDLINE_BUILTIN_EXTEND
3094 depends on CMDLINE_BOOL
3095 bool "Extend builtin kernel arguments with bootloader arguments"
Jonas Gorski20249722015-10-12 13:13:02 +02003096endchoice
3097
Ralf Baechle5e83d432005-10-29 19:32:41 +01003098endmenu
3099
Atsushi Nemoto1df0f0f2006-09-26 23:44:01 +09003100config LOCKDEP_SUPPORT
3101 bool
3102 default y
3103
3104config STACKTRACE_SUPPORT
3105 bool
3106 default y
3107
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003108config PGTABLE_LEVELS
3109 int
Alex Belits3377e222017-02-16 17:27:34 -08003110 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003111 default 3 if 64BIT && !PAGE_SIZE_64KB
3112 default 2
3113
Paul Burton6c359eb2018-07-27 18:23:20 -07003114config MIPS_AUTO_PFN_OFFSET
3115 bool
3116
Linus Torvalds1da177e2005-04-16 15:20:36 -07003117menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3118
Paul Burtonc5611df2016-10-05 18:18:12 +01003119config PCI_DRIVERS_GENERIC
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003120 select PCI_DOMAINS_GENERIC if PCI
Paul Burtonc5611df2016-10-05 18:18:12 +01003121 bool
3122
3123config PCI_DRIVERS_LEGACY
3124 def_bool !PCI_DRIVERS_GENERIC
3125 select NO_GENERIC_PCI_IOPORT_MAP
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003126 select PCI_DOMAINS if PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07003127
3128#
3129# ISA support is now enabled via select. Too many systems still have the one
3130# or other ISA chip on the board that users don't know about so don't expect
3131# users to choose the right thing ...
3132#
3133config ISA
3134 bool
3135
Linus Torvalds1da177e2005-04-16 15:20:36 -07003136config TC
3137 bool "TURBOchannel support"
3138 depends on MACH_DECSTATION
3139 help
Justin P. Mattock50a23e62010-10-16 10:36:23 -07003140 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3141 processors. TURBOchannel programming specifications are available
3142 at:
3143 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3144 and:
3145 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3146 Linux driver support status is documented at:
3147 <http://www.linux-mips.org/wiki/DECstation>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003148
Linus Torvalds1da177e2005-04-16 15:20:36 -07003149config MMU
3150 bool
3151 default y
3152
Matt Redfearn109c32f2016-11-24 17:32:45 +00003153config ARCH_MMAP_RND_BITS_MIN
3154 default 12 if 64BIT
3155 default 8
3156
3157config ARCH_MMAP_RND_BITS_MAX
3158 default 18 if 64BIT
3159 default 15
3160
3161config ARCH_MMAP_RND_COMPAT_BITS_MIN
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003162 default 8
Matt Redfearn109c32f2016-11-24 17:32:45 +00003163
3164config ARCH_MMAP_RND_COMPAT_BITS_MAX
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003165 default 15
Matt Redfearn109c32f2016-11-24 17:32:45 +00003166
Ralf Baechled865bea2007-10-11 23:46:10 +01003167config I8253
3168 bool
Russell King798778b2011-05-08 19:03:03 +01003169 select CLKSRC_I8253
Thomas Gleixner2d026122011-06-09 13:08:27 +00003170 select CLKEVT_I8253
Wu Zhangjin9726b432009-11-17 01:32:58 +08003171 select MIPS_EXTERNAL_TIMER
Ralf Baechled865bea2007-10-11 23:46:10 +01003172
Ralf Baechlee05eb3f2013-06-12 10:54:11 +02003173config ZONE_DMA
3174 bool
3175
Ralf Baechlecce335a2007-11-03 02:05:43 +00003176config ZONE_DMA32
3177 bool
3178
Linus Torvalds1da177e2005-04-16 15:20:36 -07003179endmenu
3180
Linus Torvalds1da177e2005-04-16 15:20:36 -07003181config TRAD_SIGNALS
3182 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003183
Linus Torvalds1da177e2005-04-16 15:20:36 -07003184config MIPS32_COMPAT
Ralf Baechle78aaf952014-12-19 01:18:03 +01003185 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003186
3187config COMPAT
3188 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003189
Atsushi Nemoto05e43962006-11-07 18:02:44 +09003190config SYSVIPC_COMPAT
3191 bool
Atsushi Nemoto05e43962006-11-07 18:02:44 +09003192
Linus Torvalds1da177e2005-04-16 15:20:36 -07003193config MIPS32_O32
3194 bool "Kernel support for o32 binaries"
Ralf Baechle78aaf952014-12-19 01:18:03 +01003195 depends on 64BIT
3196 select ARCH_WANT_OLD_COMPAT_IPC
3197 select COMPAT
3198 select MIPS32_COMPAT
3199 select SYSVIPC_COMPAT if SYSVIPC
Linus Torvalds1da177e2005-04-16 15:20:36 -07003200 help
3201 Select this option if you want to run o32 binaries. These are pure
3202 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3203 existing binaries are in this format.
3204
3205 If unsure, say Y.
3206
3207config MIPS32_N32
3208 bool "Kernel support for n32 binaries"
Ralf Baechlec22eacf2015-01-03 12:10:23 +01003209 depends on 64BIT
Arnd Bergmann5a9372f2019-01-10 17:24:31 +01003210 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
Ralf Baechle78aaf952014-12-19 01:18:03 +01003211 select COMPAT
3212 select MIPS32_COMPAT
3213 select SYSVIPC_COMPAT if SYSVIPC
Linus Torvalds1da177e2005-04-16 15:20:36 -07003214 help
3215 Select this option if you want to run n32 binaries. These are
3216 64-bit binaries using 32-bit quantities for addressing and certain
3217 data that would normally be 64-bit. They are used in special
3218 cases.
3219
3220 If unsure, say N.
3221
3222config BINFMT_ELF32
3223 bool
3224 default y if MIPS32_O32 || MIPS32_N32
Ralf Baechlef43edca2016-05-23 16:22:26 -07003225 select ELFCORE
Linus Torvalds1da177e2005-04-16 15:20:36 -07003226
Ralf Baechle21162452007-02-09 17:08:58 +00003227menu "Power management options"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003228
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003229config ARCH_HIBERNATION_POSSIBLE
3230 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003231 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003232
Johannes Bergf4cb5702007-12-08 02:14:00 +01003233config ARCH_SUSPEND_POSSIBLE
3234 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003235 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Johannes Bergf4cb5702007-12-08 02:14:00 +01003236
Ralf Baechle21162452007-02-09 17:08:58 +00003237source "kernel/power/Kconfig"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003238
Linus Torvalds1da177e2005-04-16 15:20:36 -07003239endmenu
3240
Viresh Kumar7a998932013-04-04 12:54:21 +00003241config MIPS_EXTERNAL_TIMER
3242 bool
3243
Viresh Kumar7a998932013-04-04 12:54:21 +00003244menu "CPU Power Management"
Paul Burtonc095eba2014-04-14 16:24:22 +01003245
3246if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
Viresh Kumar7a998932013-04-04 12:54:21 +00003247source "drivers/cpufreq/Kconfig"
Viresh Kumar7a998932013-04-04 12:54:21 +00003248endif
Wu Zhangjin9726b432009-11-17 01:32:58 +08003249
Paul Burtonc095eba2014-04-14 16:24:22 +01003250source "drivers/cpuidle/Kconfig"
3251
3252endmenu
3253
Ralf Baechle98cdee02012-11-15 10:35:42 +01003254source "drivers/firmware/Kconfig"
3255
Sanjay Lal2235a542012-11-21 18:33:59 -08003256source "arch/mips/kvm/Kconfig"