Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2013 Ideas On Board SPRL |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__ |
| 7 | #define __DT_BINDINGS_CLOCK_R8A7791_H__ |
| 8 | |
| 9 | /* CPG */ |
| 10 | #define R8A7791_CLK_MAIN 0 |
| 11 | #define R8A7791_CLK_PLL0 1 |
| 12 | #define R8A7791_CLK_PLL1 2 |
| 13 | #define R8A7791_CLK_PLL3 3 |
| 14 | #define R8A7791_CLK_LB 4 |
| 15 | #define R8A7791_CLK_QSPI 5 |
| 16 | #define R8A7791_CLK_SDH 6 |
| 17 | #define R8A7791_CLK_SD0 7 |
| 18 | #define R8A7791_CLK_Z 8 |
Sergei Shtylyov | b324252 | 2015-01-06 01:24:08 +0300 | [diff] [blame] | 19 | #define R8A7791_CLK_RCAN 9 |
Sergei Shtylyov | ae65a8a | 2014-12-30 23:20:34 +0300 | [diff] [blame] | 20 | #define R8A7791_CLK_ADSP 10 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 21 | |
Laurent Pinchart | cded80f | 2013-12-19 16:51:02 +0100 | [diff] [blame] | 22 | /* MSTP0 */ |
| 23 | #define R8A7791_CLK_MSIOF0 0 |
| 24 | |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 25 | /* MSTP1 */ |
Yoshifumi Hosoya | 74d89d2 | 2014-10-14 16:01:43 +0900 | [diff] [blame] | 26 | #define R8A7791_CLK_VCP0 1 |
| 27 | #define R8A7791_CLK_VPC0 3 |
| 28 | #define R8A7791_CLK_JPU 6 |
| 29 | #define R8A7791_CLK_SSP1 9 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 30 | #define R8A7791_CLK_TMU1 11 |
Kouei Abe | e4d2fd9 | 2014-10-14 16:01:41 +0900 | [diff] [blame] | 31 | #define R8A7791_CLK_3DG 12 |
Yoshifumi Hosoya | 74d89d2 | 2014-10-14 16:01:43 +0900 | [diff] [blame] | 32 | #define R8A7791_CLK_2DDMAC 15 |
| 33 | #define R8A7791_CLK_FDP1_1 18 |
| 34 | #define R8A7791_CLK_FDP1_0 19 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 35 | #define R8A7791_CLK_TMU3 21 |
| 36 | #define R8A7791_CLK_TMU2 22 |
| 37 | #define R8A7791_CLK_CMT0 24 |
| 38 | #define R8A7791_CLK_TMU0 25 |
| 39 | #define R8A7791_CLK_VSP1_DU1 27 |
| 40 | #define R8A7791_CLK_VSP1_DU0 28 |
Laurent Pinchart | 58ea1d5 | 2014-04-02 16:31:47 +0200 | [diff] [blame] | 41 | #define R8A7791_CLK_VSP1_S 31 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 42 | |
| 43 | /* MSTP2 */ |
| 44 | #define R8A7791_CLK_SCIFA2 2 |
| 45 | #define R8A7791_CLK_SCIFA1 3 |
| 46 | #define R8A7791_CLK_SCIFA0 4 |
Laurent Pinchart | cded80f | 2013-12-19 16:51:02 +0100 | [diff] [blame] | 47 | #define R8A7791_CLK_MSIOF2 5 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 48 | #define R8A7791_CLK_SCIFB0 6 |
| 49 | #define R8A7791_CLK_SCIFB1 7 |
Laurent Pinchart | cded80f | 2013-12-19 16:51:02 +0100 | [diff] [blame] | 50 | #define R8A7791_CLK_MSIOF1 8 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 51 | #define R8A7791_CLK_SCIFB2 16 |
Geert Uytterhoeven | a505daa | 2014-05-12 20:49:33 +0200 | [diff] [blame] | 52 | #define R8A7791_CLK_SYS_DMAC1 18 |
| 53 | #define R8A7791_CLK_SYS_DMAC0 19 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 54 | |
| 55 | /* MSTP3 */ |
| 56 | #define R8A7791_CLK_TPU0 4 |
| 57 | #define R8A7791_CLK_SDHI2 11 |
| 58 | #define R8A7791_CLK_SDHI1 12 |
| 59 | #define R8A7791_CLK_SDHI0 14 |
| 60 | #define R8A7791_CLK_MMCIF0 15 |
Wolfram Sang | c6e8f32 | 2014-03-10 12:26:56 +0100 | [diff] [blame] | 61 | #define R8A7791_CLK_IIC0 18 |
Phil Edworthy | 4bfb376 | 2014-06-13 10:37:18 +0100 | [diff] [blame] | 62 | #define R8A7791_CLK_PCIEC 19 |
Wolfram Sang | c6e8f32 | 2014-03-10 12:26:56 +0100 | [diff] [blame] | 63 | #define R8A7791_CLK_IIC1 23 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 64 | #define R8A7791_CLK_SSUSB 28 |
| 65 | #define R8A7791_CLK_CMT1 29 |
| 66 | #define R8A7791_CLK_USBDMAC0 30 |
| 67 | #define R8A7791_CLK_USBDMAC1 31 |
| 68 | |
Geert Uytterhoeven | 62d386c | 2015-03-18 19:56:00 +0100 | [diff] [blame] | 69 | /* MSTP4 */ |
| 70 | #define R8A7791_CLK_IRQC 7 |
Geert Uytterhoeven | c2f2e26 | 2017-03-06 17:58:08 +0100 | [diff] [blame] | 71 | #define R8A7791_CLK_INTC_SYS 8 |
Geert Uytterhoeven | 62d386c | 2015-03-18 19:56:00 +0100 | [diff] [blame] | 72 | |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 73 | /* MSTP5 */ |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 74 | #define R8A7791_CLK_AUDIO_DMAC1 1 |
| 75 | #define R8A7791_CLK_AUDIO_DMAC0 2 |
Sergei Shtylyov | ae65a8a | 2014-12-30 23:20:34 +0300 | [diff] [blame] | 76 | #define R8A7791_CLK_ADSP_MOD 6 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 77 | #define R8A7791_CLK_THERMAL 22 |
| 78 | #define R8A7791_CLK_PWM 23 |
| 79 | |
| 80 | /* MSTP7 */ |
Magnus Damm | 6225b99 | 2014-04-07 15:04:21 +0900 | [diff] [blame] | 81 | #define R8A7791_CLK_EHCI 3 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 82 | #define R8A7791_CLK_HSUSB 4 |
| 83 | #define R8A7791_CLK_HSCIF2 13 |
| 84 | #define R8A7791_CLK_SCIF5 14 |
| 85 | #define R8A7791_CLK_SCIF4 15 |
| 86 | #define R8A7791_CLK_HSCIF1 16 |
| 87 | #define R8A7791_CLK_HSCIF0 17 |
| 88 | #define R8A7791_CLK_SCIF3 18 |
| 89 | #define R8A7791_CLK_SCIF2 19 |
| 90 | #define R8A7791_CLK_SCIF1 20 |
| 91 | #define R8A7791_CLK_SCIF0 21 |
| 92 | #define R8A7791_CLK_DU1 23 |
| 93 | #define R8A7791_CLK_DU0 24 |
| 94 | #define R8A7791_CLK_LVDS0 26 |
| 95 | |
| 96 | /* MSTP8 */ |
Ryo Kataoka | ce85ad4 | 2014-12-09 13:21:22 +0900 | [diff] [blame] | 97 | #define R8A7791_CLK_IPMMU_SGX 0 |
Andrey Gusakov | 7408d30 | 2014-12-18 23:43:03 +0300 | [diff] [blame] | 98 | #define R8A7791_CLK_MLB 2 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 99 | #define R8A7791_CLK_VIN2 9 |
| 100 | #define R8A7791_CLK_VIN1 10 |
| 101 | #define R8A7791_CLK_VIN0 11 |
Sergei Shtylyov | eaa870b | 2015-12-03 01:21:49 +0300 | [diff] [blame] | 102 | #define R8A7791_CLK_ETHERAVB 12 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 103 | #define R8A7791_CLK_ETHER 13 |
| 104 | #define R8A7791_CLK_SATA1 14 |
| 105 | #define R8A7791_CLK_SATA0 15 |
| 106 | |
| 107 | /* MSTP9 */ |
Marek Vasut | a56a2fe | 2017-04-16 18:57:08 +0200 | [diff] [blame] | 108 | #define R8A7791_CLK_GYROADC 1 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 109 | #define R8A7791_CLK_GPIO7 4 |
| 110 | #define R8A7791_CLK_GPIO6 5 |
| 111 | #define R8A7791_CLK_GPIO5 7 |
| 112 | #define R8A7791_CLK_GPIO4 8 |
| 113 | #define R8A7791_CLK_GPIO3 9 |
| 114 | #define R8A7791_CLK_GPIO2 10 |
| 115 | #define R8A7791_CLK_GPIO1 11 |
| 116 | #define R8A7791_CLK_GPIO0 12 |
| 117 | #define R8A7791_CLK_RCAN1 15 |
| 118 | #define R8A7791_CLK_RCAN0 16 |
Laurent Pinchart | ec71f55 | 2013-12-19 16:51:04 +0100 | [diff] [blame] | 119 | #define R8A7791_CLK_QSPI_MOD 17 |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 120 | #define R8A7791_CLK_I2C5 25 |
| 121 | #define R8A7791_CLK_IICDVFS 26 |
| 122 | #define R8A7791_CLK_I2C4 27 |
| 123 | #define R8A7791_CLK_I2C3 28 |
| 124 | #define R8A7791_CLK_I2C2 29 |
| 125 | #define R8A7791_CLK_I2C1 30 |
| 126 | #define R8A7791_CLK_I2C0 31 |
| 127 | |
Kuninori Morimoto | ee91415 | 2014-06-11 21:44:16 -0700 | [diff] [blame] | 128 | /* MSTP10 */ |
| 129 | #define R8A7791_CLK_SSI_ALL 5 |
| 130 | #define R8A7791_CLK_SSI9 6 |
| 131 | #define R8A7791_CLK_SSI8 7 |
| 132 | #define R8A7791_CLK_SSI7 8 |
| 133 | #define R8A7791_CLK_SSI6 9 |
| 134 | #define R8A7791_CLK_SSI5 10 |
| 135 | #define R8A7791_CLK_SSI4 11 |
| 136 | #define R8A7791_CLK_SSI3 12 |
| 137 | #define R8A7791_CLK_SSI2 13 |
| 138 | #define R8A7791_CLK_SSI1 14 |
| 139 | #define R8A7791_CLK_SSI0 15 |
| 140 | #define R8A7791_CLK_SCU_ALL 17 |
| 141 | #define R8A7791_CLK_SCU_DVC1 18 |
| 142 | #define R8A7791_CLK_SCU_DVC0 19 |
Kuninori Morimoto | 8840170 | 2015-07-21 00:27:03 +0000 | [diff] [blame] | 143 | #define R8A7791_CLK_SCU_CTU1_MIX1 20 |
| 144 | #define R8A7791_CLK_SCU_CTU0_MIX0 21 |
Kuninori Morimoto | ee91415 | 2014-06-11 21:44:16 -0700 | [diff] [blame] | 145 | #define R8A7791_CLK_SCU_SRC9 22 |
| 146 | #define R8A7791_CLK_SCU_SRC8 23 |
| 147 | #define R8A7791_CLK_SCU_SRC7 24 |
| 148 | #define R8A7791_CLK_SCU_SRC6 25 |
| 149 | #define R8A7791_CLK_SCU_SRC5 26 |
| 150 | #define R8A7791_CLK_SCU_SRC4 27 |
| 151 | #define R8A7791_CLK_SCU_SRC3 28 |
| 152 | #define R8A7791_CLK_SCU_SRC2 29 |
| 153 | #define R8A7791_CLK_SCU_SRC1 30 |
| 154 | #define R8A7791_CLK_SCU_SRC0 31 |
| 155 | |
Laurent Pinchart | 4d8864c | 2013-12-11 15:05:13 +0100 | [diff] [blame] | 156 | /* MSTP11 */ |
| 157 | #define R8A7791_CLK_SCIFA3 6 |
| 158 | #define R8A7791_CLK_SCIFA4 7 |
| 159 | #define R8A7791_CLK_SCIFA5 8 |
| 160 | |
| 161 | #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */ |