Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Device Tree file for the Kontron SMARC-sAL28 board. |
| 4 | * |
Michael Walle | 6783380 | 2021-08-31 15:40:12 +0200 | [diff] [blame] | 5 | * Copyright (C) 2021 Michael Walle <michael@walle.cc> |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 6 | * |
| 7 | */ |
| 8 | |
| 9 | /dts-v1/; |
| 10 | #include "fsl-ls1028a.dtsi" |
Michael Walle | c86e420 | 2020-09-14 23:43:37 +0200 | [diff] [blame] | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
Michael Walle | 945710b | 2020-09-14 23:43:38 +0200 | [diff] [blame] | 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <dt-bindings/input/input.h> |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 14 | |
| 15 | / { |
| 16 | model = "Kontron SMARC-sAL28"; |
| 17 | compatible = "kontron,sl28", "fsl,ls1028a"; |
| 18 | |
| 19 | aliases { |
| 20 | crypto = &crypto; |
| 21 | serial0 = &duart0; |
| 22 | serial1 = &duart1; |
Michael Walle | a0a4442 | 2020-05-05 17:00:37 +0200 | [diff] [blame] | 23 | serial2 = &lpuart1; |
Michael Walle | 1bc72a4 | 2020-03-11 08:49:26 +0100 | [diff] [blame] | 24 | spi0 = &fspi; |
| 25 | spi1 = &dspi2; |
Vladimir Oltean | 2e6cde9 | 2020-11-19 18:38:21 +0200 | [diff] [blame] | 26 | mmc0 = &esdhc1; |
| 27 | mmc1 = &esdhc; |
Michael Walle | 51c8eaa | 2021-03-23 16:07:57 +0100 | [diff] [blame] | 28 | rtc0 = &rtc; |
Michael Walle | c75dc98 | 2021-03-23 16:07:56 +0100 | [diff] [blame] | 29 | rtc1 = &ftm_alarm0; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 30 | }; |
| 31 | |
Michael Walle | 945710b | 2020-09-14 23:43:38 +0200 | [diff] [blame] | 32 | buttons0 { |
| 33 | compatible = "gpio-keys"; |
| 34 | |
| 35 | power-button { |
| 36 | interrupts-extended = <&sl28cpld_intc |
| 37 | 4 IRQ_TYPE_EDGE_BOTH>; |
| 38 | linux,code = <KEY_POWER>; |
| 39 | label = "Power"; |
| 40 | }; |
| 41 | |
| 42 | sleep-button { |
| 43 | interrupts-extended = <&sl28cpld_intc |
| 44 | 5 IRQ_TYPE_EDGE_BOTH>; |
| 45 | linux,code = <KEY_SLEEP>; |
| 46 | label = "Sleep"; |
| 47 | }; |
| 48 | }; |
| 49 | |
| 50 | buttons1 { |
| 51 | compatible = "gpio-keys-polled"; |
| 52 | poll-interval = <200>; |
| 53 | |
| 54 | lid-switch { |
| 55 | linux,input-type = <EV_SW>; |
| 56 | linux,code = <SW_LID>; |
| 57 | gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>; |
| 58 | label = "Lid"; |
| 59 | }; |
| 60 | }; |
| 61 | |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 62 | chosen { |
| 63 | stdout-path = "serial0:115200n8"; |
| 64 | }; |
| 65 | }; |
| 66 | |
Michael Walle | 7e2ac9d | 2020-10-01 11:11:31 +0200 | [diff] [blame] | 67 | &can0 { |
| 68 | status = "okay"; |
| 69 | }; |
| 70 | |
Michael Walle | 1bc72a4 | 2020-03-11 08:49:26 +0100 | [diff] [blame] | 71 | &dspi2 { |
| 72 | status = "okay"; |
| 73 | }; |
| 74 | |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 75 | &duart0 { |
| 76 | status = "okay"; |
| 77 | }; |
| 78 | |
| 79 | &duart1 { |
| 80 | status = "okay"; |
| 81 | }; |
| 82 | |
Michael Walle | 6783380 | 2021-08-31 15:40:12 +0200 | [diff] [blame] | 83 | &enetc_mdio_pf3 { |
| 84 | phy0: ethernet-phy@5 { |
| 85 | reg = <0x5>; |
| 86 | eee-broken-1000t; |
| 87 | eee-broken-100tx; |
| 88 | }; |
| 89 | }; |
| 90 | |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 91 | &enetc_port0 { |
| 92 | phy-handle = <&phy0>; |
Michael Walle | caa355c | 2021-08-31 15:40:13 +0200 | [diff] [blame] | 93 | phy-mode = "sgmii"; |
Michael Walle | df392ae | 2020-11-09 12:04:36 +0100 | [diff] [blame] | 94 | managed = "in-band-status"; |
Michael Walle | e46b08b | 2020-02-24 12:50:52 +0100 | [diff] [blame] | 95 | status = "okay"; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 96 | }; |
| 97 | |
| 98 | &esdhc { |
| 99 | sd-uhs-sdr104; |
| 100 | sd-uhs-sdr50; |
| 101 | sd-uhs-sdr25; |
| 102 | sd-uhs-sdr12; |
| 103 | status = "okay"; |
| 104 | }; |
| 105 | |
| 106 | &esdhc1 { |
| 107 | mmc-hs200-1_8v; |
| 108 | mmc-hs400-1_8v; |
| 109 | bus-width = <8>; |
| 110 | status = "okay"; |
| 111 | }; |
| 112 | |
| 113 | &fspi { |
| 114 | status = "okay"; |
| 115 | |
| 116 | flash@0 { |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 117 | compatible = "jedec,spi-nor"; |
| 118 | m25p,fast-read; |
| 119 | spi-max-frequency = <133000000>; |
| 120 | reg = <0>; |
| 121 | /* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */ |
| 122 | spi-rx-bus-width = <2>; /* 2 SPI Rx lines */ |
| 123 | spi-tx-bus-width = <1>; /* 1 SPI Tx line */ |
| 124 | |
Michael Walle | aa49433 | 2021-03-18 18:18:55 +0100 | [diff] [blame] | 125 | partitions { |
| 126 | compatible = "fixed-partitions"; |
| 127 | #address-cells = <1>; |
| 128 | #size-cells = <1>; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 129 | |
Michael Walle | aa49433 | 2021-03-18 18:18:55 +0100 | [diff] [blame] | 130 | partition@0 { |
| 131 | reg = <0x000000 0x010000>; |
| 132 | label = "rcw"; |
| 133 | read-only; |
| 134 | }; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 135 | |
Michael Walle | aa49433 | 2021-03-18 18:18:55 +0100 | [diff] [blame] | 136 | partition@10000 { |
Michael Walle | b353553 | 2021-03-18 18:18:56 +0100 | [diff] [blame] | 137 | reg = <0x010000 0x1d0000>; |
Michael Walle | aa49433 | 2021-03-18 18:18:55 +0100 | [diff] [blame] | 138 | label = "failsafe bootloader"; |
| 139 | read-only; |
| 140 | }; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 141 | |
Michael Walle | aa49433 | 2021-03-18 18:18:55 +0100 | [diff] [blame] | 142 | partition@200000 { |
| 143 | reg = <0x200000 0x010000>; |
| 144 | label = "configuration store"; |
| 145 | }; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 146 | |
Michael Walle | aa49433 | 2021-03-18 18:18:55 +0100 | [diff] [blame] | 147 | partition@210000 { |
| 148 | reg = <0x210000 0x1d0000>; |
| 149 | label = "bootloader"; |
| 150 | }; |
| 151 | |
| 152 | partition@3e0000 { |
| 153 | reg = <0x3e0000 0x020000>; |
| 154 | label = "bootloader environment"; |
| 155 | }; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 156 | }; |
| 157 | }; |
| 158 | }; |
| 159 | |
Michael Walle | ff3cfc3 | 2022-01-15 22:04:32 +0100 | [diff] [blame] | 160 | &ftm_alarm0 { |
| 161 | status = "okay"; |
| 162 | }; |
| 163 | |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 164 | &gpio1 { |
| 165 | gpio-line-names = |
| 166 | "", "", "", "", "", "", "", "", |
| 167 | "", "", "", "", "", "", "", "", |
| 168 | "", "", "", "", "", "", "TDO", "TCK", |
| 169 | "", "", "", "", "", "", "", ""; |
| 170 | }; |
| 171 | |
| 172 | &gpio2 { |
| 173 | gpio-line-names = |
| 174 | "", "", "", "", "", "", "TMS", "TDI", |
| 175 | "", "", "", "", "", "", "", "", |
| 176 | "", "", "", "", "", "", "", "", |
| 177 | "", "", "", "", "", "", "", ""; |
| 178 | }; |
| 179 | |
| 180 | &i2c0 { |
| 181 | status = "okay"; |
| 182 | |
Michael Walle | 51c8eaa | 2021-03-23 16:07:57 +0100 | [diff] [blame] | 183 | rtc: rtc@32 { |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 184 | compatible = "microcrystal,rv8803"; |
| 185 | reg = <0x32>; |
| 186 | }; |
| 187 | |
Michael Walle | c86e420 | 2020-09-14 23:43:37 +0200 | [diff] [blame] | 188 | sl28cpld@4a { |
| 189 | compatible = "kontron,sl28cpld"; |
| 190 | reg = <0x4a>; |
| 191 | #address-cells = <1>; |
| 192 | #size-cells = <0>; |
| 193 | |
| 194 | watchdog@4 { |
| 195 | compatible = "kontron,sl28cpld-wdt"; |
| 196 | reg = <0x4>; |
| 197 | kontron,assert-wdt-timeout-pin; |
| 198 | }; |
| 199 | |
| 200 | hwmon@b { |
| 201 | compatible = "kontron,sl28cpld-fan"; |
| 202 | reg = <0xb>; |
| 203 | }; |
| 204 | |
| 205 | sl28cpld_pwm0: pwm@c { |
| 206 | compatible = "kontron,sl28cpld-pwm"; |
| 207 | reg = <0xc>; |
| 208 | #pwm-cells = <2>; |
| 209 | }; |
| 210 | |
| 211 | sl28cpld_pwm1: pwm@e { |
| 212 | compatible = "kontron,sl28cpld-pwm"; |
| 213 | reg = <0xe>; |
| 214 | #pwm-cells = <2>; |
| 215 | }; |
| 216 | |
| 217 | sl28cpld_gpio0: gpio@10 { |
| 218 | compatible = "kontron,sl28cpld-gpio"; |
| 219 | reg = <0x10>; |
| 220 | interrupts-extended = <&gpio2 6 |
| 221 | IRQ_TYPE_EDGE_FALLING>; |
| 222 | |
| 223 | gpio-controller; |
| 224 | #gpio-cells = <2>; |
| 225 | gpio-line-names = |
| 226 | "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N", |
| 227 | "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N", |
| 228 | "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT", |
| 229 | "GPIO6_TACHIN", "GPIO7"; |
| 230 | |
| 231 | interrupt-controller; |
| 232 | #interrupt-cells = <2>; |
| 233 | }; |
| 234 | |
| 235 | sl28cpld_gpio1: gpio@15 { |
| 236 | compatible = "kontron,sl28cpld-gpio"; |
| 237 | reg = <0x15>; |
| 238 | interrupts-extended = <&gpio2 6 |
| 239 | IRQ_TYPE_EDGE_FALLING>; |
| 240 | |
| 241 | gpio-controller; |
| 242 | #gpio-cells = <2>; |
| 243 | gpio-line-names = |
| 244 | "GPIO8", "GPIO9", "GPIO10", "GPIO11", |
| 245 | "", "", "", ""; |
| 246 | |
| 247 | interrupt-controller; |
| 248 | #interrupt-cells = <2>; |
| 249 | }; |
| 250 | |
| 251 | sl28cpld_gpio2: gpio@1a { |
| 252 | compatible = "kontron,sl28cpld-gpo"; |
| 253 | reg = <0x1a>; |
| 254 | |
| 255 | gpio-controller; |
| 256 | #gpio-cells = <2>; |
| 257 | gpio-line-names = |
| 258 | "LCD0 voltage enable", |
| 259 | "LCD0 backlight enable", |
| 260 | "eMMC reset", "LVDS bridge reset", |
| 261 | "LVDS bridge power-down", |
| 262 | "SDIO power enable", |
| 263 | "", ""; |
| 264 | }; |
| 265 | |
| 266 | sl28cpld_gpio3: gpio@1b { |
| 267 | compatible = "kontron,sl28cpld-gpi"; |
| 268 | reg = <0x1b>; |
| 269 | |
| 270 | gpio-controller; |
| 271 | #gpio-cells = <2>; |
| 272 | gpio-line-names = |
| 273 | "Power button", "Force recovery", "Sleep", |
| 274 | "Battery low", "Lid state", "Charging", |
| 275 | "Charger present", ""; |
| 276 | }; |
| 277 | |
| 278 | sl28cpld_intc: interrupt-controller@1c { |
| 279 | compatible = "kontron,sl28cpld-intc"; |
| 280 | reg = <0x1c>; |
| 281 | interrupts-extended = <&gpio2 6 |
| 282 | IRQ_TYPE_EDGE_FALLING>; |
| 283 | |
| 284 | interrupt-controller; |
| 285 | #interrupt-cells = <2>; |
| 286 | }; |
| 287 | }; |
| 288 | |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 289 | eeprom@50 { |
| 290 | compatible = "atmel,24c32"; |
| 291 | reg = <0x50>; |
| 292 | pagesize = <32>; |
| 293 | }; |
| 294 | }; |
| 295 | |
| 296 | &i2c3 { |
| 297 | status = "okay"; |
| 298 | }; |
| 299 | |
| 300 | &i2c4 { |
| 301 | status = "okay"; |
Michael Walle | f05cd1c2 | 2020-03-11 08:49:27 +0100 | [diff] [blame] | 302 | |
| 303 | eeprom@50 { |
| 304 | compatible = "atmel,24c32"; |
| 305 | reg = <0x50>; |
| 306 | pagesize = <32>; |
| 307 | }; |
Michael Walle | 815364d | 2019-12-10 00:43:50 +0100 | [diff] [blame] | 308 | }; |
Michael Walle | a0a4442 | 2020-05-05 17:00:37 +0200 | [diff] [blame] | 309 | |
| 310 | &lpuart1 { |
| 311 | status = "okay"; |
| 312 | }; |
Michael Walle | 70293be | 2021-08-31 15:40:11 +0200 | [diff] [blame] | 313 | |
| 314 | &usb0 { |
| 315 | status = "okay"; |
| 316 | }; |
| 317 | |
| 318 | &usb1 { |
| 319 | status = "okay"; |
| 320 | }; |