Thomas Gleixner | 52a65ff | 2018-03-14 22:15:19 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 2 | /* |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 3 | * Copyright (C) 2014 Intel Corp. |
| 4 | * Author: Jiang Liu <jiang.liu@linux.intel.com> |
| 5 | * |
| 6 | * This file is licensed under GPLv2. |
| 7 | * |
Ingo Molnar | a359f75 | 2021-03-22 04:21:30 +0100 | [diff] [blame] | 8 | * This file contains common code to support Message Signaled Interrupts for |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 9 | * PCI compatible and non PCI compatible devices. |
| 10 | */ |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 11 | #include <linux/types.h> |
| 12 | #include <linux/device.h> |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 13 | #include <linux/irq.h> |
| 14 | #include <linux/irqdomain.h> |
| 15 | #include <linux/msi.h> |
Marc Zyngier | 4e20156 | 2016-11-22 09:21:16 +0000 | [diff] [blame] | 16 | #include <linux/slab.h> |
Thomas Gleixner | 3ba1f05 | 2021-12-06 23:27:31 +0100 | [diff] [blame] | 17 | #include <linux/sysfs.h> |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 18 | #include <linux/pci.h> |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 19 | |
Thomas Gleixner | 07557cc | 2017-09-13 23:29:05 +0200 | [diff] [blame] | 20 | #include "internals.h" |
| 21 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 22 | static inline int msi_sysfs_create_group(struct device *dev); |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 23 | |
Thomas Gleixner | 28f4b04 | 2016-09-14 16:18:47 +0200 | [diff] [blame] | 24 | /** |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 25 | * msi_alloc_desc - Allocate an initialized msi_desc |
Thomas Gleixner | 28f4b04 | 2016-09-14 16:18:47 +0200 | [diff] [blame] | 26 | * @dev: Pointer to the device for which this is allocated |
| 27 | * @nvec: The number of vectors used in this entry |
| 28 | * @affinity: Optional pointer to an affinity mask array size of @nvec |
| 29 | * |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 30 | * If @affinity is not %NULL then an affinity array[@nvec] is allocated |
Dou Liyang | bec0403 | 2018-12-04 23:51:20 +0800 | [diff] [blame] | 31 | * and the affinity masks and flags from @affinity are copied. |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 32 | * |
| 33 | * Return: pointer to allocated &msi_desc on success or %NULL on failure |
Thomas Gleixner | 28f4b04 | 2016-09-14 16:18:47 +0200 | [diff] [blame] | 34 | */ |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 35 | static struct msi_desc *msi_alloc_desc(struct device *dev, int nvec, |
| 36 | const struct irq_affinity_desc *affinity) |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 37 | { |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 38 | struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL); |
Thomas Gleixner | 28f4b04 | 2016-09-14 16:18:47 +0200 | [diff] [blame] | 39 | |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 40 | if (!desc) |
| 41 | return NULL; |
| 42 | |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 43 | desc->dev = dev; |
Thomas Gleixner | 28f4b04 | 2016-09-14 16:18:47 +0200 | [diff] [blame] | 44 | desc->nvec_used = nvec; |
| 45 | if (affinity) { |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 46 | desc->affinity = kmemdup(affinity, nvec * sizeof(*desc->affinity), GFP_KERNEL); |
Thomas Gleixner | 28f4b04 | 2016-09-14 16:18:47 +0200 | [diff] [blame] | 47 | if (!desc->affinity) { |
| 48 | kfree(desc); |
| 49 | return NULL; |
| 50 | } |
| 51 | } |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 52 | return desc; |
| 53 | } |
| 54 | |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 55 | static void msi_free_desc(struct msi_desc *desc) |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 56 | { |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 57 | kfree(desc->affinity); |
| 58 | kfree(desc); |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 59 | } |
| 60 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 61 | static int msi_insert_desc(struct msi_device_data *md, struct msi_desc *desc, unsigned int index) |
| 62 | { |
| 63 | int ret; |
| 64 | |
| 65 | desc->msi_index = index; |
| 66 | ret = xa_insert(&md->__store, index, desc, GFP_KERNEL); |
| 67 | if (ret) |
| 68 | msi_free_desc(desc); |
| 69 | return ret; |
| 70 | } |
| 71 | |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 72 | /** |
| 73 | * msi_add_msi_desc - Allocate and initialize a MSI descriptor |
| 74 | * @dev: Pointer to the device for which the descriptor is allocated |
| 75 | * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor |
| 76 | * |
| 77 | * Return: 0 on success or an appropriate failure code. |
| 78 | */ |
| 79 | int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc) |
| 80 | { |
| 81 | struct msi_desc *desc; |
| 82 | |
| 83 | lockdep_assert_held(&dev->msi.data->mutex); |
| 84 | |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 85 | desc = msi_alloc_desc(dev, init_desc->nvec_used, init_desc->affinity); |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 86 | if (!desc) |
| 87 | return -ENOMEM; |
| 88 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 89 | /* Copy type specific data to the new descriptor. */ |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 90 | desc->pci = init_desc->pci; |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 91 | return msi_insert_desc(dev->msi.data, desc, init_desc->msi_index); |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 92 | } |
| 93 | |
| 94 | /** |
| 95 | * msi_add_simple_msi_descs - Allocate and initialize MSI descriptors |
| 96 | * @dev: Pointer to the device for which the descriptors are allocated |
| 97 | * @index: Index for the first MSI descriptor |
| 98 | * @ndesc: Number of descriptors to allocate |
| 99 | * |
| 100 | * Return: 0 on success or an appropriate failure code. |
| 101 | */ |
| 102 | static int msi_add_simple_msi_descs(struct device *dev, unsigned int index, unsigned int ndesc) |
| 103 | { |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 104 | unsigned int idx, last = index + ndesc - 1; |
| 105 | struct msi_desc *desc; |
| 106 | int ret; |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 107 | |
| 108 | lockdep_assert_held(&dev->msi.data->mutex); |
| 109 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 110 | for (idx = index; idx <= last; idx++) { |
Thomas Gleixner | cc9a246 | 2021-12-06 23:51:47 +0100 | [diff] [blame] | 111 | desc = msi_alloc_desc(dev, 1, NULL); |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 112 | if (!desc) |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 113 | goto fail_mem; |
| 114 | ret = msi_insert_desc(dev->msi.data, desc, idx); |
| 115 | if (ret) |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 116 | goto fail; |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 117 | } |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 118 | return 0; |
| 119 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 120 | fail_mem: |
| 121 | ret = -ENOMEM; |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 122 | fail: |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 123 | msi_free_msi_descs_range(dev, MSI_DESC_NOTASSOCIATED, index, last); |
| 124 | return ret; |
| 125 | } |
| 126 | |
| 127 | static bool msi_desc_match(struct msi_desc *desc, enum msi_desc_filter filter) |
| 128 | { |
| 129 | switch (filter) { |
| 130 | case MSI_DESC_ALL: |
| 131 | return true; |
| 132 | case MSI_DESC_NOTASSOCIATED: |
| 133 | return !desc->irq; |
| 134 | case MSI_DESC_ASSOCIATED: |
| 135 | return !!desc->irq; |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 136 | } |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 137 | WARN_ON_ONCE(1); |
| 138 | return false; |
Thomas Gleixner | 60290525 | 2021-12-06 23:51:10 +0100 | [diff] [blame] | 139 | } |
| 140 | |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 141 | /** |
| 142 | * msi_free_msi_descs_range - Free MSI descriptors of a device |
| 143 | * @dev: Device to free the descriptors |
| 144 | * @filter: Descriptor state filter |
| 145 | * @first_index: Index to start freeing from |
| 146 | * @last_index: Last index to be freed |
| 147 | */ |
| 148 | void msi_free_msi_descs_range(struct device *dev, enum msi_desc_filter filter, |
| 149 | unsigned int first_index, unsigned int last_index) |
| 150 | { |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 151 | struct xarray *xa = &dev->msi.data->__store; |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 152 | struct msi_desc *desc; |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 153 | unsigned long idx; |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 154 | |
| 155 | lockdep_assert_held(&dev->msi.data->mutex); |
| 156 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 157 | xa_for_each_range(xa, idx, desc, first_index, last_index) { |
| 158 | if (msi_desc_match(desc, filter)) { |
| 159 | xa_erase(xa, idx); |
| 160 | msi_free_desc(desc); |
| 161 | } |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 162 | } |
| 163 | } |
| 164 | |
Jiang Liu | 38b6a1c | 2014-11-12 12:11:25 +0100 | [diff] [blame] | 165 | void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
| 166 | { |
| 167 | *msg = entry->msg; |
| 168 | } |
| 169 | |
| 170 | void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) |
| 171 | { |
| 172 | struct msi_desc *entry = irq_get_msi_desc(irq); |
| 173 | |
| 174 | __get_cached_msi_msg(entry, msg); |
| 175 | } |
| 176 | EXPORT_SYMBOL_GPL(get_cached_msi_msg); |
| 177 | |
Thomas Gleixner | 013bd8e | 2021-12-10 23:18:55 +0100 | [diff] [blame] | 178 | static void msi_device_data_release(struct device *dev, void *res) |
| 179 | { |
Thomas Gleixner | 125282c | 2021-12-06 23:51:04 +0100 | [diff] [blame] | 180 | struct msi_device_data *md = res; |
| 181 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 182 | WARN_ON_ONCE(!xa_empty(&md->__store)); |
| 183 | xa_destroy(&md->__store); |
Thomas Gleixner | 013bd8e | 2021-12-10 23:18:55 +0100 | [diff] [blame] | 184 | dev->msi.data = NULL; |
| 185 | } |
| 186 | |
| 187 | /** |
| 188 | * msi_setup_device_data - Setup MSI device data |
| 189 | * @dev: Device for which MSI device data should be set up |
| 190 | * |
| 191 | * Return: 0 on success, appropriate error code otherwise |
| 192 | * |
| 193 | * This can be called more than once for @dev. If the MSI device data is |
| 194 | * already allocated the call succeeds. The allocated memory is |
| 195 | * automatically released when the device is destroyed. |
| 196 | */ |
| 197 | int msi_setup_device_data(struct device *dev) |
| 198 | { |
| 199 | struct msi_device_data *md; |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 200 | int ret; |
Thomas Gleixner | 013bd8e | 2021-12-10 23:18:55 +0100 | [diff] [blame] | 201 | |
| 202 | if (dev->msi.data) |
| 203 | return 0; |
| 204 | |
| 205 | md = devres_alloc(msi_device_data_release, sizeof(*md), GFP_KERNEL); |
| 206 | if (!md) |
| 207 | return -ENOMEM; |
| 208 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 209 | ret = msi_sysfs_create_group(dev); |
| 210 | if (ret) { |
| 211 | devres_free(md); |
| 212 | return ret; |
| 213 | } |
| 214 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 215 | xa_init(&md->__store); |
Thomas Gleixner | b5f687f | 2021-12-06 23:51:05 +0100 | [diff] [blame] | 216 | mutex_init(&md->mutex); |
Thomas Gleixner | 013bd8e | 2021-12-10 23:18:55 +0100 | [diff] [blame] | 217 | dev->msi.data = md; |
| 218 | devres_add(dev, md); |
| 219 | return 0; |
| 220 | } |
| 221 | |
Thomas Gleixner | cf15f43 | 2021-12-10 23:19:23 +0100 | [diff] [blame] | 222 | /** |
Thomas Gleixner | b5f687f | 2021-12-06 23:51:05 +0100 | [diff] [blame] | 223 | * msi_lock_descs - Lock the MSI descriptor storage of a device |
| 224 | * @dev: Device to operate on |
| 225 | */ |
| 226 | void msi_lock_descs(struct device *dev) |
| 227 | { |
| 228 | mutex_lock(&dev->msi.data->mutex); |
| 229 | } |
| 230 | EXPORT_SYMBOL_GPL(msi_lock_descs); |
| 231 | |
| 232 | /** |
| 233 | * msi_unlock_descs - Unlock the MSI descriptor storage of a device |
| 234 | * @dev: Device to operate on |
| 235 | */ |
| 236 | void msi_unlock_descs(struct device *dev) |
| 237 | { |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 238 | /* Invalidate the index wich was cached by the iterator */ |
| 239 | dev->msi.data->__iter_idx = MSI_MAX_INDEX; |
Thomas Gleixner | b5f687f | 2021-12-06 23:51:05 +0100 | [diff] [blame] | 240 | mutex_unlock(&dev->msi.data->mutex); |
| 241 | } |
| 242 | EXPORT_SYMBOL_GPL(msi_unlock_descs); |
| 243 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 244 | static struct msi_desc *msi_find_desc(struct msi_device_data *md, enum msi_desc_filter filter) |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 245 | { |
| 246 | struct msi_desc *desc; |
| 247 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 248 | xa_for_each_start(&md->__store, md->__iter_idx, desc, md->__iter_idx) { |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 249 | if (msi_desc_match(desc, filter)) |
| 250 | return desc; |
| 251 | } |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 252 | md->__iter_idx = MSI_MAX_INDEX; |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 253 | return NULL; |
| 254 | } |
| 255 | |
| 256 | /** |
| 257 | * msi_first_desc - Get the first MSI descriptor of a device |
| 258 | * @dev: Device to operate on |
| 259 | * @filter: Descriptor state filter |
| 260 | * |
| 261 | * Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs() |
| 262 | * must be invoked before the call. |
| 263 | * |
| 264 | * Return: Pointer to the first MSI descriptor matching the search |
| 265 | * criteria, NULL if none found. |
| 266 | */ |
| 267 | struct msi_desc *msi_first_desc(struct device *dev, enum msi_desc_filter filter) |
| 268 | { |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 269 | struct msi_device_data *md = dev->msi.data; |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 270 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 271 | if (WARN_ON_ONCE(!md)) |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 272 | return NULL; |
| 273 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 274 | lockdep_assert_held(&md->mutex); |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 275 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 276 | md->__iter_idx = 0; |
| 277 | return msi_find_desc(md, filter); |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 278 | } |
| 279 | EXPORT_SYMBOL_GPL(msi_first_desc); |
| 280 | |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 281 | /** |
| 282 | * msi_next_desc - Get the next MSI descriptor of a device |
| 283 | * @dev: Device to operate on |
| 284 | * |
| 285 | * The first invocation of msi_next_desc() has to be preceeded by a |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 286 | * successful invocation of __msi_first_desc(). Consecutive invocations are |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 287 | * only valid if the previous one was successful. All these operations have |
| 288 | * to be done within the same MSI mutex held region. |
| 289 | * |
| 290 | * Return: Pointer to the next MSI descriptor matching the search |
| 291 | * criteria, NULL if none found. |
| 292 | */ |
| 293 | struct msi_desc *msi_next_desc(struct device *dev, enum msi_desc_filter filter) |
| 294 | { |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 295 | struct msi_device_data *md = dev->msi.data; |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 296 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 297 | if (WARN_ON_ONCE(!md)) |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 298 | return NULL; |
| 299 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 300 | lockdep_assert_held(&md->mutex); |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 301 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 302 | if (md->__iter_idx >= (unsigned long)MSI_MAX_INDEX) |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 303 | return NULL; |
| 304 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 305 | md->__iter_idx++; |
| 306 | return msi_find_desc(md, filter); |
Thomas Gleixner | 1046f71 | 2021-12-06 23:51:08 +0100 | [diff] [blame] | 307 | } |
| 308 | EXPORT_SYMBOL_GPL(msi_next_desc); |
| 309 | |
Thomas Gleixner | b5f687f | 2021-12-06 23:51:05 +0100 | [diff] [blame] | 310 | /** |
Thomas Gleixner | cf15f43 | 2021-12-10 23:19:23 +0100 | [diff] [blame] | 311 | * msi_get_virq - Return Linux interrupt number of a MSI interrupt |
| 312 | * @dev: Device to operate on |
| 313 | * @index: MSI interrupt index to look for (0-based) |
| 314 | * |
| 315 | * Return: The Linux interrupt number on success (> 0), 0 if not found |
| 316 | */ |
| 317 | unsigned int msi_get_virq(struct device *dev, unsigned int index) |
| 318 | { |
| 319 | struct msi_desc *desc; |
Thomas Gleixner | 495c66a | 2021-12-06 23:51:45 +0100 | [diff] [blame] | 320 | unsigned int ret = 0; |
Thomas Gleixner | cf15f43 | 2021-12-10 23:19:23 +0100 | [diff] [blame] | 321 | bool pcimsi; |
| 322 | |
| 323 | if (!dev->msi.data) |
| 324 | return 0; |
| 325 | |
| 326 | pcimsi = dev_is_pci(dev) ? to_pci_dev(dev)->msi_enabled : false; |
| 327 | |
Thomas Gleixner | 495c66a | 2021-12-06 23:51:45 +0100 | [diff] [blame] | 328 | msi_lock_descs(dev); |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 329 | desc = xa_load(&dev->msi.data->__store, pcimsi ? 0 : index); |
| 330 | if (desc && desc->irq) { |
Thomas Gleixner | cf15f43 | 2021-12-10 23:19:23 +0100 | [diff] [blame] | 331 | /* |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 332 | * PCI-MSI has only one descriptor for multiple interrupts. |
Thomas Gleixner | cf15f43 | 2021-12-10 23:19:23 +0100 | [diff] [blame] | 333 | * PCI-MSIX and platform MSI use a descriptor per |
| 334 | * interrupt. |
| 335 | */ |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 336 | if (pcimsi) { |
| 337 | if (index < desc->nvec_used) |
| 338 | ret = desc->irq + index; |
| 339 | } else { |
Thomas Gleixner | 495c66a | 2021-12-06 23:51:45 +0100 | [diff] [blame] | 340 | ret = desc->irq; |
Thomas Gleixner | 495c66a | 2021-12-06 23:51:45 +0100 | [diff] [blame] | 341 | } |
Thomas Gleixner | cf15f43 | 2021-12-10 23:19:23 +0100 | [diff] [blame] | 342 | } |
Thomas Gleixner | 495c66a | 2021-12-06 23:51:45 +0100 | [diff] [blame] | 343 | msi_unlock_descs(dev); |
| 344 | return ret; |
Thomas Gleixner | cf15f43 | 2021-12-10 23:19:23 +0100 | [diff] [blame] | 345 | } |
| 346 | EXPORT_SYMBOL_GPL(msi_get_virq); |
| 347 | |
Thomas Gleixner | 1197528 | 2021-12-06 23:27:28 +0100 | [diff] [blame] | 348 | #ifdef CONFIG_SYSFS |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 349 | static struct attribute *msi_dev_attrs[] = { |
| 350 | NULL |
| 351 | }; |
| 352 | |
| 353 | static const struct attribute_group msi_irqs_group = { |
| 354 | .name = "msi_irqs", |
| 355 | .attrs = msi_dev_attrs, |
| 356 | }; |
| 357 | |
| 358 | static inline int msi_sysfs_create_group(struct device *dev) |
| 359 | { |
| 360 | return devm_device_add_group(dev, &msi_irqs_group); |
| 361 | } |
| 362 | |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 363 | static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr, |
| 364 | char *buf) |
| 365 | { |
Thomas Gleixner | 6ef7f77 | 2021-12-10 23:18:49 +0100 | [diff] [blame] | 366 | /* MSI vs. MSIX is per device not per interrupt */ |
| 367 | bool is_msix = dev_is_pci(dev) ? to_pci_dev(dev)->msix_enabled : false; |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 368 | |
| 369 | return sysfs_emit(buf, "%s\n", is_msix ? "msix" : "msi"); |
| 370 | } |
| 371 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 372 | static void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 373 | { |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 374 | struct device_attribute *attrs = desc->sysfs_attrs; |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 375 | int i; |
| 376 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 377 | if (!attrs) |
| 378 | return; |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 379 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 380 | desc->sysfs_attrs = NULL; |
| 381 | for (i = 0; i < desc->nvec_used; i++) { |
| 382 | if (attrs[i].show) |
| 383 | sysfs_remove_file_from_group(&dev->kobj, &attrs[i].attr, msi_irqs_group.name); |
| 384 | kfree(attrs[i].attr.name); |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 385 | } |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 386 | kfree(attrs); |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 387 | } |
| 388 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 389 | static int msi_sysfs_populate_desc(struct device *dev, struct msi_desc *desc) |
| 390 | { |
| 391 | struct device_attribute *attrs; |
| 392 | int ret, i; |
| 393 | |
| 394 | attrs = kcalloc(desc->nvec_used, sizeof(*attrs), GFP_KERNEL); |
| 395 | if (!attrs) |
| 396 | return -ENOMEM; |
| 397 | |
| 398 | desc->sysfs_attrs = attrs; |
| 399 | for (i = 0; i < desc->nvec_used; i++) { |
| 400 | sysfs_attr_init(&attrs[i].attr); |
| 401 | attrs[i].attr.name = kasprintf(GFP_KERNEL, "%d", desc->irq + i); |
| 402 | if (!attrs[i].attr.name) { |
| 403 | ret = -ENOMEM; |
| 404 | goto fail; |
| 405 | } |
| 406 | |
| 407 | attrs[i].attr.mode = 0444; |
| 408 | attrs[i].show = msi_mode_show; |
| 409 | |
| 410 | ret = sysfs_add_file_to_group(&dev->kobj, &attrs[i].attr, msi_irqs_group.name); |
| 411 | if (ret) { |
| 412 | attrs[i].show = NULL; |
| 413 | goto fail; |
| 414 | } |
| 415 | } |
| 416 | return 0; |
| 417 | |
| 418 | fail: |
| 419 | msi_sysfs_remove_desc(dev, desc); |
| 420 | return ret; |
| 421 | } |
| 422 | |
| 423 | #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 424 | /** |
Thomas Gleixner | bf6e054 | 2021-12-10 23:19:03 +0100 | [diff] [blame] | 425 | * msi_device_populate_sysfs - Populate msi_irqs sysfs entries for a device |
| 426 | * @dev: The device (PCI, platform etc) which will get sysfs entries |
| 427 | */ |
| 428 | int msi_device_populate_sysfs(struct device *dev) |
| 429 | { |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 430 | struct msi_desc *desc; |
| 431 | int ret; |
Thomas Gleixner | bf6e054 | 2021-12-10 23:19:03 +0100 | [diff] [blame] | 432 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 433 | msi_for_each_desc(desc, dev, MSI_DESC_ASSOCIATED) { |
| 434 | if (desc->sysfs_attrs) |
| 435 | continue; |
| 436 | ret = msi_sysfs_populate_desc(dev, desc); |
| 437 | if (ret) |
| 438 | return ret; |
| 439 | } |
Thomas Gleixner | bf6e054 | 2021-12-10 23:19:03 +0100 | [diff] [blame] | 440 | return 0; |
| 441 | } |
| 442 | |
| 443 | /** |
Thomas Gleixner | bf6e054 | 2021-12-10 23:19:03 +0100 | [diff] [blame] | 444 | * msi_device_destroy_sysfs - Destroy msi_irqs sysfs entries for a device |
| 445 | * @dev: The device (PCI, platform etc) for which to remove |
| 446 | * sysfs entries |
| 447 | */ |
| 448 | void msi_device_destroy_sysfs(struct device *dev) |
| 449 | { |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 450 | struct msi_desc *desc; |
Thomas Gleixner | 24cff37 | 2021-12-10 23:19:08 +0100 | [diff] [blame] | 451 | |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 452 | msi_for_each_desc(desc, dev, MSI_DESC_ALL) |
| 453 | msi_sysfs_remove_desc(dev, desc); |
Thomas Gleixner | bf6e054 | 2021-12-10 23:19:03 +0100 | [diff] [blame] | 454 | } |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 455 | #endif /* CONFIG_PCI_MSI_ARCH_FALLBACK */ |
| 456 | #else /* CONFIG_SYSFS */ |
| 457 | static inline int msi_sysfs_create_group(struct device *dev) { return 0; } |
| 458 | static inline int msi_sysfs_populate_desc(struct device *dev, struct msi_desc *desc) { return 0; } |
| 459 | static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { } |
| 460 | #endif /* !CONFIG_SYSFS */ |
Barry Song | 2f17081 | 2021-08-13 15:56:27 +1200 | [diff] [blame] | 461 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 462 | #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN |
Thomas Gleixner | 74faaf7 | 2014-12-06 21:20:20 +0100 | [diff] [blame] | 463 | static inline void irq_chip_write_msi_msg(struct irq_data *data, |
| 464 | struct msi_msg *msg) |
| 465 | { |
| 466 | data->chip->irq_write_msi_msg(data, msg); |
| 467 | } |
| 468 | |
Marc Zyngier | 0be8153 | 2018-05-08 13:14:30 +0100 | [diff] [blame] | 469 | static void msi_check_level(struct irq_domain *domain, struct msi_msg *msg) |
| 470 | { |
| 471 | struct msi_domain_info *info = domain->host_data; |
| 472 | |
| 473 | /* |
| 474 | * If the MSI provider has messed with the second message and |
| 475 | * not advertized that it is level-capable, signal the breakage. |
| 476 | */ |
| 477 | WARN_ON(!((info->flags & MSI_FLAG_LEVEL_CAPABLE) && |
| 478 | (info->chip->flags & IRQCHIP_SUPPORTS_LEVEL_MSI)) && |
| 479 | (msg[1].address_lo || msg[1].address_hi || msg[1].data)); |
| 480 | } |
| 481 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 482 | /** |
| 483 | * msi_domain_set_affinity - Generic affinity setter function for MSI domains |
| 484 | * @irq_data: The irq data associated to the interrupt |
| 485 | * @mask: The affinity mask to set |
| 486 | * @force: Flag to enforce setting (disable online checks) |
| 487 | * |
| 488 | * Intended to be used by MSI interrupt controllers which are |
| 489 | * implemented with hierarchical domains. |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 490 | * |
| 491 | * Return: IRQ_SET_MASK_* result code |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 492 | */ |
| 493 | int msi_domain_set_affinity(struct irq_data *irq_data, |
| 494 | const struct cpumask *mask, bool force) |
| 495 | { |
| 496 | struct irq_data *parent = irq_data->parent_data; |
Marc Zyngier | 0be8153 | 2018-05-08 13:14:30 +0100 | [diff] [blame] | 497 | struct msi_msg msg[2] = { [1] = { }, }; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 498 | int ret; |
| 499 | |
| 500 | ret = parent->chip->irq_set_affinity(parent, mask, force); |
| 501 | if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) { |
Marc Zyngier | 0be8153 | 2018-05-08 13:14:30 +0100 | [diff] [blame] | 502 | BUG_ON(irq_chip_compose_msi_msg(irq_data, msg)); |
| 503 | msi_check_level(irq_data->domain, msg); |
| 504 | irq_chip_write_msi_msg(irq_data, msg); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 505 | } |
| 506 | |
| 507 | return ret; |
| 508 | } |
| 509 | |
Thomas Gleixner | 7249164 | 2017-09-13 23:29:10 +0200 | [diff] [blame] | 510 | static int msi_domain_activate(struct irq_domain *domain, |
| 511 | struct irq_data *irq_data, bool early) |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 512 | { |
Marc Zyngier | 0be8153 | 2018-05-08 13:14:30 +0100 | [diff] [blame] | 513 | struct msi_msg msg[2] = { [1] = { }, }; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 514 | |
Marc Zyngier | 0be8153 | 2018-05-08 13:14:30 +0100 | [diff] [blame] | 515 | BUG_ON(irq_chip_compose_msi_msg(irq_data, msg)); |
| 516 | msi_check_level(irq_data->domain, msg); |
| 517 | irq_chip_write_msi_msg(irq_data, msg); |
Thomas Gleixner | 7249164 | 2017-09-13 23:29:10 +0200 | [diff] [blame] | 518 | return 0; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 519 | } |
| 520 | |
| 521 | static void msi_domain_deactivate(struct irq_domain *domain, |
| 522 | struct irq_data *irq_data) |
| 523 | { |
Marc Zyngier | 0be8153 | 2018-05-08 13:14:30 +0100 | [diff] [blame] | 524 | struct msi_msg msg[2]; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 525 | |
Marc Zyngier | 0be8153 | 2018-05-08 13:14:30 +0100 | [diff] [blame] | 526 | memset(msg, 0, sizeof(msg)); |
| 527 | irq_chip_write_msi_msg(irq_data, msg); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 528 | } |
| 529 | |
| 530 | static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq, |
| 531 | unsigned int nr_irqs, void *arg) |
| 532 | { |
| 533 | struct msi_domain_info *info = domain->host_data; |
| 534 | struct msi_domain_ops *ops = info->ops; |
| 535 | irq_hw_number_t hwirq = ops->get_hwirq(info, arg); |
| 536 | int i, ret; |
| 537 | |
| 538 | if (irq_find_mapping(domain, hwirq) > 0) |
| 539 | return -EEXIST; |
| 540 | |
Liu Jiang | bf6f869 | 2016-01-12 13:18:06 -0700 | [diff] [blame] | 541 | if (domain->parent) { |
| 542 | ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); |
| 543 | if (ret < 0) |
| 544 | return ret; |
| 545 | } |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 546 | |
| 547 | for (i = 0; i < nr_irqs; i++) { |
| 548 | ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg); |
| 549 | if (ret < 0) { |
| 550 | if (ops->msi_free) { |
| 551 | for (i--; i > 0; i--) |
| 552 | ops->msi_free(domain, info, virq + i); |
| 553 | } |
| 554 | irq_domain_free_irqs_top(domain, virq, nr_irqs); |
| 555 | return ret; |
| 556 | } |
| 557 | } |
| 558 | |
| 559 | return 0; |
| 560 | } |
| 561 | |
| 562 | static void msi_domain_free(struct irq_domain *domain, unsigned int virq, |
| 563 | unsigned int nr_irqs) |
| 564 | { |
| 565 | struct msi_domain_info *info = domain->host_data; |
| 566 | int i; |
| 567 | |
| 568 | if (info->ops->msi_free) { |
| 569 | for (i = 0; i < nr_irqs; i++) |
| 570 | info->ops->msi_free(domain, info, virq + i); |
| 571 | } |
| 572 | irq_domain_free_irqs_top(domain, virq, nr_irqs); |
| 573 | } |
| 574 | |
Krzysztof Kozlowski | 0136402 | 2015-04-27 21:54:23 +0900 | [diff] [blame] | 575 | static const struct irq_domain_ops msi_domain_ops = { |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 576 | .alloc = msi_domain_alloc, |
| 577 | .free = msi_domain_free, |
| 578 | .activate = msi_domain_activate, |
| 579 | .deactivate = msi_domain_deactivate, |
| 580 | }; |
| 581 | |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 582 | static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info, |
| 583 | msi_alloc_info_t *arg) |
| 584 | { |
| 585 | return arg->hwirq; |
| 586 | } |
| 587 | |
| 588 | static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev, |
| 589 | int nvec, msi_alloc_info_t *arg) |
| 590 | { |
| 591 | memset(arg, 0, sizeof(*arg)); |
| 592 | return 0; |
| 593 | } |
| 594 | |
| 595 | static void msi_domain_ops_set_desc(msi_alloc_info_t *arg, |
| 596 | struct msi_desc *desc) |
| 597 | { |
| 598 | arg->desc = desc; |
| 599 | } |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 600 | |
| 601 | static int msi_domain_ops_init(struct irq_domain *domain, |
| 602 | struct msi_domain_info *info, |
| 603 | unsigned int virq, irq_hw_number_t hwirq, |
| 604 | msi_alloc_info_t *arg) |
| 605 | { |
| 606 | irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip, |
| 607 | info->chip_data); |
| 608 | if (info->handler && info->handler_name) { |
| 609 | __irq_set_handler(virq, info->handler, 0, info->handler_name); |
| 610 | if (info->handler_data) |
| 611 | irq_set_handler_data(virq, info->handler_data); |
| 612 | } |
| 613 | return 0; |
| 614 | } |
| 615 | |
| 616 | static int msi_domain_ops_check(struct irq_domain *domain, |
| 617 | struct msi_domain_info *info, |
| 618 | struct device *dev) |
| 619 | { |
| 620 | return 0; |
| 621 | } |
| 622 | |
| 623 | static struct msi_domain_ops msi_domain_ops_default = { |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 624 | .get_hwirq = msi_domain_ops_get_hwirq, |
| 625 | .msi_init = msi_domain_ops_init, |
| 626 | .msi_check = msi_domain_ops_check, |
| 627 | .msi_prepare = msi_domain_ops_prepare, |
| 628 | .set_desc = msi_domain_ops_set_desc, |
| 629 | .domain_alloc_irqs = __msi_domain_alloc_irqs, |
| 630 | .domain_free_irqs = __msi_domain_free_irqs, |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 631 | }; |
| 632 | |
| 633 | static void msi_domain_update_dom_ops(struct msi_domain_info *info) |
| 634 | { |
| 635 | struct msi_domain_ops *ops = info->ops; |
| 636 | |
| 637 | if (ops == NULL) { |
| 638 | info->ops = &msi_domain_ops_default; |
| 639 | return; |
| 640 | } |
| 641 | |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 642 | if (ops->domain_alloc_irqs == NULL) |
| 643 | ops->domain_alloc_irqs = msi_domain_ops_default.domain_alloc_irqs; |
| 644 | if (ops->domain_free_irqs == NULL) |
| 645 | ops->domain_free_irqs = msi_domain_ops_default.domain_free_irqs; |
| 646 | |
| 647 | if (!(info->flags & MSI_FLAG_USE_DEF_DOM_OPS)) |
| 648 | return; |
| 649 | |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 650 | if (ops->get_hwirq == NULL) |
| 651 | ops->get_hwirq = msi_domain_ops_default.get_hwirq; |
| 652 | if (ops->msi_init == NULL) |
| 653 | ops->msi_init = msi_domain_ops_default.msi_init; |
| 654 | if (ops->msi_check == NULL) |
| 655 | ops->msi_check = msi_domain_ops_default.msi_check; |
| 656 | if (ops->msi_prepare == NULL) |
| 657 | ops->msi_prepare = msi_domain_ops_default.msi_prepare; |
| 658 | if (ops->set_desc == NULL) |
| 659 | ops->set_desc = msi_domain_ops_default.set_desc; |
| 660 | } |
| 661 | |
| 662 | static void msi_domain_update_chip_ops(struct msi_domain_info *info) |
| 663 | { |
| 664 | struct irq_chip *chip = info->chip; |
| 665 | |
Marc Zyngier | 0701c53 | 2015-10-13 19:14:45 +0100 | [diff] [blame] | 666 | BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask); |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 667 | if (!chip->irq_set_affinity) |
| 668 | chip->irq_set_affinity = msi_domain_set_affinity; |
| 669 | } |
| 670 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 671 | /** |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 672 | * msi_create_irq_domain - Create an MSI interrupt domain |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 673 | * @fwnode: Optional fwnode of the interrupt controller |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 674 | * @info: MSI domain info |
| 675 | * @parent: Parent irq domain |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 676 | * |
| 677 | * Return: pointer to the created &struct irq_domain or %NULL on failure |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 678 | */ |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 679 | struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode, |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 680 | struct msi_domain_info *info, |
| 681 | struct irq_domain *parent) |
| 682 | { |
Marc Zyngier | a97b852 | 2017-05-12 12:55:37 +0100 | [diff] [blame] | 683 | struct irq_domain *domain; |
| 684 | |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 685 | msi_domain_update_dom_ops(info); |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 686 | if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) |
| 687 | msi_domain_update_chip_ops(info); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 688 | |
Marc Zyngier | a97b852 | 2017-05-12 12:55:37 +0100 | [diff] [blame] | 689 | domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0, |
| 690 | fwnode, &msi_domain_ops, info); |
Thomas Gleixner | 0165308 | 2017-06-20 01:37:04 +0200 | [diff] [blame] | 691 | |
| 692 | if (domain && !domain->name && info->chip) |
Marc Zyngier | a97b852 | 2017-05-12 12:55:37 +0100 | [diff] [blame] | 693 | domain->name = info->chip->name; |
| 694 | |
| 695 | return domain; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 696 | } |
| 697 | |
Marc Zyngier | b2eba39 | 2015-11-23 08:26:05 +0000 | [diff] [blame] | 698 | int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev, |
| 699 | int nvec, msi_alloc_info_t *arg) |
| 700 | { |
| 701 | struct msi_domain_info *info = domain->host_data; |
| 702 | struct msi_domain_ops *ops = info->ops; |
| 703 | int ret; |
| 704 | |
| 705 | ret = ops->msi_check(domain, info, dev); |
| 706 | if (ret == 0) |
| 707 | ret = ops->msi_prepare(domain, dev, nvec, arg); |
| 708 | |
| 709 | return ret; |
| 710 | } |
| 711 | |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 712 | int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev, |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 713 | int virq_base, int nvec, msi_alloc_info_t *arg) |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 714 | { |
| 715 | struct msi_domain_info *info = domain->host_data; |
| 716 | struct msi_domain_ops *ops = info->ops; |
| 717 | struct msi_desc *desc; |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 718 | int ret, virq; |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 719 | |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 720 | msi_lock_descs(dev); |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 721 | ret = msi_add_simple_msi_descs(dev, virq_base, nvec); |
| 722 | if (ret) |
| 723 | goto unlock; |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 724 | |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 725 | for (virq = virq_base; virq < virq_base + nvec; virq++) { |
| 726 | desc = xa_load(&dev->msi.data->__store, virq); |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 727 | desc->irq = virq; |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 728 | |
| 729 | ops->set_desc(arg, desc); |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 730 | ret = irq_domain_alloc_irqs_hierarchy(domain, virq, 1, arg); |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 731 | if (ret) |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 732 | goto fail; |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 733 | |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 734 | irq_set_msi_desc(virq, desc); |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 735 | } |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 736 | msi_unlock_descs(dev); |
| 737 | return 0; |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 738 | |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 739 | fail: |
| 740 | for (--virq; virq >= virq_base; virq--) |
| 741 | irq_domain_free_irqs_common(domain, virq, 1); |
| 742 | msi_free_msi_descs_range(dev, MSI_DESC_ALL, virq_base, virq_base + nvec - 1); |
Thomas Gleixner | cd6cf06 | 2021-12-06 23:51:52 +0100 | [diff] [blame] | 743 | unlock: |
Thomas Gleixner | a80713f | 2021-12-06 23:51:42 +0100 | [diff] [blame] | 744 | msi_unlock_descs(dev); |
Marc Zyngier | 2145ac9 | 2015-11-23 08:26:06 +0000 | [diff] [blame] | 745 | return ret; |
| 746 | } |
| 747 | |
Thomas Gleixner | bc97623 | 2017-12-29 10:47:22 +0100 | [diff] [blame] | 748 | /* |
| 749 | * Carefully check whether the device can use reservation mode. If |
| 750 | * reservation mode is enabled then the early activation will assign a |
| 751 | * dummy vector to the device. If the PCI/MSI device does not support |
| 752 | * masking of the entry then this can result in spurious interrupts when |
| 753 | * the device driver is not absolutely careful. But even then a malfunction |
| 754 | * of the hardware could result in a spurious interrupt on the dummy vector |
| 755 | * and render the device unusable. If the entry can be masked then the core |
| 756 | * logic will prevent the spurious interrupt and reservation mode can be |
| 757 | * used. For now reservation mode is restricted to PCI/MSI. |
| 758 | */ |
| 759 | static bool msi_check_reservation_mode(struct irq_domain *domain, |
| 760 | struct msi_domain_info *info, |
| 761 | struct device *dev) |
Thomas Gleixner | da5dd9e | 2017-12-29 10:42:10 +0100 | [diff] [blame] | 762 | { |
Thomas Gleixner | bc97623 | 2017-12-29 10:47:22 +0100 | [diff] [blame] | 763 | struct msi_desc *desc; |
| 764 | |
Thomas Gleixner | c6c9e283 | 2020-08-26 13:16:51 +0200 | [diff] [blame] | 765 | switch(domain->bus_token) { |
| 766 | case DOMAIN_BUS_PCI_MSI: |
| 767 | case DOMAIN_BUS_VMD_MSI: |
| 768 | break; |
| 769 | default: |
Thomas Gleixner | bc97623 | 2017-12-29 10:47:22 +0100 | [diff] [blame] | 770 | return false; |
Thomas Gleixner | c6c9e283 | 2020-08-26 13:16:51 +0200 | [diff] [blame] | 771 | } |
Thomas Gleixner | bc97623 | 2017-12-29 10:47:22 +0100 | [diff] [blame] | 772 | |
Thomas Gleixner | da5dd9e | 2017-12-29 10:42:10 +0100 | [diff] [blame] | 773 | if (!(info->flags & MSI_FLAG_MUST_REACTIVATE)) |
| 774 | return false; |
Thomas Gleixner | bc97623 | 2017-12-29 10:47:22 +0100 | [diff] [blame] | 775 | |
| 776 | if (IS_ENABLED(CONFIG_PCI_MSI) && pci_msi_ignore_mask) |
| 777 | return false; |
| 778 | |
| 779 | /* |
| 780 | * Checking the first MSI descriptor is sufficient. MSIX supports |
Thomas Gleixner | 9c8e9c9 | 2021-11-04 00:27:29 +0100 | [diff] [blame] | 781 | * masking and MSI does so when the can_mask attribute is set. |
Thomas Gleixner | bc97623 | 2017-12-29 10:47:22 +0100 | [diff] [blame] | 782 | */ |
Thomas Gleixner | 495c66a | 2021-12-06 23:51:45 +0100 | [diff] [blame] | 783 | desc = msi_first_desc(dev, MSI_DESC_ALL); |
Thomas Gleixner | e58f225 | 2021-12-06 23:27:39 +0100 | [diff] [blame] | 784 | return desc->pci.msi_attrib.is_msix || desc->pci.msi_attrib.can_mask; |
Thomas Gleixner | da5dd9e | 2017-12-29 10:42:10 +0100 | [diff] [blame] | 785 | } |
| 786 | |
Thomas Gleixner | 89033762 | 2021-12-06 23:27:59 +0100 | [diff] [blame] | 787 | static int msi_handle_pci_fail(struct irq_domain *domain, struct msi_desc *desc, |
| 788 | int allocated) |
| 789 | { |
| 790 | switch(domain->bus_token) { |
| 791 | case DOMAIN_BUS_PCI_MSI: |
| 792 | case DOMAIN_BUS_VMD_MSI: |
| 793 | if (IS_ENABLED(CONFIG_PCI_MSI)) |
| 794 | break; |
| 795 | fallthrough; |
| 796 | default: |
| 797 | return -ENOSPC; |
| 798 | } |
| 799 | |
| 800 | /* Let a failed PCI multi MSI allocation retry */ |
| 801 | if (desc->nvec_used > 1) |
| 802 | return 1; |
| 803 | |
| 804 | /* If there was a successful allocation let the caller know */ |
| 805 | return allocated ? allocated : -ENOSPC; |
| 806 | } |
| 807 | |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 808 | #define VIRQ_CAN_RESERVE 0x01 |
| 809 | #define VIRQ_ACTIVATE 0x02 |
| 810 | #define VIRQ_NOMASK_QUIRK 0x04 |
| 811 | |
| 812 | static int msi_init_virq(struct irq_domain *domain, int virq, unsigned int vflags) |
| 813 | { |
| 814 | struct irq_data *irqd = irq_domain_get_irq_data(domain, virq); |
| 815 | int ret; |
| 816 | |
| 817 | if (!(vflags & VIRQ_CAN_RESERVE)) { |
| 818 | irqd_clr_can_reserve(irqd); |
| 819 | if (vflags & VIRQ_NOMASK_QUIRK) |
| 820 | irqd_set_msi_nomask_quirk(irqd); |
| 821 | } |
| 822 | |
| 823 | if (!(vflags & VIRQ_ACTIVATE)) |
| 824 | return 0; |
| 825 | |
| 826 | ret = irq_domain_activate_irq(irqd, vflags & VIRQ_CAN_RESERVE); |
| 827 | if (ret) |
| 828 | return ret; |
| 829 | /* |
| 830 | * If the interrupt uses reservation mode, clear the activated bit |
| 831 | * so request_irq() will assign the final vector. |
| 832 | */ |
| 833 | if (vflags & VIRQ_CAN_RESERVE) |
| 834 | irqd_clr_activated(irqd); |
| 835 | return 0; |
| 836 | } |
| 837 | |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 838 | int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, |
| 839 | int nvec) |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 840 | { |
| 841 | struct msi_domain_info *info = domain->host_data; |
| 842 | struct msi_domain_ops *ops = info->ops; |
Zenghui Yu | 06fde69 | 2020-12-18 14:00:39 +0800 | [diff] [blame] | 843 | msi_alloc_info_t arg = { }; |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 844 | unsigned int vflags = 0; |
| 845 | struct msi_desc *desc; |
Thomas Gleixner | 89033762 | 2021-12-06 23:27:59 +0100 | [diff] [blame] | 846 | int allocated = 0; |
Thomas Gleixner | b614091 | 2016-07-04 17:39:22 +0900 | [diff] [blame] | 847 | int i, ret, virq; |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 848 | |
Marc Zyngier | b2eba39 | 2015-11-23 08:26:05 +0000 | [diff] [blame] | 849 | ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg); |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 850 | if (ret) |
| 851 | return ret; |
| 852 | |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 853 | /* |
| 854 | * This flag is set by the PCI layer as we need to activate |
| 855 | * the MSI entries before the PCI layer enables MSI in the |
| 856 | * card. Otherwise the card latches a random msi message. |
| 857 | */ |
| 858 | if (info->flags & MSI_FLAG_ACTIVATE_EARLY) |
| 859 | vflags |= VIRQ_ACTIVATE; |
| 860 | |
| 861 | /* |
| 862 | * Interrupt can use a reserved vector and will not occupy |
| 863 | * a real device vector until the interrupt is requested. |
| 864 | */ |
| 865 | if (msi_check_reservation_mode(domain, info, dev)) { |
| 866 | vflags |= VIRQ_CAN_RESERVE; |
| 867 | /* |
| 868 | * MSI affinity setting requires a special quirk (X86) when |
| 869 | * reservation mode is active. |
| 870 | */ |
| 871 | if (domain->flags & IRQ_DOMAIN_MSI_NOMASK_QUIRK) |
| 872 | vflags |= VIRQ_NOMASK_QUIRK; |
| 873 | } |
| 874 | |
| 875 | msi_for_each_desc(desc, dev, MSI_DESC_NOTASSOCIATED) { |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 876 | ops->set_desc(&arg, desc); |
| 877 | |
Thomas Gleixner | b614091 | 2016-07-04 17:39:22 +0900 | [diff] [blame] | 878 | virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used, |
Thomas Gleixner | 06ee6d5 | 2016-07-04 17:39:24 +0900 | [diff] [blame] | 879 | dev_to_node(dev), &arg, false, |
Thomas Gleixner | 0972fa5 | 2016-07-04 17:39:26 +0900 | [diff] [blame] | 880 | desc->affinity); |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 881 | if (virq < 0) |
| 882 | return msi_handle_pci_fail(domain, desc, allocated); |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 883 | |
Thomas Gleixner | 07557cc | 2017-09-13 23:29:05 +0200 | [diff] [blame] | 884 | for (i = 0; i < desc->nvec_used; i++) { |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 885 | irq_set_msi_desc_off(virq, i, desc); |
Thomas Gleixner | 07557cc | 2017-09-13 23:29:05 +0200 | [diff] [blame] | 886 | irq_debugfs_copy_devname(virq + i, dev); |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 887 | ret = msi_init_virq(domain, virq + i, vflags); |
| 888 | if (ret) |
| 889 | return ret; |
Thomas Gleixner | 74a5257 | 2022-01-10 19:12:45 +0100 | [diff] [blame] | 890 | } |
| 891 | if (info->flags & MSI_FLAG_DEV_SYSFS) { |
| 892 | ret = msi_sysfs_populate_desc(dev, desc); |
| 893 | if (ret) |
| 894 | return ret; |
Thomas Gleixner | 07557cc | 2017-09-13 23:29:05 +0200 | [diff] [blame] | 895 | } |
Thomas Gleixner | 89033762 | 2021-12-06 23:27:59 +0100 | [diff] [blame] | 896 | allocated++; |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 897 | } |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 898 | return 0; |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 899 | } |
| 900 | |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 901 | static int msi_domain_add_simple_msi_descs(struct msi_domain_info *info, |
| 902 | struct device *dev, |
| 903 | unsigned int num_descs) |
| 904 | { |
| 905 | if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS)) |
| 906 | return 0; |
| 907 | |
| 908 | return msi_add_simple_msi_descs(dev, 0, num_descs); |
| 909 | } |
| 910 | |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 911 | /** |
| 912 | * msi_domain_alloc_irqs_descs_locked - Allocate interrupts from a MSI interrupt domain |
| 913 | * @domain: The domain to allocate from |
| 914 | * @dev: Pointer to device struct of the device for which the interrupts |
| 915 | * are allocated |
| 916 | * @nvec: The number of interrupts to allocate |
| 917 | * |
| 918 | * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() |
| 919 | * pair. Use this for MSI irqdomains which implement their own vector |
| 920 | * allocation/free. |
| 921 | * |
| 922 | * Return: %0 on success or an error code. |
| 923 | */ |
| 924 | int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, |
| 925 | int nvec) |
| 926 | { |
| 927 | struct msi_domain_info *info = domain->host_data; |
| 928 | struct msi_domain_ops *ops = info->ops; |
| 929 | int ret; |
| 930 | |
| 931 | lockdep_assert_held(&dev->msi.data->mutex); |
| 932 | |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 933 | ret = msi_domain_add_simple_msi_descs(info, dev, nvec); |
| 934 | if (ret) |
| 935 | return ret; |
| 936 | |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 937 | ret = ops->domain_alloc_irqs(domain, dev, nvec); |
| 938 | if (ret) |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 939 | msi_domain_free_irqs_descs_locked(domain, dev); |
Thomas Gleixner | bb9b428 | 2017-09-13 23:29:11 +0200 | [diff] [blame] | 940 | return ret; |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 941 | } |
| 942 | |
| 943 | /** |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 944 | * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain |
| 945 | * @domain: The domain to allocate from |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 946 | * @dev: Pointer to device struct of the device for which the interrupts |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 947 | * are allocated |
| 948 | * @nvec: The number of interrupts to allocate |
| 949 | * |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 950 | * Return: %0 on success or an error code. |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 951 | */ |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 952 | int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec) |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 953 | { |
Thomas Gleixner | bf6e054 | 2021-12-10 23:19:03 +0100 | [diff] [blame] | 954 | int ret; |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 955 | |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 956 | msi_lock_descs(dev); |
| 957 | ret = msi_domain_alloc_irqs_descs_locked(domain, dev, nvec); |
| 958 | msi_unlock_descs(dev); |
Thomas Gleixner | bf6e054 | 2021-12-10 23:19:03 +0100 | [diff] [blame] | 959 | return ret; |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 960 | } |
| 961 | |
| 962 | void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 963 | { |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 964 | struct msi_domain_info *info = domain->host_data; |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 965 | struct irq_data *irqd; |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 966 | struct msi_desc *desc; |
Bixuan Cui | dbbc935 | 2021-05-18 11:31:17 +0800 | [diff] [blame] | 967 | int i; |
| 968 | |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 969 | /* Only handle MSI entries which have an interrupt associated */ |
| 970 | msi_for_each_desc(desc, dev, MSI_DESC_ASSOCIATED) { |
| 971 | /* Make sure all interrupts are deactivated */ |
| 972 | for (i = 0; i < desc->nvec_used; i++) { |
| 973 | irqd = irq_domain_get_irq_data(domain, desc->irq + i); |
| 974 | if (irqd && irqd_is_activated(irqd)) |
| 975 | irq_domain_deactivate_irq(irqd); |
Marc Zyngier | fe0c52f | 2015-01-26 19:10:19 +0000 | [diff] [blame] | 976 | } |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 977 | |
| 978 | irq_domain_free_irqs(desc->irq, desc->nvec_used); |
Thomas Gleixner | bf5e758 | 2021-12-06 23:51:50 +0100 | [diff] [blame] | 979 | if (info->flags & MSI_FLAG_DEV_SYSFS) |
| 980 | msi_sysfs_remove_desc(dev, desc); |
Thomas Gleixner | ef8dd01 | 2021-12-06 23:51:44 +0100 | [diff] [blame] | 981 | desc->irq = 0; |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 982 | } |
| 983 | } |
| 984 | |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 985 | static void msi_domain_free_msi_descs(struct msi_domain_info *info, |
| 986 | struct device *dev) |
| 987 | { |
| 988 | if (info->flags & MSI_FLAG_FREE_MSI_DESCS) |
| 989 | msi_free_msi_descs(dev); |
| 990 | } |
| 991 | |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 992 | /** |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 993 | * msi_domain_free_irqs_descs_locked - Free interrupts from a MSI interrupt @domain associated to @dev |
| 994 | * @domain: The domain to managing the interrupts |
| 995 | * @dev: Pointer to device struct of the device for which the interrupts |
| 996 | * are free |
| 997 | * |
| 998 | * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() |
| 999 | * pair. Use this for MSI irqdomains which implement their own vector |
| 1000 | * allocation. |
| 1001 | */ |
| 1002 | void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev) |
| 1003 | { |
| 1004 | struct msi_domain_info *info = domain->host_data; |
| 1005 | struct msi_domain_ops *ops = info->ops; |
| 1006 | |
| 1007 | lockdep_assert_held(&dev->msi.data->mutex); |
| 1008 | |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 1009 | ops->domain_free_irqs(domain, dev); |
Thomas Gleixner | 645474e2 | 2021-12-06 23:51:12 +0100 | [diff] [blame] | 1010 | msi_domain_free_msi_descs(info, dev); |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 1011 | } |
| 1012 | |
| 1013 | /** |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 1014 | * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated to @dev |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 1015 | * @domain: The domain to managing the interrupts |
| 1016 | * @dev: Pointer to device struct of the device for which the interrupts |
| 1017 | * are free |
| 1018 | */ |
| 1019 | void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) |
| 1020 | { |
Thomas Gleixner | 0f62d94 | 2021-12-06 23:51:07 +0100 | [diff] [blame] | 1021 | msi_lock_descs(dev); |
| 1022 | msi_domain_free_irqs_descs_locked(domain, dev); |
| 1023 | msi_unlock_descs(dev); |
Thomas Gleixner | 43e9e70 | 2020-08-26 13:16:57 +0200 | [diff] [blame] | 1024 | } |
| 1025 | |
| 1026 | /** |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 1027 | * msi_get_domain_info - Get the MSI interrupt domain info for @domain |
| 1028 | * @domain: The interrupt domain to retrieve data from |
| 1029 | * |
Randy Dunlap | 3b35e7e | 2021-08-10 16:48:35 -0700 | [diff] [blame] | 1030 | * Return: the pointer to the msi_domain_info stored in @domain->host_data. |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 1031 | */ |
| 1032 | struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain) |
| 1033 | { |
| 1034 | return (struct msi_domain_info *)domain->host_data; |
| 1035 | } |
| 1036 | |
| 1037 | #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ |