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Chris Brandt3a62c2d2018-12-18 12:05:55 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the RZA2MEVB board
4 *
5 * Copyright (C) 2018 Renesas Electronics
6 *
7 */
8
9/dts-v1/;
10#include "r7s9210.dtsi"
11#include <dt-bindings/gpio/gpio.h>
Chris Brandt4592e492019-06-04 15:09:14 -050012#include <dt-bindings/input/input.h>
Chris Brandt3a62c2d2018-12-18 12:05:55 -050013#include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
14
15/ {
16 model = "RZA2MEVB";
17 compatible = "renesas,rza2mevb", "renesas,r7s9210";
18
19 aliases {
20 serial0 = &scif4;
Chris Brandteb8be022019-05-06 15:12:36 -050021 ethernet0 = &ether0;
22 ethernet1 = &ether1;
Chris Brandt3a62c2d2018-12-18 12:05:55 -050023 };
24
25 chosen {
26 bootargs = "ignore_loglevel";
27 stdout-path = "serial0:115200n8";
28 };
29
Chris Brandt4592e492019-06-04 15:09:14 -050030 keyboard {
31 compatible = "gpio-keys";
32
33 pinctrl-names = "default";
34 pinctrl-0 = <&keyboard_pins>;
35
36 key-3 {
37 interrupt-parent = <&irqc>;
38 interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
39 linux,code = <KEY_3>;
40 label = "SW3";
41 wakeup-source;
42 };
43 };
44
Chris Brandt3a62c2d2018-12-18 12:05:55 -050045 lbsc {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 };
49
50 leds {
51 compatible = "gpio-leds";
52
53 red {
54 gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>;
55 };
56 green {
57 gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>;
58 };
59 };
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +090060
61 memory@40000000 {
62 device_type = "memory";
63 reg = <0x40000000 0x00800000>; /* HyperRAM */
64 };
65};
66
67&ehci0 {
68 status = "okay";
69};
70
71&ehci1 {
72 status = "okay";
73};
74
75&ether0 {
76 pinctrl-names = "default";
77 pinctrl-0 = <&eth0_pins>;
78 status = "okay";
79 renesas,no-ether-link;
80 phy-handle = <&phy0>;
81 phy0: ethernet-phy@0 {
82 reg = <0>;
83 };
84};
85
86&ether1 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&eth1_pins>;
89 status = "okay";
90 renesas,no-ether-link;
91 phy-handle = <&phy1>;
92 phy1: ethernet-phy@1 {
93 reg = <0>;
94 };
Chris Brandt3a62c2d2018-12-18 12:05:55 -050095};
96
97/* EXTAL */
98&extal_clk {
99 clock-frequency = <24000000>; /* 24MHz */
100};
101
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900102/* High resolution System tick timers */
103&ostm0 {
104 status = "okay";
Chris Brandt3a62c2d2018-12-18 12:05:55 -0500105};
106
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900107&ostm1 {
108 status = "okay";
Chris Brandt5c64e612019-05-14 09:55:52 -0500109};
110
Chris Brandt3a62c2d2018-12-18 12:05:55 -0500111&pinctrl {
Chris Brandtc5dab2e2019-04-30 08:23:08 -0500112 eth0_pins: eth0 {
113 pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */
114 <RZA2_PINMUX(PORT6, 1, 7)>, /* RMMI0_TXDEN */
115 <RZA2_PINMUX(PORT6, 2, 7)>, /* RMII0_TXD0 */
116 <RZA2_PINMUX(PORT6, 3, 7)>, /* RMII0_TXD1 */
117 <RZA2_PINMUX(PORTE, 4, 7)>, /* RMII0_CRSDV */
118 <RZA2_PINMUX(PORTE, 1, 7)>, /* RMII0_RXD0 */
119 <RZA2_PINMUX(PORTE, 2, 7)>, /* RMII0_RXD1 */
120 <RZA2_PINMUX(PORTE, 3, 7)>, /* RMII0_RXER */
121 <RZA2_PINMUX(PORTE, 5, 1)>, /* ET0_MDC */
122 <RZA2_PINMUX(PORTE, 6, 1)>, /* ET0_MDIO */
123 <RZA2_PINMUX(PORTL, 0, 5)>; /* IRQ4 */
124 };
125
126 eth1_pins: eth1 {
127 pinmux = <RZA2_PINMUX(PORTK, 3, 7)>, /* REF50CK1 */
128 <RZA2_PINMUX(PORTK, 0, 7)>, /* RMMI1_TXDEN */
129 <RZA2_PINMUX(PORTK, 1, 7)>, /* RMII1_TXD0 */
130 <RZA2_PINMUX(PORTK, 2, 7)>, /* RMII1_TXD1 */
131 <RZA2_PINMUX(PORT3, 2, 7)>, /* RMII1_CRSDV */
132 <RZA2_PINMUX(PORTK, 4, 7)>, /* RMII1_RXD0 */
133 <RZA2_PINMUX(PORT3, 5, 7)>, /* RMII1_RXD1 */
134 <RZA2_PINMUX(PORT3, 1, 7)>, /* RMII1_RXER */
135 <RZA2_PINMUX(PORT3, 3, 1)>, /* ET1_MDC */
136 <RZA2_PINMUX(PORT3, 4, 1)>, /* ET1_MDIO */
137 <RZA2_PINMUX(PORTL, 1, 5)>; /* IRQ5 */
138 };
Chris Brandtc2fad092019-04-30 08:23:09 -0500139
Chris Brandt4592e492019-06-04 15:09:14 -0500140 keyboard_pins: keyboard {
141 pinmux = <RZA2_PINMUX(PORTJ, 1, 6)>; /* IRQ0 */
142 };
143
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900144 /* Serial Console */
145 scif4_pins: serial4 {
146 pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
147 <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
148 };
149
Chris Brandtc2fad092019-04-30 08:23:09 -0500150 sdhi0_pins: sdhi0 {
151 pinmux = <RZA2_PINMUX(PORT5, 0, 3)>, /* SD0_CD */
152 <RZA2_PINMUX(PORT5, 1, 3)>; /* SD0_WP */
153 };
154
155 sdhi1_pins: sdhi1 {
156 pinmux = <RZA2_PINMUX(PORT5, 4, 3)>, /* SD1_CD */
157 <RZA2_PINMUX(PORT5, 5, 3)>; /* SD1_WP */
158 };
Chris Brandt003ddc62019-05-15 10:20:48 -0500159
160 usb0_pins: usb0 {
161 pinmux = <RZA2_PINMUX(PORT5, 2, 3)>, /* VBUSIN0 */
162 <RZA2_PINMUX(PORTC, 6, 1)>, /* VBUSEN0 */
163 <RZA2_PINMUX(PORTC, 7, 1)>; /* OVRCUR0 */
164 };
165
166 usb1_pins: usb1 {
167 pinmux = <RZA2_PINMUX(PORTC, 0, 1)>, /* VBUSIN1 */
168 <RZA2_PINMUX(PORTC, 5, 1)>, /* VBUSEN1 */
169 <RZA2_PINMUX(PORT7, 5, 5)>; /* OVRCUR1 */
170 };
Chris Brandt3a62c2d2018-12-18 12:05:55 -0500171};
172
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900173/* RTC_X1 */
174&rtc_x1_clk {
175 clock-frequency = <32768>;
Chris Brandt3a62c2d2018-12-18 12:05:55 -0500176};
177
178/* Serial Console */
179&scif4 {
180 pinctrl-names = "default";
181 pinctrl-0 = <&scif4_pins>;
182
183 status = "okay";
184};
Chris Brandtc5dab2e2019-04-30 08:23:08 -0500185
Chris Brandtc2fad092019-04-30 08:23:09 -0500186&sdhi0 {
187 pinctrl-names = "default";
188 pinctrl-0 = <&sdhi0_pins>;
189 bus-width = <4>;
190 status = "okay";
191};
192
193&sdhi1 {
194 pinctrl-names = "default";
195 pinctrl-0 = <&sdhi1_pins>;
196 bus-width = <4>;
197 status = "okay";
198};
Chris Brandt003ddc62019-05-15 10:20:48 -0500199
200/* USB-0 as Host */
201&usb2_phy0 {
202 pinctrl-names = "default";
203 pinctrl-0 = <&usb0_pins>;
204 dr_mode = "host"; /* Requires JP3 to be fitted */
205 status = "okay";
206};
207
Chris Brandt003ddc62019-05-15 10:20:48 -0500208/* USB-1 as Host */
209&usb2_phy1 {
210 pinctrl-names = "default";
211 pinctrl-0 = <&usb1_pins>;
212 dr_mode = "host";
213 status = "okay";
214};
215
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900216/* USB_X1 */
217&usb_x1_clk {
218 clock-frequency = <48000000>;
Chris Brandt003ddc62019-05-15 10:20:48 -0500219};