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Chris Brandt3a62c2d2018-12-18 12:05:55 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the RZA2MEVB board
4 *
5 * Copyright (C) 2018 Renesas Electronics
6 *
7 */
8
9/dts-v1/;
10#include "r7s9210.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
13
14/ {
15 model = "RZA2MEVB";
16 compatible = "renesas,rza2mevb", "renesas,r7s9210";
17
18 aliases {
19 serial0 = &scif4;
Chris Brandteb8be022019-05-06 15:12:36 -050020 ethernet0 = &ether0;
21 ethernet1 = &ether1;
Chris Brandt3a62c2d2018-12-18 12:05:55 -050022 };
23
24 chosen {
25 bootargs = "ignore_loglevel";
26 stdout-path = "serial0:115200n8";
27 };
28
Chris Brandt3a62c2d2018-12-18 12:05:55 -050029 lbsc {
30 #address-cells = <1>;
31 #size-cells = <1>;
32 };
33
34 leds {
35 compatible = "gpio-leds";
36
37 red {
38 gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>;
39 };
40 green {
41 gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>;
42 };
43 };
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +090044
45 memory@40000000 {
46 device_type = "memory";
47 reg = <0x40000000 0x00800000>; /* HyperRAM */
48 };
49};
50
51&ehci0 {
52 status = "okay";
53};
54
55&ehci1 {
56 status = "okay";
57};
58
59&ether0 {
60 pinctrl-names = "default";
61 pinctrl-0 = <&eth0_pins>;
62 status = "okay";
63 renesas,no-ether-link;
64 phy-handle = <&phy0>;
65 phy0: ethernet-phy@0 {
66 reg = <0>;
67 };
68};
69
70&ether1 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&eth1_pins>;
73 status = "okay";
74 renesas,no-ether-link;
75 phy-handle = <&phy1>;
76 phy1: ethernet-phy@1 {
77 reg = <0>;
78 };
Chris Brandt3a62c2d2018-12-18 12:05:55 -050079};
80
81/* EXTAL */
82&extal_clk {
83 clock-frequency = <24000000>; /* 24MHz */
84};
85
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +090086/* High resolution System tick timers */
87&ostm0 {
88 status = "okay";
Chris Brandt3a62c2d2018-12-18 12:05:55 -050089};
90
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +090091&ostm1 {
92 status = "okay";
Chris Brandt5c64e612019-05-14 09:55:52 -050093};
94
Chris Brandt3a62c2d2018-12-18 12:05:55 -050095&pinctrl {
Chris Brandtc5dab2e2019-04-30 08:23:08 -050096 eth0_pins: eth0 {
97 pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */
98 <RZA2_PINMUX(PORT6, 1, 7)>, /* RMMI0_TXDEN */
99 <RZA2_PINMUX(PORT6, 2, 7)>, /* RMII0_TXD0 */
100 <RZA2_PINMUX(PORT6, 3, 7)>, /* RMII0_TXD1 */
101 <RZA2_PINMUX(PORTE, 4, 7)>, /* RMII0_CRSDV */
102 <RZA2_PINMUX(PORTE, 1, 7)>, /* RMII0_RXD0 */
103 <RZA2_PINMUX(PORTE, 2, 7)>, /* RMII0_RXD1 */
104 <RZA2_PINMUX(PORTE, 3, 7)>, /* RMII0_RXER */
105 <RZA2_PINMUX(PORTE, 5, 1)>, /* ET0_MDC */
106 <RZA2_PINMUX(PORTE, 6, 1)>, /* ET0_MDIO */
107 <RZA2_PINMUX(PORTL, 0, 5)>; /* IRQ4 */
108 };
109
110 eth1_pins: eth1 {
111 pinmux = <RZA2_PINMUX(PORTK, 3, 7)>, /* REF50CK1 */
112 <RZA2_PINMUX(PORTK, 0, 7)>, /* RMMI1_TXDEN */
113 <RZA2_PINMUX(PORTK, 1, 7)>, /* RMII1_TXD0 */
114 <RZA2_PINMUX(PORTK, 2, 7)>, /* RMII1_TXD1 */
115 <RZA2_PINMUX(PORT3, 2, 7)>, /* RMII1_CRSDV */
116 <RZA2_PINMUX(PORTK, 4, 7)>, /* RMII1_RXD0 */
117 <RZA2_PINMUX(PORT3, 5, 7)>, /* RMII1_RXD1 */
118 <RZA2_PINMUX(PORT3, 1, 7)>, /* RMII1_RXER */
119 <RZA2_PINMUX(PORT3, 3, 1)>, /* ET1_MDC */
120 <RZA2_PINMUX(PORT3, 4, 1)>, /* ET1_MDIO */
121 <RZA2_PINMUX(PORTL, 1, 5)>; /* IRQ5 */
122 };
Chris Brandtc2fad092019-04-30 08:23:09 -0500123
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900124 /* Serial Console */
125 scif4_pins: serial4 {
126 pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
127 <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
128 };
129
Chris Brandtc2fad092019-04-30 08:23:09 -0500130 sdhi0_pins: sdhi0 {
131 pinmux = <RZA2_PINMUX(PORT5, 0, 3)>, /* SD0_CD */
132 <RZA2_PINMUX(PORT5, 1, 3)>; /* SD0_WP */
133 };
134
135 sdhi1_pins: sdhi1 {
136 pinmux = <RZA2_PINMUX(PORT5, 4, 3)>, /* SD1_CD */
137 <RZA2_PINMUX(PORT5, 5, 3)>; /* SD1_WP */
138 };
Chris Brandt003ddc62019-05-15 10:20:48 -0500139
140 usb0_pins: usb0 {
141 pinmux = <RZA2_PINMUX(PORT5, 2, 3)>, /* VBUSIN0 */
142 <RZA2_PINMUX(PORTC, 6, 1)>, /* VBUSEN0 */
143 <RZA2_PINMUX(PORTC, 7, 1)>; /* OVRCUR0 */
144 };
145
146 usb1_pins: usb1 {
147 pinmux = <RZA2_PINMUX(PORTC, 0, 1)>, /* VBUSIN1 */
148 <RZA2_PINMUX(PORTC, 5, 1)>, /* VBUSEN1 */
149 <RZA2_PINMUX(PORT7, 5, 5)>; /* OVRCUR1 */
150 };
Chris Brandt3a62c2d2018-12-18 12:05:55 -0500151};
152
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900153/* RTC_X1 */
154&rtc_x1_clk {
155 clock-frequency = <32768>;
Chris Brandt3a62c2d2018-12-18 12:05:55 -0500156};
157
158/* Serial Console */
159&scif4 {
160 pinctrl-names = "default";
161 pinctrl-0 = <&scif4_pins>;
162
163 status = "okay";
164};
Chris Brandtc5dab2e2019-04-30 08:23:08 -0500165
Chris Brandtc2fad092019-04-30 08:23:09 -0500166&sdhi0 {
167 pinctrl-names = "default";
168 pinctrl-0 = <&sdhi0_pins>;
169 bus-width = <4>;
170 status = "okay";
171};
172
173&sdhi1 {
174 pinctrl-names = "default";
175 pinctrl-0 = <&sdhi1_pins>;
176 bus-width = <4>;
177 status = "okay";
178};
Chris Brandt003ddc62019-05-15 10:20:48 -0500179
180/* USB-0 as Host */
181&usb2_phy0 {
182 pinctrl-names = "default";
183 pinctrl-0 = <&usb0_pins>;
184 dr_mode = "host"; /* Requires JP3 to be fitted */
185 status = "okay";
186};
187
Chris Brandt003ddc62019-05-15 10:20:48 -0500188/* USB-1 as Host */
189&usb2_phy1 {
190 pinctrl-names = "default";
191 pinctrl-0 = <&usb1_pins>;
192 dr_mode = "host";
193 status = "okay";
194};
195
Yoshihiro Kaneko1de78cc2019-05-17 23:43:07 +0900196/* USB_X1 */
197&usb_x1_clk {
198 clock-frequency = <48000000>;
Chris Brandt003ddc62019-05-15 10:20:48 -0500199};