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Thomas Gleixner4fa9c49f2019-05-29 07:18:05 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -07002/*******************************************************************************
3 Copyright (C) 2007-2009 STMicroelectronics Ltd
4
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -07005
6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
7*******************************************************************************/
8
Rayagond Kokatanurbd4242d2012-08-22 21:28:18 +00009#ifndef __STMMAC_H__
10#define __STMMAC_H__
11
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000012#define STMMAC_RESOURCE_NAME "stmmaceth"
Alexandre TORGUE06bce7d2016-04-01 11:37:36 +020013#define DRV_MODULE_VERSION "Jan_2016"
Giuseppe CAVALLAROba1377ff2012-04-04 04:33:25 +000014
15#include <linux/clk.h>
Jose Abreu3cd1cfc2019-08-07 10:03:14 +020016#include <linux/if_vlan.h>
Giuseppe CAVALLAROee7946a2010-01-06 23:07:14 +000017#include <linux/stmmac.h>
Jose Abreueeef2f62019-06-11 17:18:46 +020018#include <linux/phylink.h>
Giuseppe CAVALLARO33d5e332012-06-07 19:25:07 +000019#include <linux/pci.h>
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070020#include "common.h"
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +000021#include <linux/ptp_clock_kernel.h>
Artem Panfilovd6228b72019-01-20 19:05:15 +030022#include <linux/net_tstamp.h>
Chen-Yu Tsaic5e4ddb2014-01-17 21:24:41 +080023#include <linux/reset.h>
Jose Abreu2af61062019-07-09 10:03:00 +020024#include <net/page_pool.h>
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070025
Joachim Eastwoode56788c2015-05-20 20:03:07 +020026struct stmmac_resources {
27 void __iomem *addr;
28 const char *mac;
29 int wol_irq;
30 int lpi_irq;
31 int irq;
32};
33
Giuseppe CAVALLARO362b37b2014-08-27 11:27:00 +020034struct stmmac_tx_info {
35 dma_addr_t buf;
36 bool map_as_page;
Giuseppe Cavallaro553e2ab2016-02-29 14:27:31 +010037 unsigned len;
Giuseppe Cavallaro2a6d8e12016-02-29 14:27:32 +010038 bool last_segment;
Giuseppe Cavallaro96951362016-02-29 14:27:33 +010039 bool is_jumbo;
Giuseppe CAVALLARO362b37b2014-08-27 11:27:00 +020040};
41
Jose Abreu579a25a2020-01-13 17:24:09 +010042#define STMMAC_TBS_AVAIL BIT(0)
43#define STMMAC_TBS_EN BIT(1)
44
Joao Pintoce736782017-04-06 09:49:10 +010045/* Frequently used values are kept adjacent for cache effect */
46struct stmmac_tx_queue {
Jose Abreu8fce3332018-09-17 09:22:56 +010047 u32 tx_count_frames;
Jose Abreu579a25a2020-01-13 17:24:09 +010048 int tbs;
Jose Abreu8fce3332018-09-17 09:22:56 +010049 struct timer_list txtimer;
Joao Pintoce736782017-04-06 09:49:10 +010050 u32 queue_index;
51 struct stmmac_priv *priv_data;
52 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
Jose Abreu579a25a2020-01-13 17:24:09 +010053 struct dma_edesc *dma_entx;
Joao Pintoce736782017-04-06 09:49:10 +010054 struct dma_desc *dma_tx;
55 struct sk_buff **tx_skbuff;
56 struct stmmac_tx_info *tx_skbuff_dma;
57 unsigned int cur_tx;
58 unsigned int dirty_tx;
59 dma_addr_t dma_tx_phy;
60 u32 tx_tail_addr;
Niklas Cassel8d212a9e2018-02-19 18:11:09 +010061 u32 mss;
Joao Pintoce736782017-04-06 09:49:10 +010062};
63
Jose Abreu2af61062019-07-09 10:03:00 +020064struct stmmac_rx_buffer {
65 struct page *page;
Jose Abreu67afd6d2019-08-17 20:54:43 +020066 struct page *sec_page;
Jose Abreu2af61062019-07-09 10:03:00 +020067 dma_addr_t addr;
Jose Abreu67afd6d2019-08-17 20:54:43 +020068 dma_addr_t sec_addr;
Jose Abreu2af61062019-07-09 10:03:00 +020069};
70
Joao Pinto54139cf2017-04-06 09:49:09 +010071struct stmmac_rx_queue {
Jose Abreud429b662019-07-09 10:02:58 +020072 u32 rx_count_frames;
Joao Pinto54139cf2017-04-06 09:49:09 +010073 u32 queue_index;
Jose Abreu2af61062019-07-09 10:03:00 +020074 struct page_pool *page_pool;
75 struct stmmac_rx_buffer *buf_pool;
Joao Pinto54139cf2017-04-06 09:49:09 +010076 struct stmmac_priv *priv_data;
77 struct dma_extended_desc *dma_erx;
78 struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
Joao Pinto54139cf2017-04-06 09:49:09 +010079 unsigned int cur_rx;
80 unsigned int dirty_rx;
81 u32 rx_zeroc_thresh;
82 dma_addr_t dma_rx_phy;
83 u32 rx_tail_addr;
Jose Abreuec222002019-08-17 20:54:41 +020084 unsigned int state_saved;
85 struct {
86 struct sk_buff *skb;
87 unsigned int len;
88 unsigned int error;
89 } state;
Jose Abreu8fce3332018-09-17 09:22:56 +010090};
91
92struct stmmac_channel {
Jose Abreu4ccb45852019-02-19 10:38:47 +010093 struct napi_struct rx_napi ____cacheline_aligned_in_smp;
94 struct napi_struct tx_napi ____cacheline_aligned_in_smp;
Jose Abreu8fce3332018-09-17 09:22:56 +010095 struct stmmac_priv *priv_data;
Jose Abreu021bd5e2019-12-18 11:24:44 +010096 spinlock_t lock;
Jose Abreu8fce3332018-09-17 09:22:56 +010097 u32 index;
Joao Pinto54139cf2017-04-06 09:49:09 +010098};
99
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100100struct stmmac_tc_entry {
101 bool in_use;
102 bool in_hw;
103 bool is_last;
104 bool is_frag;
105 void *frag_ptr;
106 unsigned int table_pos;
107 u32 handle;
108 u32 prio;
109 struct {
110 u32 match_data;
111 u32 match_en;
112 u8 af:1;
113 u8 rf:1;
114 u8 im:1;
115 u8 nc:1;
116 u8 res1:4;
117 u8 frame_offset;
118 u8 ok_index;
119 u8 dma_ch_no;
120 u32 res2;
121 } __packed val;
122};
123
Jose Abreu9a8a02c2018-05-31 18:01:27 +0100124#define STMMAC_PPS_MAX 4
125struct stmmac_pps_cfg {
126 bool available;
127 struct timespec64 start;
128 struct timespec64 period;
129};
130
Jose Abreu76067452019-08-07 10:03:12 +0200131struct stmmac_rss {
132 int enable;
133 u8 key[STMMAC_RSS_HASH_KEY_SIZE];
134 u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
135};
136
Jose Abreu425eabd2019-09-04 15:16:56 +0200137#define STMMAC_FLOW_ACTION_DROP BIT(0)
138struct stmmac_flow_entry {
139 unsigned long cookie;
140 unsigned long action;
141 u8 ip_proto;
142 int in_use;
143 int idx;
144 int is_l4;
145};
146
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700147struct stmmac_priv {
148 /* Frequently used values are kept adjacent for cache effect */
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000149 u32 tx_coal_frames;
150 u32 tx_coal_timer;
Jose Abreud429b662019-07-09 10:02:58 +0200151 u32 rx_coal_frames;
Joao Pintoce736782017-04-06 09:49:10 +0100152
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700153 int tx_coalesce;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000154 int hwts_tx_en;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000155 bool tx_path_in_lpi_mode;
Alexandre TORGUEf748be52016-04-01 11:37:34 +0200156 bool tso;
Jose Abreu67afd6d2019-08-17 20:54:43 +0200157 int sph;
Jose Abreu8000ddc2019-08-17 20:54:47 +0200158 u32 sarc_type;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700159
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700160 unsigned int dma_buf_sz;
Giuseppe Cavallaro22ad3832016-02-29 14:27:41 +0100161 unsigned int rx_copybreak;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000162 u32 rx_riwt;
163 int hwts_rx_en;
LABBE Corentin5bacd772017-03-29 07:05:40 +0200164
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000165 void __iomem *ioaddr;
166 struct net_device *dev;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700167 struct device *device;
Giuseppe CAVALLAROdb98a0b2010-01-06 23:07:17 +0000168 struct mac_device_info *hw;
Jose Abreu7cfde0a2018-06-15 16:17:27 +0100169 int (*hwif_quirks)(struct stmmac_priv *priv);
Thierry Reding29555fa2018-05-24 16:09:07 +0200170 struct mutex lock;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700171
Joao Pinto54139cf2017-04-06 09:49:09 +0100172 /* RX Queue */
173 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
Song, Yoong Siangaa042f62020-09-16 15:40:20 +0800174 unsigned int dma_rx_size;
Joao Pinto54139cf2017-04-06 09:49:09 +0100175
Joao Pintoce736782017-04-06 09:49:10 +0100176 /* TX Queue */
177 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
Song, Yoong Siangaa042f62020-09-16 15:40:20 +0800178 unsigned int dma_tx_size;
Joao Pintoce736782017-04-06 09:49:10 +0100179
Jose Abreu8fce3332018-09-17 09:22:56 +0100180 /* Generic channel for NAPI */
181 struct stmmac_channel channel[STMMAC_CH_MAX];
182
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700183 int speed;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700184 unsigned int flow_ctrl;
185 unsigned int pause;
186 struct mii_bus *mii;
Giuseppe CAVALLARO36bcfe72011-07-20 00:05:23 +0000187 int mii_irq[PHY_MAX_ADDR];
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700188
Jose Abreueeef2f62019-06-11 17:18:46 +0200189 struct phylink_config phylink_config;
190 struct phylink *phylink;
191
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000192 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
Jose Abreu8bf993a2018-03-29 10:40:19 +0100193 struct stmmac_safety_stats sstats;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000194 struct plat_stmmacenet_data *plat;
195 struct dma_features dma_cap;
196 struct stmmac_counters mmc;
197 int hw_cap_support;
198 int synopsys_id;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700199 u32 msg_enable;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700200 int wolopts;
Deepak Sikri3172d3a2011-09-01 21:51:37 +0000201 int wol_irq;
Giuseppe CAVALLAROcd7201f2012-04-04 04:33:27 +0000202 int clk_csr;
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000203 struct timer_list eee_ctrl_timer;
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000204 int lpi_irq;
205 int eee_enabled;
206 int eee_active;
207 int tx_lpi_timer;
Giuseppe CAVALLARO4a7d6662013-03-26 04:43:05 +0000208 unsigned int mode;
Jose Abreu5f0456b2018-04-23 09:05:15 +0100209 unsigned int chain_mode;
Giuseppe CAVALLAROc24602e2013-03-26 04:43:06 +0000210 int extend_desc;
Artem Panfilovd6228b72019-01-20 19:05:15 +0300211 struct hwtstamp_config tstamp_config;
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +0000212 struct ptp_clock *ptp_clock;
213 struct ptp_clock_info ptp_clock_ops;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000214 unsigned int default_addend;
Jose Abreu9a8a02c2018-05-31 18:01:27 +0100215 u32 sub_second_inc;
216 u32 systime_flags;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000217 u32 adv_ts;
218 int use_riwt;
Srinivas Kandagatla89f7f2c2014-01-16 10:53:00 +0000219 int irq_wake;
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +0000220 spinlock_t ptp_lock;
Alexandre TORGUE36ff7c12016-04-01 11:37:32 +0200221 void __iomem *mmcaddr;
Giuseppe CAVALLAROba1ffd72016-11-14 09:27:29 +0100222 void __iomem *ptpaddr;
Jose Abreu3cd1cfc2019-08-07 10:03:14 +0200223 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
Mathieu Olivari466c5ac2015-05-22 19:03:29 -0700224
225#ifdef CONFIG_DEBUG_FS
226 struct dentry *dbgfs_dir;
Mathieu Olivari466c5ac2015-05-22 19:03:29 -0700227#endif
Jose Abreu34877a12018-03-29 10:40:18 +0100228
229 unsigned long state;
230 struct workqueue_struct *wq;
231 struct work_struct service_task;
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100232
233 /* TC Handling */
234 unsigned int tc_entries_max;
235 unsigned int tc_off_max;
236 struct stmmac_tc_entry *tc_entries;
Jose Abreu425eabd2019-09-04 15:16:56 +0200237 unsigned int flow_entries_max;
238 struct stmmac_flow_entry *flow_entries;
Jose Abreu9a8a02c2018-05-31 18:01:27 +0100239
240 /* Pulse Per Second output */
241 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
Jose Abreu76067452019-08-07 10:03:12 +0200242
243 /* Receive Side Scaling */
244 struct stmmac_rss rss;
Jose Abreu34877a12018-03-29 10:40:18 +0100245};
246
247enum stmmac_state {
248 STMMAC_DOWN,
249 STMMAC_RESET_REQUESTED,
250 STMMAC_RESETING,
251 STMMAC_SERVICE_SCHED,
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700252};
253
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700254int stmmac_mdio_unregister(struct net_device *ndev);
255int stmmac_mdio_register(struct net_device *ndev);
Srinivas Kandagatla073752a2014-01-16 10:52:27 +0000256int stmmac_mdio_reset(struct mii_bus *mii);
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700257void stmmac_set_ethtool_ops(struct net_device *netdev);
Andy Shevchenko915af652014-11-05 11:45:32 +0200258
Giuseppe CAVALLAROc30a70d2016-10-19 09:06:41 +0200259void stmmac_ptp_register(struct stmmac_priv *priv);
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700260void stmmac_ptp_unregister(struct stmmac_priv *priv);
Joachim Eastwoodf4e7bd82016-05-01 22:58:19 +0200261int stmmac_resume(struct device *dev);
262int stmmac_suspend(struct device *dev);
263int stmmac_dvr_remove(struct device *dev);
Joachim Eastwood15ffac72015-05-20 20:03:08 +0200264int stmmac_dvr_probe(struct device *device,
265 struct plat_stmmacenet_data *plat_dat,
266 struct stmmac_resources *res);
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000267void stmmac_disable_eee_mode(struct stmmac_priv *priv);
268bool stmmac_eee_init(struct stmmac_priv *priv);
Ong Boon Leong0366f7e2020-09-15 09:28:38 +0800269int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt);
Song, Yoong Siangaa042f62020-09-16 15:40:20 +0800270int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size);
Giuseppe CAVALLAROba1377ff2012-04-04 04:33:25 +0000271
Jose Abreu091810d2019-05-24 10:20:19 +0200272#if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
273void stmmac_selftest_run(struct net_device *dev,
274 struct ethtool_test *etest, u64 *buf);
275void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
276int stmmac_selftest_get_count(struct stmmac_priv *priv);
277#else
278static inline void stmmac_selftest_run(struct net_device *dev,
279 struct ethtool_test *etest, u64 *buf)
280{
281 /* Not enabled */
282}
283static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
284 u8 *data)
285{
286 /* Not enabled */
287}
288static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
289{
290 return -EOPNOTSUPP;
291}
292#endif /* CONFIG_STMMAC_SELFTESTS */
293
Rayagond Kokatanurbd4242d2012-08-22 21:28:18 +0000294#endif /* __STMMAC_H__ */