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Thomas Gleixner4fa9c49f2019-05-29 07:18:05 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -07002/*******************************************************************************
3 Copyright (C) 2007-2009 STMicroelectronics Ltd
4
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -07005
6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
7*******************************************************************************/
8
Rayagond Kokatanurbd4242d2012-08-22 21:28:18 +00009#ifndef __STMMAC_H__
10#define __STMMAC_H__
11
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000012#define STMMAC_RESOURCE_NAME "stmmaceth"
Alexandre TORGUE06bce7d2016-04-01 11:37:36 +020013#define DRV_MODULE_VERSION "Jan_2016"
Giuseppe CAVALLAROba1377ff2012-04-04 04:33:25 +000014
15#include <linux/clk.h>
Jose Abreu3cd1cfc2019-08-07 10:03:14 +020016#include <linux/if_vlan.h>
Giuseppe CAVALLAROee7946a2010-01-06 23:07:14 +000017#include <linux/stmmac.h>
Jose Abreueeef2f62019-06-11 17:18:46 +020018#include <linux/phylink.h>
Giuseppe CAVALLARO33d5e332012-06-07 19:25:07 +000019#include <linux/pci.h>
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070020#include "common.h"
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +000021#include <linux/ptp_clock_kernel.h>
Artem Panfilovd6228b72019-01-20 19:05:15 +030022#include <linux/net_tstamp.h>
Chen-Yu Tsaic5e4ddb2014-01-17 21:24:41 +080023#include <linux/reset.h>
Jose Abreu2af61062019-07-09 10:03:00 +020024#include <net/page_pool.h>
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070025
Joachim Eastwoode56788c2015-05-20 20:03:07 +020026struct stmmac_resources {
27 void __iomem *addr;
28 const char *mac;
29 int wol_irq;
30 int lpi_irq;
31 int irq;
32};
33
Giuseppe CAVALLARO362b37b2014-08-27 11:27:00 +020034struct stmmac_tx_info {
35 dma_addr_t buf;
36 bool map_as_page;
Giuseppe Cavallaro553e2ab2016-02-29 14:27:31 +010037 unsigned len;
Giuseppe Cavallaro2a6d8e12016-02-29 14:27:32 +010038 bool last_segment;
Giuseppe Cavallaro96951362016-02-29 14:27:33 +010039 bool is_jumbo;
Giuseppe CAVALLARO362b37b2014-08-27 11:27:00 +020040};
41
Joao Pintoce736782017-04-06 09:49:10 +010042/* Frequently used values are kept adjacent for cache effect */
43struct stmmac_tx_queue {
Jose Abreu8fce3332018-09-17 09:22:56 +010044 u32 tx_count_frames;
45 struct timer_list txtimer;
Joao Pintoce736782017-04-06 09:49:10 +010046 u32 queue_index;
47 struct stmmac_priv *priv_data;
48 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
49 struct dma_desc *dma_tx;
50 struct sk_buff **tx_skbuff;
51 struct stmmac_tx_info *tx_skbuff_dma;
52 unsigned int cur_tx;
53 unsigned int dirty_tx;
54 dma_addr_t dma_tx_phy;
55 u32 tx_tail_addr;
Niklas Cassel8d212a9e2018-02-19 18:11:09 +010056 u32 mss;
Joao Pintoce736782017-04-06 09:49:10 +010057};
58
Jose Abreu2af61062019-07-09 10:03:00 +020059struct stmmac_rx_buffer {
60 struct page *page;
Jose Abreu67afd6d2019-08-17 20:54:43 +020061 struct page *sec_page;
Jose Abreu2af61062019-07-09 10:03:00 +020062 dma_addr_t addr;
Jose Abreu67afd6d2019-08-17 20:54:43 +020063 dma_addr_t sec_addr;
Jose Abreu2af61062019-07-09 10:03:00 +020064};
65
Joao Pinto54139cf2017-04-06 09:49:09 +010066struct stmmac_rx_queue {
Jose Abreud429b662019-07-09 10:02:58 +020067 u32 rx_count_frames;
Joao Pinto54139cf2017-04-06 09:49:09 +010068 u32 queue_index;
Jose Abreu2af61062019-07-09 10:03:00 +020069 struct page_pool *page_pool;
70 struct stmmac_rx_buffer *buf_pool;
Joao Pinto54139cf2017-04-06 09:49:09 +010071 struct stmmac_priv *priv_data;
72 struct dma_extended_desc *dma_erx;
73 struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
Joao Pinto54139cf2017-04-06 09:49:09 +010074 unsigned int cur_rx;
75 unsigned int dirty_rx;
76 u32 rx_zeroc_thresh;
77 dma_addr_t dma_rx_phy;
78 u32 rx_tail_addr;
Jose Abreuec222002019-08-17 20:54:41 +020079 unsigned int state_saved;
80 struct {
81 struct sk_buff *skb;
82 unsigned int len;
83 unsigned int error;
84 } state;
Jose Abreu8fce3332018-09-17 09:22:56 +010085};
86
87struct stmmac_channel {
Jose Abreu4ccb45852019-02-19 10:38:47 +010088 struct napi_struct rx_napi ____cacheline_aligned_in_smp;
89 struct napi_struct tx_napi ____cacheline_aligned_in_smp;
Jose Abreu8fce3332018-09-17 09:22:56 +010090 struct stmmac_priv *priv_data;
91 u32 index;
Joao Pinto54139cf2017-04-06 09:49:09 +010092};
93
Jose Abreu4dbbe8d2018-05-04 10:01:38 +010094struct stmmac_tc_entry {
95 bool in_use;
96 bool in_hw;
97 bool is_last;
98 bool is_frag;
99 void *frag_ptr;
100 unsigned int table_pos;
101 u32 handle;
102 u32 prio;
103 struct {
104 u32 match_data;
105 u32 match_en;
106 u8 af:1;
107 u8 rf:1;
108 u8 im:1;
109 u8 nc:1;
110 u8 res1:4;
111 u8 frame_offset;
112 u8 ok_index;
113 u8 dma_ch_no;
114 u32 res2;
115 } __packed val;
116};
117
Jose Abreu9a8a02c2018-05-31 18:01:27 +0100118#define STMMAC_PPS_MAX 4
119struct stmmac_pps_cfg {
120 bool available;
121 struct timespec64 start;
122 struct timespec64 period;
123};
124
Jose Abreu76067452019-08-07 10:03:12 +0200125struct stmmac_rss {
126 int enable;
127 u8 key[STMMAC_RSS_HASH_KEY_SIZE];
128 u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
129};
130
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700131struct stmmac_priv {
132 /* Frequently used values are kept adjacent for cache effect */
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000133 u32 tx_coal_frames;
134 u32 tx_coal_timer;
Jose Abreud429b662019-07-09 10:02:58 +0200135 u32 rx_coal_frames;
Joao Pintoce736782017-04-06 09:49:10 +0100136
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700137 int tx_coalesce;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000138 int hwts_tx_en;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000139 bool tx_path_in_lpi_mode;
Alexandre TORGUEf748be52016-04-01 11:37:34 +0200140 bool tso;
Jose Abreu67afd6d2019-08-17 20:54:43 +0200141 int sph;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700142
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700143 unsigned int dma_buf_sz;
Giuseppe Cavallaro22ad3832016-02-29 14:27:41 +0100144 unsigned int rx_copybreak;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000145 u32 rx_riwt;
146 int hwts_rx_en;
LABBE Corentin5bacd772017-03-29 07:05:40 +0200147
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000148 void __iomem *ioaddr;
149 struct net_device *dev;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700150 struct device *device;
Giuseppe CAVALLAROdb98a0b2010-01-06 23:07:17 +0000151 struct mac_device_info *hw;
Jose Abreu7cfde0a2018-06-15 16:17:27 +0100152 int (*hwif_quirks)(struct stmmac_priv *priv);
Thierry Reding29555fa2018-05-24 16:09:07 +0200153 struct mutex lock;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700154
Joao Pinto54139cf2017-04-06 09:49:09 +0100155 /* RX Queue */
156 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
157
Joao Pintoce736782017-04-06 09:49:10 +0100158 /* TX Queue */
159 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
160
Jose Abreu8fce3332018-09-17 09:22:56 +0100161 /* Generic channel for NAPI */
162 struct stmmac_channel channel[STMMAC_CH_MAX];
163
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700164 int speed;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700165 unsigned int flow_ctrl;
166 unsigned int pause;
167 struct mii_bus *mii;
Giuseppe CAVALLARO36bcfe72011-07-20 00:05:23 +0000168 int mii_irq[PHY_MAX_ADDR];
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700169
Jose Abreueeef2f62019-06-11 17:18:46 +0200170 struct phylink_config phylink_config;
171 struct phylink *phylink;
172
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000173 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
Jose Abreu8bf993a2018-03-29 10:40:19 +0100174 struct stmmac_safety_stats sstats;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000175 struct plat_stmmacenet_data *plat;
176 struct dma_features dma_cap;
177 struct stmmac_counters mmc;
178 int hw_cap_support;
179 int synopsys_id;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700180 u32 msg_enable;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700181 int wolopts;
Deepak Sikri3172d3a2011-09-01 21:51:37 +0000182 int wol_irq;
Giuseppe CAVALLAROcd7201f2012-04-04 04:33:27 +0000183 int clk_csr;
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000184 struct timer_list eee_ctrl_timer;
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000185 int lpi_irq;
186 int eee_enabled;
187 int eee_active;
188 int tx_lpi_timer;
Giuseppe CAVALLARO4a7d6662013-03-26 04:43:05 +0000189 unsigned int mode;
Jose Abreu5f0456b2018-04-23 09:05:15 +0100190 unsigned int chain_mode;
Giuseppe CAVALLAROc24602e2013-03-26 04:43:06 +0000191 int extend_desc;
Artem Panfilovd6228b72019-01-20 19:05:15 +0300192 struct hwtstamp_config tstamp_config;
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +0000193 struct ptp_clock *ptp_clock;
194 struct ptp_clock_info ptp_clock_ops;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000195 unsigned int default_addend;
Jose Abreu9a8a02c2018-05-31 18:01:27 +0100196 u32 sub_second_inc;
197 u32 systime_flags;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000198 u32 adv_ts;
199 int use_riwt;
Srinivas Kandagatla89f7f2c2014-01-16 10:53:00 +0000200 int irq_wake;
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +0000201 spinlock_t ptp_lock;
Alexandre TORGUE36ff7c12016-04-01 11:37:32 +0200202 void __iomem *mmcaddr;
Giuseppe CAVALLAROba1ffd72016-11-14 09:27:29 +0100203 void __iomem *ptpaddr;
Jose Abreu3cd1cfc2019-08-07 10:03:14 +0200204 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
Mathieu Olivari466c5ac2015-05-22 19:03:29 -0700205
206#ifdef CONFIG_DEBUG_FS
207 struct dentry *dbgfs_dir;
Mathieu Olivari466c5ac2015-05-22 19:03:29 -0700208#endif
Jose Abreu34877a12018-03-29 10:40:18 +0100209
210 unsigned long state;
211 struct workqueue_struct *wq;
212 struct work_struct service_task;
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100213
214 /* TC Handling */
215 unsigned int tc_entries_max;
216 unsigned int tc_off_max;
217 struct stmmac_tc_entry *tc_entries;
Jose Abreu9a8a02c2018-05-31 18:01:27 +0100218
219 /* Pulse Per Second output */
220 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
Jose Abreu76067452019-08-07 10:03:12 +0200221
222 /* Receive Side Scaling */
223 struct stmmac_rss rss;
Jose Abreu34877a12018-03-29 10:40:18 +0100224};
225
226enum stmmac_state {
227 STMMAC_DOWN,
228 STMMAC_RESET_REQUESTED,
229 STMMAC_RESETING,
230 STMMAC_SERVICE_SCHED,
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700231};
232
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700233int stmmac_mdio_unregister(struct net_device *ndev);
234int stmmac_mdio_register(struct net_device *ndev);
Srinivas Kandagatla073752a2014-01-16 10:52:27 +0000235int stmmac_mdio_reset(struct mii_bus *mii);
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700236void stmmac_set_ethtool_ops(struct net_device *netdev);
Andy Shevchenko915af652014-11-05 11:45:32 +0200237
Giuseppe CAVALLAROc30a70d2016-10-19 09:06:41 +0200238void stmmac_ptp_register(struct stmmac_priv *priv);
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700239void stmmac_ptp_unregister(struct stmmac_priv *priv);
Joachim Eastwoodf4e7bd82016-05-01 22:58:19 +0200240int stmmac_resume(struct device *dev);
241int stmmac_suspend(struct device *dev);
242int stmmac_dvr_remove(struct device *dev);
Joachim Eastwood15ffac72015-05-20 20:03:08 +0200243int stmmac_dvr_probe(struct device *device,
244 struct plat_stmmacenet_data *plat_dat,
245 struct stmmac_resources *res);
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000246void stmmac_disable_eee_mode(struct stmmac_priv *priv);
247bool stmmac_eee_init(struct stmmac_priv *priv);
Giuseppe CAVALLAROba1377ff2012-04-04 04:33:25 +0000248
Jose Abreu091810d2019-05-24 10:20:19 +0200249#if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
250void stmmac_selftest_run(struct net_device *dev,
251 struct ethtool_test *etest, u64 *buf);
252void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
253int stmmac_selftest_get_count(struct stmmac_priv *priv);
254#else
255static inline void stmmac_selftest_run(struct net_device *dev,
256 struct ethtool_test *etest, u64 *buf)
257{
258 /* Not enabled */
259}
260static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
261 u8 *data)
262{
263 /* Not enabled */
264}
265static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
266{
267 return -EOPNOTSUPP;
268}
269#endif /* CONFIG_STMMAC_SELFTESTS */
270
Rayagond Kokatanurbd4242d2012-08-22 21:28:18 +0000271#endif /* __STMMAC_H__ */