Alexandre Belloni | 2fcdf5f | 2019-03-06 10:51:32 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 2 | /* |
| 3 | * A driver for the I2C members of the Abracon AB x8xx RTC family, |
| 4 | * and compatible: AB 1805 and AB 0805 |
| 5 | * |
| 6 | * Copyright 2014-2015 Macq S.A. |
| 7 | * |
| 8 | * Author: Philippe De Muyter <phdm@macqel.be> |
Alexandre Belloni | 7d1e5bf | 2019-03-04 20:17:38 +0100 | [diff] [blame] | 9 | * Author: Alexandre Belloni <alexandre.belloni@bootlin.com> |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 10 | * |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <linux/bcd.h> |
| 14 | #include <linux/i2c.h> |
| 15 | #include <linux/module.h> |
Kevin P. Fleming | ac363ac | 2020-05-28 07:46:17 -0400 | [diff] [blame] | 16 | #include <linux/of_device.h> |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 17 | #include <linux/rtc.h> |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 18 | #include <linux/watchdog.h> |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 19 | |
| 20 | #define ABX8XX_REG_HTH 0x00 |
| 21 | #define ABX8XX_REG_SC 0x01 |
| 22 | #define ABX8XX_REG_MN 0x02 |
| 23 | #define ABX8XX_REG_HR 0x03 |
| 24 | #define ABX8XX_REG_DA 0x04 |
| 25 | #define ABX8XX_REG_MO 0x05 |
| 26 | #define ABX8XX_REG_YR 0x06 |
| 27 | #define ABX8XX_REG_WD 0x07 |
| 28 | |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 29 | #define ABX8XX_REG_AHTH 0x08 |
| 30 | #define ABX8XX_REG_ASC 0x09 |
| 31 | #define ABX8XX_REG_AMN 0x0a |
| 32 | #define ABX8XX_REG_AHR 0x0b |
| 33 | #define ABX8XX_REG_ADA 0x0c |
| 34 | #define ABX8XX_REG_AMO 0x0d |
| 35 | #define ABX8XX_REG_AWD 0x0e |
| 36 | |
| 37 | #define ABX8XX_REG_STATUS 0x0f |
| 38 | #define ABX8XX_STATUS_AF BIT(2) |
Marek Vasut | ffe1c5a | 2018-12-07 18:40:53 +0100 | [diff] [blame] | 39 | #define ABX8XX_STATUS_BLF BIT(4) |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 40 | #define ABX8XX_STATUS_WDT BIT(6) |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 41 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 42 | #define ABX8XX_REG_CTRL1 0x10 |
Mitja Spes | 5f1b2f7 | 2015-09-02 10:02:29 +0200 | [diff] [blame] | 43 | #define ABX8XX_CTRL_WRITE BIT(0) |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 44 | #define ABX8XX_CTRL_ARST BIT(2) |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 45 | #define ABX8XX_CTRL_12_24 BIT(6) |
| 46 | |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 47 | #define ABX8XX_REG_CTRL2 0x11 |
| 48 | #define ABX8XX_CTRL2_RSVD BIT(5) |
| 49 | |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 50 | #define ABX8XX_REG_IRQ 0x12 |
| 51 | #define ABX8XX_IRQ_AIE BIT(2) |
| 52 | #define ABX8XX_IRQ_IM_1_4 (0x3 << 5) |
| 53 | |
| 54 | #define ABX8XX_REG_CD_TIMER_CTL 0x18 |
| 55 | |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 56 | #define ABX8XX_REG_OSC 0x1c |
| 57 | #define ABX8XX_OSC_FOS BIT(3) |
| 58 | #define ABX8XX_OSC_BOS BIT(4) |
| 59 | #define ABX8XX_OSC_ACAL_512 BIT(5) |
| 60 | #define ABX8XX_OSC_ACAL_1024 BIT(6) |
| 61 | |
| 62 | #define ABX8XX_OSC_OSEL BIT(7) |
| 63 | |
| 64 | #define ABX8XX_REG_OSS 0x1d |
Mylène Josserand | ee08774 | 2016-03-21 18:06:10 +0100 | [diff] [blame] | 65 | #define ABX8XX_OSS_OF BIT(1) |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 66 | #define ABX8XX_OSS_OMODE BIT(4) |
| 67 | |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 68 | #define ABX8XX_REG_WDT 0x1b |
| 69 | #define ABX8XX_WDT_WDS BIT(7) |
| 70 | #define ABX8XX_WDT_BMB_MASK 0x7c |
| 71 | #define ABX8XX_WDT_BMB_SHIFT 2 |
| 72 | #define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT) |
| 73 | #define ABX8XX_WDT_WRB_MASK 0x03 |
| 74 | #define ABX8XX_WDT_WRB_1HZ 0x02 |
| 75 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 76 | #define ABX8XX_REG_CFG_KEY 0x1f |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 77 | #define ABX8XX_CFG_KEY_OSC 0xa1 |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 78 | #define ABX8XX_CFG_KEY_MISC 0x9d |
| 79 | |
| 80 | #define ABX8XX_REG_ID0 0x28 |
| 81 | |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 82 | #define ABX8XX_REG_OUT_CTRL 0x30 |
| 83 | #define ABX8XX_OUT_CTRL_EXDS BIT(4) |
| 84 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 85 | #define ABX8XX_REG_TRICKLE 0x20 |
| 86 | #define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0 |
| 87 | #define ABX8XX_TRICKLE_STANDARD_DIODE 0x8 |
| 88 | #define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4 |
| 89 | |
| 90 | static u8 trickle_resistors[] = {0, 3, 6, 11}; |
| 91 | |
| 92 | enum abx80x_chip {AB0801, AB0803, AB0804, AB0805, |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 93 | AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X}; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 94 | |
| 95 | struct abx80x_cap { |
| 96 | u16 pn; |
| 97 | bool has_tc; |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 98 | bool has_wdog; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 99 | }; |
| 100 | |
| 101 | static struct abx80x_cap abx80x_caps[] = { |
| 102 | [AB0801] = {.pn = 0x0801}, |
| 103 | [AB0803] = {.pn = 0x0803}, |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 104 | [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true}, |
| 105 | [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true}, |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 106 | [AB1801] = {.pn = 0x1801}, |
| 107 | [AB1803] = {.pn = 0x1803}, |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 108 | [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true}, |
| 109 | [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 110 | [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 111 | [ABX80X] = {.pn = 0} |
| 112 | }; |
| 113 | |
Jeremy Gebben | af69f9a | 2018-09-11 11:28:25 -0600 | [diff] [blame] | 114 | struct abx80x_priv { |
| 115 | struct rtc_device *rtc; |
| 116 | struct i2c_client *client; |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 117 | struct watchdog_device wdog; |
Jeremy Gebben | af69f9a | 2018-09-11 11:28:25 -0600 | [diff] [blame] | 118 | }; |
| 119 | |
Kevin P. Fleming | 49dfc1f | 2020-06-15 06:51:12 -0400 | [diff] [blame] | 120 | static int abx80x_write_config_key(struct i2c_client *client, u8 key) |
| 121 | { |
| 122 | if (i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY, key) < 0) { |
| 123 | dev_err(&client->dev, "Unable to write configuration key\n"); |
| 124 | return -EIO; |
| 125 | } |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 130 | static int abx80x_is_rc_mode(struct i2c_client *client) |
| 131 | { |
| 132 | int flags = 0; |
| 133 | |
| 134 | flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS); |
| 135 | if (flags < 0) { |
| 136 | dev_err(&client->dev, |
| 137 | "Failed to read autocalibration attribute\n"); |
| 138 | return flags; |
| 139 | } |
| 140 | |
| 141 | return (flags & ABX8XX_OSS_OMODE) ? 1 : 0; |
| 142 | } |
| 143 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 144 | static int abx80x_enable_trickle_charger(struct i2c_client *client, |
| 145 | u8 trickle_cfg) |
| 146 | { |
| 147 | int err; |
| 148 | |
| 149 | /* |
| 150 | * Write the configuration key register to enable access to the Trickle |
| 151 | * register |
| 152 | */ |
Kevin P. Fleming | 49dfc1f | 2020-06-15 06:51:12 -0400 | [diff] [blame] | 153 | if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0) |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 154 | return -EIO; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 155 | |
| 156 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE, |
| 157 | ABX8XX_TRICKLE_CHARGE_ENABLE | |
| 158 | trickle_cfg); |
| 159 | if (err < 0) { |
| 160 | dev_err(&client->dev, "Unable to write trickle register\n"); |
| 161 | return -EIO; |
| 162 | } |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
| 167 | static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 168 | { |
| 169 | struct i2c_client *client = to_i2c_client(dev); |
| 170 | unsigned char buf[8]; |
Mylène Josserand | ee08774 | 2016-03-21 18:06:10 +0100 | [diff] [blame] | 171 | int err, flags, rc_mode = 0; |
| 172 | |
| 173 | /* Read the Oscillator Failure only in XT mode */ |
| 174 | rc_mode = abx80x_is_rc_mode(client); |
| 175 | if (rc_mode < 0) |
| 176 | return rc_mode; |
| 177 | |
| 178 | if (!rc_mode) { |
| 179 | flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS); |
| 180 | if (flags < 0) |
| 181 | return flags; |
| 182 | |
| 183 | if (flags & ABX8XX_OSS_OF) { |
| 184 | dev_err(dev, "Oscillator failure, data is invalid.\n"); |
| 185 | return -EINVAL; |
| 186 | } |
| 187 | } |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 188 | |
| 189 | err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH, |
| 190 | sizeof(buf), buf); |
| 191 | if (err < 0) { |
| 192 | dev_err(&client->dev, "Unable to read date\n"); |
| 193 | return -EIO; |
| 194 | } |
| 195 | |
| 196 | tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F); |
| 197 | tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F); |
| 198 | tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F); |
| 199 | tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7; |
| 200 | tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F); |
| 201 | tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1; |
| 202 | tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100; |
| 203 | |
Alexandre Belloni | fbfd36f | 2018-02-20 23:42:27 +0100 | [diff] [blame] | 204 | return 0; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 205 | } |
| 206 | |
| 207 | static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 208 | { |
| 209 | struct i2c_client *client = to_i2c_client(dev); |
| 210 | unsigned char buf[8]; |
Mylène Josserand | ee08774 | 2016-03-21 18:06:10 +0100 | [diff] [blame] | 211 | int err, flags; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 212 | |
| 213 | if (tm->tm_year < 100) |
| 214 | return -EINVAL; |
| 215 | |
| 216 | buf[ABX8XX_REG_HTH] = 0; |
| 217 | buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec); |
| 218 | buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min); |
| 219 | buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour); |
| 220 | buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday); |
| 221 | buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1); |
| 222 | buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100); |
| 223 | buf[ABX8XX_REG_WD] = tm->tm_wday; |
| 224 | |
| 225 | err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH, |
| 226 | sizeof(buf), buf); |
| 227 | if (err < 0) { |
| 228 | dev_err(&client->dev, "Unable to write to date registers\n"); |
| 229 | return -EIO; |
| 230 | } |
| 231 | |
Mylène Josserand | ee08774 | 2016-03-21 18:06:10 +0100 | [diff] [blame] | 232 | /* Clear the OF bit of Oscillator Status Register */ |
| 233 | flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS); |
| 234 | if (flags < 0) |
| 235 | return flags; |
| 236 | |
| 237 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS, |
| 238 | flags & ~ABX8XX_OSS_OF); |
| 239 | if (err < 0) { |
| 240 | dev_err(&client->dev, "Unable to write oscillator status register\n"); |
| 241 | return err; |
| 242 | } |
| 243 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 244 | return 0; |
| 245 | } |
| 246 | |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 247 | static irqreturn_t abx80x_handle_irq(int irq, void *dev_id) |
| 248 | { |
| 249 | struct i2c_client *client = dev_id; |
Jeremy Gebben | af69f9a | 2018-09-11 11:28:25 -0600 | [diff] [blame] | 250 | struct abx80x_priv *priv = i2c_get_clientdata(client); |
| 251 | struct rtc_device *rtc = priv->rtc; |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 252 | int status; |
| 253 | |
| 254 | status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); |
| 255 | if (status < 0) |
| 256 | return IRQ_NONE; |
| 257 | |
| 258 | if (status & ABX8XX_STATUS_AF) |
| 259 | rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF); |
| 260 | |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 261 | /* |
| 262 | * It is unclear if we'll get an interrupt before the external |
| 263 | * reset kicks in. |
| 264 | */ |
| 265 | if (status & ABX8XX_STATUS_WDT) |
| 266 | dev_alert(&client->dev, "watchdog timeout interrupt.\n"); |
| 267 | |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 268 | i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0); |
| 269 | |
| 270 | return IRQ_HANDLED; |
| 271 | } |
| 272 | |
| 273 | static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 274 | { |
| 275 | struct i2c_client *client = to_i2c_client(dev); |
| 276 | unsigned char buf[7]; |
| 277 | |
| 278 | int irq_mask, err; |
| 279 | |
| 280 | if (client->irq <= 0) |
| 281 | return -EINVAL; |
| 282 | |
| 283 | err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC, |
| 284 | sizeof(buf), buf); |
| 285 | if (err) |
| 286 | return err; |
| 287 | |
| 288 | irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ); |
| 289 | if (irq_mask < 0) |
| 290 | return irq_mask; |
| 291 | |
| 292 | t->time.tm_sec = bcd2bin(buf[0] & 0x7F); |
| 293 | t->time.tm_min = bcd2bin(buf[1] & 0x7F); |
| 294 | t->time.tm_hour = bcd2bin(buf[2] & 0x3F); |
| 295 | t->time.tm_mday = bcd2bin(buf[3] & 0x3F); |
| 296 | t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1; |
| 297 | t->time.tm_wday = buf[5] & 0x7; |
| 298 | |
| 299 | t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE); |
| 300 | t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled; |
| 301 | |
| 302 | return err; |
| 303 | } |
| 304 | |
| 305 | static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 306 | { |
| 307 | struct i2c_client *client = to_i2c_client(dev); |
| 308 | u8 alarm[6]; |
| 309 | int err; |
| 310 | |
| 311 | if (client->irq <= 0) |
| 312 | return -EINVAL; |
| 313 | |
| 314 | alarm[0] = 0x0; |
| 315 | alarm[1] = bin2bcd(t->time.tm_sec); |
| 316 | alarm[2] = bin2bcd(t->time.tm_min); |
| 317 | alarm[3] = bin2bcd(t->time.tm_hour); |
| 318 | alarm[4] = bin2bcd(t->time.tm_mday); |
| 319 | alarm[5] = bin2bcd(t->time.tm_mon + 1); |
| 320 | |
| 321 | err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH, |
| 322 | sizeof(alarm), alarm); |
| 323 | if (err < 0) { |
| 324 | dev_err(&client->dev, "Unable to write alarm registers\n"); |
| 325 | return -EIO; |
| 326 | } |
| 327 | |
| 328 | if (t->enabled) { |
| 329 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, |
| 330 | (ABX8XX_IRQ_IM_1_4 | |
| 331 | ABX8XX_IRQ_AIE)); |
| 332 | if (err) |
| 333 | return err; |
| 334 | } |
| 335 | |
| 336 | return 0; |
| 337 | } |
| 338 | |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 339 | static int abx80x_rtc_set_autocalibration(struct device *dev, |
| 340 | int autocalibration) |
| 341 | { |
| 342 | struct i2c_client *client = to_i2c_client(dev); |
| 343 | int retval, flags = 0; |
| 344 | |
| 345 | if ((autocalibration != 0) && (autocalibration != 1024) && |
| 346 | (autocalibration != 512)) { |
| 347 | dev_err(dev, "autocalibration value outside permitted range\n"); |
| 348 | return -EINVAL; |
| 349 | } |
| 350 | |
| 351 | flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC); |
| 352 | if (flags < 0) |
| 353 | return flags; |
| 354 | |
| 355 | if (autocalibration == 0) { |
| 356 | flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024); |
| 357 | } else if (autocalibration == 1024) { |
| 358 | /* 1024 autocalibration is 0x10 */ |
| 359 | flags |= ABX8XX_OSC_ACAL_1024; |
| 360 | flags &= ~(ABX8XX_OSC_ACAL_512); |
| 361 | } else { |
| 362 | /* 512 autocalibration is 0x11 */ |
| 363 | flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512); |
| 364 | } |
| 365 | |
| 366 | /* Unlock write access to Oscillator Control Register */ |
Kevin P. Fleming | 49dfc1f | 2020-06-15 06:51:12 -0400 | [diff] [blame] | 367 | if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0) |
| 368 | return -EIO; |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 369 | |
| 370 | retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags); |
| 371 | |
| 372 | return retval; |
| 373 | } |
| 374 | |
| 375 | static int abx80x_rtc_get_autocalibration(struct device *dev) |
| 376 | { |
| 377 | struct i2c_client *client = to_i2c_client(dev); |
| 378 | int flags = 0, autocalibration; |
| 379 | |
| 380 | flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC); |
| 381 | if (flags < 0) |
| 382 | return flags; |
| 383 | |
| 384 | if (flags & ABX8XX_OSC_ACAL_512) |
| 385 | autocalibration = 512; |
| 386 | else if (flags & ABX8XX_OSC_ACAL_1024) |
| 387 | autocalibration = 1024; |
| 388 | else |
| 389 | autocalibration = 0; |
| 390 | |
| 391 | return autocalibration; |
| 392 | } |
| 393 | |
| 394 | static ssize_t autocalibration_store(struct device *dev, |
| 395 | struct device_attribute *attr, |
| 396 | const char *buf, size_t count) |
| 397 | { |
| 398 | int retval; |
| 399 | unsigned long autocalibration = 0; |
| 400 | |
| 401 | retval = kstrtoul(buf, 10, &autocalibration); |
| 402 | if (retval < 0) { |
| 403 | dev_err(dev, "Failed to store RTC autocalibration attribute\n"); |
| 404 | return -EINVAL; |
| 405 | } |
| 406 | |
Alexandre Belloni | 559e883 | 2019-03-06 10:51:33 +0100 | [diff] [blame] | 407 | retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration); |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 408 | |
| 409 | return retval ? retval : count; |
| 410 | } |
| 411 | |
| 412 | static ssize_t autocalibration_show(struct device *dev, |
| 413 | struct device_attribute *attr, char *buf) |
| 414 | { |
| 415 | int autocalibration = 0; |
| 416 | |
Alexandre Belloni | 559e883 | 2019-03-06 10:51:33 +0100 | [diff] [blame] | 417 | autocalibration = abx80x_rtc_get_autocalibration(dev->parent); |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 418 | if (autocalibration < 0) { |
| 419 | dev_err(dev, "Failed to read RTC autocalibration\n"); |
| 420 | sprintf(buf, "0\n"); |
| 421 | return autocalibration; |
| 422 | } |
| 423 | |
| 424 | return sprintf(buf, "%d\n", autocalibration); |
| 425 | } |
| 426 | |
| 427 | static DEVICE_ATTR_RW(autocalibration); |
| 428 | |
| 429 | static ssize_t oscillator_store(struct device *dev, |
| 430 | struct device_attribute *attr, |
| 431 | const char *buf, size_t count) |
| 432 | { |
Alexandre Belloni | 559e883 | 2019-03-06 10:51:33 +0100 | [diff] [blame] | 433 | struct i2c_client *client = to_i2c_client(dev->parent); |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 434 | int retval, flags, rc_mode = 0; |
| 435 | |
| 436 | if (strncmp(buf, "rc", 2) == 0) { |
| 437 | rc_mode = 1; |
| 438 | } else if (strncmp(buf, "xtal", 4) == 0) { |
| 439 | rc_mode = 0; |
| 440 | } else { |
| 441 | dev_err(dev, "Oscillator selection value outside permitted ones\n"); |
| 442 | return -EINVAL; |
| 443 | } |
| 444 | |
| 445 | flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC); |
| 446 | if (flags < 0) |
| 447 | return flags; |
| 448 | |
| 449 | if (rc_mode == 0) |
| 450 | flags &= ~(ABX8XX_OSC_OSEL); |
| 451 | else |
| 452 | flags |= (ABX8XX_OSC_OSEL); |
| 453 | |
| 454 | /* Unlock write access on Oscillator Control register */ |
Kevin P. Fleming | 49dfc1f | 2020-06-15 06:51:12 -0400 | [diff] [blame] | 455 | if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0) |
| 456 | return -EIO; |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 457 | |
| 458 | retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags); |
| 459 | if (retval < 0) { |
| 460 | dev_err(dev, "Failed to write Oscillator Control register\n"); |
| 461 | return retval; |
| 462 | } |
| 463 | |
| 464 | return retval ? retval : count; |
| 465 | } |
| 466 | |
| 467 | static ssize_t oscillator_show(struct device *dev, |
| 468 | struct device_attribute *attr, char *buf) |
| 469 | { |
| 470 | int rc_mode = 0; |
Alexandre Belloni | 559e883 | 2019-03-06 10:51:33 +0100 | [diff] [blame] | 471 | struct i2c_client *client = to_i2c_client(dev->parent); |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 472 | |
| 473 | rc_mode = abx80x_is_rc_mode(client); |
| 474 | |
| 475 | if (rc_mode < 0) { |
| 476 | dev_err(dev, "Failed to read RTC oscillator selection\n"); |
| 477 | sprintf(buf, "\n"); |
| 478 | return rc_mode; |
| 479 | } |
| 480 | |
| 481 | if (rc_mode) |
| 482 | return sprintf(buf, "rc\n"); |
| 483 | else |
| 484 | return sprintf(buf, "xtal\n"); |
| 485 | } |
| 486 | |
| 487 | static DEVICE_ATTR_RW(oscillator); |
| 488 | |
| 489 | static struct attribute *rtc_calib_attrs[] = { |
| 490 | &dev_attr_autocalibration.attr, |
| 491 | &dev_attr_oscillator.attr, |
| 492 | NULL, |
| 493 | }; |
| 494 | |
| 495 | static const struct attribute_group rtc_calib_attr_group = { |
| 496 | .attrs = rtc_calib_attrs, |
| 497 | }; |
| 498 | |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 499 | static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 500 | { |
| 501 | struct i2c_client *client = to_i2c_client(dev); |
| 502 | int err; |
| 503 | |
| 504 | if (enabled) |
| 505 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, |
| 506 | (ABX8XX_IRQ_IM_1_4 | |
| 507 | ABX8XX_IRQ_AIE)); |
| 508 | else |
| 509 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, |
| 510 | ABX8XX_IRQ_IM_1_4); |
| 511 | return err; |
| 512 | } |
| 513 | |
Marek Vasut | ffe1c5a | 2018-12-07 18:40:53 +0100 | [diff] [blame] | 514 | static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
| 515 | { |
| 516 | struct i2c_client *client = to_i2c_client(dev); |
| 517 | int status, tmp; |
| 518 | |
| 519 | switch (cmd) { |
| 520 | case RTC_VL_READ: |
| 521 | status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); |
| 522 | if (status < 0) |
| 523 | return status; |
| 524 | |
Alexandre Belloni | 9f05342 | 2019-12-14 23:02:45 +0100 | [diff] [blame] | 525 | tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0; |
Marek Vasut | ffe1c5a | 2018-12-07 18:40:53 +0100 | [diff] [blame] | 526 | |
Alexandre Belloni | 9f05342 | 2019-12-14 23:02:45 +0100 | [diff] [blame] | 527 | return put_user(tmp, (unsigned int __user *)arg); |
Marek Vasut | ffe1c5a | 2018-12-07 18:40:53 +0100 | [diff] [blame] | 528 | |
| 529 | case RTC_VL_CLR: |
| 530 | status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); |
| 531 | if (status < 0) |
| 532 | return status; |
| 533 | |
| 534 | status &= ~ABX8XX_STATUS_BLF; |
| 535 | |
| 536 | tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0); |
| 537 | if (tmp < 0) |
| 538 | return tmp; |
| 539 | |
| 540 | return 0; |
| 541 | |
| 542 | default: |
| 543 | return -ENOIOCTLCMD; |
| 544 | } |
| 545 | } |
| 546 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 547 | static const struct rtc_class_ops abx80x_rtc_ops = { |
| 548 | .read_time = abx80x_rtc_read_time, |
| 549 | .set_time = abx80x_rtc_set_time, |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 550 | .read_alarm = abx80x_read_alarm, |
| 551 | .set_alarm = abx80x_set_alarm, |
| 552 | .alarm_irq_enable = abx80x_alarm_irq_enable, |
Marek Vasut | ffe1c5a | 2018-12-07 18:40:53 +0100 | [diff] [blame] | 553 | .ioctl = abx80x_ioctl, |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 554 | }; |
| 555 | |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 556 | static int abx80x_dt_trickle_cfg(struct i2c_client *client) |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 557 | { |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 558 | struct device_node *np = client->dev.of_node; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 559 | const char *diode; |
| 560 | int trickle_cfg = 0; |
| 561 | int i, ret; |
| 562 | u32 tmp; |
| 563 | |
| 564 | ret = of_property_read_string(np, "abracon,tc-diode", &diode); |
| 565 | if (ret) |
| 566 | return ret; |
| 567 | |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 568 | if (!strcmp(diode, "standard")) { |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 569 | trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE; |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 570 | } else if (!strcmp(diode, "schottky")) { |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 571 | trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE; |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 572 | } else { |
| 573 | dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode); |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 574 | return -EINVAL; |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 575 | } |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 576 | |
| 577 | ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp); |
| 578 | if (ret) |
| 579 | return ret; |
| 580 | |
| 581 | for (i = 0; i < sizeof(trickle_resistors); i++) |
| 582 | if (trickle_resistors[i] == tmp) |
| 583 | break; |
| 584 | |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 585 | if (i == sizeof(trickle_resistors)) { |
| 586 | dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp); |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 587 | return -EINVAL; |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 588 | } |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 589 | |
| 590 | return (trickle_cfg | i); |
| 591 | } |
| 592 | |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 593 | #ifdef CONFIG_WATCHDOG |
| 594 | |
| 595 | static inline u8 timeout_bits(unsigned int timeout) |
| 596 | { |
| 597 | return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) | |
| 598 | ABX8XX_WDT_WRB_1HZ; |
| 599 | } |
| 600 | |
| 601 | static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog, |
| 602 | unsigned int timeout) |
| 603 | { |
| 604 | struct abx80x_priv *priv = watchdog_get_drvdata(wdog); |
| 605 | u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout); |
| 606 | |
| 607 | /* |
| 608 | * Writing any timeout to the WDT register resets the watchdog timer. |
| 609 | * Writing 0 disables it. |
| 610 | */ |
| 611 | return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val); |
| 612 | } |
| 613 | |
| 614 | static int abx80x_wdog_set_timeout(struct watchdog_device *wdog, |
| 615 | unsigned int new_timeout) |
| 616 | { |
| 617 | int err = 0; |
| 618 | |
| 619 | if (watchdog_hw_running(wdog)) |
| 620 | err = __abx80x_wdog_set_timeout(wdog, new_timeout); |
| 621 | |
| 622 | if (err == 0) |
| 623 | wdog->timeout = new_timeout; |
| 624 | |
| 625 | return err; |
| 626 | } |
| 627 | |
| 628 | static int abx80x_wdog_ping(struct watchdog_device *wdog) |
| 629 | { |
| 630 | return __abx80x_wdog_set_timeout(wdog, wdog->timeout); |
| 631 | } |
| 632 | |
| 633 | static int abx80x_wdog_start(struct watchdog_device *wdog) |
| 634 | { |
| 635 | return __abx80x_wdog_set_timeout(wdog, wdog->timeout); |
| 636 | } |
| 637 | |
| 638 | static int abx80x_wdog_stop(struct watchdog_device *wdog) |
| 639 | { |
| 640 | return __abx80x_wdog_set_timeout(wdog, 0); |
| 641 | } |
| 642 | |
| 643 | static const struct watchdog_info abx80x_wdog_info = { |
| 644 | .identity = "abx80x watchdog", |
| 645 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, |
| 646 | }; |
| 647 | |
| 648 | static const struct watchdog_ops abx80x_wdog_ops = { |
| 649 | .owner = THIS_MODULE, |
| 650 | .start = abx80x_wdog_start, |
| 651 | .stop = abx80x_wdog_stop, |
| 652 | .ping = abx80x_wdog_ping, |
| 653 | .set_timeout = abx80x_wdog_set_timeout, |
| 654 | }; |
| 655 | |
| 656 | static int abx80x_setup_watchdog(struct abx80x_priv *priv) |
| 657 | { |
| 658 | priv->wdog.parent = &priv->client->dev; |
| 659 | priv->wdog.ops = &abx80x_wdog_ops; |
| 660 | priv->wdog.info = &abx80x_wdog_info; |
| 661 | priv->wdog.min_timeout = 1; |
| 662 | priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME; |
| 663 | priv->wdog.timeout = ABX8XX_WDT_MAX_TIME; |
| 664 | |
| 665 | watchdog_set_drvdata(&priv->wdog, priv); |
| 666 | |
| 667 | return devm_watchdog_register_device(&priv->client->dev, &priv->wdog); |
| 668 | } |
| 669 | #else |
| 670 | static int abx80x_setup_watchdog(struct abx80x_priv *priv) |
| 671 | { |
| 672 | return 0; |
| 673 | } |
| 674 | #endif |
| 675 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 676 | static int abx80x_probe(struct i2c_client *client, |
| 677 | const struct i2c_device_id *id) |
| 678 | { |
| 679 | struct device_node *np = client->dev.of_node; |
Jeremy Gebben | af69f9a | 2018-09-11 11:28:25 -0600 | [diff] [blame] | 680 | struct abx80x_priv *priv; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 681 | int i, data, err, trickle_cfg = -EINVAL; |
| 682 | char buf[7]; |
| 683 | unsigned int part = id->driver_data; |
| 684 | unsigned int partnumber; |
| 685 | unsigned int majrev, minrev; |
| 686 | unsigned int lot; |
| 687 | unsigned int wafer; |
| 688 | unsigned int uid; |
| 689 | |
| 690 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) |
| 691 | return -ENODEV; |
| 692 | |
| 693 | err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0, |
| 694 | sizeof(buf), buf); |
| 695 | if (err < 0) { |
| 696 | dev_err(&client->dev, "Unable to read partnumber\n"); |
| 697 | return -EIO; |
| 698 | } |
| 699 | |
| 700 | partnumber = (buf[0] << 8) | buf[1]; |
| 701 | majrev = buf[2] >> 3; |
| 702 | minrev = buf[2] & 0x7; |
| 703 | lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3]; |
| 704 | uid = ((buf[4] & 0x7f) << 8) | buf[5]; |
| 705 | wafer = (buf[6] & 0x7c) >> 2; |
| 706 | dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n", |
| 707 | partnumber, majrev, minrev, lot, wafer, uid); |
| 708 | |
| 709 | data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1); |
| 710 | if (data < 0) { |
| 711 | dev_err(&client->dev, "Unable to read control register\n"); |
| 712 | return -EIO; |
| 713 | } |
| 714 | |
| 715 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1, |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 716 | ((data & ~(ABX8XX_CTRL_12_24 | |
| 717 | ABX8XX_CTRL_ARST)) | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 718 | ABX8XX_CTRL_WRITE)); |
| 719 | if (err < 0) { |
| 720 | dev_err(&client->dev, "Unable to write control register\n"); |
| 721 | return -EIO; |
| 722 | } |
| 723 | |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 724 | /* Configure RV1805 specifics */ |
| 725 | if (part == RV1805) { |
| 726 | /* |
| 727 | * Avoid accidentally entering test mode. This can happen |
| 728 | * on the RV1805 in case the reserved bit 5 in control2 |
| 729 | * register is set. RV-1805-C3 datasheet indicates that |
| 730 | * the bit should be cleared in section 11h - Control2. |
| 731 | */ |
| 732 | data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2); |
| 733 | if (data < 0) { |
| 734 | dev_err(&client->dev, |
| 735 | "Unable to read control2 register\n"); |
| 736 | return -EIO; |
| 737 | } |
| 738 | |
| 739 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2, |
| 740 | data & ~ABX8XX_CTRL2_RSVD); |
| 741 | if (err < 0) { |
| 742 | dev_err(&client->dev, |
| 743 | "Unable to write control2 register\n"); |
| 744 | return -EIO; |
| 745 | } |
| 746 | |
| 747 | /* |
| 748 | * Avoid extra power leakage. The RV1805 uses smaller |
| 749 | * 10pin package and the EXTI input is not present. |
| 750 | * Disable it to avoid leakage. |
| 751 | */ |
| 752 | data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL); |
| 753 | if (data < 0) { |
| 754 | dev_err(&client->dev, |
| 755 | "Unable to read output control register\n"); |
| 756 | return -EIO; |
| 757 | } |
| 758 | |
| 759 | /* |
| 760 | * Write the configuration key register to enable access to |
| 761 | * the config2 register |
| 762 | */ |
Kevin P. Fleming | 49dfc1f | 2020-06-15 06:51:12 -0400 | [diff] [blame] | 763 | if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0) |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 764 | return -EIO; |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 765 | |
| 766 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL, |
| 767 | data | ABX8XX_OUT_CTRL_EXDS); |
| 768 | if (err < 0) { |
| 769 | dev_err(&client->dev, |
| 770 | "Unable to write output control register\n"); |
| 771 | return -EIO; |
| 772 | } |
| 773 | } |
| 774 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 775 | /* part autodetection */ |
| 776 | if (part == ABX80X) { |
| 777 | for (i = 0; abx80x_caps[i].pn; i++) |
| 778 | if (partnumber == abx80x_caps[i].pn) |
| 779 | break; |
| 780 | if (abx80x_caps[i].pn == 0) { |
| 781 | dev_err(&client->dev, "Unknown part: %04x\n", |
| 782 | partnumber); |
| 783 | return -EINVAL; |
| 784 | } |
| 785 | part = i; |
| 786 | } |
| 787 | |
| 788 | if (partnumber != abx80x_caps[part].pn) { |
| 789 | dev_err(&client->dev, "partnumber mismatch %04x != %04x\n", |
| 790 | partnumber, abx80x_caps[part].pn); |
| 791 | return -EINVAL; |
| 792 | } |
| 793 | |
| 794 | if (np && abx80x_caps[part].has_tc) |
Kevin P. Fleming | 6e429f6 | 2020-05-30 08:29:56 -0400 | [diff] [blame] | 795 | trickle_cfg = abx80x_dt_trickle_cfg(client); |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 796 | |
| 797 | if (trickle_cfg > 0) { |
| 798 | dev_info(&client->dev, "Enabling trickle charger: %02x\n", |
| 799 | trickle_cfg); |
| 800 | abx80x_enable_trickle_charger(client, trickle_cfg); |
| 801 | } |
| 802 | |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 803 | err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL, |
| 804 | BIT(2)); |
| 805 | if (err) |
| 806 | return err; |
| 807 | |
Jeremy Gebben | af69f9a | 2018-09-11 11:28:25 -0600 | [diff] [blame] | 808 | priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); |
| 809 | if (priv == NULL) |
| 810 | return -ENOMEM; |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 811 | |
Jeremy Gebben | af69f9a | 2018-09-11 11:28:25 -0600 | [diff] [blame] | 812 | priv->rtc = devm_rtc_allocate_device(&client->dev); |
| 813 | if (IS_ERR(priv->rtc)) |
| 814 | return PTR_ERR(priv->rtc); |
Alexandre Belloni | 9360a6a | 2017-10-13 00:04:46 +0200 | [diff] [blame] | 815 | |
Jeremy Gebben | af69f9a | 2018-09-11 11:28:25 -0600 | [diff] [blame] | 816 | priv->rtc->ops = &abx80x_rtc_ops; |
| 817 | priv->client = client; |
| 818 | |
| 819 | i2c_set_clientdata(client, priv); |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 820 | |
Jeremy Gebben | 749e36d | 2018-09-11 11:28:26 -0600 | [diff] [blame] | 821 | if (abx80x_caps[part].has_wdog) { |
| 822 | err = abx80x_setup_watchdog(priv); |
| 823 | if (err) |
| 824 | return err; |
| 825 | } |
| 826 | |
Alexandre Belloni | 718a820 | 2015-12-17 00:36:22 +0100 | [diff] [blame] | 827 | if (client->irq > 0) { |
| 828 | dev_info(&client->dev, "IRQ %d supplied\n", client->irq); |
| 829 | err = devm_request_threaded_irq(&client->dev, client->irq, NULL, |
| 830 | abx80x_handle_irq, |
| 831 | IRQF_SHARED | IRQF_ONESHOT, |
| 832 | "abx8xx", |
| 833 | client); |
| 834 | if (err) { |
| 835 | dev_err(&client->dev, "unable to request IRQ, alarms disabled\n"); |
| 836 | client->irq = 0; |
| 837 | } |
| 838 | } |
| 839 | |
Alexandre Belloni | 559e883 | 2019-03-06 10:51:33 +0100 | [diff] [blame] | 840 | err = rtc_add_group(priv->rtc, &rtc_calib_attr_group); |
Mylène Josserand | 59a8383 | 2016-03-21 18:06:09 +0100 | [diff] [blame] | 841 | if (err) { |
| 842 | dev_err(&client->dev, "Failed to create sysfs group: %d\n", |
| 843 | err); |
| 844 | return err; |
| 845 | } |
| 846 | |
Bartosz Golaszewski | fdcfd85 | 2020-11-09 17:34:08 +0100 | [diff] [blame] | 847 | return devm_rtc_register_device(priv->rtc); |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 848 | } |
| 849 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 850 | static const struct i2c_device_id abx80x_id[] = { |
| 851 | { "abx80x", ABX80X }, |
| 852 | { "ab0801", AB0801 }, |
| 853 | { "ab0803", AB0803 }, |
| 854 | { "ab0804", AB0804 }, |
| 855 | { "ab0805", AB0805 }, |
| 856 | { "ab1801", AB1801 }, |
| 857 | { "ab1803", AB1803 }, |
| 858 | { "ab1804", AB1804 }, |
| 859 | { "ab1805", AB1805 }, |
Marek Vasut | 75455e2 | 2019-01-29 12:40:28 +0100 | [diff] [blame] | 860 | { "rv1805", RV1805 }, |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 861 | { } |
| 862 | }; |
| 863 | MODULE_DEVICE_TABLE(i2c, abx80x_id); |
| 864 | |
Kevin P. Fleming | ac363ac | 2020-05-28 07:46:17 -0400 | [diff] [blame] | 865 | #ifdef CONFIG_OF |
| 866 | static const struct of_device_id abx80x_of_match[] = { |
| 867 | { |
| 868 | .compatible = "abracon,abx80x", |
| 869 | .data = (void *)ABX80X |
| 870 | }, |
| 871 | { |
| 872 | .compatible = "abracon,ab0801", |
| 873 | .data = (void *)AB0801 |
| 874 | }, |
| 875 | { |
| 876 | .compatible = "abracon,ab0803", |
| 877 | .data = (void *)AB0803 |
| 878 | }, |
| 879 | { |
| 880 | .compatible = "abracon,ab0804", |
| 881 | .data = (void *)AB0804 |
| 882 | }, |
| 883 | { |
| 884 | .compatible = "abracon,ab0805", |
| 885 | .data = (void *)AB0805 |
| 886 | }, |
| 887 | { |
| 888 | .compatible = "abracon,ab1801", |
| 889 | .data = (void *)AB1801 |
| 890 | }, |
| 891 | { |
| 892 | .compatible = "abracon,ab1803", |
| 893 | .data = (void *)AB1803 |
| 894 | }, |
| 895 | { |
| 896 | .compatible = "abracon,ab1804", |
| 897 | .data = (void *)AB1804 |
| 898 | }, |
| 899 | { |
| 900 | .compatible = "abracon,ab1805", |
| 901 | .data = (void *)AB1805 |
| 902 | }, |
| 903 | { |
| 904 | .compatible = "microcrystal,rv1805", |
| 905 | .data = (void *)RV1805 |
| 906 | }, |
| 907 | { } |
| 908 | }; |
| 909 | MODULE_DEVICE_TABLE(of, abx80x_of_match); |
| 910 | #endif |
| 911 | |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 912 | static struct i2c_driver abx80x_driver = { |
| 913 | .driver = { |
| 914 | .name = "rtc-abx80x", |
Kevin P. Fleming | ac363ac | 2020-05-28 07:46:17 -0400 | [diff] [blame] | 915 | .of_match_table = of_match_ptr(abx80x_of_match), |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 916 | }, |
| 917 | .probe = abx80x_probe, |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 918 | .id_table = abx80x_id, |
| 919 | }; |
| 920 | |
| 921 | module_i2c_driver(abx80x_driver); |
| 922 | |
| 923 | MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>"); |
Alexandre Belloni | 7d1e5bf | 2019-03-04 20:17:38 +0100 | [diff] [blame] | 924 | MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); |
Philippe De Muyter | 4d61ff6 | 2015-05-05 16:23:44 -0700 | [diff] [blame] | 925 | MODULE_DESCRIPTION("Abracon ABX80X RTC driver"); |
| 926 | MODULE_LICENSE("GPL v2"); |