blob: 67bf3b8cfe650894cd1986db6b17f41d2140106b [file] [log] [blame]
Alexandre Belloni2fcdf5f2019-03-06 10:51:32 +01001// SPDX-License-Identifier: GPL-2.0
Philippe De Muyter4d61ff62015-05-05 16:23:44 -07002/*
3 * A driver for the I2C members of the Abracon AB x8xx RTC family,
4 * and compatible: AB 1805 and AB 0805
5 *
6 * Copyright 2014-2015 Macq S.A.
7 *
8 * Author: Philippe De Muyter <phdm@macqel.be>
Alexandre Belloni7d1e5bf2019-03-04 20:17:38 +01009 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070010 *
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070011 */
12
13#include <linux/bcd.h>
14#include <linux/i2c.h>
15#include <linux/module.h>
Kevin P. Flemingac363ac2020-05-28 07:46:17 -040016#include <linux/of_device.h>
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070017#include <linux/rtc.h>
Jeremy Gebben749e36d2018-09-11 11:28:26 -060018#include <linux/watchdog.h>
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070019
20#define ABX8XX_REG_HTH 0x00
21#define ABX8XX_REG_SC 0x01
22#define ABX8XX_REG_MN 0x02
23#define ABX8XX_REG_HR 0x03
24#define ABX8XX_REG_DA 0x04
25#define ABX8XX_REG_MO 0x05
26#define ABX8XX_REG_YR 0x06
27#define ABX8XX_REG_WD 0x07
28
Alexandre Belloni718a8202015-12-17 00:36:22 +010029#define ABX8XX_REG_AHTH 0x08
30#define ABX8XX_REG_ASC 0x09
31#define ABX8XX_REG_AMN 0x0a
32#define ABX8XX_REG_AHR 0x0b
33#define ABX8XX_REG_ADA 0x0c
34#define ABX8XX_REG_AMO 0x0d
35#define ABX8XX_REG_AWD 0x0e
36
37#define ABX8XX_REG_STATUS 0x0f
38#define ABX8XX_STATUS_AF BIT(2)
Marek Vasutffe1c5a2018-12-07 18:40:53 +010039#define ABX8XX_STATUS_BLF BIT(4)
Jeremy Gebben749e36d2018-09-11 11:28:26 -060040#define ABX8XX_STATUS_WDT BIT(6)
Alexandre Belloni718a8202015-12-17 00:36:22 +010041
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070042#define ABX8XX_REG_CTRL1 0x10
Mitja Spes5f1b2f72015-09-02 10:02:29 +020043#define ABX8XX_CTRL_WRITE BIT(0)
Alexandre Belloni718a8202015-12-17 00:36:22 +010044#define ABX8XX_CTRL_ARST BIT(2)
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070045#define ABX8XX_CTRL_12_24 BIT(6)
46
Marek Vasut75455e22019-01-29 12:40:28 +010047#define ABX8XX_REG_CTRL2 0x11
48#define ABX8XX_CTRL2_RSVD BIT(5)
49
Alexandre Belloni718a8202015-12-17 00:36:22 +010050#define ABX8XX_REG_IRQ 0x12
51#define ABX8XX_IRQ_AIE BIT(2)
52#define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
53
54#define ABX8XX_REG_CD_TIMER_CTL 0x18
55
Mylène Josserand59a83832016-03-21 18:06:09 +010056#define ABX8XX_REG_OSC 0x1c
57#define ABX8XX_OSC_FOS BIT(3)
58#define ABX8XX_OSC_BOS BIT(4)
59#define ABX8XX_OSC_ACAL_512 BIT(5)
60#define ABX8XX_OSC_ACAL_1024 BIT(6)
61
62#define ABX8XX_OSC_OSEL BIT(7)
63
64#define ABX8XX_REG_OSS 0x1d
Mylène Josserandee087742016-03-21 18:06:10 +010065#define ABX8XX_OSS_OF BIT(1)
Mylène Josserand59a83832016-03-21 18:06:09 +010066#define ABX8XX_OSS_OMODE BIT(4)
67
Jeremy Gebben749e36d2018-09-11 11:28:26 -060068#define ABX8XX_REG_WDT 0x1b
69#define ABX8XX_WDT_WDS BIT(7)
70#define ABX8XX_WDT_BMB_MASK 0x7c
71#define ABX8XX_WDT_BMB_SHIFT 2
72#define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
73#define ABX8XX_WDT_WRB_MASK 0x03
74#define ABX8XX_WDT_WRB_1HZ 0x02
75
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070076#define ABX8XX_REG_CFG_KEY 0x1f
Mylène Josserand59a83832016-03-21 18:06:09 +010077#define ABX8XX_CFG_KEY_OSC 0xa1
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070078#define ABX8XX_CFG_KEY_MISC 0x9d
79
80#define ABX8XX_REG_ID0 0x28
81
Marek Vasut75455e22019-01-29 12:40:28 +010082#define ABX8XX_REG_OUT_CTRL 0x30
83#define ABX8XX_OUT_CTRL_EXDS BIT(4)
84
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070085#define ABX8XX_REG_TRICKLE 0x20
86#define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
87#define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
88#define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
89
90static u8 trickle_resistors[] = {0, 3, 6, 11};
91
92enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
Marek Vasut75455e22019-01-29 12:40:28 +010093 AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070094
95struct abx80x_cap {
96 u16 pn;
97 bool has_tc;
Jeremy Gebben749e36d2018-09-11 11:28:26 -060098 bool has_wdog;
Philippe De Muyter4d61ff62015-05-05 16:23:44 -070099};
100
101static struct abx80x_cap abx80x_caps[] = {
102 [AB0801] = {.pn = 0x0801},
103 [AB0803] = {.pn = 0x0803},
Jeremy Gebben749e36d2018-09-11 11:28:26 -0600104 [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
105 [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700106 [AB1801] = {.pn = 0x1801},
107 [AB1803] = {.pn = 0x1803},
Jeremy Gebben749e36d2018-09-11 11:28:26 -0600108 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
109 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
Marek Vasut75455e22019-01-29 12:40:28 +0100110 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700111 [ABX80X] = {.pn = 0}
112};
113
Jeremy Gebbenaf69f9a2018-09-11 11:28:25 -0600114struct abx80x_priv {
115 struct rtc_device *rtc;
116 struct i2c_client *client;
Jeremy Gebben749e36d2018-09-11 11:28:26 -0600117 struct watchdog_device wdog;
Jeremy Gebbenaf69f9a2018-09-11 11:28:25 -0600118};
119
Mylène Josserand59a83832016-03-21 18:06:09 +0100120static int abx80x_is_rc_mode(struct i2c_client *client)
121{
122 int flags = 0;
123
124 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
125 if (flags < 0) {
126 dev_err(&client->dev,
127 "Failed to read autocalibration attribute\n");
128 return flags;
129 }
130
131 return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
132}
133
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700134static int abx80x_enable_trickle_charger(struct i2c_client *client,
135 u8 trickle_cfg)
136{
137 int err;
138
139 /*
140 * Write the configuration key register to enable access to the Trickle
141 * register
142 */
143 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
144 ABX8XX_CFG_KEY_MISC);
145 if (err < 0) {
146 dev_err(&client->dev, "Unable to write configuration key\n");
147 return -EIO;
148 }
149
150 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE,
151 ABX8XX_TRICKLE_CHARGE_ENABLE |
152 trickle_cfg);
153 if (err < 0) {
154 dev_err(&client->dev, "Unable to write trickle register\n");
155 return -EIO;
156 }
157
158 return 0;
159}
160
161static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
162{
163 struct i2c_client *client = to_i2c_client(dev);
164 unsigned char buf[8];
Mylène Josserandee087742016-03-21 18:06:10 +0100165 int err, flags, rc_mode = 0;
166
167 /* Read the Oscillator Failure only in XT mode */
168 rc_mode = abx80x_is_rc_mode(client);
169 if (rc_mode < 0)
170 return rc_mode;
171
172 if (!rc_mode) {
173 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
174 if (flags < 0)
175 return flags;
176
177 if (flags & ABX8XX_OSS_OF) {
178 dev_err(dev, "Oscillator failure, data is invalid.\n");
179 return -EINVAL;
180 }
181 }
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700182
183 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH,
184 sizeof(buf), buf);
185 if (err < 0) {
186 dev_err(&client->dev, "Unable to read date\n");
187 return -EIO;
188 }
189
190 tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
191 tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
192 tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
193 tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
194 tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
195 tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1;
196 tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100;
197
Alexandre Bellonifbfd36f2018-02-20 23:42:27 +0100198 return 0;
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700199}
200
201static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
202{
203 struct i2c_client *client = to_i2c_client(dev);
204 unsigned char buf[8];
Mylène Josserandee087742016-03-21 18:06:10 +0100205 int err, flags;
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700206
207 if (tm->tm_year < 100)
208 return -EINVAL;
209
210 buf[ABX8XX_REG_HTH] = 0;
211 buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
212 buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
213 buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
214 buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
215 buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1);
216 buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100);
217 buf[ABX8XX_REG_WD] = tm->tm_wday;
218
219 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH,
220 sizeof(buf), buf);
221 if (err < 0) {
222 dev_err(&client->dev, "Unable to write to date registers\n");
223 return -EIO;
224 }
225
Mylène Josserandee087742016-03-21 18:06:10 +0100226 /* Clear the OF bit of Oscillator Status Register */
227 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
228 if (flags < 0)
229 return flags;
230
231 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS,
232 flags & ~ABX8XX_OSS_OF);
233 if (err < 0) {
234 dev_err(&client->dev, "Unable to write oscillator status register\n");
235 return err;
236 }
237
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700238 return 0;
239}
240
Alexandre Belloni718a8202015-12-17 00:36:22 +0100241static irqreturn_t abx80x_handle_irq(int irq, void *dev_id)
242{
243 struct i2c_client *client = dev_id;
Jeremy Gebbenaf69f9a2018-09-11 11:28:25 -0600244 struct abx80x_priv *priv = i2c_get_clientdata(client);
245 struct rtc_device *rtc = priv->rtc;
Alexandre Belloni718a8202015-12-17 00:36:22 +0100246 int status;
247
248 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
249 if (status < 0)
250 return IRQ_NONE;
251
252 if (status & ABX8XX_STATUS_AF)
253 rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
254
Jeremy Gebben749e36d2018-09-11 11:28:26 -0600255 /*
256 * It is unclear if we'll get an interrupt before the external
257 * reset kicks in.
258 */
259 if (status & ABX8XX_STATUS_WDT)
260 dev_alert(&client->dev, "watchdog timeout interrupt.\n");
261
Alexandre Belloni718a8202015-12-17 00:36:22 +0100262 i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
263
264 return IRQ_HANDLED;
265}
266
267static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t)
268{
269 struct i2c_client *client = to_i2c_client(dev);
270 unsigned char buf[7];
271
272 int irq_mask, err;
273
274 if (client->irq <= 0)
275 return -EINVAL;
276
277 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC,
278 sizeof(buf), buf);
279 if (err)
280 return err;
281
282 irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ);
283 if (irq_mask < 0)
284 return irq_mask;
285
286 t->time.tm_sec = bcd2bin(buf[0] & 0x7F);
287 t->time.tm_min = bcd2bin(buf[1] & 0x7F);
288 t->time.tm_hour = bcd2bin(buf[2] & 0x3F);
289 t->time.tm_mday = bcd2bin(buf[3] & 0x3F);
290 t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1;
291 t->time.tm_wday = buf[5] & 0x7;
292
293 t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE);
294 t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled;
295
296 return err;
297}
298
299static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t)
300{
301 struct i2c_client *client = to_i2c_client(dev);
302 u8 alarm[6];
303 int err;
304
305 if (client->irq <= 0)
306 return -EINVAL;
307
308 alarm[0] = 0x0;
309 alarm[1] = bin2bcd(t->time.tm_sec);
310 alarm[2] = bin2bcd(t->time.tm_min);
311 alarm[3] = bin2bcd(t->time.tm_hour);
312 alarm[4] = bin2bcd(t->time.tm_mday);
313 alarm[5] = bin2bcd(t->time.tm_mon + 1);
314
315 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH,
316 sizeof(alarm), alarm);
317 if (err < 0) {
318 dev_err(&client->dev, "Unable to write alarm registers\n");
319 return -EIO;
320 }
321
322 if (t->enabled) {
323 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
324 (ABX8XX_IRQ_IM_1_4 |
325 ABX8XX_IRQ_AIE));
326 if (err)
327 return err;
328 }
329
330 return 0;
331}
332
Mylène Josserand59a83832016-03-21 18:06:09 +0100333static int abx80x_rtc_set_autocalibration(struct device *dev,
334 int autocalibration)
335{
336 struct i2c_client *client = to_i2c_client(dev);
337 int retval, flags = 0;
338
339 if ((autocalibration != 0) && (autocalibration != 1024) &&
340 (autocalibration != 512)) {
341 dev_err(dev, "autocalibration value outside permitted range\n");
342 return -EINVAL;
343 }
344
345 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
346 if (flags < 0)
347 return flags;
348
349 if (autocalibration == 0) {
350 flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
351 } else if (autocalibration == 1024) {
352 /* 1024 autocalibration is 0x10 */
353 flags |= ABX8XX_OSC_ACAL_1024;
354 flags &= ~(ABX8XX_OSC_ACAL_512);
355 } else {
356 /* 512 autocalibration is 0x11 */
357 flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
358 }
359
360 /* Unlock write access to Oscillator Control Register */
361 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
362 ABX8XX_CFG_KEY_OSC);
363 if (retval < 0) {
364 dev_err(dev, "Failed to write CONFIG_KEY register\n");
365 return retval;
366 }
367
368 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
369
370 return retval;
371}
372
373static int abx80x_rtc_get_autocalibration(struct device *dev)
374{
375 struct i2c_client *client = to_i2c_client(dev);
376 int flags = 0, autocalibration;
377
378 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
379 if (flags < 0)
380 return flags;
381
382 if (flags & ABX8XX_OSC_ACAL_512)
383 autocalibration = 512;
384 else if (flags & ABX8XX_OSC_ACAL_1024)
385 autocalibration = 1024;
386 else
387 autocalibration = 0;
388
389 return autocalibration;
390}
391
392static ssize_t autocalibration_store(struct device *dev,
393 struct device_attribute *attr,
394 const char *buf, size_t count)
395{
396 int retval;
397 unsigned long autocalibration = 0;
398
399 retval = kstrtoul(buf, 10, &autocalibration);
400 if (retval < 0) {
401 dev_err(dev, "Failed to store RTC autocalibration attribute\n");
402 return -EINVAL;
403 }
404
Alexandre Belloni559e8832019-03-06 10:51:33 +0100405 retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration);
Mylène Josserand59a83832016-03-21 18:06:09 +0100406
407 return retval ? retval : count;
408}
409
410static ssize_t autocalibration_show(struct device *dev,
411 struct device_attribute *attr, char *buf)
412{
413 int autocalibration = 0;
414
Alexandre Belloni559e8832019-03-06 10:51:33 +0100415 autocalibration = abx80x_rtc_get_autocalibration(dev->parent);
Mylène Josserand59a83832016-03-21 18:06:09 +0100416 if (autocalibration < 0) {
417 dev_err(dev, "Failed to read RTC autocalibration\n");
418 sprintf(buf, "0\n");
419 return autocalibration;
420 }
421
422 return sprintf(buf, "%d\n", autocalibration);
423}
424
425static DEVICE_ATTR_RW(autocalibration);
426
427static ssize_t oscillator_store(struct device *dev,
428 struct device_attribute *attr,
429 const char *buf, size_t count)
430{
Alexandre Belloni559e8832019-03-06 10:51:33 +0100431 struct i2c_client *client = to_i2c_client(dev->parent);
Mylène Josserand59a83832016-03-21 18:06:09 +0100432 int retval, flags, rc_mode = 0;
433
434 if (strncmp(buf, "rc", 2) == 0) {
435 rc_mode = 1;
436 } else if (strncmp(buf, "xtal", 4) == 0) {
437 rc_mode = 0;
438 } else {
439 dev_err(dev, "Oscillator selection value outside permitted ones\n");
440 return -EINVAL;
441 }
442
443 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
444 if (flags < 0)
445 return flags;
446
447 if (rc_mode == 0)
448 flags &= ~(ABX8XX_OSC_OSEL);
449 else
450 flags |= (ABX8XX_OSC_OSEL);
451
452 /* Unlock write access on Oscillator Control register */
453 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
454 ABX8XX_CFG_KEY_OSC);
455 if (retval < 0) {
456 dev_err(dev, "Failed to write CONFIG_KEY register\n");
457 return retval;
458 }
459
460 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
461 if (retval < 0) {
462 dev_err(dev, "Failed to write Oscillator Control register\n");
463 return retval;
464 }
465
466 return retval ? retval : count;
467}
468
469static ssize_t oscillator_show(struct device *dev,
470 struct device_attribute *attr, char *buf)
471{
472 int rc_mode = 0;
Alexandre Belloni559e8832019-03-06 10:51:33 +0100473 struct i2c_client *client = to_i2c_client(dev->parent);
Mylène Josserand59a83832016-03-21 18:06:09 +0100474
475 rc_mode = abx80x_is_rc_mode(client);
476
477 if (rc_mode < 0) {
478 dev_err(dev, "Failed to read RTC oscillator selection\n");
479 sprintf(buf, "\n");
480 return rc_mode;
481 }
482
483 if (rc_mode)
484 return sprintf(buf, "rc\n");
485 else
486 return sprintf(buf, "xtal\n");
487}
488
489static DEVICE_ATTR_RW(oscillator);
490
491static struct attribute *rtc_calib_attrs[] = {
492 &dev_attr_autocalibration.attr,
493 &dev_attr_oscillator.attr,
494 NULL,
495};
496
497static const struct attribute_group rtc_calib_attr_group = {
498 .attrs = rtc_calib_attrs,
499};
500
Alexandre Belloni718a8202015-12-17 00:36:22 +0100501static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled)
502{
503 struct i2c_client *client = to_i2c_client(dev);
504 int err;
505
506 if (enabled)
507 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
508 (ABX8XX_IRQ_IM_1_4 |
509 ABX8XX_IRQ_AIE));
510 else
511 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
512 ABX8XX_IRQ_IM_1_4);
513 return err;
514}
515
Marek Vasutffe1c5a2018-12-07 18:40:53 +0100516static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
517{
518 struct i2c_client *client = to_i2c_client(dev);
519 int status, tmp;
520
521 switch (cmd) {
522 case RTC_VL_READ:
523 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
524 if (status < 0)
525 return status;
526
Alexandre Belloni9f053422019-12-14 23:02:45 +0100527 tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0;
Marek Vasutffe1c5a2018-12-07 18:40:53 +0100528
Alexandre Belloni9f053422019-12-14 23:02:45 +0100529 return put_user(tmp, (unsigned int __user *)arg);
Marek Vasutffe1c5a2018-12-07 18:40:53 +0100530
531 case RTC_VL_CLR:
532 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
533 if (status < 0)
534 return status;
535
536 status &= ~ABX8XX_STATUS_BLF;
537
538 tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
539 if (tmp < 0)
540 return tmp;
541
542 return 0;
543
544 default:
545 return -ENOIOCTLCMD;
546 }
547}
548
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700549static const struct rtc_class_ops abx80x_rtc_ops = {
550 .read_time = abx80x_rtc_read_time,
551 .set_time = abx80x_rtc_set_time,
Alexandre Belloni718a8202015-12-17 00:36:22 +0100552 .read_alarm = abx80x_read_alarm,
553 .set_alarm = abx80x_set_alarm,
554 .alarm_irq_enable = abx80x_alarm_irq_enable,
Marek Vasutffe1c5a2018-12-07 18:40:53 +0100555 .ioctl = abx80x_ioctl,
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700556};
557
558static int abx80x_dt_trickle_cfg(struct device_node *np)
559{
560 const char *diode;
561 int trickle_cfg = 0;
562 int i, ret;
563 u32 tmp;
564
565 ret = of_property_read_string(np, "abracon,tc-diode", &diode);
566 if (ret)
567 return ret;
568
569 if (!strcmp(diode, "standard"))
570 trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
571 else if (!strcmp(diode, "schottky"))
572 trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
573 else
574 return -EINVAL;
575
576 ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp);
577 if (ret)
578 return ret;
579
580 for (i = 0; i < sizeof(trickle_resistors); i++)
581 if (trickle_resistors[i] == tmp)
582 break;
583
584 if (i == sizeof(trickle_resistors))
585 return -EINVAL;
586
587 return (trickle_cfg | i);
588}
589
Jeremy Gebben749e36d2018-09-11 11:28:26 -0600590#ifdef CONFIG_WATCHDOG
591
592static inline u8 timeout_bits(unsigned int timeout)
593{
594 return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) |
595 ABX8XX_WDT_WRB_1HZ;
596}
597
598static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog,
599 unsigned int timeout)
600{
601 struct abx80x_priv *priv = watchdog_get_drvdata(wdog);
602 u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout);
603
604 /*
605 * Writing any timeout to the WDT register resets the watchdog timer.
606 * Writing 0 disables it.
607 */
608 return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val);
609}
610
611static int abx80x_wdog_set_timeout(struct watchdog_device *wdog,
612 unsigned int new_timeout)
613{
614 int err = 0;
615
616 if (watchdog_hw_running(wdog))
617 err = __abx80x_wdog_set_timeout(wdog, new_timeout);
618
619 if (err == 0)
620 wdog->timeout = new_timeout;
621
622 return err;
623}
624
625static int abx80x_wdog_ping(struct watchdog_device *wdog)
626{
627 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
628}
629
630static int abx80x_wdog_start(struct watchdog_device *wdog)
631{
632 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
633}
634
635static int abx80x_wdog_stop(struct watchdog_device *wdog)
636{
637 return __abx80x_wdog_set_timeout(wdog, 0);
638}
639
640static const struct watchdog_info abx80x_wdog_info = {
641 .identity = "abx80x watchdog",
642 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
643};
644
645static const struct watchdog_ops abx80x_wdog_ops = {
646 .owner = THIS_MODULE,
647 .start = abx80x_wdog_start,
648 .stop = abx80x_wdog_stop,
649 .ping = abx80x_wdog_ping,
650 .set_timeout = abx80x_wdog_set_timeout,
651};
652
653static int abx80x_setup_watchdog(struct abx80x_priv *priv)
654{
655 priv->wdog.parent = &priv->client->dev;
656 priv->wdog.ops = &abx80x_wdog_ops;
657 priv->wdog.info = &abx80x_wdog_info;
658 priv->wdog.min_timeout = 1;
659 priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME;
660 priv->wdog.timeout = ABX8XX_WDT_MAX_TIME;
661
662 watchdog_set_drvdata(&priv->wdog, priv);
663
664 return devm_watchdog_register_device(&priv->client->dev, &priv->wdog);
665}
666#else
667static int abx80x_setup_watchdog(struct abx80x_priv *priv)
668{
669 return 0;
670}
671#endif
672
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700673static int abx80x_probe(struct i2c_client *client,
674 const struct i2c_device_id *id)
675{
676 struct device_node *np = client->dev.of_node;
Jeremy Gebbenaf69f9a2018-09-11 11:28:25 -0600677 struct abx80x_priv *priv;
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700678 int i, data, err, trickle_cfg = -EINVAL;
679 char buf[7];
680 unsigned int part = id->driver_data;
681 unsigned int partnumber;
682 unsigned int majrev, minrev;
683 unsigned int lot;
684 unsigned int wafer;
685 unsigned int uid;
686
687 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
688 return -ENODEV;
689
690 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0,
691 sizeof(buf), buf);
692 if (err < 0) {
693 dev_err(&client->dev, "Unable to read partnumber\n");
694 return -EIO;
695 }
696
697 partnumber = (buf[0] << 8) | buf[1];
698 majrev = buf[2] >> 3;
699 minrev = buf[2] & 0x7;
700 lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
701 uid = ((buf[4] & 0x7f) << 8) | buf[5];
702 wafer = (buf[6] & 0x7c) >> 2;
703 dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
704 partnumber, majrev, minrev, lot, wafer, uid);
705
706 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1);
707 if (data < 0) {
708 dev_err(&client->dev, "Unable to read control register\n");
709 return -EIO;
710 }
711
712 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1,
Alexandre Belloni718a8202015-12-17 00:36:22 +0100713 ((data & ~(ABX8XX_CTRL_12_24 |
714 ABX8XX_CTRL_ARST)) |
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700715 ABX8XX_CTRL_WRITE));
716 if (err < 0) {
717 dev_err(&client->dev, "Unable to write control register\n");
718 return -EIO;
719 }
720
Marek Vasut75455e22019-01-29 12:40:28 +0100721 /* Configure RV1805 specifics */
722 if (part == RV1805) {
723 /*
724 * Avoid accidentally entering test mode. This can happen
725 * on the RV1805 in case the reserved bit 5 in control2
726 * register is set. RV-1805-C3 datasheet indicates that
727 * the bit should be cleared in section 11h - Control2.
728 */
729 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2);
730 if (data < 0) {
731 dev_err(&client->dev,
732 "Unable to read control2 register\n");
733 return -EIO;
734 }
735
736 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2,
737 data & ~ABX8XX_CTRL2_RSVD);
738 if (err < 0) {
739 dev_err(&client->dev,
740 "Unable to write control2 register\n");
741 return -EIO;
742 }
743
744 /*
745 * Avoid extra power leakage. The RV1805 uses smaller
746 * 10pin package and the EXTI input is not present.
747 * Disable it to avoid leakage.
748 */
749 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL);
750 if (data < 0) {
751 dev_err(&client->dev,
752 "Unable to read output control register\n");
753 return -EIO;
754 }
755
756 /*
757 * Write the configuration key register to enable access to
758 * the config2 register
759 */
760 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
761 ABX8XX_CFG_KEY_MISC);
762 if (err < 0) {
763 dev_err(&client->dev,
764 "Unable to write configuration key\n");
765 return -EIO;
766 }
767
768 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL,
769 data | ABX8XX_OUT_CTRL_EXDS);
770 if (err < 0) {
771 dev_err(&client->dev,
772 "Unable to write output control register\n");
773 return -EIO;
774 }
775 }
776
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700777 /* part autodetection */
778 if (part == ABX80X) {
779 for (i = 0; abx80x_caps[i].pn; i++)
780 if (partnumber == abx80x_caps[i].pn)
781 break;
782 if (abx80x_caps[i].pn == 0) {
783 dev_err(&client->dev, "Unknown part: %04x\n",
784 partnumber);
785 return -EINVAL;
786 }
787 part = i;
788 }
789
790 if (partnumber != abx80x_caps[part].pn) {
791 dev_err(&client->dev, "partnumber mismatch %04x != %04x\n",
792 partnumber, abx80x_caps[part].pn);
793 return -EINVAL;
794 }
795
796 if (np && abx80x_caps[part].has_tc)
797 trickle_cfg = abx80x_dt_trickle_cfg(np);
798
799 if (trickle_cfg > 0) {
800 dev_info(&client->dev, "Enabling trickle charger: %02x\n",
801 trickle_cfg);
802 abx80x_enable_trickle_charger(client, trickle_cfg);
803 }
804
Alexandre Belloni718a8202015-12-17 00:36:22 +0100805 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL,
806 BIT(2));
807 if (err)
808 return err;
809
Jeremy Gebbenaf69f9a2018-09-11 11:28:25 -0600810 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
811 if (priv == NULL)
812 return -ENOMEM;
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700813
Jeremy Gebbenaf69f9a2018-09-11 11:28:25 -0600814 priv->rtc = devm_rtc_allocate_device(&client->dev);
815 if (IS_ERR(priv->rtc))
816 return PTR_ERR(priv->rtc);
Alexandre Belloni9360a6a2017-10-13 00:04:46 +0200817
Jeremy Gebbenaf69f9a2018-09-11 11:28:25 -0600818 priv->rtc->ops = &abx80x_rtc_ops;
819 priv->client = client;
820
821 i2c_set_clientdata(client, priv);
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700822
Jeremy Gebben749e36d2018-09-11 11:28:26 -0600823 if (abx80x_caps[part].has_wdog) {
824 err = abx80x_setup_watchdog(priv);
825 if (err)
826 return err;
827 }
828
Alexandre Belloni718a8202015-12-17 00:36:22 +0100829 if (client->irq > 0) {
830 dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
831 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
832 abx80x_handle_irq,
833 IRQF_SHARED | IRQF_ONESHOT,
834 "abx8xx",
835 client);
836 if (err) {
837 dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
838 client->irq = 0;
839 }
840 }
841
Alexandre Belloni559e8832019-03-06 10:51:33 +0100842 err = rtc_add_group(priv->rtc, &rtc_calib_attr_group);
Mylène Josserand59a83832016-03-21 18:06:09 +0100843 if (err) {
844 dev_err(&client->dev, "Failed to create sysfs group: %d\n",
845 err);
846 return err;
847 }
848
Alexandre Belloni559e8832019-03-06 10:51:33 +0100849 return rtc_register_device(priv->rtc);
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700850}
851
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700852static const struct i2c_device_id abx80x_id[] = {
853 { "abx80x", ABX80X },
854 { "ab0801", AB0801 },
855 { "ab0803", AB0803 },
856 { "ab0804", AB0804 },
857 { "ab0805", AB0805 },
858 { "ab1801", AB1801 },
859 { "ab1803", AB1803 },
860 { "ab1804", AB1804 },
861 { "ab1805", AB1805 },
Marek Vasut75455e22019-01-29 12:40:28 +0100862 { "rv1805", RV1805 },
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700863 { }
864};
865MODULE_DEVICE_TABLE(i2c, abx80x_id);
866
Kevin P. Flemingac363ac2020-05-28 07:46:17 -0400867#ifdef CONFIG_OF
868static const struct of_device_id abx80x_of_match[] = {
869 {
870 .compatible = "abracon,abx80x",
871 .data = (void *)ABX80X
872 },
873 {
874 .compatible = "abracon,ab0801",
875 .data = (void *)AB0801
876 },
877 {
878 .compatible = "abracon,ab0803",
879 .data = (void *)AB0803
880 },
881 {
882 .compatible = "abracon,ab0804",
883 .data = (void *)AB0804
884 },
885 {
886 .compatible = "abracon,ab0805",
887 .data = (void *)AB0805
888 },
889 {
890 .compatible = "abracon,ab1801",
891 .data = (void *)AB1801
892 },
893 {
894 .compatible = "abracon,ab1803",
895 .data = (void *)AB1803
896 },
897 {
898 .compatible = "abracon,ab1804",
899 .data = (void *)AB1804
900 },
901 {
902 .compatible = "abracon,ab1805",
903 .data = (void *)AB1805
904 },
905 {
906 .compatible = "microcrystal,rv1805",
907 .data = (void *)RV1805
908 },
909 { }
910};
911MODULE_DEVICE_TABLE(of, abx80x_of_match);
912#endif
913
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700914static struct i2c_driver abx80x_driver = {
915 .driver = {
916 .name = "rtc-abx80x",
Kevin P. Flemingac363ac2020-05-28 07:46:17 -0400917 .of_match_table = of_match_ptr(abx80x_of_match),
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700918 },
919 .probe = abx80x_probe,
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700920 .id_table = abx80x_id,
921};
922
923module_i2c_driver(abx80x_driver);
924
925MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>");
Alexandre Belloni7d1e5bf2019-03-04 20:17:38 +0100926MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
Philippe De Muyter4d61ff62015-05-05 16:23:44 -0700927MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
928MODULE_LICENSE("GPL v2");