blob: c8cb7528895364f90fb56c6eeffe8ba0730c766f [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002config ARM
3 bool
4 default y
Scott Wood1d8f51d2016-09-22 03:35:18 -05005 select ARCH_CLOCKSOURCE_DATA
Arnd Bergmannec80eb42018-01-16 14:48:14 +01006 select ARCH_DISCARD_MEMBLOCK if !HAVE_ARCH_PFN_VALID && !KEXEC
Vladimir Murzinc7780ab2017-12-18 11:48:42 +01007 select ARCH_HAS_DEBUG_VIRTUAL if MMU
Dan Williams21266be2015-11-19 18:19:29 -08008 select ARCH_HAS_DEVMEM_IS_ALLOWED
Kees Cook2b68f6c2015-04-14 15:48:00 -07009 select ARCH_HAS_ELF_RANDOMIZE
Jinbum Parkee333552018-03-06 01:39:24 +010010 select ARCH_HAS_FORTIFY_SOURCE
Dmitry Vyukov75851722018-06-14 15:27:44 -070011 select ARCH_HAS_KCOV
Will Deacone69244d22018-06-26 15:52:38 +010012 select ARCH_HAS_MEMBARRIER_SYNC_CORE
Laurent Dufour3010a5e2018-06-07 17:06:08 -070013 select ARCH_HAS_PTE_SPECIAL if ARM_LPAE
Christoph Hellwigea8c64a2018-01-10 16:21:13 +010014 select ARCH_HAS_PHYS_TO_DMA
Dmitry Vyukov75851722018-06-14 15:27:44 -070015 select ARCH_HAS_SET_MEMORY
Laura Abbottad21fc42017-02-06 16:31:57 -080016 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
17 select ARCH_HAS_STRICT_MODULE_RWX if MMU
Mark Rutland3d067702012-10-30 12:13:42 +000018 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Russell King171b3f02013-09-12 21:24:42 +010019 select ARCH_HAVE_CUSTOM_GPIO_H
Riku Voipio957e3fa2014-12-12 16:57:44 -080020 select ARCH_HAS_GCOV_PROFILE_ALL
Mark Salterd7018842013-10-07 22:07:58 -040021 select ARCH_MIGHT_HAVE_PC_PARPORT
Christoph Hellwig7c703e52018-11-09 09:51:00 +010022 select ARCH_NO_SG_CHAIN if !ARM_HAS_SG_CHAIN
Laura Abbottad21fc42017-02-06 16:31:57 -080023 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
24 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
Peter Zijlstra4badad32014-06-06 19:53:16 +020025 select ARCH_SUPPORTS_ATOMIC_RMW
Kim Phillips017f1612013-11-06 05:15:24 +010026 select ARCH_USE_BUILTIN_BSWAP
Will Deacon0cbad9c2013-10-09 17:19:22 +010027 select ARCH_USE_CMPXCHG_LOCKREF
Russell Kingb1b3f492012-10-06 17:12:25 +010028 select ARCH_WANT_IPC_PARSE_VERSION
Stephen Boydee951c62012-10-29 19:19:34 +010029 select BUILDTIME_EXTABLE_SORT if MMU
Russell King171b3f02013-09-12 21:24:42 +010030 select CLONE_BACKWARDS
Russell Kingf00790a2018-10-24 10:20:16 +010031 select CPU_PM if SUSPEND || CPU_IDLE
Will Deacondce5c9e2013-12-17 19:50:16 +010032 select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
Christoph Hellwigf0edfea2018-08-24 10:31:08 +020033 select DMA_REMAP if MMU
Borislav Petkovb01aec92015-05-21 19:59:31 +020034 select EDAC_SUPPORT
35 select EDAC_ATOMIC_SCRUB
Laura Abbott36d0fd22014-10-09 15:26:42 -070036 select GENERIC_ALLOCATOR
Juri Lelli2ef7a292017-05-31 17:59:28 +010037 select GENERIC_ARCH_TOPOLOGY if ARM_CPU_TOPOLOGY
Russell Kingf00790a2018-10-24 10:20:16 +010038 select GENERIC_ATOMIC64 if CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI
Russell Kingb1b3f492012-10-06 17:12:25 +010039 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Ard Biesheuvelea2d9a92017-03-19 17:23:31 +010040 select GENERIC_CPU_AUTOPROBE
Ard Biesheuvel29373672015-09-01 08:59:28 +020041 select GENERIC_EARLY_IOREMAP
Russell King171b3f02013-09-12 21:24:42 +010042 select GENERIC_IDLE_POLL_SETUP
Russell Kingb1b3f492012-10-06 17:12:25 +010043 select GENERIC_IRQ_PROBE
44 select GENERIC_IRQ_SHOW
Geert Uytterhoeven7c070052015-04-01 13:37:11 +010045 select GENERIC_IRQ_SHOW_LEVEL
Russell Kingb1b3f492012-10-06 17:12:25 +010046 select GENERIC_PCI_IOMAP
Stephen Boyd38ff87f2013-06-01 23:39:40 -070047 select GENERIC_SCHED_CLOCK
Russell Kingb1b3f492012-10-06 17:12:25 +010048 select GENERIC_SMP_IDLE_THREAD
49 select GENERIC_STRNCPY_FROM_USER
50 select GENERIC_STRNLEN_USER
Marc Zyngiera71b0922014-08-26 11:03:18 +010051 select HANDLE_DOMAIN_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010052 select HARDIRQS_SW_RESEND
Russell Kingf00790a2018-10-24 10:20:16 +010053 select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT
Yalin Wang0b7857d2015-01-16 02:45:55 +010054 select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
Arnd Bergmann437682ee2015-11-19 13:30:42 +010055 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
56 select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
Daniel Cashmane0c25d92016-01-14 15:19:57 -080057 select HAVE_ARCH_MMAP_RND_BITS if MMU
Russell Kingf00790a2018-10-24 10:20:16 +010058 select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
Kees Cook08626a62017-08-16 14:09:13 -070059 select HAVE_ARCH_THREAD_STRUCT_WHITELIST
Wade Farnsworth0693bf62012-04-04 16:19:47 +010060 select HAVE_ARCH_TRACEHOOK
Jens Wiklanderb329f952016-01-04 15:42:55 +010061 select HAVE_ARM_SMCCC if CPU_V7
Shubham Bansal39c13c22017-08-22 12:02:33 +053062 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32
Russell King171b3f02013-09-12 21:24:42 +010063 select HAVE_CONTEXT_TRACKING
Russell Kingb1b3f492012-10-06 17:12:25 +010064 select HAVE_C_RECORDMCOUNT
65 select HAVE_DEBUG_KMEMLEAK
Russell Kingb1b3f492012-10-06 17:12:25 +010066 select HAVE_DMA_CONTIGUOUS if MMU
Russell Kingf00790a2018-10-24 10:20:16 +010067 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
Abel Vesa620176f2017-05-26 21:49:47 +010068 select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
Will Deacondce5c9e2013-12-17 19:50:16 +010069 select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
Jiri Slaby5f56a5d2016-05-20 17:00:16 -070070 select HAVE_EXIT_THREAD
Russell Kingf00790a2018-10-24 10:20:16 +010071 select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
72 select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL
73 select HAVE_FUNCTION_TRACER if !XIP_KERNEL
Emese Revfy6b90bd42016-05-24 00:09:38 +020074 select HAVE_GCC_PLUGINS
Russell Kingb1b3f492012-10-06 17:12:25 +010075 select HAVE_GENERIC_DMA_COHERENT
Russell Kingf00790a2018-10-24 10:20:16 +010076 select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)
Russell Kingb1b3f492012-10-06 17:12:25 +010077 select HAVE_IDE if PCI || ISA || PCMCIA
Russell King87c46b62013-05-04 14:38:59 +010078 select HAVE_IRQ_TIME_ACCOUNTING
Russell Kingb1b3f492012-10-06 17:12:25 +010079 select HAVE_KERNEL_GZIP
Kyungsik Leef9b493a2013-07-08 16:01:48 -070080 select HAVE_KERNEL_LZ4
Russell Kingb1b3f492012-10-06 17:12:25 +010081 select HAVE_KERNEL_LZMA
82 select HAVE_KERNEL_LZO
83 select HAVE_KERNEL_XZ
Arnd Bergmanncb1293e2015-05-26 15:40:44 +010084 select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
Russell Kingf00790a2018-10-24 10:20:16 +010085 select HAVE_KRETPROBES if HAVE_KPROBES
Ard Biesheuvel7d485f62014-11-24 16:54:35 +010086 select HAVE_MOD_ARCH_SPECIFIC
Petr Mladek42a0bb32016-05-20 17:00:33 -070087 select HAVE_NMI
Russell Kingf00790a2018-10-24 10:20:16 +010088 select HAVE_OPROFILE if HAVE_PERF_EVENTS
Wang Nan0dc016d2015-01-09 14:37:36 +080089 select HAVE_OPTPROBES if !THUMB2_KERNEL
Jamie Iles7ada1892010-02-02 20:24:58 +010090 select HAVE_PERF_EVENTS
Will Deacon49863892013-09-26 12:36:35 +010091 select HAVE_PERF_REGS
92 select HAVE_PERF_USER_STACK_DUMP
Russell Kingf00790a2018-10-24 10:20:16 +010093 select HAVE_RCU_TABLE_FREE if SMP && ARM_LPAE
Will Deacone513f8b2010-06-25 12:24:53 +010094 select HAVE_REGS_AND_STACK_ACCESS_API
Mathieu Desnoyers9800b9d2018-06-02 08:43:55 -040095 select HAVE_RSEQ
Masahiro Yamadad148eac2018-06-14 19:36:45 +090096 select HAVE_STACKPROTECTOR
Russell Kingb1b3f492012-10-06 17:12:25 +010097 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinasaf1839e2012-10-08 16:28:08 -070098 select HAVE_UID16
Kevin Hilman31c1fc82013-09-16 15:28:22 -070099 select HAVE_VIRT_CPU_ACCOUNTING_GEN
Thomas Gleixnerda0ec6f2013-08-14 20:43:17 +0100100 select IRQ_FORCED_THREADING
Russell King171b3f02013-09-12 21:24:42 +0100101 select MODULES_USE_ELF_REL
Christoph Hellwigf616ab52018-05-09 06:53:49 +0200102 select NEED_DMA_MAP_STATE
Arnd Bergmannaa7d5f12015-11-19 13:20:54 +0100103 select OF_EARLY_FLATTREE if OF
104 select OF_RESERVED_MEM if OF
Russell King171b3f02013-09-12 21:24:42 +0100105 select OLD_SIGACTION
106 select OLD_SIGSUSPEND3
Christoph Hellwig20f1b792018-11-15 20:05:34 +0100107 select PCI_SYSCALL if PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100108 select PERF_USE_VMALLOC
Jinbum Parkb26d07a2018-01-10 00:54:37 +0100109 select REFCOUNT_FULL
Russell Kingb1b3f492012-10-06 17:12:25 +0100110 select RTC_LIB
111 select SYS_SUPPORTS_APM_EMULATION
Russell King171b3f02013-09-12 21:24:42 +0100112 # Above selects are sorted alphabetically; please add new ones
113 # according to that. Thanks.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 help
115 The ARM series is a line of low-power-consumption RISC chip designs
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000116 licensed by ARM Ltd and targeted at embedded applications and
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000118 manufactured, but legacy ARM-based PC hardware remains popular in
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 Europe. There is an ARM Linux project with a web page at
120 <http://www.arm.linux.org.uk/>.
121
Russell King74facff2011-06-02 11:16:22 +0100122config ARM_HAS_SG_CHAIN
123 bool
124
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200125config ARM_DMA_USE_IOMMU
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200126 bool
Russell Kingb1b3f492012-10-06 17:12:25 +0100127 select ARM_HAS_SG_CHAIN
128 select NEED_SG_DMA_LENGTH
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200129
Seung-Woo Kim60460ab2013-02-06 13:21:14 +0900130if ARM_DMA_USE_IOMMU
131
132config ARM_DMA_IOMMU_ALIGNMENT
133 int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
134 range 4 9
135 default 8
136 help
137 DMA mapping framework by default aligns all buffers to the smallest
138 PAGE_SIZE order which is greater than or equal to the requested buffer
139 size. This works well for buffers up to a few hundreds kilobytes, but
140 for larger buffers it just a waste of address space. Drivers which has
141 relatively small addressing window (like 64Mib) might run out of
142 virtual space with just a few allocations.
143
144 With this parameter you can specify the maximum PAGE_SIZE order for
145 DMA IOMMU buffers. Larger buffers will be aligned only to this
146 specified order. The order is expressed as a power of two multiplied
147 by the PAGE_SIZE.
148
149endif
150
Ralf Baechle75e71532007-02-09 17:08:58 +0000151config SYS_SUPPORTS_APM_EMULATION
152 bool
153
Linus Walleijbc581772009-09-15 17:30:37 +0100154config HAVE_TCM
155 bool
156 select GENERIC_ALLOCATOR
157
Russell Kinge119bff2010-01-10 17:23:29 +0000158config HAVE_PROC_CPU
159 bool
160
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700161config NO_IOPORT_MAP
Al Viro5ea81762007-02-11 15:41:31 +0000162 bool
Al Viro5ea81762007-02-11 15:41:31 +0000163
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164config SBUS
165 bool
166
Russell Kingf16fb1e2007-04-28 09:59:37 +0100167config STACKTRACE_SUPPORT
168 bool
169 default y
170
171config LOCKDEP_SUPPORT
172 bool
173 default y
174
Russell King7ad1bcb2006-08-27 12:07:02 +0100175config TRACE_IRQFLAGS_SUPPORT
176 bool
Arnd Bergmanncb1293e2015-05-26 15:40:44 +0100177 default !CPU_V7M
Russell King7ad1bcb2006-08-27 12:07:02 +0100178
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179config RWSEM_XCHGADD_ALGORITHM
180 bool
Will Deacon8a874112014-05-02 17:06:19 +0100181 default y
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182
David Howellsf0d1b0b2006-12-08 02:37:49 -0800183config ARCH_HAS_ILOG2_U32
184 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800185
186config ARCH_HAS_ILOG2_U64
187 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800188
Eduardo Valentin4a1b5732013-06-13 22:58:52 +0100189config ARCH_HAS_BANDGAP
190 bool
191
Stefan Agnera5f4c562015-08-13 00:01:52 +0100192config FIX_EARLYCON_MEM
193 def_bool y if MMU
194
Akinobu Mitab89c3b12006-03-26 01:39:19 -0800195config GENERIC_HWEIGHT
196 bool
197 default y
198
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199config GENERIC_CALIBRATE_DELAY
200 bool
201 default y
202
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100203config ARCH_MAY_HAVE_PC_FDC
204 bool
205
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800206config ZONE_DMA
207 bool
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800208
David A. Longc7edc9e2014-03-07 11:23:04 -0500209config ARCH_SUPPORTS_UPROBES
210 def_bool y
211
Rob Herring58af4a22012-03-20 14:33:01 -0500212config ARCH_HAS_DMA_SET_COHERENT_MASK
213 bool
214
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215config GENERIC_ISA_DMA
216 bool
217
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218config FIQ
219 bool
220
Rob Herring13a50452012-02-07 09:28:22 -0600221config NEED_RET_TO_USER
222 bool
223
Al Viro034d2f52005-12-19 16:27:59 -0500224config ARCH_MTD_XIP
225 bool
226
Russell Kingdc21af92011-01-04 19:09:43 +0000227config ARM_PATCH_PHYS_VIRT
Russell Kingc1beced2011-08-10 10:23:45 +0100228 bool "Patch physical to virtual translations at runtime" if EMBEDDED
229 default y
Nicolas Pitreb511d752011-02-21 06:53:35 +0100230 depends on !XIP_KERNEL && MMU
Russell Kingdc21af92011-01-04 19:09:43 +0000231 help
Russell King111e9a52011-05-12 10:02:42 +0100232 Patch phys-to-virt and virt-to-phys translation functions at
233 boot and module load time according to the position of the
234 kernel in system memory.
Russell Kingdc21af92011-01-04 19:09:43 +0000235
Russell King111e9a52011-05-12 10:02:42 +0100236 This can only be used with non-XIP MMU kernels where the base
Nicolas Pitredaece592011-08-12 00:14:29 +0100237 of physical memory is at a 16MB boundary.
Russell Kingdc21af92011-01-04 19:09:43 +0000238
Russell Kingc1beced2011-08-10 10:23:45 +0100239 Only disable this option if you know that you do not require
240 this feature (eg, building a kernel for a single machine) and
241 you need to shrink the kernel to the minimal size.
242
Rob Herringc334bc12012-03-04 22:03:33 -0600243config NEED_MACH_IO_H
244 bool
245 help
246 Select this when mach/io.h is required to provide special
247 definitions for this platform. The need for mach/io.h should
248 be avoided when possible.
249
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400250config NEED_MACH_MEMORY_H
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400251 bool
Russell King111e9a52011-05-12 10:02:42 +0100252 help
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400253 Select this when mach/memory.h is required to provide special
254 definitions for this platform. The need for mach/memory.h should
255 be avoided when possible.
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400256
257config PHYS_OFFSET
Nicolas Pitre974c0722011-12-02 23:09:42 +0100258 hex "Physical address of main memory" if MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100259 depends on !ARM_PATCH_PHYS_VIRT
Nicolas Pitre974c0722011-12-02 23:09:42 +0100260 default DRAM_BASE if !MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100261 default 0x00000000 if ARCH_EBSA110 || \
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100262 ARCH_FOOTBRIDGE || \
263 ARCH_INTEGRATOR || \
264 ARCH_IOP13XX || \
265 ARCH_KS8695 || \
Linus Walleij8f2c0062016-08-10 14:30:35 +0200266 ARCH_REALVIEW
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100267 default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
268 default 0x20000000 if ARCH_S5PV210
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700269 default 0xc0000000 if ARCH_SA1100
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400270 help
271 Please provide the physical address corresponding to the
272 location of main memory in your system.
Russell Kingcada3c02011-01-04 19:39:29 +0000273
Simon Glass87e040b2011-08-16 23:44:26 +0100274config GENERIC_BUG
275 def_bool y
276 depends on BUG
277
Kirill A. Shutemov1bcad262015-04-14 15:45:42 -0700278config PGTABLE_LEVELS
279 int
280 default 3 if ARM_LPAE
281 default 2
282
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283menu "System Type"
284
Hyok S. Choi3c427972009-07-24 12:35:00 +0100285config MMU
286 bool "MMU-based Paged Memory Management Support"
287 default y
288 help
289 Select if you want MMU-based virtualised addressing space
290 support by paged memory management. If unsure, say 'Y'.
291
Daniel Cashmane0c25d92016-01-14 15:19:57 -0800292config ARCH_MMAP_RND_BITS_MIN
293 default 8
294
295config ARCH_MMAP_RND_BITS_MAX
296 default 14 if PAGE_OFFSET=0x40000000
297 default 15 if PAGE_OFFSET=0x80000000
298 default 16
299
Russell Kingccf50e22010-03-15 19:03:06 +0000300#
301# The "ARM system type" choice list is ordered alphabetically by option
302# text. Please add new entries in the option alphabetic order.
303#
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304choice
305 prompt "ARM system type"
Arnd Bergmann70722802015-12-17 17:45:47 +0100306 default ARM_SINGLE_ARMV7M if !MMU
Arnd Bergmann1420b222013-02-14 13:33:36 +0100307 default ARCH_MULTIPLATFORM if MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308
Rob Herring387798b2012-09-06 13:41:12 -0500309config ARCH_MULTIPLATFORM
310 bool "Allow multiple platforms to be selected"
Russell Kingb1b3f492012-10-06 17:12:25 +0100311 depends on MMU
Olof Johansson42dc8362014-03-09 12:46:59 -0700312 select ARM_HAS_SG_CHAIN
Rob Herring387798b2012-09-06 13:41:12 -0500313 select ARM_PATCH_PHYS_VIRT
314 select AUTO_ZRELADDR
Daniel Lezcanobb0eb052017-05-26 19:34:11 +0200315 select TIMER_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600316 select COMMON_CLK
Rob Herringddb902c2013-11-22 09:29:37 -0600317 select GENERIC_CLOCKEVENTS
Palmer Dabbelt4c301f92018-06-22 10:01:23 -0700318 select GENERIC_IRQ_MULTI_HANDLER
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100319 select HAVE_PCI
Christoph Hellwig2eac9c22018-11-15 20:05:33 +0100320 select PCI_DOMAINS_GENERIC if PCI
Dinh Nguyen66314222012-07-18 16:07:18 -0600321 select SPARSE_IRQ
322 select USE_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600323
Stefan Agner9c77bc42015-05-20 00:03:51 +0200324config ARM_SINGLE_ARMV7M
325 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
326 depends on !MMU
Stefan Agner9c77bc42015-05-20 00:03:51 +0200327 select ARM_NVIC
Stefan Agner499f1642015-05-21 00:35:44 +0200328 select AUTO_ZRELADDR
Daniel Lezcanobb0eb052017-05-26 19:34:11 +0200329 select TIMER_OF
Stefan Agner9c77bc42015-05-20 00:03:51 +0200330 select COMMON_CLK
331 select CPU_V7M
332 select GENERIC_CLOCKEVENTS
333 select NO_IOPORT_MAP
334 select SPARSE_IRQ
335 select USE_OF
336
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337config ARCH_EBSA110
338 bool "EBSA-110"
Russell Kingb1b3f492012-10-06 17:12:25 +0100339 select ARCH_USES_GETTIMEOFFSET
Russell Kingc7508152008-10-26 10:55:14 +0000340 select CPU_SA110
Russell Kingf7e68bb2005-05-05 14:49:01 +0100341 select ISA
Rob Herringc334bc12012-03-04 22:03:33 -0600342 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400343 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700344 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345 help
346 This is an evaluation board for the StrongARM processor available
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000347 from Digital. It has limited hardware on-board, including an
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 Ethernet interface, two PCMCIA sockets, two serial ports and a
349 parallel port.
350
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000351config ARCH_EP93XX
352 bool "EP93xx-based"
H Hartley Sweeten80320922017-09-03 10:43:44 -0700353 select ARCH_SPARSEMEM_ENABLE
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000354 select ARM_AMBA
Arnd Bergmanncd5bad42014-03-26 00:17:09 +0100355 imply ARM_PATCH_PHYS_VIRT
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000356 select ARM_VIC
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700357 select AUTO_ZRELADDR
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100358 select CLKDEV_LOOKUP
Linus Walleij000bc172015-06-15 14:34:03 +0200359 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100360 select CPU_ARM920T
Linus Walleij000bc172015-06-15 14:34:03 +0200361 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200362 select GPIOLIB
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000363 help
364 This enables support for the Cirrus EP93xx series of CPUs.
365
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366config ARCH_FOOTBRIDGE
367 bool "FootBridge"
Russell Kingc7508152008-10-26 10:55:14 +0000368 select CPU_SA110
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 select FOOTBRIDGE
Russell King4e8d7632011-01-28 21:00:39 +0000370 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200371 select HAVE_IDE
Rob Herring8ef6e622012-03-01 20:48:12 -0600372 select NEED_MACH_IO_H if !MMU
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400373 select NEED_MACH_MEMORY_H
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000374 help
375 Support for systems based on the DC21285 companion chip
376 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100378config ARCH_NETX
379 bool "Hilscher NetX based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100380 select ARM_VIC
Russell King234b6ced2011-05-08 14:09:47 +0100381 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000382 select CPU_ARM926T
Uwe Kleine-König2fcfe6b2008-12-09 21:57:24 +0100383 select GENERIC_CLOCKEVENTS
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000384 help
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100385 This enables support for systems based on the Hilscher NetX Soc
386
Russell King3b938be2007-05-12 11:25:44 +0100387config ARCH_IOP13XX
388 bool "IOP13xx-based"
389 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100390 select CPU_XSC3
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400391 select NEED_MACH_MEMORY_H
Rob Herring13a50452012-02-07 09:28:22 -0600392 select NEED_RET_TO_USER
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100393 select FORCE_PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100394 select PLAT_IOP
395 select VMSPLIT_1G
Thomas Gleixner37ebbcf2014-05-07 15:44:04 +0000396 select SPARSE_IRQ
Russell King3b938be2007-05-12 11:25:44 +0100397 help
398 Support for Intel's IOP13XX (XScale) family of processors.
399
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100400config ARCH_IOP32X
401 bool "IOP32x-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100402 depends on MMU
Russell Kingc7508152008-10-26 10:55:14 +0000403 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200404 select GPIO_IOP
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200405 select GPIOLIB
Rob Herring13a50452012-02-07 09:28:22 -0600406 select NEED_RET_TO_USER
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100407 select FORCE_PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100408 select PLAT_IOP
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000409 help
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100410 Support for Intel's 80219 and IOP32X (XScale) family of
411 processors.
412
413config ARCH_IOP33X
414 bool "IOP33x-based"
415 depends on MMU
Russell Kingc7508152008-10-26 10:55:14 +0000416 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200417 select GPIO_IOP
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200418 select GPIOLIB
Rob Herring13a50452012-02-07 09:28:22 -0600419 select NEED_RET_TO_USER
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100420 select FORCE_PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100421 select PLAT_IOP
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100422 help
423 Support for Intel's IOP33X (XScale) family of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424
Russell King3b938be2007-05-12 11:25:44 +0100425config ARCH_IXP4XX
426 bool "IXP4xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100427 depends on MMU
Rob Herring58af4a22012-03-20 14:33:01 -0500428 select ARCH_HAS_DMA_SET_COHERENT_MASK
Russell King51aaf812014-04-22 22:26:27 +0100429 select ARCH_SUPPORTS_BIG_ENDIAN
Russell King234b6ced2011-05-08 14:09:47 +0100430 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000431 select CPU_XSCALE
Russell Kingb1b3f492012-10-06 17:12:25 +0100432 select DMABOUNCE if PCI
Russell King3b938be2007-05-12 11:25:44 +0100433 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200434 select GPIOLIB
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100435 select HAVE_PCI
Rob Herringc334bc12012-03-04 22:03:33 -0600436 select NEED_MACH_IO_H
Florian Fainelli9296d942013-04-09 14:29:26 +0200437 select USB_EHCI_BIG_ENDIAN_DESC
Russell King171b3f02013-09-12 21:24:42 +0100438 select USB_EHCI_BIG_ENDIAN_MMIO
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100439 help
Russell King3b938be2007-05-12 11:25:44 +0100440 Support for Intel's IXP4XX (XScale) family of processors.
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100441
Saeed Bisharaedabd382009-08-06 15:12:43 +0300442config ARCH_DOVE
443 bool "Marvell Dove"
Sebastian Hesselbarth756b2532013-05-02 19:56:12 +0100444 select CPU_PJ4
Saeed Bisharaedabd382009-08-06 15:12:43 +0300445 select GENERIC_CLOCKEVENTS
Palmer Dabbelt4c301f92018-06-22 10:01:23 -0700446 select GENERIC_IRQ_MULTI_HANDLER
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200447 select GPIOLIB
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100448 select HAVE_PCI
Russell King171b3f02013-09-12 21:24:42 +0100449 select MVEBU_MBUS
Sebastian Hesselbarth9139acd2012-11-19 10:39:55 +0100450 select PINCTRL
451 select PINCTRL_DOVE
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200452 select PLAT_ORION_LEGACY
Arnd Bergmann5cdbe5d2015-12-02 22:27:05 +0100453 select SPARSE_IRQ
Russell Kingc5d431e2015-12-08 10:58:09 +0000454 select PM_GENERIC_DOMAINS if PM
Saeed Bisharaedabd382009-08-06 15:12:43 +0300455 help
456 Support for the Marvell Dove SoC 88AP510
457
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100458config ARCH_KS8695
459 bool "Micrel/Kendin KS8695"
Linus Walleijc7e783d2012-08-29 20:27:22 +0200460 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100461 select CPU_ARM922T
Linus Walleijc7e783d2012-08-29 20:27:22 +0200462 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200463 select GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100464 select NEED_MACH_MEMORY_H
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100465 help
466 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
467 System-on-Chip devices.
468
Russell King788c9702009-04-26 14:21:59 +0100469config ARCH_W90X900
470 bool "Nuvoton W90X900 CPU"
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100471 select CLKDEV_LOOKUP
Russell King6fa5d5f2011-05-08 15:34:39 +0100472 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100473 select CPU_ARM926T
wanzongshun58b53692009-08-14 15:36:44 +0100474 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200475 select GPIOLIB
Lennert Buytenhek777f9be2008-06-22 22:45:02 +0200476 help
wanzongshuna8bc4ea2009-08-14 15:38:29 +0100477 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
478 At present, the w90x900 has been renamed nuc900, regarding
479 the ARM series product line, you can login the following
480 link address to know more.
481
482 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
483 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400484
Russell King93e22562012-10-12 14:20:52 +0100485config ARCH_LPC32XX
486 bool "NXP LPC32XX"
Russell King93e22562012-10-12 14:20:52 +0100487 select ARM_AMBA
Russell King40737232011-01-06 22:32:52 +0000488 select CLKDEV_LOOKUP
Vladimir Zapolskiyc227f122015-11-20 03:05:10 +0200489 select CLKSRC_LPC32XX
490 select COMMON_CLK
Russell King93e22562012-10-12 14:20:52 +0100491 select CPU_ARM926T
492 select GENERIC_CLOCKEVENTS
Palmer Dabbelt4c301f92018-06-22 10:01:23 -0700493 select GENERIC_IRQ_MULTI_HANDLER
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200494 select GPIOLIB
Vladimir Zapolskiy8cb17b52016-04-25 04:00:38 +0300495 select SPARSE_IRQ
Russell King93e22562012-10-12 14:20:52 +0100496 select USE_OF
497 help
498 Support for the NXP LPC32XX family of processors
499
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500config ARCH_PXA
eric miao2c8086a2007-09-11 19:13:17 -0700501 bool "PXA2xx/PXA3xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100502 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100503 select ARCH_MTD_XIP
Russell Kingb1b3f492012-10-06 17:12:25 +0100504 select ARM_CPU_SUSPEND if PM
505 select AUTO_ZRELADDR
Robert Jarzmika1c0a6a2015-02-07 22:54:03 +0100506 select COMMON_CLK
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100507 select CLKDEV_LOOKUP
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200508 select CLKSRC_PXA
Russell King234b6ced2011-05-08 14:09:47 +0100509 select CLKSRC_MMIO
Daniel Lezcanobb0eb052017-05-26 19:34:11 +0200510 select TIMER_OF
Arnd Bergmann2f202862016-01-29 15:06:29 +0100511 select CPU_XSCALE if !CPU_XSC3
Eric Miao981d0f32007-07-24 01:22:43 +0100512 select GENERIC_CLOCKEVENTS
Palmer Dabbelt4c301f92018-06-22 10:01:23 -0700513 select GENERIC_IRQ_MULTI_HANDLER
Haojian Zhuang157d2642011-10-17 20:37:52 +0800514 select GPIO_PXA
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200515 select GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100516 select HAVE_IDE
Robert Jarzmikd6cf30c2015-02-14 22:41:56 +0100517 select IRQ_DOMAIN
Eric Miaobd5ce432009-01-20 12:06:01 +0800518 select PLAT_PXA
Haojian Zhuang6ac6b812010-08-20 15:23:59 +0800519 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000520 help
eric miao2c8086a2007-09-11 19:13:17 -0700521 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522
523config ARCH_RPC
524 bool "RiscPC"
Russell King868e87c2015-09-28 10:31:50 +0100525 depends on MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526 select ARCH_ACORN
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100527 select ARCH_MAY_HAVE_PC_FDC
Russell King07f841b2008-10-01 17:11:06 +0100528 select ARCH_SPARSEMEM_ENABLE
John Stultz5cfc8ee2010-03-24 00:22:36 +0000529 select ARCH_USES_GETTIMEOFFSET
Arnd Bergmannfa04e202014-02-26 17:39:12 +0100530 select CPU_SA110
Russell Kingb1b3f492012-10-06 17:12:25 +0100531 select FIQ
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200532 select HAVE_IDE
Russell Kingb1b3f492012-10-06 17:12:25 +0100533 select HAVE_PATA_PLATFORM
534 select ISA_DMA_API
Rob Herringc334bc12012-03-04 22:03:33 -0600535 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400536 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700537 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 help
539 On the Acorn Risc-PC, Linux can support the internal IDE disk and
540 CD-ROM interface, serial and parallel port, and the floppy drive.
541
542config ARCH_SA1100
543 bool "SA1100-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100544 select ARCH_MTD_XIP
Russell Kingb1b3f492012-10-06 17:12:25 +0100545 select ARCH_SPARSEMEM_ENABLE
546 select CLKDEV_LOOKUP
547 select CLKSRC_MMIO
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200548 select CLKSRC_PXA
Daniel Lezcanobb0eb052017-05-26 19:34:11 +0200549 select TIMER_OF if OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100550 select CPU_FREQ
551 select CPU_SA1100
552 select GENERIC_CLOCKEVENTS
Palmer Dabbelt4c301f92018-06-22 10:01:23 -0700553 select GENERIC_IRQ_MULTI_HANDLER
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200554 select GPIOLIB
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200555 select HAVE_IDE
Dmitry Eremin-Solenikov1eca42b2014-11-28 15:56:54 +0100556 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100557 select ISA
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400558 select NEED_MACH_MEMORY_H
Russell King375dec92012-02-23 14:29:33 +0100559 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000560 help
561 Support for StrongARM 11x0 based boards.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900563config ARCH_S3C24XX
564 bool "Samsung S3C24XX SoCs"
Arnd Bergmann335cce72014-03-13 14:11:16 +0100565 select ATAGS
Russell Kingb1b3f492012-10-06 17:12:25 +0100566 select CLKDEV_LOOKUP
Tomasz Figa42805062013-04-28 02:25:01 +0200567 select CLKSRC_SAMSUNG_PWM
Romain Naour7f78b6e2013-01-09 18:47:04 -0800568 select GENERIC_CLOCKEVENTS
Tomasz Figa880cf072013-06-19 01:22:20 +0900569 select GPIO_SAMSUNG
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200570 select GPIOLIB
Palmer Dabbelt4c301f92018-06-22 10:01:23 -0700571 select GENERIC_IRQ_MULTI_HANDLER
Kukjin Kim20676c12010-11-13 16:08:32 +0900572 select HAVE_S3C2410_I2C if I2C
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900573 select HAVE_S3C2410_WATCHDOG if WATCHDOG
Russell Kingb1b3f492012-10-06 17:12:25 +0100574 select HAVE_S3C_RTC if RTC_CLASS
Rob Herringc334bc12012-03-04 22:03:33 -0600575 select NEED_MACH_IO_H
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900576 select SAMSUNG_ATAGS
Masahiro Yamadaea04d6b2017-11-27 11:19:23 +0900577 select USE_OF
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578 help
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900579 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
580 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
581 (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
582 Samsung SMDK2410 development board (and derivatives).
Ben Dooks63b1f512010-04-30 16:32:26 +0900583
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100584config ARCH_DAVINCI
585 bool "TI DaVinci"
Russell Kingb1b3f492012-10-06 17:12:25 +0100586 select ARCH_HAS_HOLES_MEMORYMODEL
David Lechner27823272018-05-18 11:48:17 -0500587 select COMMON_CLK
Arnd Bergmannce32c5c2016-02-01 21:35:57 +0100588 select CPU_ARM926T
David Brownell20e99692009-05-07 09:31:42 -0700589 select GENERIC_ALLOCATOR
Russell Kingb1b3f492012-10-06 17:12:25 +0100590 select GENERIC_CLOCKEVENTS
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100591 select GENERIC_IRQ_CHIP
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200592 select GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100593 select HAVE_IDE
David Lechner27823272018-05-18 11:48:17 -0500594 select PM_GENERIC_DOMAINS if PM
595 select PM_GENERIC_DOMAINS_OF if PM && OF
596 select RESET_CONTROLLER
Sekhar Nori689e3312012-08-28 15:27:52 +0530597 select USE_OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100598 select ZONE_DMA
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100599 help
600 Support for TI's DaVinci platform.
601
Tony Lindgrena0694862013-01-11 11:24:20 -0800602config ARCH_OMAP1
603 bool "TI OMAP1"
Arnd Bergmann00a36692012-06-07 18:50:51 -0600604 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100605 select ARCH_HAS_HOLES_MEMORYMODEL
Tony Lindgrena0694862013-01-11 11:24:20 -0800606 select ARCH_OMAP
Tony Priske9a91de2012-08-03 21:00:06 +1200607 select CLKDEV_LOOKUP
viresh kumarcee37e52010-04-01 12:31:05 +0100608 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100609 select GENERIC_CLOCKEVENTS
Tony Lindgrena0694862013-01-11 11:24:20 -0800610 select GENERIC_IRQ_CHIP
Palmer Dabbelt4c301f92018-06-22 10:01:23 -0700611 select GENERIC_IRQ_MULTI_HANDLER
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200612 select GPIOLIB
Tony Lindgrena0694862013-01-11 11:24:20 -0800613 select HAVE_IDE
614 select IRQ_DOMAIN
615 select NEED_MACH_IO_H if PCCARD
616 select NEED_MACH_MEMORY_H
Tony Lindgren685e2d02015-05-20 09:01:21 -0700617 select SPARSE_IRQ
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100618 help
Tony Lindgrena0694862013-01-11 11:24:20 -0800619 Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
Binghua Duan02c981c2011-07-08 17:40:12 +0800620
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621endchoice
622
Rob Herring387798b2012-09-06 13:41:12 -0500623menu "Multiple platform selection"
624 depends on ARCH_MULTIPLATFORM
625
626comment "CPU Core family selection"
627
Arnd Bergmannf8afae42014-03-25 22:19:00 +0100628config ARCH_MULTI_V4
629 bool "ARMv4 based platforms (FA526)"
630 depends on !ARCH_MULTI_V6_V7
631 select ARCH_MULTI_V4_V5
632 select CPU_FA526
633
Rob Herring387798b2012-09-06 13:41:12 -0500634config ARCH_MULTI_V4T
635 bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500636 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100637 select ARCH_MULTI_V4_V5
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200638 select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
639 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
640 CPU_ARM925T || CPU_ARM940T)
Rob Herring387798b2012-09-06 13:41:12 -0500641
642config ARCH_MULTI_V5
643 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500644 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100645 select ARCH_MULTI_V4_V5
Andrew Lunn12567bb2014-02-22 20:14:54 +0100646 select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200647 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
648 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
Rob Herring387798b2012-09-06 13:41:12 -0500649
650config ARCH_MULTI_V4_V5
651 bool
652
653config ARCH_MULTI_V6
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800654 bool "ARMv6 based platforms (ARM11)"
Rob Herring387798b2012-09-06 13:41:12 -0500655 select ARCH_MULTI_V6_V7
Rob Herring42f47542014-01-31 14:26:04 -0600656 select CPU_V6K
Rob Herring387798b2012-09-06 13:41:12 -0500657
658config ARCH_MULTI_V7
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800659 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
Rob Herring387798b2012-09-06 13:41:12 -0500660 default y
661 select ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100662 select CPU_V7
Rob Herring90bc8ac72014-01-31 15:32:02 -0600663 select HAVE_SMP
Rob Herring387798b2012-09-06 13:41:12 -0500664
665config ARCH_MULTI_V6_V7
666 bool
Rob Herring9352b052014-01-31 15:36:10 -0600667 select MIGHT_HAVE_CACHE_L2X0
Rob Herring387798b2012-09-06 13:41:12 -0500668
669config ARCH_MULTI_CPU_AUTO
670 def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
671 select ARCH_MULTI_V5
672
673endmenu
674
Rob Herring05e2a3d2013-12-05 10:04:54 -0600675config ARCH_VIRT
Masahiro Yamadae3246542015-11-16 12:06:10 +0900676 bool "Dummy Virtual Machine"
677 depends on ARCH_MULTI_V7
Rob Herring4b8b5f22013-12-05 10:10:34 -0600678 select ARM_AMBA
Rob Herring05e2a3d2013-12-05 10:04:54 -0600679 select ARM_GIC
Arnd Bergmann3ee803642016-06-15 15:47:33 -0500680 select ARM_GIC_V2M if PCI
Jean-Philippe Brucker0b28f1d2015-10-01 13:47:18 +0100681 select ARM_GIC_V3
Vladimir Murzinbb29cec2016-11-02 11:54:08 +0000682 select ARM_GIC_V3_ITS if PCI
Rob Herring05e2a3d2013-12-05 10:04:54 -0600683 select ARM_PSCI
Rob Herring4b8b5f22013-12-05 10:10:34 -0600684 select HAVE_ARM_ARCH_TIMER
Jason A. Donenfeld8e2649d2018-09-26 15:51:10 +0200685 select ARCH_SUPPORTS_BIG_ENDIAN
Rob Herring05e2a3d2013-12-05 10:04:54 -0600686
Russell Kingccf50e22010-03-15 19:03:06 +0000687#
688# This is sorted alphabetically by mach-* pathname. However, plat-*
689# Kconfigs may be included either alphabetically (according to the
690# plat- suffix) or along side the corresponding mach-* source.
691#
Andreas Färber6bb85362017-02-15 11:03:22 +0100692source "arch/arm/mach-actions/Kconfig"
693
Tsahee Zidenberg445d9b32015-03-12 13:53:00 +0200694source "arch/arm/mach-alpine/Kconfig"
695
Lars Persson590b4602016-02-11 17:06:19 +0100696source "arch/arm/mach-artpec/Kconfig"
697
Oleksij Rempeld9bfc862014-11-24 12:08:27 +0100698source "arch/arm/mach-asm9260/Kconfig"
699
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100700source "arch/arm/mach-aspeed/Kconfig"
701
Russell King95b8f202010-01-14 11:43:54 +0000702source "arch/arm/mach-at91/Kconfig"
703
Anders Berg1d22924e2014-05-23 11:08:35 +0200704source "arch/arm/mach-axxia/Kconfig"
705
Christian Daudt8ac49e02012-11-19 09:46:10 -0800706source "arch/arm/mach-bcm/Kconfig"
707
Sebastian Hesselbarth1c37fa12013-09-09 14:36:19 +0200708source "arch/arm/mach-berlin/Kconfig"
709
Linus Torvalds1da177e2005-04-16 15:20:36 -0700710source "arch/arm/mach-clps711x/Kconfig"
711
Anton Vorontsovd94f9442010-03-25 17:12:41 +0300712source "arch/arm/mach-cns3xxx/Kconfig"
713
Russell King95b8f202010-01-14 11:43:54 +0000714source "arch/arm/mach-davinci/Kconfig"
715
Baruch Siachdf8d7422015-01-14 10:40:30 +0200716source "arch/arm/mach-digicolor/Kconfig"
717
Russell King95b8f202010-01-14 11:43:54 +0000718source "arch/arm/mach-dove/Kconfig"
719
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000720source "arch/arm/mach-ep93xx/Kconfig"
721
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100722source "arch/arm/mach-exynos/Kconfig"
723source "arch/arm/plat-samsung/Kconfig"
724
Linus Torvalds1da177e2005-04-16 15:20:36 -0700725source "arch/arm/mach-footbridge/Kconfig"
726
Paulius Zaleckas59d3a192009-03-26 10:06:08 +0200727source "arch/arm/mach-gemini/Kconfig"
728
Rob Herring387798b2012-09-06 13:41:12 -0500729source "arch/arm/mach-highbank/Kconfig"
730
Haojian Zhuang389ee0c2013-12-20 10:52:56 +0800731source "arch/arm/mach-hisi/Kconfig"
732
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100733source "arch/arm/mach-imx/Kconfig"
734
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735source "arch/arm/mach-integrator/Kconfig"
736
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100737source "arch/arm/mach-iop13xx/Kconfig"
738
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100739source "arch/arm/mach-iop32x/Kconfig"
740
741source "arch/arm/mach-iop33x/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700742
743source "arch/arm/mach-ixp4xx/Kconfig"
744
Santosh Shilimkar828989a2013-06-10 11:27:13 -0400745source "arch/arm/mach-keystone/Kconfig"
746
Russell King95b8f202010-01-14 11:43:54 +0000747source "arch/arm/mach-ks8695/Kconfig"
748
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100749source "arch/arm/mach-mediatek/Kconfig"
750
Carlo Caione3b8f5032014-09-10 22:16:59 +0200751source "arch/arm/mach-meson/Kconfig"
752
Sugaya Taichi9fb29c72019-02-27 13:52:33 +0900753source "arch/arm/mach-milbeaut/Kconfig"
754
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100755source "arch/arm/mach-mmp/Kconfig"
756
Jonas Jensen17723fd32013-12-18 13:58:45 +0100757source "arch/arm/mach-moxart/Kconfig"
758
Stanislav Samsonov794d15b2008-06-22 22:45:10 +0200759source "arch/arm/mach-mv78xx0/Kconfig"
760
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100761source "arch/arm/mach-mvebu/Kconfig"
Matthias Bruggerf682a212014-05-13 01:06:13 +0200762
Shawn Guo1d3f33d2010-12-13 20:55:03 +0800763source "arch/arm/mach-mxs/Kconfig"
764
Russell King95b8f202010-01-14 11:43:54 +0000765source "arch/arm/mach-netx/Kconfig"
Eric Miao49cbe782009-01-20 14:15:18 +0800766
Russell King95b8f202010-01-14 11:43:54 +0000767source "arch/arm/mach-nomadik/Kconfig"
Russell King95b8f202010-01-14 11:43:54 +0000768
Brendan Higgins7bffa142017-08-16 12:18:39 -0700769source "arch/arm/mach-npcm/Kconfig"
770
Daniel Tang9851ca52013-06-11 18:40:17 +1000771source "arch/arm/mach-nspire/Kconfig"
772
Tony Lindgrend48af152005-07-10 19:58:17 +0100773source "arch/arm/plat-omap/Kconfig"
774
775source "arch/arm/mach-omap1/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776
Tony Lindgren1dbae812005-11-10 14:26:51 +0000777source "arch/arm/mach-omap2/Kconfig"
778
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400779source "arch/arm/mach-orion5x/Kconfig"
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400780
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100781source "arch/arm/mach-oxnas/Kconfig"
782
Rob Herring387798b2012-09-06 13:41:12 -0500783source "arch/arm/mach-picoxcell/Kconfig"
784
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100785source "arch/arm/mach-prima2/Kconfig"
786
Russell King95b8f202010-01-14 11:43:54 +0000787source "arch/arm/mach-pxa/Kconfig"
788source "arch/arm/plat-pxa/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700789
Kumar Gala8fc1b0f2014-01-21 17:14:10 -0600790source "arch/arm/mach-qcom/Kconfig"
791
Andreas Färber78e3dbc12018-12-18 20:32:30 +0530792source "arch/arm/mach-rda/Kconfig"
793
Russell King95b8f202010-01-14 11:43:54 +0000794source "arch/arm/mach-realview/Kconfig"
795
Heiko Stuebnerd63dc0512013-06-02 23:09:41 +0200796source "arch/arm/mach-rockchip/Kconfig"
797
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100798source "arch/arm/mach-s3c24xx/Kconfig"
799
800source "arch/arm/mach-s3c64xx/Kconfig"
801
802source "arch/arm/mach-s5pv210/Kconfig"
803
Russell King95b8f202010-01-14 11:43:54 +0000804source "arch/arm/mach-sa1100/Kconfig"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300805
Alexandre Bellonia66c51f2018-02-27 14:37:47 +0100806source "arch/arm/mach-shmobile/Kconfig"
807
Rob Herring387798b2012-09-06 13:41:12 -0500808source "arch/arm/mach-socfpga/Kconfig"
809
Arnd Bergmanna7ed0992012-12-02 15:12:47 +0100810source "arch/arm/mach-spear/Kconfig"
Ben Dooksa21765a2007-02-11 18:31:01 +0100811
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +0100812source "arch/arm/mach-sti/Kconfig"
813
Alexandre TORGUEbcb84fb2017-01-30 17:33:13 +0100814source "arch/arm/mach-stm32/Kconfig"
815
Maxime Ripard3b526342012-11-08 12:40:16 +0100816source "arch/arm/mach-sunxi/Kconfig"
817
Marc Gonzalezd6de5b02015-12-15 10:41:13 +0100818source "arch/arm/mach-tango/Kconfig"
819
Erik Gillingc5f80062010-01-21 16:53:02 -0800820source "arch/arm/mach-tegra/Kconfig"
821
Russell King95b8f202010-01-14 11:43:54 +0000822source "arch/arm/mach-u300/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823
Masahiro Yamadaba56a982015-05-08 13:07:11 +0900824source "arch/arm/mach-uniphier/Kconfig"
825
Russell King95b8f202010-01-14 11:43:54 +0000826source "arch/arm/mach-ux500/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827
828source "arch/arm/mach-versatile/Kconfig"
829
Russell Kingceade892010-02-11 21:44:53 +0000830source "arch/arm/mach-vexpress/Kconfig"
Russell King420c34e2011-01-18 20:08:06 +0000831source "arch/arm/plat-versatile/Kconfig"
Russell Kingceade892010-02-11 21:44:53 +0000832
Tony Prisk6f35f9a2012-10-11 20:13:09 +1300833source "arch/arm/mach-vt8500/Kconfig"
834
wanzongshun7ec80dd2008-12-03 03:55:38 +0100835source "arch/arm/mach-w90x900/Kconfig"
836
Jun Nieacede512015-04-28 17:18:05 +0800837source "arch/arm/mach-zx/Kconfig"
838
Josh Cartwright9a45eb62012-11-19 11:38:29 -0600839source "arch/arm/mach-zynq/Kconfig"
840
Stefan Agner499f1642015-05-21 00:35:44 +0200841# ARMv7-M architecture
842config ARCH_EFM32
843 bool "Energy Micro efm32"
844 depends on ARM_SINGLE_ARMV7M
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200845 select GPIOLIB
Stefan Agner499f1642015-05-21 00:35:44 +0200846 help
847 Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
848 processors.
849
850config ARCH_LPC18XX
851 bool "NXP LPC18xx/LPC43xx"
852 depends on ARM_SINGLE_ARMV7M
853 select ARCH_HAS_RESET_CONTROLLER
854 select ARM_AMBA
855 select CLKSRC_LPC32XX
856 select PINCTRL
857 help
858 Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
859 high performance microcontrollers.
860
Vladimir Murzin18471192016-04-25 09:49:13 +0100861config ARCH_MPS2
Baruch Siach17bd2742016-07-17 11:35:29 +0300862 bool "ARM MPS2 platform"
Vladimir Murzin18471192016-04-25 09:49:13 +0100863 depends on ARM_SINGLE_ARMV7M
864 select ARM_AMBA
865 select CLKSRC_MPS2
866 help
867 Support for Cortex-M Prototyping System (or V2M-MPS2) which comes
868 with a range of available cores like Cortex-M3/M4/M7.
869
870 Please, note that depends which Application Note is used memory map
871 for the platform may vary, so adjustment of RAM base might be needed.
872
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873# Definitions to make life easier
874config ARCH_ACORN
875 bool
876
Lennert Buytenhek7ae1f7ec2006-09-18 23:12:53 +0100877config PLAT_IOP
878 bool
Mikael Pettersson469d30442009-10-29 11:46:54 -0700879 select GENERIC_CLOCKEVENTS
Lennert Buytenhek7ae1f7ec2006-09-18 23:12:53 +0100880
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400881config PLAT_ORION
882 bool
Russell Kingbfe45e02011-05-08 15:33:30 +0100883 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100884 select COMMON_CLK
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100885 select GENERIC_IRQ_CHIP
Andrew Lunn278b45b2012-06-27 13:40:04 +0200886 select IRQ_DOMAIN
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400887
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200888config PLAT_ORION_LEGACY
889 bool
890 select PLAT_ORION
891
Eric Miaobd5ce432009-01-20 12:06:01 +0800892config PLAT_PXA
893 bool
894
Russell Kingf4b8b312010-01-14 12:48:06 +0000895config PLAT_VERSATILE
896 bool
897
Alexandre Courbotd9a1bea2013-11-24 15:30:46 +0900898source "arch/arm/firmware/Kconfig"
899
Masahiro Yamada8636a1f2018-12-11 20:01:04 +0900900source "arch/arm/mm/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100902config IWMMXT
Sebastian Hesselbarthd93003e2014-04-24 22:58:30 +0100903 bool "Enable iWMMXt support"
904 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
905 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100906 help
907 Enable support for iWMMXt context switching at run time if
908 running on a CPU that supports it.
909
Hyok S. Choi3b93e7b2006-06-22 11:48:56 +0100910if !MMU
911source "arch/arm/Kconfig-nommu"
912endif
913
Gregory CLEMENT3e0a07f2013-06-23 10:17:11 +0100914config PJ4B_ERRATA_4742
915 bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
916 depends on CPU_PJ4B && MACH_ARMADA_370
917 default y
918 help
919 When coming out of either a Wait for Interrupt (WFI) or a Wait for
920 Event (WFE) IDLE states, a specific timing sensitivity exists between
921 the retiring WFI/WFE instructions and the newly issued subsequent
922 instructions. This sensitivity can result in a CPU hang scenario.
923 Workaround:
924 The software must insert either a Data Synchronization Barrier (DSB)
925 or Data Memory Barrier (DMB) command immediately after the WFI/WFE
926 instruction
927
Will Deaconf0c4b8d2012-04-20 17:20:08 +0100928config ARM_ERRATA_326103
929 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
930 depends on CPU_V6
931 help
932 Executing a SWP instruction to read-only memory does not set bit 11
933 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
934 treat the access as a read, preventing a COW from occurring and
935 causing the faulting task to livelock.
936
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100937config ARM_ERRATA_411920
938 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
Russell Kinge399b1a2011-01-17 15:08:32 +0000939 depends on CPU_V6 || CPU_V6K
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100940 help
941 Invalidation of the Instruction Cache operation can
942 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
943 It does not affect the MPCore. This option enables the ARM Ltd.
944 recommended workaround.
945
Catalin Marinas7ce236fc2009-04-30 17:06:09 +0100946config ARM_ERRATA_430973
947 bool "ARM errata: Stale prediction on replaced interworking branch"
948 depends on CPU_V7
949 help
950 This option enables the workaround for the 430973 Cortex-A8
Russell King79403cd2015-04-13 16:14:37 +0100951 r1p* erratum. If a code sequence containing an ARM/Thumb
Catalin Marinas7ce236fc2009-04-30 17:06:09 +0100952 interworking branch is replaced with another code sequence at the
953 same virtual address, whether due to self-modifying code or virtual
954 to physical address re-mapping, Cortex-A8 does not recover from the
955 stale interworking branch prediction. This results in Cortex-A8
956 executing the new code sequence in the incorrect ARM or Thumb state.
957 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
958 and also flushes the branch target cache at every context switch.
959 Note that setting specific bits in the ACTLR register may not be
960 available in non-secure mode.
961
Catalin Marinas855c5512009-04-30 17:06:15 +0100962config ARM_ERRATA_458693
963 bool "ARM errata: Processor deadlock when a false hazard is created"
964 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +0100965 depends on !ARCH_MULTIPLATFORM
Catalin Marinas855c5512009-04-30 17:06:15 +0100966 help
967 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
968 erratum. For very specific sequences of memory operations, it is
969 possible for a hazard condition intended for a cache line to instead
970 be incorrectly associated with a different cache line. This false
971 hazard might then cause a processor deadlock. The workaround enables
972 the L1 caching of the NEON accesses and disables the PLD instruction
973 in the ACTLR register. Note that setting specific bits in the ACTLR
974 register may not be available in non-secure mode.
975
Catalin Marinas0516e462009-04-30 17:06:20 +0100976config ARM_ERRATA_460075
977 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
978 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +0100979 depends on !ARCH_MULTIPLATFORM
Catalin Marinas0516e462009-04-30 17:06:20 +0100980 help
981 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
982 erratum. Any asynchronous access to the L2 cache may encounter a
983 situation in which recent store transactions to the L2 cache are lost
984 and overwritten with stale memory contents from external memory. The
985 workaround disables the write-allocate mode for the L2 cache via the
986 ACTLR register. Note that setting specific bits in the ACTLR register
987 may not be available in non-secure mode.
988
Will Deacon9f050272010-09-14 09:51:43 +0100989config ARM_ERRATA_742230
990 bool "ARM errata: DMB operation may be faulty"
991 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +0100992 depends on !ARCH_MULTIPLATFORM
Will Deacon9f050272010-09-14 09:51:43 +0100993 help
994 This option enables the workaround for the 742230 Cortex-A9
995 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
996 between two write operations may not ensure the correct visibility
997 ordering of the two writes. This workaround sets a specific bit in
998 the diagnostic register of the Cortex-A9 which causes the DMB
999 instruction to behave as a DSB, ensuring the correct behaviour of
1000 the two writes.
1001
Will Deacona672e992010-09-14 09:53:02 +01001002config ARM_ERRATA_742231
1003 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1004 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001005 depends on !ARCH_MULTIPLATFORM
Will Deacona672e992010-09-14 09:53:02 +01001006 help
1007 This option enables the workaround for the 742231 Cortex-A9
1008 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1009 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1010 accessing some data located in the same cache line, may get corrupted
1011 data due to bad handling of the address hazard when the line gets
1012 replaced from one of the CPUs at the same time as another CPU is
1013 accessing it. This workaround sets specific bits in the diagnostic
1014 register of the Cortex-A9 which reduces the linefill issuing
1015 capabilities of the processor.
1016
Jon Medhurst69155792013-06-07 10:35:35 +01001017config ARM_ERRATA_643719
1018 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1019 depends on CPU_V7 && SMP
Russell Kinge5a5de42015-04-02 23:58:55 +01001020 default y
Jon Medhurst69155792013-06-07 10:35:35 +01001021 help
1022 This option enables the workaround for the 643719 Cortex-A9 (prior to
1023 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1024 register returns zero when it should return one. The workaround
1025 corrects this value, ensuring cache maintenance operations which use
1026 it behave as intended and avoiding data corruption.
1027
Will Deaconcdf357f2010-08-05 11:20:51 +01001028config ARM_ERRATA_720789
1029 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
Dave Martine66dc742011-12-08 13:37:46 +01001030 depends on CPU_V7
Will Deaconcdf357f2010-08-05 11:20:51 +01001031 help
1032 This option enables the workaround for the 720789 Cortex-A9 (prior to
1033 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1034 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1035 As a consequence of this erratum, some TLB entries which should be
1036 invalidated are not, resulting in an incoherency in the system page
1037 tables. The workaround changes the TLB flushing routines to invalidate
1038 entries regardless of the ASID.
Will Deacon475d92f2010-09-28 14:02:02 +01001039
1040config ARM_ERRATA_743622
1041 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1042 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001043 depends on !ARCH_MULTIPLATFORM
Will Deacon475d92f2010-09-28 14:02:02 +01001044 help
1045 This option enables the workaround for the 743622 Cortex-A9
Will Deaconefbc74a2012-02-24 12:12:38 +01001046 (r2p*) erratum. Under very rare conditions, a faulty
Will Deacon475d92f2010-09-28 14:02:02 +01001047 optimisation in the Cortex-A9 Store Buffer may lead to data
1048 corruption. This workaround sets a specific bit in the diagnostic
1049 register of the Cortex-A9 which disables the Store Buffer
1050 optimisation, preventing the defect from occurring. This has no
1051 visible impact on the overall performance or power consumption of the
1052 processor.
1053
Will Deacon9a27c272011-02-18 16:36:35 +01001054config ARM_ERRATA_751472
1055 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
Dave Martinba90c512011-12-08 13:41:06 +01001056 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001057 depends on !ARCH_MULTIPLATFORM
Will Deacon9a27c272011-02-18 16:36:35 +01001058 help
1059 This option enables the workaround for the 751472 Cortex-A9 (prior
1060 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1061 completion of a following broadcasted operation if the second
1062 operation is received by a CPU before the ICIALLUIS has completed,
1063 potentially leading to corrupted entries in the cache or TLB.
1064
Will Deaconfcbdc5fe2011-02-28 18:15:16 +01001065config ARM_ERRATA_754322
1066 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1067 depends on CPU_V7
1068 help
1069 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1070 r3p*) erratum. A speculative memory access may cause a page table walk
1071 which starts prior to an ASID switch but completes afterwards. This
1072 can populate the micro-TLB with a stale entry which may be hit with
1073 the new ASID. This workaround places two dsb instructions in the mm
1074 switching code so that no page table walks can cross the ASID switch.
1075
Will Deacon5dab26a2011-03-04 12:38:54 +01001076config ARM_ERRATA_754327
1077 bool "ARM errata: no automatic Store Buffer drain"
1078 depends on CPU_V7 && SMP
1079 help
1080 This option enables the workaround for the 754327 Cortex-A9 (prior to
1081 r2p0) erratum. The Store Buffer does not have any automatic draining
1082 mechanism and therefore a livelock may occur if an external agent
1083 continuously polls a memory location waiting to observe an update.
1084 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1085 written polling loops from denying visibility of updates to memory.
1086
Catalin Marinas145e10e2011-08-15 11:04:41 +01001087config ARM_ERRATA_364296
1088 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
Fabio Estevamfd832472013-07-09 18:34:01 +01001089 depends on CPU_V6
Catalin Marinas145e10e2011-08-15 11:04:41 +01001090 help
1091 This options enables the workaround for the 364296 ARM1136
1092 r0p2 erratum (possible cache data corruption with
1093 hit-under-miss enabled). It sets the undocumented bit 31 in
1094 the auxiliary control register and the FI bit in the control
1095 register, thus disabling hit-under-miss without putting the
1096 processor into full low interrupt latency mode. ARM11MPCore
1097 is not affected.
1098
Will Deaconf630c1b2011-09-15 11:45:15 +01001099config ARM_ERRATA_764369
1100 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1101 depends on CPU_V7 && SMP
1102 help
1103 This option enables the workaround for erratum 764369
1104 affecting Cortex-A9 MPCore with two or more processors (all
1105 current revisions). Under certain timing circumstances, a data
1106 cache line maintenance operation by MVA targeting an Inner
1107 Shareable memory region may fail to proceed up to either the
1108 Point of Coherency or to the Point of Unification of the
1109 system. This workaround adds a DSB instruction before the
1110 relevant cache maintenance functions and sets a specific bit
1111 in the diagnostic control register of the SCU.
1112
Simon Horman7253b852012-09-28 02:12:45 +01001113config ARM_ERRATA_775420
1114 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1115 depends on CPU_V7
1116 help
1117 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1118 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1119 operation aborts with MMU exception, it might cause the processor
1120 to deadlock. This workaround puts DSB before executing ISB if
1121 an abort may occur on cache maintenance.
1122
Catalin Marinas93dc6882013-03-26 23:35:04 +01001123config ARM_ERRATA_798181
1124 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1125 depends on CPU_V7 && SMP
1126 help
1127 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1128 adequately shooting down all use of the old entries. This
1129 option enables the Linux kernel workaround for this erratum
1130 which sends an IPI to the CPUs that are running the same ASID
1131 as the one being invalidated.
1132
Will Deacon84b65042013-08-20 17:29:55 +01001133config ARM_ERRATA_773022
1134 bool "ARM errata: incorrect instructions may be executed from loop buffer"
1135 depends on CPU_V7
1136 help
1137 This option enables the workaround for the 773022 Cortex-A15
1138 (up to r0p4) erratum. In certain rare sequences of code, the
1139 loop buffer may deliver incorrect instructions. This
1140 workaround disables the loop buffer to avoid the erratum.
1141
Doug Anderson62c0f4a2016-04-07 00:25:00 +01001142config ARM_ERRATA_818325_852422
1143 bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"
1144 depends on CPU_V7
1145 help
1146 This option enables the workaround for:
1147 - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM
1148 instruction might deadlock. Fixed in r0p1.
1149 - Cortex-A12 852422: Execution of a sequence of instructions might
1150 lead to either a data corruption or a CPU deadlock. Not fixed in
1151 any Cortex-A12 cores yet.
1152 This workaround for all both errata involves setting bit[12] of the
1153 Feature Register. This bit disables an optimisation applied to a
1154 sequence of 2 instructions that use opposing condition codes.
1155
Doug Anderson416bcf22016-04-07 00:26:05 +01001156config ARM_ERRATA_821420
1157 bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock"
1158 depends on CPU_V7
1159 help
1160 This option enables the workaround for the 821420 Cortex-A12
1161 (all revs) erratum. In very rare timing conditions, a sequence
1162 of VMOV to Core registers instructions, for which the second
1163 one is in the shadow of a branch or abort, can lead to a
1164 deadlock when the VMOV instructions are issued out-of-order.
1165
Doug Anderson9f6f9352016-04-07 00:27:26 +01001166config ARM_ERRATA_825619
1167 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"
1168 depends on CPU_V7
1169 help
1170 This option enables the workaround for the 825619 Cortex-A12
1171 (all revs) erratum. Within rare timing constraints, executing a
1172 DMB NSHST or DMB ISHST instruction followed by a mix of Cacheable
1173 and Device/Strongly-Ordered loads and stores might cause deadlock
1174
1175config ARM_ERRATA_852421
1176 bool "ARM errata: A17: DMB ST might fail to create order between stores"
1177 depends on CPU_V7
1178 help
1179 This option enables the workaround for the 852421 Cortex-A17
1180 (r1p0, r1p1, r1p2) erratum. Under very rare timing conditions,
1181 execution of a DMB ST instruction might fail to properly order
1182 stores from GroupA and stores from GroupB.
1183
Doug Anderson62c0f4a2016-04-07 00:25:00 +01001184config ARM_ERRATA_852423
1185 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
1186 depends on CPU_V7
1187 help
1188 This option enables the workaround for:
1189 - Cortex-A17 852423: Execution of a sequence of instructions might
1190 lead to either a data corruption or a CPU deadlock. Not fixed in
1191 any Cortex-A17 cores yet.
1192 This is identical to Cortex-A12 erratum 852422. It is a separate
1193 config option from the A12 erratum due to the way errata are checked
1194 for and handled.
1195
Linus Torvalds1da177e2005-04-16 15:20:36 -07001196endmenu
1197
1198source "arch/arm/common/Kconfig"
1199
Linus Torvalds1da177e2005-04-16 15:20:36 -07001200menu "Bus support"
1201
Linus Torvalds1da177e2005-04-16 15:20:36 -07001202config ISA
1203 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001204 help
1205 Find out whether you have ISA slots on your motherboard. ISA is the
1206 name of a bus system, i.e. the way the CPU talks to the other stuff
1207 inside your box. Other bus systems are PCI, EISA, MicroChannel
1208 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1209 newer boards don't support it. If you have ISA, say Y, otherwise N.
1210
Russell King065909b2006-01-04 15:44:16 +00001211# Select ISA DMA controller support
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212config ISA_DMA
1213 bool
Russell King065909b2006-01-04 15:44:16 +00001214 select ISA_DMA_API
Linus Torvalds1da177e2005-04-16 15:20:36 -07001215
Russell King065909b2006-01-04 15:44:16 +00001216# Select ISA DMA interface
Al Viro5cae8412005-05-04 05:39:22 +01001217config ISA_DMA_API
1218 bool
Al Viro5cae8412005-05-04 05:39:22 +01001219
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +01001220config PCI_NANOENGINE
1221 bool "BSE nanoEngine PCI support"
1222 depends on SA1100_NANOENGINE
1223 help
1224 Enable PCI on the BSE nanoEngine board.
1225
Mike Rapoporta0113a92007-11-25 08:55:34 +01001226config PCI_HOST_ITE8152
1227 bool
1228 depends on PCI && MACH_ARMCORE
1229 default y
1230 select DMABOUNCE
1231
Linus Torvalds1da177e2005-04-16 15:20:36 -07001232endmenu
1233
1234menu "Kernel Features"
1235
Dave Martin3b556582011-12-07 15:38:04 +00001236config HAVE_SMP
1237 bool
1238 help
1239 This option should be selected by machines which have an SMP-
1240 capable CPU.
1241
1242 The only effect of this option is to make the SMP-related
1243 options available to the user for configuration.
1244
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245config SMP
Russell Kingbb2d8132011-05-12 09:52:02 +01001246 bool "Symmetric Multi-Processing"
Russell Kingfbb4dda2011-01-17 18:01:58 +00001247 depends on CPU_V6K || CPU_V7
Russell Kingbc282482009-05-17 18:58:34 +01001248 depends on GENERIC_CLOCKEVENTS
Dave Martin3b556582011-12-07 15:38:04 +00001249 depends on HAVE_SMP
Jonathan Austin801bb212013-02-22 18:56:04 +00001250 depends on MMU || ARM_MPU
Arnd Bergmann03617482015-05-26 15:36:58 +01001251 select IRQ_WORK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001252 help
1253 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08001254 a system with only one CPU, say N. If you have a system with more
1255 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001256
Robert Graffham4a474152014-01-23 15:55:29 -08001257 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258 machines, but will use only one CPU of a multiprocessor machine. If
Robert Graffham4a474152014-01-23 15:55:29 -08001259 you say Y here, the kernel will run on many, but not all,
1260 uniprocessor machines. On a uniprocessor machine, the kernel
1261 will run faster if you say N here.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001262
Paul Bolle395cf962011-08-15 02:02:26 +02001263 See also <file:Documentation/x86/i386/IO-APIC.txt>,
Mauro Carvalho Chehabecf38672018-05-08 23:44:08 -03001264 <file:Documentation/lockup-watchdogs.txt> and the SMP-HOWTO available at
Justin P. Mattock50a23e62010-10-16 10:36:23 -07001265 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001266
1267 If you don't know what to do here, say N.
1268
Russell Kingf00ec482010-09-04 10:47:48 +01001269config SMP_ON_UP
Russell King5744ff42015-02-13 11:04:21 +00001270 bool "Allow booting SMP kernel on uniprocessor systems"
Jonathan Austin801bb212013-02-22 18:56:04 +00001271 depends on SMP && !XIP_KERNEL && MMU
Russell Kingf00ec482010-09-04 10:47:48 +01001272 default y
1273 help
1274 SMP kernels contain instructions which fail on non-SMP processors.
1275 Enabling this option allows the kernel to modify itself to make
1276 these instructions safe. Disabling it allows about 1K of space
1277 savings.
1278
1279 If you don't know what to do here, say Y.
1280
Vincent Guittotc9018aa2011-08-08 13:21:59 +01001281config ARM_CPU_TOPOLOGY
1282 bool "Support cpu topology definition"
1283 depends on SMP && CPU_V7
1284 default y
1285 help
1286 Support ARM cpu topology definition. The MPIDR register defines
1287 affinity between processors which is then used to describe the cpu
1288 topology of an ARM System.
1289
1290config SCHED_MC
1291 bool "Multi-core scheduler support"
1292 depends on ARM_CPU_TOPOLOGY
1293 help
1294 Multi-core scheduler support improves the CPU scheduler's decision
1295 making when dealing with multi-core CPU chips at a cost of slightly
1296 increased overhead in some places. If unsure say N here.
1297
1298config SCHED_SMT
1299 bool "SMT scheduler support"
1300 depends on ARM_CPU_TOPOLOGY
1301 help
1302 Improves the CPU scheduler's decision making when dealing with
1303 MultiThreading at a cost of slightly increased overhead in some
1304 places. If unsure say N here.
1305
Russell Kinga8cbcd92009-05-16 11:51:14 +01001306config HAVE_ARM_SCU
1307 bool
Russell Kinga8cbcd92009-05-16 11:51:14 +01001308 help
1309 This option enables support for the ARM system coherency unit
1310
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001311config HAVE_ARM_ARCH_TIMER
Marc Zyngier022c03a2012-01-11 17:25:17 +00001312 bool "Architected timer support"
1313 depends on CPU_V7
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001314 select ARM_ARCH_TIMER
Will Deacon0c4034622013-11-19 15:46:17 +01001315 select GENERIC_CLOCKEVENTS
Marc Zyngier022c03a2012-01-11 17:25:17 +00001316 help
1317 This option enables support for the ARM architected timer
1318
Russell Kingf32f4ce2009-05-16 12:14:21 +01001319config HAVE_ARM_TWD
1320 bool
Daniel Lezcanobb0eb052017-05-26 19:34:11 +02001321 select TIMER_OF if OF
Russell Kingf32f4ce2009-05-16 12:14:21 +01001322 help
1323 This options enables support for the ARM timer and watchdog unit
1324
Nicolas Pitree8db2882012-04-12 02:45:22 -04001325config MCPM
1326 bool "Multi-Cluster Power Management"
1327 depends on CPU_V7 && SMP
1328 help
1329 This option provides the common power management infrastructure
1330 for (multi-)cluster based systems, such as big.LITTLE based
1331 systems.
1332
Haojian Zhuangebf4a5c2014-04-15 14:52:00 +08001333config MCPM_QUAD_CLUSTER
1334 bool
1335 depends on MCPM
1336 help
1337 To avoid wasting resources unnecessarily, MCPM only supports up
1338 to 2 clusters by default.
1339 Platforms with 3 or 4 clusters that use MCPM must select this
1340 option to allow the additional clusters to be managed.
1341
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001342config BIG_LITTLE
1343 bool "big.LITTLE support (Experimental)"
1344 depends on CPU_V7 && SMP
1345 select MCPM
1346 help
1347 This option enables support selections for the big.LITTLE
1348 system architecture.
1349
1350config BL_SWITCHER
1351 bool "big.LITTLE switcher support"
Arnd Bergmann6c044fe2015-11-19 15:49:23 +01001352 depends on BIG_LITTLE && MCPM && HOTPLUG_CPU && ARM_GIC
Russell King51aaf812014-04-22 22:26:27 +01001353 select CPU_PM
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001354 help
1355 The big.LITTLE "switcher" provides the core functionality to
1356 transparently handle transition between a cluster of A15's
1357 and a cluster of A7's in a big.LITTLE system.
1358
Nicolas Pitreb22537c2012-04-12 03:04:28 -04001359config BL_SWITCHER_DUMMY_IF
1360 tristate "Simple big.LITTLE switcher user interface"
1361 depends on BL_SWITCHER && DEBUG_KERNEL
1362 help
1363 This is a simple and dummy char dev interface to control
1364 the big.LITTLE switcher core code. It is meant for
1365 debugging purposes only.
1366
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001367choice
1368 prompt "Memory split"
Russell King006fa252014-02-26 19:40:46 +00001369 depends on MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001370 default VMSPLIT_3G
1371 help
1372 Select the desired split between kernel and user memory.
1373
1374 If you are not absolutely sure what you are doing, leave this
1375 option alone!
1376
1377 config VMSPLIT_3G
1378 bool "3G/1G user/kernel split"
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001379 config VMSPLIT_3G_OPT
Yisheng Xiebbeedfd2017-06-09 15:28:18 +01001380 depends on !ARM_LPAE
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001381 bool "3G/1G user/kernel split (for full 1G low memory)"
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001382 config VMSPLIT_2G
1383 bool "2G/2G user/kernel split"
1384 config VMSPLIT_1G
1385 bool "1G/3G user/kernel split"
1386endchoice
1387
1388config PAGE_OFFSET
1389 hex
Russell King006fa252014-02-26 19:40:46 +00001390 default PHYS_OFFSET if !MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001391 default 0x40000000 if VMSPLIT_1G
1392 default 0x80000000 if VMSPLIT_2G
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001393 default 0xB0000000 if VMSPLIT_3G_OPT
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001394 default 0xC0000000
1395
Linus Torvalds1da177e2005-04-16 15:20:36 -07001396config NR_CPUS
1397 int "Maximum number of CPUs (2-32)"
1398 range 2 32
1399 depends on SMP
1400 default "4"
1401
Russell Kinga054a812005-11-02 22:24:33 +00001402config HOTPLUG_CPU
Russell King00b7ded2012-10-22 22:54:30 +01001403 bool "Support for hot-pluggable CPUs"
Stephen Rothwell40b31362013-05-21 13:49:35 +10001404 depends on SMP
Russell Kinga054a812005-11-02 22:24:33 +00001405 help
1406 Say Y here to experiment with turning CPUs off and on. CPUs
1407 can be controlled through /sys/devices/system/cpu.
1408
Will Deacon2bdd4242012-12-12 19:20:52 +00001409config ARM_PSCI
1410 bool "Support for the ARM Power State Coordination Interface (PSCI)"
Jens Wiklandere6796602016-01-04 15:46:47 +01001411 depends on HAVE_ARM_SMCCC
Mark Rutlandbe120392015-07-31 15:46:19 +01001412 select ARM_PSCI_FW
Will Deacon2bdd4242012-12-12 19:20:52 +00001413 help
1414 Say Y here if you want Linux to communicate with system firmware
1415 implementing the PSCI specification for CPU-centric power
1416 management operations described in ARM document number ARM DEN
1417 0022A ("Power State Coordination Interface System Software on
1418 ARM processors").
1419
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001420# The GPIO number here must be sorted by descending number. In case of
1421# a multiplatform kernel, we just want the highest value required by the
1422# selected platforms.
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001423config ARCH_NR_GPIO
1424 int
Marek Vasut139358b2017-05-09 08:20:03 -05001425 default 2048 if ARCH_SOCFPGA
Geert Uytterhoevend9be9ce2018-04-20 15:28:27 +02001426 default 1024 if ARCH_BRCMSTB || ARCH_RENESAS || ARCH_TEGRA || \
Gregory Fongb35d2e52015-05-28 19:14:10 -07001427 ARCH_ZYNQ
Tomasz Figaaa425872014-07-03 13:17:12 +02001428 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1429 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
Boris BREZILLONeb171a92014-04-10 15:52:46 +02001430 default 416 if ARCH_SUNXI
Olof Johansson06b851e2013-04-02 18:33:58 -07001431 default 392 if ARCH_U8500
Tony Prisk01bb9142013-03-09 18:22:30 +13001432 default 352 if ARCH_VT8500
Heiko Stuebner7b5da4c2014-05-26 00:13:51 +02001433 default 288 if ARCH_ROCKCHIP
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001434 default 264 if MACH_H4700
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001435 default 0
1436 help
1437 Maximum number of GPIOs in the system.
1438
1439 If unsure, leave the default value.
1440
Russell Kingc9218b12013-04-27 23:31:10 +01001441config HZ_FIXED
Russell Kingf8065812006-03-02 22:41:59 +00001442 int
Krzysztof Kozlowskida6b21e2016-11-18 13:15:12 +02001443 default 200 if ARCH_EBSA110
Alexandre Belloni1164f672015-03-13 22:57:24 +01001444 default 128 if SOC_AT91RM9200
Russell King47d84682013-09-10 23:47:55 +01001445 default 0
Russell Kingc9218b12013-04-27 23:31:10 +01001446
1447choice
Russell King47d84682013-09-10 23:47:55 +01001448 depends on HZ_FIXED = 0
Russell Kingc9218b12013-04-27 23:31:10 +01001449 prompt "Timer frequency"
1450
1451config HZ_100
1452 bool "100 Hz"
1453
1454config HZ_200
1455 bool "200 Hz"
1456
1457config HZ_250
1458 bool "250 Hz"
1459
1460config HZ_300
1461 bool "300 Hz"
1462
1463config HZ_500
1464 bool "500 Hz"
1465
1466config HZ_1000
1467 bool "1000 Hz"
1468
1469endchoice
1470
1471config HZ
1472 int
Russell King47d84682013-09-10 23:47:55 +01001473 default HZ_FIXED if HZ_FIXED != 0
Russell Kingc9218b12013-04-27 23:31:10 +01001474 default 100 if HZ_100
1475 default 200 if HZ_200
1476 default 250 if HZ_250
1477 default 300 if HZ_300
1478 default 500 if HZ_500
1479 default 1000
1480
1481config SCHED_HRTICK
1482 def_bool HIGH_RES_TIMERS
Russell Kingf8065812006-03-02 22:41:59 +00001483
Catalin Marinas16c79652009-07-24 12:33:02 +01001484config THUMB2_KERNEL
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001485 bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
Uwe Kleine-König4477ca42013-03-21 21:02:37 +01001486 depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001487 default y if CPU_THUMBONLY
Arnd Bergmann89bace62011-06-10 14:12:21 +00001488 select ARM_UNWIND
Catalin Marinas16c79652009-07-24 12:33:02 +01001489 help
1490 By enabling this option, the kernel will be compiled in
Nicolas Pitre75fea302017-11-29 07:52:52 +01001491 Thumb-2 mode.
Catalin Marinas16c79652009-07-24 12:33:02 +01001492
1493 If unsure, say N.
1494
Dave Martin6f685c52011-03-03 11:41:12 +01001495config THUMB2_AVOID_R_ARM_THM_JUMP11
1496 bool "Work around buggy Thumb-2 short branch relocations in gas"
1497 depends on THUMB2_KERNEL && MODULES
1498 default y
1499 help
1500 Various binutils versions can resolve Thumb-2 branches to
1501 locally-defined, preemptible global symbols as short-range "b.n"
1502 branch instructions.
1503
1504 This is a problem, because there's no guarantee the final
1505 destination of the symbol, or any candidate locations for a
1506 trampoline, are within range of the branch. For this reason, the
1507 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1508 relocation in modules at all, and it makes little sense to add
1509 support.
1510
1511 The symptom is that the kernel fails with an "unsupported
1512 relocation" error when loading some modules.
1513
1514 Until fixed tools are available, passing
1515 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1516 code which hits this problem, at the cost of a bit of extra runtime
1517 stack usage in some cases.
1518
1519 The problem is described in more detail at:
1520 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1521
1522 Only Thumb-2 kernels are affected.
1523
1524 Unless you are sure your tools don't have this problem, say Y.
1525
Nicolas Pitre42f25bd2015-12-12 02:49:21 +01001526config ARM_PATCH_IDIV
1527 bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
1528 depends on CPU_32v7 && !XIP_KERNEL
1529 default y
1530 help
1531 The ARM compiler inserts calls to __aeabi_idiv() and
1532 __aeabi_uidiv() when it needs to perform division on signed
1533 and unsigned integers. Some v7 CPUs have support for the sdiv
1534 and udiv instructions that can be used to implement those
1535 functions.
1536
1537 Enabling this option allows the kernel to modify itself to
1538 replace the first two instructions of these library functions
1539 with the sdiv or udiv plus "bx lr" instructions when the CPU
1540 it is running on supports them. Typically this will be faster
1541 and less power intensive than running the original library
1542 code to do integer division.
1543
Nicolas Pitre704bdda2006-01-14 16:33:50 +00001544config AEABI
Russell King49460972017-06-14 10:25:18 +01001545 bool "Use the ARM EABI to compile the kernel" if !CPU_V7 && !CPU_V7M && !CPU_V6 && !CPU_V6K
1546 default CPU_V7 || CPU_V7M || CPU_V6 || CPU_V6K
Nicolas Pitre704bdda2006-01-14 16:33:50 +00001547 help
1548 This option allows for the kernel to be compiled using the latest
1549 ARM ABI (aka EABI). This is only useful if you are using a user
1550 space environment that is also compiled with EABI.
1551
1552 Since there are major incompatibilities between the legacy ABI and
1553 EABI, especially with regard to structure member alignment, this
1554 option also changes the kernel syscall calling convention to
1555 disambiguate both ABIs and allow for backward compatibility support
1556 (selected with CONFIG_OABI_COMPAT).
1557
1558 To use this you need GCC version 4.0.0 or later.
1559
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001560config OABI_COMPAT
Russell Kinga73a3ff2006-02-08 21:09:55 +00001561 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08001562 depends on AEABI && !THUMB2_KERNEL
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001563 help
1564 This option preserves the old syscall interface along with the
1565 new (ARM EABI) one. It also provides a compatibility layer to
1566 intercept syscalls that have structure arguments which layout
1567 in memory differs between the legacy ABI and the new ARM EABI
1568 (only for non "thumb" binaries). This option adds a tiny
1569 overhead to all syscalls and produces a slightly larger kernel.
Kees Cook91702172013-11-09 00:51:56 +01001570
1571 The seccomp filter system will not be available when this is
1572 selected, since there is no way yet to sensibly distinguish
1573 between calling conventions during filtering.
1574
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001575 If you know you'll be using only pure EABI user space then you
1576 can say N here. If this option is not selected and you attempt
1577 to execute a legacy ABI binary then the result will be
1578 UNPREDICTABLE (in fact it can be predicted that it won't work
Kees Cookb02f8462013-11-09 00:31:11 +01001579 at all). If in doubt say N.
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001580
Mel Gormaneb335752009-05-13 17:34:48 +01001581config ARCH_HAS_HOLES_MEMORYMODEL
Mel Gormane80d6a22008-08-14 11:10:14 +01001582 bool
Mel Gormane80d6a22008-08-14 11:10:14 +01001583
Russell King05944d72006-11-30 20:43:51 +00001584config ARCH_SPARSEMEM_ENABLE
1585 bool
1586
Russell King07a2f732008-10-01 21:39:58 +01001587config ARCH_SPARSEMEM_DEFAULT
1588 def_bool ARCH_SPARSEMEM_ENABLE
1589
Russell King05944d72006-11-30 20:43:51 +00001590config ARCH_SELECT_MEMORY_MODEL
Russell Kingbe370302010-05-07 17:40:33 +01001591 def_bool ARCH_SPARSEMEM_ENABLE
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07001592
Will Deacon7b7bf492011-05-19 13:21:14 +01001593config HAVE_ARCH_PFN_VALID
1594 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1595
Kirill A. Shutemove5855132017-06-06 14:31:20 +03001596config HAVE_GENERIC_GUP
Steve Capperb8cd51a2014-10-09 15:29:20 -07001597 def_bool y
1598 depends on ARM_LPAE
1599
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001600config HIGHMEM
Russell Kinge8db89a2011-05-12 09:53:05 +01001601 bool "High Memory Support"
1602 depends on MMU
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001603 help
1604 The address space of ARM processors is only 4 Gigabytes large
1605 and it has to accommodate user address space, kernel address
1606 space as well as some memory mapped IO. That means that, if you
1607 have a large amount of physical memory and/or IO, not all of the
1608 memory can be "permanently mapped" by the kernel. The physical
1609 memory that is not permanently mapped is called "high memory".
1610
1611 Depending on the selected kernel/user memory split, minimum
1612 vmalloc space and actual amount of RAM, you may not need this
1613 option which should result in a slightly faster kernel.
1614
1615 If unsure, say n.
1616
Russell King65cec8e2009-08-17 20:02:06 +01001617config HIGHPTE
Russell King9a431bd2015-06-25 10:44:08 +01001618 bool "Allocate 2nd-level pagetables from highmem" if EXPERT
Russell King65cec8e2009-08-17 20:02:06 +01001619 depends on HIGHMEM
Russell King9a431bd2015-06-25 10:44:08 +01001620 default y
Russell Kingb4d103d2015-06-25 10:49:45 +01001621 help
1622 The VM uses one page of physical memory for each page table.
1623 For systems with a lot of processes, this can use a lot of
1624 precious low memory, eventually leading to low memory being
1625 consumed by page tables. Setting this option will allow
1626 user-space 2nd level page tables to reside in high memory.
Russell King65cec8e2009-08-17 20:02:06 +01001627
Russell Kinga5e090a2015-08-19 20:40:41 +01001628config CPU_SW_DOMAIN_PAN
1629 bool "Enable use of CPU domains to implement privileged no-access"
1630 depends on MMU && !ARM_LPAE
Jamie Iles1b8873a2010-02-02 20:25:44 +01001631 default y
1632 help
Russell Kinga5e090a2015-08-19 20:40:41 +01001633 Increase kernel security by ensuring that normal kernel accesses
1634 are unable to access userspace addresses. This can help prevent
1635 use-after-free bugs becoming an exploitable privilege escalation
1636 by ensuring that magic values (such as LIST_POISON) will always
1637 fault when dereferenced.
1638
1639 CPUs with low-vector mappings use a best-efforts implementation.
1640 Their lower 1MB needs to remain accessible for the vectors, but
1641 the remainder of userspace will become appropriately inaccessible.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001642
1643config HW_PERF_EVENTS
Mark Rutlandfa8ad782015-07-06 12:23:53 +01001644 def_bool y
1645 depends on ARM_PMU
Jamie Iles1b8873a2010-02-02 20:25:44 +01001646
Catalin Marinas1355e2a2012-07-25 14:32:38 +01001647config SYS_SUPPORTS_HUGETLBFS
1648 def_bool y
1649 depends on ARM_LPAE
1650
Catalin Marinas8d962502012-07-25 14:39:26 +01001651config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1652 def_bool y
1653 depends on ARM_LPAE
1654
Steven Capper4bfab202013-07-26 14:58:22 +01001655config ARCH_WANT_GENERAL_HUGETLB
1656 def_bool y
1657
Ard Biesheuvel7d485f62014-11-24 16:54:35 +01001658config ARM_MODULE_PLTS
1659 bool "Use PLTs to allow module memory to spill over into vmalloc area"
1660 depends on MODULES
Anders Roxelle7229f72018-03-26 14:54:25 +01001661 default y
Ard Biesheuvel7d485f62014-11-24 16:54:35 +01001662 help
1663 Allocate PLTs when loading modules so that jumps and calls whose
1664 targets are too far away for their relative offsets to be encoded
1665 in the instructions themselves can be bounced via veneers in the
1666 module's PLT. This allows modules to be allocated in the generic
1667 vmalloc area after the dedicated module memory area has been
1668 exhausted. The modules will use slightly more memory, but after
1669 rounding up to page size, the actual memory footprint is usually
1670 the same.
1671
Anders Roxelle7229f72018-03-26 14:54:25 +01001672 Disabling this is usually safe for small single-platform
1673 configurations. If unsure, say y.
Ard Biesheuvel7d485f62014-11-24 16:54:35 +01001674
Magnus Dammc1b2d972010-07-05 10:00:11 +01001675config FORCE_MAX_ZONEORDER
Ulrich Hecht36d6c922015-08-14 15:51:06 +02001676 int "Maximum zone order"
Yegor Yefremov898f08e2012-10-08 14:37:53 -07001677 default "12" if SOC_AM33XX
Uwe Kleine-König6d85e2b2011-11-17 14:36:23 +01001678 default "9" if SA1111 || ARCH_EFM32
Magnus Dammc1b2d972010-07-05 10:00:11 +01001679 default "11"
1680 help
1681 The kernel memory allocator divides physically contiguous memory
1682 blocks into "zones", where each zone is a power of two number of
1683 pages. This option selects the largest power of two that the kernel
1684 keeps in the memory allocator. If you need to allocate very large
1685 blocks of physically contiguous memory, then you may need to
1686 increase this value.
1687
1688 This config option is actually maximum order plus one. For example,
1689 a value of 11 means that the largest free memory block is 2^10 pages.
1690
Linus Torvalds1da177e2005-04-16 15:20:36 -07001691config ALIGNMENT_TRAP
1692 bool
Hyok S. Choif12d0d72006-09-26 17:36:37 +09001693 depends on CPU_CP15_MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -07001694 default y if !ARCH_EBSA110
Russell Kinge119bff2010-01-10 17:23:29 +00001695 select HAVE_PROC_CPU if PROC_FS
Linus Torvalds1da177e2005-04-16 15:20:36 -07001696 help
Matt LaPlante84eb8d02006-10-03 22:53:09 +02001697 ARM processors cannot fetch/store information which is not
Linus Torvalds1da177e2005-04-16 15:20:36 -07001698 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1699 address divisible by 4. On 32-bit ARM processors, these non-aligned
1700 fetch/store instructions will be emulated in software if you say
1701 here, which has a severe performance impact. This is necessary for
1702 correct operation of some network protocols. With an IP-only
1703 configuration it is safe to say N, otherwise say Y.
1704
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001705config UACCESS_WITH_MEMCPY
Linus Walleij38ef2ad2012-09-10 16:36:37 +01001706 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1707 depends on MMU
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001708 default y if CPU_FEROCEON
1709 help
1710 Implement faster copy_to_user and clear_user methods for CPU
1711 cores where a 8-word STM instruction give significantly higher
1712 memory write throughput than a sequence of individual 32bit stores.
1713
1714 A possible side effect is a slight increase in scheduling latency
1715 between threads sharing the same address space if they invoke
1716 such copy operations with large buffers.
1717
1718 However, if the CPU data cache is using a write-allocate mode,
1719 this option is unlikely to provide any performance gain.
1720
Nicolas Pitre70c70d92010-08-26 15:08:35 -07001721config SECCOMP
1722 bool
1723 prompt "Enable seccomp to safely compute untrusted bytecode"
1724 ---help---
1725 This kernel feature is useful for number crunching applications
1726 that may need to compute untrusted bytecode during their
1727 execution. By using pipes or other transports made available to
1728 the process as file descriptors supporting the read/write
1729 syscalls, it's possible to isolate those applications in
1730 their own address space using seccomp. Once seccomp is
1731 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1732 and the task is only allowed to execute a few safe syscalls
1733 defined by each seccomp mode.
1734
Stefano Stabellini02c24332015-11-23 10:32:57 +00001735config PARAVIRT
1736 bool "Enable paravirtualization code"
1737 help
1738 This changes the kernel so it can modify itself when it is run
1739 under a hypervisor, potentially improving performance significantly
1740 over full virtualization.
1741
1742config PARAVIRT_TIME_ACCOUNTING
1743 bool "Paravirtual steal time accounting"
1744 select PARAVIRT
Stefano Stabellini02c24332015-11-23 10:32:57 +00001745 help
1746 Select this option to enable fine granularity task steal time
1747 accounting. Time spent executing other tasks in parallel with
1748 the current vCPU is discounted from the vCPU power. To account for
1749 that, there can be a small performance impact.
1750
1751 If in doubt, say N here.
1752
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001753config XEN_DOM0
1754 def_bool y
1755 depends on XEN
1756
1757config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -07001758 bool "Xen guest support on ARM"
Ian Campbell85323a92013-03-07 07:17:25 +00001759 depends on ARM && AEABI && OF
Arnd Bergmannf880b672012-10-09 10:33:52 +00001760 depends on CPU_V7 && !CPU_V6
Ian Campbell85323a92013-03-07 07:17:25 +00001761 depends on !GENERIC_ATOMIC64
Uwe Kleine-König7693dec2014-03-03 09:25:52 -05001762 depends on MMU
Russell King51aaf812014-04-22 22:26:27 +01001763 select ARCH_DMA_ADDR_T_64BIT
Stefano Stabellini17b7ab82013-04-24 18:47:18 +00001764 select ARM_PSCI
Christoph Hellwigf21254c2018-04-03 16:43:51 +02001765 select SWIOTLB
Stefano Stabellini83862cc2013-10-10 13:40:44 +00001766 select SWIOTLB_XEN
Stefano Stabellini02c24332015-11-23 10:32:57 +00001767 select PARAVIRT
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001768 help
1769 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1770
Ard Biesheuvel189af462018-12-06 09:32:57 +01001771config STACKPROTECTOR_PER_TASK
1772 bool "Use a unique stack canary value for each task"
1773 depends on GCC_PLUGINS && STACKPROTECTOR && SMP && !XIP_DEFLATED_DATA
1774 select GCC_PLUGIN_ARM_SSP_PER_TASK
1775 default y
1776 help
1777 Due to the fact that GCC uses an ordinary symbol reference from
1778 which to load the value of the stack canary, this value can only
1779 change at reboot time on SMP systems, and all tasks running in the
1780 kernel's address space are forced to use the same canary value for
1781 the entire duration that the system is up.
1782
1783 Enable this option to switch to a different method that uses a
1784 different canary value for each task.
1785
Linus Torvalds1da177e2005-04-16 15:20:36 -07001786endmenu
1787
1788menu "Boot options"
1789
Grant Likely9eb8f672011-04-28 14:27:20 -06001790config USE_OF
1791 bool "Flattened Device Tree support"
Russell Kingb1b3f492012-10-06 17:12:25 +01001792 select IRQ_DOMAIN
Grant Likely9eb8f672011-04-28 14:27:20 -06001793 select OF
Grant Likely9eb8f672011-04-28 14:27:20 -06001794 help
1795 Include support for flattened device tree machine descriptions.
1796
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001797config ATAGS
1798 bool "Support for the traditional ATAGS boot data passing" if USE_OF
1799 default y
1800 help
1801 This is the traditional way of passing data to the kernel at boot
1802 time. If you are solely relying on the flattened device tree (or
1803 the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1804 to remove ATAGS support from your kernel binary. If unsure,
1805 leave this to y.
1806
1807config DEPRECATED_PARAM_STRUCT
1808 bool "Provide old way to pass kernel parameters"
1809 depends on ATAGS
1810 help
1811 This was deprecated in 2001 and announced to live on for 5 years.
1812 Some old boot loaders still use this way.
1813
Linus Torvalds1da177e2005-04-16 15:20:36 -07001814# Compressed boot loader in ROM. Yes, we really want to ask about
1815# TEXT and BSS so we preserve their values in the config files.
1816config ZBOOT_ROM_TEXT
1817 hex "Compressed ROM boot loader base address"
1818 default "0"
1819 help
1820 The physical address at which the ROM-able zImage is to be
1821 placed in the target. Platforms which normally make use of
1822 ROM-able zImage formats normally set this to a suitable
1823 value in their defconfig file.
1824
1825 If ZBOOT_ROM is not enabled, this has no effect.
1826
1827config ZBOOT_ROM_BSS
1828 hex "Compressed ROM boot loader BSS address"
1829 default "0"
1830 help
Dan Fandrichf8c440b2006-09-20 23:28:51 +01001831 The base address of an area of read/write memory in the target
1832 for the ROM-able zImage which must be available while the
1833 decompressor is running. It must be large enough to hold the
1834 entire decompressed kernel plus an additional 128 KiB.
1835 Platforms which normally make use of ROM-able zImage formats
1836 normally set this to a suitable value in their defconfig file.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001837
1838 If ZBOOT_ROM is not enabled, this has no effect.
1839
1840config ZBOOT_ROM
1841 bool "Compressed boot loader in ROM/flash"
1842 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
Russell King10968132014-01-01 11:59:44 +00001843 depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001844 help
1845 Say Y here if you intend to execute your compressed kernel image
1846 (zImage) directly from ROM or flash. If unsure, say N.
1847
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001848config ARM_APPENDED_DTB
1849 bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
Russell King10968132014-01-01 11:59:44 +00001850 depends on OF
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001851 help
1852 With this option, the boot code will look for a device tree binary
1853 (DTB) appended to zImage
1854 (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1855
1856 This is meant as a backward compatibility convenience for those
1857 systems with a bootloader that can't be upgraded to accommodate
1858 the documented boot protocol using a device tree.
1859
1860 Beware that there is very little in terms of protection against
1861 this option being confused by leftover garbage in memory that might
1862 look like a DTB header after a reboot if no actual DTB is appended
1863 to zImage. Do not leave this option active in a production kernel
1864 if you don't intend to always append a DTB. Proper passing of the
1865 location into r2 of a bootloader provided DTB is always preferable
1866 to this option.
1867
Nicolas Pitreb90b9a32011-09-13 22:37:07 -04001868config ARM_ATAG_DTB_COMPAT
1869 bool "Supplement the appended DTB with traditional ATAG information"
1870 depends on ARM_APPENDED_DTB
1871 help
1872 Some old bootloaders can't be updated to a DTB capable one, yet
1873 they provide ATAGs with memory configuration, the ramdisk address,
1874 the kernel cmdline string, etc. Such information is dynamically
1875 provided by the bootloader and can't always be stored in a static
1876 DTB. To allow a device tree enabled kernel to be used with such
1877 bootloaders, this option allows zImage to extract the information
1878 from the ATAG list and store it at run time into the appended DTB.
1879
Genoud Richardd0f34a12012-06-26 16:37:59 +01001880choice
1881 prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1882 default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1883
1884config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1885 bool "Use bootloader kernel arguments if available"
1886 help
1887 Uses the command-line options passed by the boot loader instead of
1888 the device tree bootargs property. If the boot loader doesn't provide
1889 any, the device tree bootargs property will be used.
1890
1891config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1892 bool "Extend with bootloader kernel arguments"
1893 help
1894 The command-line arguments provided by the boot loader will be
1895 appended to the the device tree bootargs property.
1896
1897endchoice
1898
Linus Torvalds1da177e2005-04-16 15:20:36 -07001899config CMDLINE
1900 string "Default kernel command string"
1901 default ""
1902 help
1903 On some architectures (EBSA110 and CATS), there is currently no way
1904 for the boot loader to pass arguments to the kernel. For these
1905 architectures, you should supply some command-line options at build
1906 time by entering them here. As a minimum, you should specify the
1907 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1908
Victor Boivie4394c122011-05-04 17:07:55 +01001909choice
1910 prompt "Kernel command line type" if CMDLINE != ""
1911 default CMDLINE_FROM_BOOTLOADER
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001912 depends on ATAGS
Victor Boivie4394c122011-05-04 17:07:55 +01001913
1914config CMDLINE_FROM_BOOTLOADER
1915 bool "Use bootloader kernel arguments if available"
1916 help
1917 Uses the command-line options passed by the boot loader. If
1918 the boot loader doesn't provide any, the default kernel command
1919 string provided in CMDLINE will be used.
1920
1921config CMDLINE_EXTEND
1922 bool "Extend bootloader kernel arguments"
1923 help
1924 The command-line arguments provided by the boot loader will be
1925 appended to the default kernel command string.
1926
Alexander Holler92d20402010-02-16 19:04:53 +01001927config CMDLINE_FORCE
1928 bool "Always use the default kernel command string"
Alexander Holler92d20402010-02-16 19:04:53 +01001929 help
1930 Always use the default kernel command string, even if the boot
1931 loader passes other arguments to the kernel.
1932 This is useful if you cannot or don't want to change the
1933 command-line options your boot loader passes to the kernel.
Victor Boivie4394c122011-05-04 17:07:55 +01001934endchoice
Alexander Holler92d20402010-02-16 19:04:53 +01001935
Linus Torvalds1da177e2005-04-16 15:20:36 -07001936config XIP_KERNEL
1937 bool "Kernel Execute-In-Place from ROM"
Russell King10968132014-01-01 11:59:44 +00001938 depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001939 help
1940 Execute-In-Place allows the kernel to run from non-volatile storage
1941 directly addressable by the CPU, such as NOR flash. This saves RAM
1942 space since the text section of the kernel is not loaded from flash
1943 to RAM. Read-write sections, such as the data section and stack,
1944 are still copied to RAM. The XIP kernel is not compressed since
1945 it has to run directly from flash, so it will take more space to
1946 store it. The flash address used to link the kernel object files,
1947 and for storing it, is configuration dependent. Therefore, if you
1948 say Y here, you must know the proper physical address where to
1949 store the kernel image depending on your own flash memory usage.
1950
1951 Also note that the make target becomes "make xipImage" rather than
1952 "make zImage" or "make Image". The final kernel binary to put in
1953 ROM memory will be arch/arm/boot/xipImage.
1954
1955 If unsure, say N.
1956
1957config XIP_PHYS_ADDR
1958 hex "XIP Kernel Physical Location"
1959 depends on XIP_KERNEL
1960 default "0x00080000"
1961 help
1962 This is the physical address in your flash memory the kernel will
1963 be linked for and stored to. This address is dependent on your
1964 own flash usage.
1965
Nicolas Pitreca8b5d92017-08-25 00:54:18 -04001966config XIP_DEFLATED_DATA
1967 bool "Store kernel .data section compressed in ROM"
1968 depends on XIP_KERNEL
1969 select ZLIB_INFLATE
1970 help
1971 Before the kernel is actually executed, its .data section has to be
1972 copied to RAM from ROM. This option allows for storing that data
1973 in compressed form and decompressed to RAM rather than merely being
1974 copied, saving some precious ROM space. A possible drawback is a
1975 slightly longer boot delay.
1976
Richard Purdiec587e4a2007-02-06 21:29:00 +01001977config KEXEC
1978 bool "Kexec system call (EXPERIMENTAL)"
Stephen Warren19ab4282013-06-14 16:14:14 +01001979 depends on (!SMP || PM_SLEEP_SMP)
Arnd Bergmanncb1293e2015-05-26 15:40:44 +01001980 depends on !CPU_V7M
Dave Young2965faa2015-09-09 15:38:55 -07001981 select KEXEC_CORE
Richard Purdiec587e4a2007-02-06 21:29:00 +01001982 help
1983 kexec is a system call that implements the ability to shutdown your
1984 current kernel, and to start another kernel. It is like a reboot
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02001985 but it is independent of the system firmware. And like a reboot
Richard Purdiec587e4a2007-02-06 21:29:00 +01001986 you can start any kernel with it, not just Linux.
1987
1988 It is an ongoing process to be certain the hardware in a machine
1989 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02001990 initially work for you.
Richard Purdiec587e4a2007-02-06 21:29:00 +01001991
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01001992config ATAGS_PROC
1993 bool "Export atags in procfs"
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001994 depends on ATAGS && KEXEC
Uli Luckasb98d7292008-02-22 16:45:18 +01001995 default y
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01001996 help
1997 Should the atags used to boot the kernel be exported in an "atags"
1998 file in procfs. Useful with kexec.
1999
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01002000config CRASH_DUMP
2001 bool "Build kdump crash kernel (EXPERIMENTAL)"
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01002002 help
2003 Generate crash dump after being started by kexec. This should
2004 be normally only set in special crash dump kernels which are
2005 loaded in the main kernel with kexec-tools into a specially
2006 reserved region and then later executed after a crash by
2007 kdump/kexec. The crash dump kernel must be compiled to a
2008 memory address not used by the main kernel
2009
2010 For more details see Documentation/kdump/kdump.txt
2011
Eric Miaoe69edc792010-07-05 15:56:50 +02002012config AUTO_ZRELADDR
2013 bool "Auto calculation of the decompressed kernel image address"
Eric Miaoe69edc792010-07-05 15:56:50 +02002014 help
2015 ZRELADDR is the physical address where the decompressed kernel
2016 image will be placed. If AUTO_ZRELADDR is selected, the address
2017 will be determined at run-time by masking the current IP with
2018 0xf8000000. This assumes the zImage being placed in the first 128MB
2019 from start of memory.
2020
Roy Franz81a0bc32015-09-23 20:17:54 -07002021config EFI_STUB
2022 bool
2023
2024config EFI
2025 bool "UEFI runtime support"
2026 depends on OF && !CPU_BIG_ENDIAN && MMU && AUTO_ZRELADDR && !XIP_KERNEL
2027 select UCS2_STRING
2028 select EFI_PARAMS_FROM_FDT
2029 select EFI_STUB
2030 select EFI_ARMSTUB
2031 select EFI_RUNTIME_WRAPPERS
2032 ---help---
2033 This option provides support for runtime services provided
2034 by UEFI firmware (such as non-volatile variables, realtime
2035 clock, and platform reset). A UEFI stub is also provided to
2036 allow the kernel to be booted as an EFI application. This
2037 is only useful for kernels that may run on systems that have
2038 UEFI firmware.
2039
Ard Biesheuvelbb817be2017-06-02 13:52:07 +00002040config DMI
2041 bool "Enable support for SMBIOS (DMI) tables"
2042 depends on EFI
2043 default y
2044 help
2045 This enables SMBIOS/DMI feature for systems.
2046
2047 This option is only useful on systems that have UEFI firmware.
2048 However, even with this option, the resultant kernel should
2049 continue to boot on existing non-UEFI platforms.
2050
2051 NOTE: This does *NOT* enable or encourage the use of DMI quirks,
2052 i.e., the the practice of identifying the platform via DMI to
2053 decide whether certain workarounds for buggy hardware and/or
2054 firmware need to be enabled. This would require the DMI subsystem
2055 to be enabled much earlier than we do on ARM, which is non-trivial.
2056
Linus Torvalds1da177e2005-04-16 15:20:36 -07002057endmenu
2058
Russell Kingac9d7ef2008-08-18 17:26:00 +01002059menu "CPU Power Management"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002060
Linus Torvalds1da177e2005-04-16 15:20:36 -07002061source "drivers/cpufreq/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002062
Russell Kingac9d7ef2008-08-18 17:26:00 +01002063source "drivers/cpuidle/Kconfig"
2064
2065endmenu
2066
Linus Torvalds1da177e2005-04-16 15:20:36 -07002067menu "Floating point emulation"
2068
2069comment "At least one emulation must be selected"
2070
2071config FPE_NWFPE
2072 bool "NWFPE math emulation"
Dave Martin593c2522010-12-13 21:56:03 +01002073 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -07002074 ---help---
2075 Say Y to include the NWFPE floating point emulator in the kernel.
2076 This is necessary to run most binaries. Linux does not currently
2077 support floating point hardware so you need to say Y here even if
2078 your machine has an FPA or floating point co-processor podule.
2079
2080 You may say N here if you are going to load the Acorn FPEmulator
2081 early in the bootup.
2082
2083config FPE_NWFPE_XP
2084 bool "Support extended precision"
Lennert Buytenhekbedf1422005-11-07 21:12:08 +00002085 depends on FPE_NWFPE
Linus Torvalds1da177e2005-04-16 15:20:36 -07002086 help
2087 Say Y to include 80-bit support in the kernel floating-point
2088 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2089 Note that gcc does not generate 80-bit operations by default,
2090 so in most cases this option only enlarges the size of the
2091 floating point emulator without any good reason.
2092
2093 You almost surely want to say N here.
2094
2095config FPE_FASTFPE
2096 bool "FastFPE math emulation (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08002097 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
Linus Torvalds1da177e2005-04-16 15:20:36 -07002098 ---help---
2099 Say Y here to include the FAST floating point emulator in the kernel.
2100 This is an experimental much faster emulator which now also has full
2101 precision for the mantissa. It does not support any exceptions.
2102 It is very simple, and approximately 3-6 times faster than NWFPE.
2103
2104 It should be sufficient for most programs. It may be not suitable
2105 for scientific calculations, but you have to check this for yourself.
2106 If you do not feel you need a faster FP emulation you should better
2107 choose NWFPE.
2108
2109config VFP
2110 bool "VFP-format floating point maths"
Russell Kinge399b1a2011-01-17 15:08:32 +00002111 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
Linus Torvalds1da177e2005-04-16 15:20:36 -07002112 help
2113 Say Y to include VFP support code in the kernel. This is needed
2114 if your hardware includes a VFP unit.
2115
2116 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2117 release notes and additional status information.
2118
2119 Say N if your target does not have VFP hardware.
2120
Catalin Marinas25ebee02007-09-25 15:22:24 +01002121config VFPv3
2122 bool
2123 depends on VFP
2124 default y if CPU_V7
2125
Catalin Marinasb5872db2008-01-10 19:16:17 +01002126config NEON
2127 bool "Advanced SIMD (NEON) Extension support"
2128 depends on VFPv3 && CPU_V7
2129 help
2130 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2131 Extension.
2132
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002133config KERNEL_MODE_NEON
2134 bool "Support for NEON in kernel mode"
Russell Kingc4a30c32013-09-22 11:08:50 +01002135 depends on NEON && AEABI
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002136 help
2137 Say Y to include support for NEON in kernel mode.
2138
Linus Torvalds1da177e2005-04-16 15:20:36 -07002139endmenu
2140
Linus Torvalds1da177e2005-04-16 15:20:36 -07002141menu "Power management options"
2142
Russell Kingeceab4a2005-11-15 11:31:41 +00002143source "kernel/power/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002144
Johannes Bergf4cb5702007-12-08 02:14:00 +01002145config ARCH_SUSPEND_POSSIBLE
Ezequiel Garcia19a05192013-08-16 10:28:24 +01002146 depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
Uwe Kleine-Königf0d75152012-02-01 10:00:00 +01002147 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
Johannes Bergf4cb5702007-12-08 02:14:00 +01002148 def_bool y
2149
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002150config ARM_CPU_SUSPEND
Lorenzo Pieralisi8b6f2492016-02-01 18:01:30 +01002151 def_bool PM_SLEEP || BL_SWITCHER || ARM_PSCI_FW
Lorenzo Pieralisi1b9bdf52016-02-01 18:01:29 +01002152 depends on ARCH_SUSPEND_POSSIBLE
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002153
Sebastian Capella603fb422014-03-25 01:20:29 +01002154config ARCH_HIBERNATION_POSSIBLE
2155 bool
2156 depends on MMU
2157 default y if ARCH_SUSPEND_POSSIBLE
2158
Linus Torvalds1da177e2005-04-16 15:20:36 -07002159endmenu
2160
Kumar Gala916f7432015-02-26 15:49:09 -06002161source "drivers/firmware/Kconfig"
2162
Ard Biesheuvel652ccae2015-03-10 09:47:44 +01002163if CRYPTO
2164source "arch/arm/crypto/Kconfig"
2165endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002166
Christoffer Dall749cf76c2013-01-20 18:28:06 -05002167source "arch/arm/kvm/Kconfig"