blob: 9a74efda3d18a8c45b0ac898205f7a5ac373917b [file] [log] [blame]
Kuninori Morimotocfa66a82013-07-24 00:36:51 -07001/*
2 * Bock-W board support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070015 */
16
17#include <linux/of_platform.h>
Geert Uytterhoeven02c94f32014-06-20 18:53:04 +020018
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070019#include <asm/mach/arch.h>
Geert Uytterhoeven02c94f32014-06-20 18:53:04 +020020
Magnus Dammfd44aa52014-06-17 16:47:37 +090021#include "common.h"
Geert Uytterhoeven02c94f32014-06-20 18:53:04 +020022#include "r8a7778.h"
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070023
24/*
25 * see board-bock.c for checking detail of dip-switch
26 */
27
Kuninori Morimoto90357fc2013-10-02 01:33:36 -070028#define FPGA 0x18200000
29#define IRQ0MR 0x30
30#define COMCTLR 0x101c
Kuninori Morimoto79990c12013-10-10 23:35:34 -070031
32#define PFC 0xfffc0000
33#define PUPR4 0x110
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070034static void __init bockw_init(void)
35{
Kuninori Morimotob6d3eba2013-10-10 23:35:06 -070036 void __iomem *fpga;
Kuninori Morimoto79990c12013-10-10 23:35:34 -070037 void __iomem *pfc;
Kuninori Morimoto90357fc2013-10-02 01:33:36 -070038
Ulrich Hecht43cbec82015-02-16 17:58:49 +010039#ifndef CONFIG_COMMON_CLK
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070040 r8a7778_clock_init();
Ulrich Hecht43cbec82015-02-16 17:58:49 +010041#endif
Kuninori Morimoto90357fc2013-10-02 01:33:36 -070042 r8a7778_init_irq_extpin_dt(1);
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070043 r8a7778_add_dt_devices();
44
Kuninori Morimoto90357fc2013-10-02 01:33:36 -070045 fpga = ioremap_nocache(FPGA, SZ_1M);
46 if (fpga) {
47 /*
48 * CAUTION
49 *
50 * IRQ0/1 is cascaded interrupt from FPGA.
51 * it should be cared in the future
52 * Now, it is assuming IRQ0 was used only from SMSC.
53 */
54 u16 val = ioread16(fpga + IRQ0MR);
55 val &= ~(1 << 4); /* enable SMSC911x */
56 iowrite16(val, fpga + IRQ0MR);
Kuninori Morimotob6d3eba2013-10-10 23:35:06 -070057
58 iounmap(fpga);
Kuninori Morimoto90357fc2013-10-02 01:33:36 -070059 }
60
Kuninori Morimoto79990c12013-10-10 23:35:34 -070061 pfc = ioremap_nocache(PFC, 0x200);
62 if (pfc) {
63 /*
64 * FIXME
65 *
66 * SDHI CD/WP pin needs pull-up
67 */
68 iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
69 iounmap(pfc);
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070070 }
71
72 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
73}
74
75static const char *bockw_boards_compat_dt[] __initdata = {
76 "renesas,bockw-reference",
77 NULL,
78};
79
80DT_MACHINE_START(BOCKW_DT, "bockw")
Magnus Dammca609e62014-08-20 22:03:21 +090081 .init_early = shmobile_init_delay,
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070082 .init_irq = r8a7778_init_irq_dt,
83 .init_machine = bockw_init,
Magnus Damm6e15a382014-07-31 08:32:59 +090084 .init_late = shmobile_init_late,
Kuninori Morimotocfa66a82013-07-24 00:36:51 -070085 .dt_compat = bockw_boards_compat_dt,
86MACHINE_END