Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 2 | config CSKY |
| 3 | def_bool y |
Yury Norov | 942fa98 | 2018-05-16 11:18:49 +0300 | [diff] [blame] | 4 | select ARCH_32BIT_OFF_T |
Christoph Hellwig | 13bf5ce | 2019-03-25 15:44:06 +0100 | [diff] [blame] | 5 | select ARCH_HAS_DMA_PREP_COHERENT |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 6 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
| 7 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
| 8 | select ARCH_USE_BUILTIN_BSWAP |
| 9 | select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2 |
| 10 | select COMMON_CLK |
| 11 | select CLKSRC_MMIO |
Guo Ren | 1994cc4 | 2019-05-10 12:57:27 +0800 | [diff] [blame] | 12 | select CSKY_MPINTC if CPU_CK860 |
| 13 | select CSKY_MP_TIMER if CPU_CK860 |
| 14 | select CSKY_APB_INTC |
Christoph Hellwig | f04b951 | 2018-11-04 17:47:44 +0100 | [diff] [blame] | 15 | select DMA_DIRECT_REMAP |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 16 | select IRQ_DOMAIN |
| 17 | select HANDLE_DOMAIN_IRQ |
| 18 | select DW_APB_TIMER_OF |
Christoph Hellwig | 0055f67 | 2019-08-13 11:41:57 +0200 | [diff] [blame] | 19 | select GENERIC_IOREMAP |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 20 | select GENERIC_LIB_ASHLDI3 |
| 21 | select GENERIC_LIB_ASHRDI3 |
| 22 | select GENERIC_LIB_LSHRDI3 |
| 23 | select GENERIC_LIB_MULDI3 |
| 24 | select GENERIC_LIB_CMPDI2 |
| 25 | select GENERIC_LIB_UCMPDI2 |
| 26 | select GENERIC_ALLOCATOR |
| 27 | select GENERIC_ATOMIC64 |
| 28 | select GENERIC_CLOCKEVENTS |
| 29 | select GENERIC_CPU_DEVICES |
| 30 | select GENERIC_IRQ_CHIP |
| 31 | select GENERIC_IRQ_PROBE |
| 32 | select GENERIC_IRQ_SHOW |
| 33 | select GENERIC_IRQ_MULTI_HANDLER |
| 34 | select GENERIC_SCHED_CLOCK |
| 35 | select GENERIC_SMP_IDLE_THREAD |
Guo Ren | 1994cc4 | 2019-05-10 12:57:27 +0800 | [diff] [blame] | 36 | select GX6605S_TIMER if CPU_CK610 |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 37 | select HAVE_ARCH_TRACEHOOK |
Guo Ren | 2f7932b | 2019-03-20 18:27:27 +0800 | [diff] [blame] | 38 | select HAVE_ARCH_AUDITSYSCALL |
Guo Ren | 0b9f386 | 2020-02-12 10:24:52 +0800 | [diff] [blame] | 39 | select HAVE_COPY_THREAD_TLS |
Guo Ren | 28bb030 | 2019-03-01 08:50:36 +0800 | [diff] [blame] | 40 | select HAVE_DYNAMIC_FTRACE |
Guo Ren | 230c77a | 2018-12-09 14:29:59 +0800 | [diff] [blame] | 41 | select HAVE_FUNCTION_TRACER |
Guo Ren | d7950be | 2018-12-15 21:04:27 +0800 | [diff] [blame] | 42 | select HAVE_FUNCTION_GRAPH_TRACER |
Guo Ren | 28bb030 | 2019-03-01 08:50:36 +0800 | [diff] [blame] | 43 | select HAVE_FTRACE_MCOUNT_RECORD |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 44 | select HAVE_KERNEL_GZIP |
| 45 | select HAVE_KERNEL_LZO |
| 46 | select HAVE_KERNEL_LZMA |
Guo Ren | f50fd2d | 2019-01-02 22:09:25 +0800 | [diff] [blame] | 47 | select HAVE_PERF_EVENTS |
Mao Han | daac95e | 2019-04-15 17:17:29 +0800 | [diff] [blame] | 48 | select HAVE_PERF_REGS |
| 49 | select HAVE_PERF_USER_STACK_DUMP |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 50 | select HAVE_DMA_CONTIGUOUS |
Guo Ren | bfe47f3 | 2019-12-17 14:57:22 +0800 | [diff] [blame] | 51 | select HAVE_REGS_AND_STACK_ACCESS_API |
Guo Ren | 9866d14 | 2019-11-05 09:58:33 +0800 | [diff] [blame^] | 52 | select HAVE_RSEQ |
Mao Han | 2f78c73 | 2019-10-11 10:56:55 +0800 | [diff] [blame] | 53 | select HAVE_STACKPROTECTOR |
Guo Ren | 2f7932b | 2019-03-20 18:27:27 +0800 | [diff] [blame] | 54 | select HAVE_SYSCALL_TRACEPOINTS |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 55 | select MAY_HAVE_SPARSE_IRQ |
| 56 | select MODULES_USE_ELF_RELA if MODULES |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 57 | select OF |
| 58 | select OF_EARLY_FLATTREE |
Guo Ren | f50fd2d | 2019-01-02 22:09:25 +0800 | [diff] [blame] | 59 | select PERF_USE_VMALLOC if CPU_CK610 |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 60 | select RTC_LIB |
| 61 | select TIMER_OF |
| 62 | select USB_ARCH_HAS_EHCI |
| 63 | select USB_ARCH_HAS_OHCI |
MaJun | 5b49c82 | 2020-01-27 10:56:21 +0800 | [diff] [blame] | 64 | select GENERIC_PCI_IOMAP |
| 65 | select HAVE_PCI |
| 66 | select PCI_DOMAINS_GENERIC if PCI |
| 67 | select PCI_SYSCALL if PCI |
| 68 | select PCI_MSI if PCI |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 69 | |
| 70 | config CPU_HAS_CACHEV2 |
| 71 | bool |
| 72 | |
| 73 | config CPU_HAS_FPUV2 |
| 74 | bool |
| 75 | |
| 76 | config CPU_HAS_HILO |
| 77 | bool |
| 78 | |
| 79 | config CPU_HAS_TLBI |
| 80 | bool |
| 81 | |
| 82 | config CPU_HAS_LDSTEX |
| 83 | bool |
| 84 | help |
Randy Dunlap | bebd26a | 2020-01-31 17:52:30 -0800 | [diff] [blame] | 85 | For SMP, CPU needs "ldex&stex" instructions for atomic operations. |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 86 | |
| 87 | config CPU_NEED_TLBSYNC |
| 88 | bool |
| 89 | |
| 90 | config CPU_NEED_SOFTALIGN |
| 91 | bool |
| 92 | |
| 93 | config CPU_NO_USER_BKPT |
| 94 | bool |
| 95 | help |
| 96 | For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because |
| 97 | abiv2 is 16/32bit instruction set and "trap 1" is 32bit. |
| 98 | So we need a 16bit instruction as user space bkpt, and it will cause an illegal |
| 99 | instruction exception. |
| 100 | In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. |
| 101 | |
| 102 | config GENERIC_CALIBRATE_DELAY |
| 103 | def_bool y |
| 104 | |
| 105 | config GENERIC_CSUM |
| 106 | def_bool y |
| 107 | |
| 108 | config GENERIC_HWEIGHT |
| 109 | def_bool y |
| 110 | |
| 111 | config MMU |
| 112 | def_bool y |
| 113 | |
Guo Ren | 0ea2dc7 | 2018-12-09 14:18:05 +0800 | [diff] [blame] | 114 | config STACKTRACE_SUPPORT |
| 115 | def_bool y |
| 116 | |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 117 | config TIME_LOW_RES |
| 118 | def_bool y |
| 119 | |
| 120 | config TRACE_IRQFLAGS_SUPPORT |
| 121 | def_bool y |
| 122 | |
| 123 | config CPU_TLB_SIZE |
| 124 | int |
| 125 | default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810) |
| 126 | default "1024" if (CPU_CK860) |
| 127 | |
| 128 | config CPU_ASID_BITS |
| 129 | int |
| 130 | default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) |
| 131 | default "12" if (CPU_CK860) |
| 132 | |
| 133 | config L1_CACHE_SHIFT |
| 134 | int |
| 135 | default "4" if (CPU_CK610) |
| 136 | default "5" if (CPU_CK807 || CPU_CK810) |
| 137 | default "6" if (CPU_CK860) |
| 138 | |
| 139 | menu "Processor type and features" |
| 140 | |
| 141 | choice |
| 142 | prompt "CPU MODEL" |
| 143 | default CPU_CK807 |
| 144 | |
| 145 | config CPU_CK610 |
| 146 | bool "CSKY CPU ck610" |
| 147 | select CPU_NEED_TLBSYNC |
| 148 | select CPU_NEED_SOFTALIGN |
| 149 | select CPU_NO_USER_BKPT |
| 150 | |
| 151 | config CPU_CK810 |
| 152 | bool "CSKY CPU ck810" |
| 153 | select CPU_HAS_HILO |
| 154 | select CPU_NEED_TLBSYNC |
| 155 | |
| 156 | config CPU_CK807 |
| 157 | bool "CSKY CPU ck807" |
| 158 | select CPU_HAS_HILO |
| 159 | |
| 160 | config CPU_CK860 |
| 161 | bool "CSKY CPU ck860" |
| 162 | select CPU_HAS_TLBI |
| 163 | select CPU_HAS_CACHEV2 |
| 164 | select CPU_HAS_LDSTEX |
| 165 | select CPU_HAS_FPUV2 |
| 166 | endchoice |
| 167 | |
| 168 | choice |
Guo Ren | f50fd2d | 2019-01-02 22:09:25 +0800 | [diff] [blame] | 169 | prompt "C-SKY PMU type" |
| 170 | depends on PERF_EVENTS |
| 171 | depends on CPU_CK807 || CPU_CK810 || CPU_CK860 |
| 172 | |
| 173 | config CPU_PMU_NONE |
| 174 | bool "None" |
| 175 | |
| 176 | config CSKY_PMU_V1 |
| 177 | bool "Performance Monitoring Unit Ver.1" |
| 178 | |
| 179 | endchoice |
| 180 | |
| 181 | choice |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 182 | prompt "Power Manager Instruction (wait/doze/stop)" |
| 183 | default CPU_PM_NONE |
| 184 | |
| 185 | config CPU_PM_NONE |
| 186 | bool "None" |
| 187 | |
| 188 | config CPU_PM_WAIT |
| 189 | bool "wait" |
| 190 | |
| 191 | config CPU_PM_DOZE |
| 192 | bool "doze" |
| 193 | |
| 194 | config CPU_PM_STOP |
| 195 | bool "stop" |
| 196 | endchoice |
| 197 | |
Guo Ren | f525bb2 | 2019-11-27 08:44:33 +0800 | [diff] [blame] | 198 | menuconfig HAVE_TCM |
| 199 | bool "Tightly-Coupled/Sram Memory" |
Guo Ren | f525bb2 | 2019-11-27 08:44:33 +0800 | [diff] [blame] | 200 | select GENERIC_ALLOCATOR |
| 201 | help |
| 202 | The implementation are not only used by TCM (Tightly-Coupled Meory) |
| 203 | but also used by sram on SOC bus. It follow existed linux tcm |
| 204 | software interface, so that old tcm application codes could be |
| 205 | re-used directly. |
| 206 | |
| 207 | if HAVE_TCM |
| 208 | config ITCM_RAM_BASE |
| 209 | hex "ITCM ram base" |
| 210 | default 0xffffffff |
| 211 | |
| 212 | config ITCM_NR_PAGES |
| 213 | int "Page count of ITCM size: NR*4KB" |
| 214 | range 1 256 |
| 215 | default 32 |
| 216 | |
| 217 | config HAVE_DTCM |
| 218 | bool "DTCM Support" |
| 219 | |
| 220 | config DTCM_RAM_BASE |
| 221 | hex "DTCM ram base" |
| 222 | depends on HAVE_DTCM |
| 223 | default 0xffffffff |
| 224 | |
| 225 | config DTCM_NR_PAGES |
| 226 | int "Page count of DTCM size: NR*4KB" |
| 227 | depends on HAVE_DTCM |
| 228 | range 1 256 |
| 229 | default 32 |
| 230 | endif |
| 231 | |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 232 | config CPU_HAS_VDSP |
| 233 | bool "CPU has VDSP coprocessor" |
| 234 | depends on CPU_HAS_FPU && CPU_HAS_FPUV2 |
| 235 | |
| 236 | config CPU_HAS_FPU |
| 237 | bool "CPU has FPU coprocessor" |
| 238 | depends on CPU_CK807 || CPU_CK810 || CPU_CK860 |
| 239 | |
Guo Ren | 761b4f6 | 2020-01-22 11:15:14 +0800 | [diff] [blame] | 240 | config CPU_HAS_ICACHE_INS |
| 241 | bool "CPU has Icache invalidate instructions" |
| 242 | depends on CPU_HAS_CACHEV2 |
| 243 | |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 244 | config CPU_HAS_TEE |
| 245 | bool "CPU has Trusted Execution Environment" |
| 246 | depends on CPU_CK810 |
| 247 | |
| 248 | config SMP |
| 249 | bool "Symmetric Multi-Processing (SMP) support for C-SKY" |
| 250 | depends on CPU_CK860 |
| 251 | default n |
| 252 | |
| 253 | config NR_CPUS |
| 254 | int "Maximum number of CPUs (2-32)" |
| 255 | range 2 32 |
| 256 | depends on SMP |
| 257 | default "2" |
| 258 | |
| 259 | config HIGHMEM |
| 260 | bool "High Memory Support" |
| 261 | depends on !CPU_CK610 |
| 262 | default y |
| 263 | |
| 264 | config FORCE_MAX_ZONEORDER |
| 265 | int "Maximum zone order" |
| 266 | default "11" |
| 267 | |
| 268 | config RAM_BASE |
| 269 | hex "DRAM start addr (the same with memory-section in dts)" |
| 270 | default 0x0 |
| 271 | |
Guo Ren | 859e5f4 | 2018-12-19 19:56:14 +0800 | [diff] [blame] | 272 | config HOTPLUG_CPU |
| 273 | bool "Support for hot-pluggable CPUs" |
| 274 | select GENERIC_IRQ_MIGRATION |
| 275 | depends on SMP |
| 276 | help |
| 277 | Say Y here to allow turning CPUs off and on. CPUs can be |
| 278 | controlled through /sys/devices/system/cpu/cpu1/hotplug/target. |
| 279 | |
| 280 | Say N if you want to disable CPU hotplug. |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 281 | endmenu |
| 282 | |
Guo Ren | a736fa1 | 2020-01-11 13:44:32 +0800 | [diff] [blame] | 283 | source "arch/csky/Kconfig.platforms" |
| 284 | |
Guo Ren | c32e64e | 2018-09-05 14:25:06 +0800 | [diff] [blame] | 285 | source "kernel/Kconfig.hz" |