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Thomas Gleixnerec8f24b2019-05-19 13:07:45 +01001# SPDX-License-Identifier: GPL-2.0-only
Guo Renc32e64e2018-09-05 14:25:06 +08002config CSKY
3 def_bool y
Yury Norov942fa982018-05-16 11:18:49 +03004 select ARCH_32BIT_OFF_T
Christoph Hellwig13bf5ce2019-03-25 15:44:06 +01005 select ARCH_HAS_DMA_PREP_COHERENT
Guo Renc32e64e2018-09-05 14:25:06 +08006 select ARCH_HAS_SYNC_DMA_FOR_CPU
7 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
8 select ARCH_USE_BUILTIN_BSWAP
9 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
10 select COMMON_CLK
11 select CLKSRC_MMIO
12 select CLKSRC_OF
Guo Ren1994cc42019-05-10 12:57:27 +080013 select CSKY_MPINTC if CPU_CK860
14 select CSKY_MP_TIMER if CPU_CK860
15 select CSKY_APB_INTC
Christoph Hellwigf04b9512018-11-04 17:47:44 +010016 select DMA_DIRECT_REMAP
Guo Renc32e64e2018-09-05 14:25:06 +080017 select IRQ_DOMAIN
18 select HANDLE_DOMAIN_IRQ
19 select DW_APB_TIMER_OF
Christoph Hellwig0055f672019-08-13 11:41:57 +020020 select GENERIC_IOREMAP
Guo Renc32e64e2018-09-05 14:25:06 +080021 select GENERIC_LIB_ASHLDI3
22 select GENERIC_LIB_ASHRDI3
23 select GENERIC_LIB_LSHRDI3
24 select GENERIC_LIB_MULDI3
25 select GENERIC_LIB_CMPDI2
26 select GENERIC_LIB_UCMPDI2
27 select GENERIC_ALLOCATOR
28 select GENERIC_ATOMIC64
29 select GENERIC_CLOCKEVENTS
30 select GENERIC_CPU_DEVICES
31 select GENERIC_IRQ_CHIP
32 select GENERIC_IRQ_PROBE
33 select GENERIC_IRQ_SHOW
34 select GENERIC_IRQ_MULTI_HANDLER
35 select GENERIC_SCHED_CLOCK
36 select GENERIC_SMP_IDLE_THREAD
Guo Ren1994cc42019-05-10 12:57:27 +080037 select GX6605S_TIMER if CPU_CK610
Guo Renc32e64e2018-09-05 14:25:06 +080038 select HAVE_ARCH_TRACEHOOK
Guo Ren2f7932b2019-03-20 18:27:27 +080039 select HAVE_ARCH_AUDITSYSCALL
Guo Ren28bb0302019-03-01 08:50:36 +080040 select HAVE_DYNAMIC_FTRACE
Guo Ren230c77a2018-12-09 14:29:59 +080041 select HAVE_FUNCTION_TRACER
Guo Rend7950be2018-12-15 21:04:27 +080042 select HAVE_FUNCTION_GRAPH_TRACER
Guo Ren28bb0302019-03-01 08:50:36 +080043 select HAVE_FTRACE_MCOUNT_RECORD
Guo Renc32e64e2018-09-05 14:25:06 +080044 select HAVE_KERNEL_GZIP
45 select HAVE_KERNEL_LZO
46 select HAVE_KERNEL_LZMA
Guo Renf50fd2d2019-01-02 22:09:25 +080047 select HAVE_PERF_EVENTS
Mao Handaac95e2019-04-15 17:17:29 +080048 select HAVE_PERF_REGS
49 select HAVE_PERF_USER_STACK_DUMP
Guo Renc32e64e2018-09-05 14:25:06 +080050 select HAVE_DMA_API_DEBUG
51 select HAVE_DMA_CONTIGUOUS
Mao Han2f78c732019-10-11 10:56:55 +080052 select HAVE_STACKPROTECTOR
Guo Ren2f7932b2019-03-20 18:27:27 +080053 select HAVE_SYSCALL_TRACEPOINTS
Guo Renc32e64e2018-09-05 14:25:06 +080054 select MAY_HAVE_SPARSE_IRQ
55 select MODULES_USE_ELF_RELA if MODULES
Guo Renc32e64e2018-09-05 14:25:06 +080056 select OF
57 select OF_EARLY_FLATTREE
Guo Renf50fd2d2019-01-02 22:09:25 +080058 select PERF_USE_VMALLOC if CPU_CK610
Guo Renc32e64e2018-09-05 14:25:06 +080059 select RTC_LIB
60 select TIMER_OF
61 select USB_ARCH_HAS_EHCI
62 select USB_ARCH_HAS_OHCI
63
64config CPU_HAS_CACHEV2
65 bool
66
67config CPU_HAS_FPUV2
68 bool
69
70config CPU_HAS_HILO
71 bool
72
73config CPU_HAS_TLBI
74 bool
75
76config CPU_HAS_LDSTEX
77 bool
78 help
79 For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
80
81config CPU_NEED_TLBSYNC
82 bool
83
84config CPU_NEED_SOFTALIGN
85 bool
86
87config CPU_NO_USER_BKPT
88 bool
89 help
90 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
91 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
92 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
93 instruction exception.
94 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
95
96config GENERIC_CALIBRATE_DELAY
97 def_bool y
98
99config GENERIC_CSUM
100 def_bool y
101
102config GENERIC_HWEIGHT
103 def_bool y
104
105config MMU
106 def_bool y
107
Guo Ren0ea2dc72018-12-09 14:18:05 +0800108config STACKTRACE_SUPPORT
109 def_bool y
110
Guo Renc32e64e2018-09-05 14:25:06 +0800111config TIME_LOW_RES
112 def_bool y
113
114config TRACE_IRQFLAGS_SUPPORT
115 def_bool y
116
117config CPU_TLB_SIZE
118 int
119 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
120 default "1024" if (CPU_CK860)
121
122config CPU_ASID_BITS
123 int
124 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
125 default "12" if (CPU_CK860)
126
127config L1_CACHE_SHIFT
128 int
129 default "4" if (CPU_CK610)
130 default "5" if (CPU_CK807 || CPU_CK810)
131 default "6" if (CPU_CK860)
132
133menu "Processor type and features"
134
135choice
136 prompt "CPU MODEL"
137 default CPU_CK807
138
139config CPU_CK610
140 bool "CSKY CPU ck610"
141 select CPU_NEED_TLBSYNC
142 select CPU_NEED_SOFTALIGN
143 select CPU_NO_USER_BKPT
144
145config CPU_CK810
146 bool "CSKY CPU ck810"
147 select CPU_HAS_HILO
148 select CPU_NEED_TLBSYNC
149
150config CPU_CK807
151 bool "CSKY CPU ck807"
152 select CPU_HAS_HILO
153
154config CPU_CK860
155 bool "CSKY CPU ck860"
156 select CPU_HAS_TLBI
157 select CPU_HAS_CACHEV2
158 select CPU_HAS_LDSTEX
159 select CPU_HAS_FPUV2
160endchoice
161
162choice
Guo Renf50fd2d2019-01-02 22:09:25 +0800163 prompt "C-SKY PMU type"
164 depends on PERF_EVENTS
165 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
166
167config CPU_PMU_NONE
168 bool "None"
169
170config CSKY_PMU_V1
171 bool "Performance Monitoring Unit Ver.1"
172
173endchoice
174
175choice
Guo Renc32e64e2018-09-05 14:25:06 +0800176 prompt "Power Manager Instruction (wait/doze/stop)"
177 default CPU_PM_NONE
178
179config CPU_PM_NONE
180 bool "None"
181
182config CPU_PM_WAIT
183 bool "wait"
184
185config CPU_PM_DOZE
186 bool "doze"
187
188config CPU_PM_STOP
189 bool "stop"
190endchoice
191
Guo Renf525bb22019-11-27 08:44:33 +0800192menuconfig HAVE_TCM
193 bool "Tightly-Coupled/Sram Memory"
Guo Renf525bb22019-11-27 08:44:33 +0800194 select GENERIC_ALLOCATOR
195 help
196 The implementation are not only used by TCM (Tightly-Coupled Meory)
197 but also used by sram on SOC bus. It follow existed linux tcm
198 software interface, so that old tcm application codes could be
199 re-used directly.
200
201if HAVE_TCM
202config ITCM_RAM_BASE
203 hex "ITCM ram base"
204 default 0xffffffff
205
206config ITCM_NR_PAGES
207 int "Page count of ITCM size: NR*4KB"
208 range 1 256
209 default 32
210
211config HAVE_DTCM
212 bool "DTCM Support"
213
214config DTCM_RAM_BASE
215 hex "DTCM ram base"
216 depends on HAVE_DTCM
217 default 0xffffffff
218
219config DTCM_NR_PAGES
220 int "Page count of DTCM size: NR*4KB"
221 depends on HAVE_DTCM
222 range 1 256
223 default 32
224endif
225
Guo Renc32e64e2018-09-05 14:25:06 +0800226config CPU_HAS_VDSP
227 bool "CPU has VDSP coprocessor"
228 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
229
230config CPU_HAS_FPU
231 bool "CPU has FPU coprocessor"
232 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
233
234config CPU_HAS_TEE
235 bool "CPU has Trusted Execution Environment"
236 depends on CPU_CK810
237
238config SMP
239 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
240 depends on CPU_CK860
241 default n
242
243config NR_CPUS
244 int "Maximum number of CPUs (2-32)"
245 range 2 32
246 depends on SMP
247 default "2"
248
249config HIGHMEM
250 bool "High Memory Support"
251 depends on !CPU_CK610
252 default y
253
254config FORCE_MAX_ZONEORDER
255 int "Maximum zone order"
256 default "11"
257
258config RAM_BASE
259 hex "DRAM start addr (the same with memory-section in dts)"
260 default 0x0
261
Guo Ren859e5f42018-12-19 19:56:14 +0800262config HOTPLUG_CPU
263 bool "Support for hot-pluggable CPUs"
264 select GENERIC_IRQ_MIGRATION
265 depends on SMP
266 help
267 Say Y here to allow turning CPUs off and on. CPUs can be
268 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
269
270 Say N if you want to disable CPU hotplug.
Guo Renc32e64e2018-09-05 14:25:06 +0800271endmenu
272
Guo Rena736fa12020-01-11 13:44:32 +0800273source "arch/csky/Kconfig.platforms"
274
Guo Renc32e64e2018-09-05 14:25:06 +0800275source "kernel/Kconfig.hz"