blob: 780e6620142de6c203fc988ce70c005ec27e7f0c [file] [log] [blame]
Kalle Valod5c65152019-11-23 09:58:40 +02001/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2/*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 */
5
6#ifndef ATH11K_WMI_H
7#define ATH11K_WMI_H
8
9#include <net/mac80211.h>
10#include "htc.h"
11
12struct ath11k_base;
13struct ath11k;
14struct ath11k_fw_stats;
15
16#define PSOC_HOST_MAX_NUM_SS (8)
17
18/* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */
19#define MAX_HE_NSS 8
20#define MAX_HE_MODULATION 8
21#define MAX_HE_RU 4
22#define HE_MODULATION_NONE 7
23#define HE_PET_0_USEC 0
24#define HE_PET_8_USEC 1
25#define HE_PET_16_USEC 2
26
27#define WMI_MAX_NUM_SS MAX_HE_NSS
28#define WMI_MAX_NUM_RU MAX_HE_RU
29
30#define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
31#define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
32#define WMI_TLV_CMD_UNSUPPORTED 0
33#define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
34#define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
35
36struct wmi_cmd_hdr {
37 u32 cmd_id;
38} __packed;
39
40struct wmi_tlv {
41 u32 header;
42 u8 value[0];
43} __packed;
44
45#define WMI_TLV_LEN GENMASK(15, 0)
46#define WMI_TLV_TAG GENMASK(31, 16)
Kees Cookca0e4772019-12-18 16:58:02 -080047#define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header)
Kalle Valod5c65152019-11-23 09:58:40 +020048
49#define WMI_CMD_HDR_CMD_ID GENMASK(23, 0)
50#define WMI_MAX_MEM_REQS 32
51#define ATH11K_MAX_HW_LISTEN_INTERVAL 5
52
53#define WLAN_SCAN_PARAMS_MAX_SSID 16
54#define WLAN_SCAN_PARAMS_MAX_BSSID 4
55#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
56
Pradeep Kumar Chitrapuaacb4622019-12-13 16:34:57 +010057#define WMI_BA_MODE_BUFFER_SIZE_256 3
Kalle Valod5c65152019-11-23 09:58:40 +020058/*
59 * HW mode config type replicated from FW header
60 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
61 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
62 * one in 2G and another in 5G.
63 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
64 * same band; no tx allowed.
65 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
66 * Support for both PHYs within one band is planned
67 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
68 * but could be extended to other bands in the future.
69 * The separation of the band between the two PHYs needs
70 * to be communicated separately.
71 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
72 * as in WMI_HW_MODE_SBS, and 3rd on the other band
73 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
74 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
75 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
76 */
77enum wmi_host_hw_mode_config_type {
78 WMI_HOST_HW_MODE_SINGLE = 0,
79 WMI_HOST_HW_MODE_DBS = 1,
80 WMI_HOST_HW_MODE_SBS_PASSIVE = 2,
81 WMI_HOST_HW_MODE_SBS = 3,
82 WMI_HOST_HW_MODE_DBS_SBS = 4,
83 WMI_HOST_HW_MODE_DBS_OR_SBS = 5,
84
85 /* keep last */
86 WMI_HOST_HW_MODE_MAX
87};
88
89/* HW mode priority values used to detect the preferred HW mode
90 * on the available modes.
91 */
92enum wmi_host_hw_mode_priority {
93 WMI_HOST_HW_MODE_DBS_SBS_PRI,
94 WMI_HOST_HW_MODE_DBS_PRI,
95 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
96 WMI_HOST_HW_MODE_SBS_PRI,
97 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
98 WMI_HOST_HW_MODE_SINGLE_PRI,
99
100 /* keep last the lowest priority */
101 WMI_HOST_HW_MODE_MAX_PRI
102};
103
104enum {
105 WMI_HOST_WLAN_2G_CAP = 0x1,
106 WMI_HOST_WLAN_5G_CAP = 0x2,
107 WMI_HOST_WLAN_2G_5G_CAP = 0x3,
108};
109
110/*
111 * wmi command groups.
112 */
113enum wmi_cmd_group {
114 /* 0 to 2 are reserved */
115 WMI_GRP_START = 0x3,
116 WMI_GRP_SCAN = WMI_GRP_START,
117 WMI_GRP_PDEV = 0x4,
118 WMI_GRP_VDEV = 0x5,
119 WMI_GRP_PEER = 0x6,
120 WMI_GRP_MGMT = 0x7,
121 WMI_GRP_BA_NEG = 0x8,
122 WMI_GRP_STA_PS = 0x9,
123 WMI_GRP_DFS = 0xa,
124 WMI_GRP_ROAM = 0xb,
125 WMI_GRP_OFL_SCAN = 0xc,
126 WMI_GRP_P2P = 0xd,
127 WMI_GRP_AP_PS = 0xe,
128 WMI_GRP_RATE_CTRL = 0xf,
129 WMI_GRP_PROFILE = 0x10,
130 WMI_GRP_SUSPEND = 0x11,
131 WMI_GRP_BCN_FILTER = 0x12,
132 WMI_GRP_WOW = 0x13,
133 WMI_GRP_RTT = 0x14,
134 WMI_GRP_SPECTRAL = 0x15,
135 WMI_GRP_STATS = 0x16,
136 WMI_GRP_ARP_NS_OFL = 0x17,
137 WMI_GRP_NLO_OFL = 0x18,
138 WMI_GRP_GTK_OFL = 0x19,
139 WMI_GRP_CSA_OFL = 0x1a,
140 WMI_GRP_CHATTER = 0x1b,
141 WMI_GRP_TID_ADDBA = 0x1c,
142 WMI_GRP_MISC = 0x1d,
143 WMI_GRP_GPIO = 0x1e,
144 WMI_GRP_FWTEST = 0x1f,
145 WMI_GRP_TDLS = 0x20,
146 WMI_GRP_RESMGR = 0x21,
147 WMI_GRP_STA_SMPS = 0x22,
148 WMI_GRP_WLAN_HB = 0x23,
149 WMI_GRP_RMC = 0x24,
150 WMI_GRP_MHF_OFL = 0x25,
151 WMI_GRP_LOCATION_SCAN = 0x26,
152 WMI_GRP_OEM = 0x27,
153 WMI_GRP_NAN = 0x28,
154 WMI_GRP_COEX = 0x29,
155 WMI_GRP_OBSS_OFL = 0x2a,
156 WMI_GRP_LPI = 0x2b,
157 WMI_GRP_EXTSCAN = 0x2c,
158 WMI_GRP_DHCP_OFL = 0x2d,
159 WMI_GRP_IPA = 0x2e,
160 WMI_GRP_MDNS_OFL = 0x2f,
161 WMI_GRP_SAP_OFL = 0x30,
162 WMI_GRP_OCB = 0x31,
163 WMI_GRP_SOC = 0x32,
164 WMI_GRP_PKT_FILTER = 0x33,
165 WMI_GRP_MAWC = 0x34,
166 WMI_GRP_PMF_OFFLOAD = 0x35,
167 WMI_GRP_BPF_OFFLOAD = 0x36,
168 WMI_GRP_NAN_DATA = 0x37,
169 WMI_GRP_PROTOTYPE = 0x38,
170 WMI_GRP_MONITOR = 0x39,
171 WMI_GRP_REGULATORY = 0x3a,
172 WMI_GRP_HW_DATA_FILTER = 0x3b,
John Crispin6d293d42019-11-25 16:36:28 +0000173 WMI_GRP_WLM = 0x3c,
174 WMI_GRP_11K_OFFLOAD = 0x3d,
175 WMI_GRP_TWT = 0x3e,
John Crispin3f8be642019-11-25 16:36:29 +0000176 WMI_GRP_MOTION_DET = 0x3f,
177 WMI_GRP_SPATIAL_REUSE = 0x40,
Kalle Valod5c65152019-11-23 09:58:40 +0200178};
179
180#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
181#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
182
183#define WMI_CMD_UNSUPPORTED 0
184
185enum wmi_tlv_cmd_id {
186 WMI_INIT_CMDID = 0x1,
187 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
188 WMI_STOP_SCAN_CMDID,
189 WMI_SCAN_CHAN_LIST_CMDID,
190 WMI_SCAN_SCH_PRIO_TBL_CMDID,
191 WMI_SCAN_UPDATE_REQUEST_CMDID,
192 WMI_SCAN_PROB_REQ_OUI_CMDID,
193 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
194 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
195 WMI_PDEV_SET_CHANNEL_CMDID,
196 WMI_PDEV_SET_PARAM_CMDID,
197 WMI_PDEV_PKTLOG_ENABLE_CMDID,
198 WMI_PDEV_PKTLOG_DISABLE_CMDID,
199 WMI_PDEV_SET_WMM_PARAMS_CMDID,
200 WMI_PDEV_SET_HT_CAP_IE_CMDID,
201 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
202 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
203 WMI_PDEV_SET_QUIET_MODE_CMDID,
204 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
205 WMI_PDEV_GET_TPC_CONFIG_CMDID,
206 WMI_PDEV_SET_BASE_MACADDR_CMDID,
207 WMI_PDEV_DUMP_CMDID,
208 WMI_PDEV_SET_LED_CONFIG_CMDID,
209 WMI_PDEV_GET_TEMPERATURE_CMDID,
210 WMI_PDEV_SET_LED_FLASHING_CMDID,
211 WMI_PDEV_SMART_ANT_ENABLE_CMDID,
212 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
213 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
214 WMI_PDEV_SET_CTL_TABLE_CMDID,
215 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
216 WMI_PDEV_FIPS_CMDID,
217 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
218 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
219 WMI_PDEV_GET_NFCAL_POWER_CMDID,
220 WMI_PDEV_GET_TPC_CMDID,
221 WMI_MIB_STATS_ENABLE_CMDID,
222 WMI_PDEV_SET_PCL_CMDID,
223 WMI_PDEV_SET_HW_MODE_CMDID,
224 WMI_PDEV_SET_MAC_CONFIG_CMDID,
225 WMI_PDEV_SET_ANTENNA_MODE_CMDID,
226 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
227 WMI_PDEV_WAL_POWER_DEBUG_CMDID,
228 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
229 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
230 WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
231 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
232 WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
233 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
234 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
235 WMI_PDEV_CHECK_CAL_VERSION_CMDID,
236 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
237 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
238 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
239 WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
240 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
241 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
242 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
243 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
244 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
245 WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
246 WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
247 WMI_PDEV_PKTLOG_FILTER_CMDID,
248 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
249 WMI_VDEV_DELETE_CMDID,
250 WMI_VDEV_START_REQUEST_CMDID,
251 WMI_VDEV_RESTART_REQUEST_CMDID,
252 WMI_VDEV_UP_CMDID,
253 WMI_VDEV_STOP_CMDID,
254 WMI_VDEV_DOWN_CMDID,
255 WMI_VDEV_SET_PARAM_CMDID,
256 WMI_VDEV_INSTALL_KEY_CMDID,
257 WMI_VDEV_WNM_SLEEPMODE_CMDID,
258 WMI_VDEV_WMM_ADDTS_CMDID,
259 WMI_VDEV_WMM_DELTS_CMDID,
260 WMI_VDEV_SET_WMM_PARAMS_CMDID,
261 WMI_VDEV_SET_GTX_PARAMS_CMDID,
262 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
263 WMI_VDEV_PLMREQ_START_CMDID,
264 WMI_VDEV_PLMREQ_STOP_CMDID,
265 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
266 WMI_VDEV_SET_IE_CMDID,
267 WMI_VDEV_RATEMASK_CMDID,
268 WMI_VDEV_ATF_REQUEST_CMDID,
269 WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
270 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
271 WMI_VDEV_SET_QUIET_MODE_CMDID,
272 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
273 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
274 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
275 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
276 WMI_PEER_DELETE_CMDID,
277 WMI_PEER_FLUSH_TIDS_CMDID,
278 WMI_PEER_SET_PARAM_CMDID,
279 WMI_PEER_ASSOC_CMDID,
280 WMI_PEER_ADD_WDS_ENTRY_CMDID,
281 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
282 WMI_PEER_MCAST_GROUP_CMDID,
283 WMI_PEER_INFO_REQ_CMDID,
284 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
285 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
286 WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
287 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
288 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
289 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
290 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
291 WMI_PEER_ATF_REQUEST_CMDID,
292 WMI_PEER_BWF_REQUEST_CMDID,
293 WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
294 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
295 WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
296 WMI_PEER_ANTDIV_INFO_REQ_CMDID,
Kalle Valod5c65152019-11-23 09:58:40 +0200297 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
298 WMI_PDEV_SEND_BCN_CMDID,
299 WMI_BCN_TMPL_CMDID,
300 WMI_BCN_FILTER_RX_CMDID,
301 WMI_PRB_REQ_FILTER_RX_CMDID,
302 WMI_MGMT_TX_CMDID,
303 WMI_PRB_TMPL_CMDID,
304 WMI_MGMT_TX_SEND_CMDID,
305 WMI_OFFCHAN_DATA_TX_SEND_CMDID,
306 WMI_PDEV_SEND_FD_CMDID,
307 WMI_BCN_OFFLOAD_CTRL_CMDID,
308 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
309 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
310 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
311 WMI_ADDBA_SEND_CMDID,
312 WMI_ADDBA_STATUS_CMDID,
313 WMI_DELBA_SEND_CMDID,
314 WMI_ADDBA_SET_RESP_CMDID,
315 WMI_SEND_SINGLEAMSDU_CMDID,
316 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
317 WMI_STA_POWERSAVE_PARAM_CMDID,
318 WMI_STA_MIMO_PS_MODE_CMDID,
319 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
320 WMI_PDEV_DFS_DISABLE_CMDID,
321 WMI_DFS_PHYERR_FILTER_ENA_CMDID,
322 WMI_DFS_PHYERR_FILTER_DIS_CMDID,
323 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
324 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
325 WMI_VDEV_ADFS_CH_CFG_CMDID,
326 WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
327 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
328 WMI_ROAM_SCAN_RSSI_THRESHOLD,
329 WMI_ROAM_SCAN_PERIOD,
330 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
331 WMI_ROAM_AP_PROFILE,
332 WMI_ROAM_CHAN_LIST,
333 WMI_ROAM_SCAN_CMD,
334 WMI_ROAM_SYNCH_COMPLETE,
335 WMI_ROAM_SET_RIC_REQUEST_CMDID,
336 WMI_ROAM_INVOKE_CMDID,
337 WMI_ROAM_FILTER_CMDID,
338 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
339 WMI_ROAM_CONFIGURE_MAWC_CMDID,
340 WMI_ROAM_SET_MBO_PARAM_CMDID,
341 WMI_ROAM_PER_CONFIG_CMDID,
342 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
343 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
344 WMI_OFL_SCAN_PERIOD,
345 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
346 WMI_P2P_DEV_SET_DISCOVERABILITY,
347 WMI_P2P_GO_SET_BEACON_IE,
348 WMI_P2P_GO_SET_PROBE_RESP_IE,
349 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
350 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
351 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
352 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
353 WMI_P2P_SET_OPPPS_PARAM_CMDID,
354 WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
355 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
356 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
357 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
358 WMI_AP_PS_EGAP_PARAM_CMDID,
359 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
360 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
361 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
362 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
363 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
364 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
365 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
366 WMI_PDEV_RESUME_CMDID,
367 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
368 WMI_RMV_BCN_FILTER_CMDID,
369 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
370 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
371 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
372 WMI_WOW_ENABLE_CMDID,
373 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
374 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
375 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
376 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
377 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
378 WMI_D0_WOW_ENABLE_DISABLE_CMDID,
379 WMI_EXTWOW_ENABLE_CMDID,
380 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
381 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
382 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
383 WMI_WOW_UDP_SVC_OFLD_CMDID,
384 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
385 WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
386 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
387 WMI_RTT_TSF_CMDID,
388 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
389 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
390 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
391 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
392 WMI_REQUEST_STATS_EXT_CMDID,
393 WMI_REQUEST_LINK_STATS_CMDID,
394 WMI_START_LINK_STATS_CMDID,
395 WMI_CLEAR_LINK_STATS_CMDID,
396 WMI_GET_FW_MEM_DUMP_CMDID,
397 WMI_DEBUG_MESG_FLUSH_CMDID,
398 WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
399 WMI_REQUEST_WLAN_STATS_CMDID,
400 WMI_REQUEST_RCPI_CMDID,
401 WMI_REQUEST_PEER_STATS_INFO_CMDID,
402 WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
403 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
404 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
405 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
406 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
407 WMI_APFIND_CMDID,
408 WMI_PASSPOINT_LIST_CONFIG_CMDID,
409 WMI_NLO_CONFIGURE_MAWC_CMDID,
410 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
411 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
412 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
413 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
414 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
415 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
416 WMI_CHATTER_COALESCING_QUERY_CMDID,
417 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
418 WMI_PEER_TID_DELBA_CMDID,
419 WMI_STA_DTIM_PS_METHOD_CMDID,
420 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
421 WMI_STA_KEEPALIVE_CMDID,
422 WMI_BA_REQ_SSN_CMDID,
423 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
424 WMI_PDEV_UTF_CMDID,
425 WMI_DBGLOG_CFG_CMDID,
426 WMI_PDEV_QVIT_CMDID,
427 WMI_PDEV_FTM_INTG_CMDID,
428 WMI_VDEV_SET_KEEPALIVE_CMDID,
429 WMI_VDEV_GET_KEEPALIVE_CMDID,
430 WMI_FORCE_FW_HANG_CMDID,
431 WMI_SET_MCASTBCAST_FILTER_CMDID,
432 WMI_THERMAL_MGMT_CMDID,
433 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
434 WMI_TPC_CHAINMASK_CONFIG_CMDID,
435 WMI_SET_ANTENNA_DIVERSITY_CMDID,
436 WMI_OCB_SET_SCHED_CMDID,
437 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
438 WMI_LRO_CONFIG_CMDID,
439 WMI_TRANSFER_DATA_TO_FLASH_CMDID,
440 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
441 WMI_VDEV_WISA_CMDID,
442 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
443 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
444 WMI_READ_DATA_FROM_FLASH_CMDID,
Pradeep Kumar Chitrapu2a63bbc2020-02-15 05:55:21 +0530445 WMI_THERM_THROT_SET_CONF_CMDID,
446 WMI_RUNTIME_DPD_RECAL_CMDID,
447 WMI_GET_TPC_POWER_CMDID,
448 WMI_IDLE_TRIGGER_MONITOR_CMDID,
Kalle Valod5c65152019-11-23 09:58:40 +0200449 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
450 WMI_GPIO_OUTPUT_CMDID,
451 WMI_TXBF_CMDID,
452 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
453 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
454 WMI_UNIT_TEST_CMDID,
455 WMI_FWTEST_CMDID,
456 WMI_QBOOST_CFG_CMDID,
457 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
458 WMI_TDLS_PEER_UPDATE_CMDID,
459 WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
460 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
461 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
462 WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
463 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
464 WMI_STA_SMPS_PARAM_CMDID,
465 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
466 WMI_HB_SET_TCP_PARAMS_CMDID,
467 WMI_HB_SET_TCP_PKT_FILTER_CMDID,
468 WMI_HB_SET_UDP_PARAMS_CMDID,
469 WMI_HB_SET_UDP_PKT_FILTER_CMDID,
470 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
471 WMI_RMC_SET_ACTION_PERIOD_CMDID,
472 WMI_RMC_CONFIG_CMDID,
473 WMI_RMC_SET_MANUAL_LEADER_CMDID,
474 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
475 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
476 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
477 WMI_BATCH_SCAN_DISABLE_CMDID,
478 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
479 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
480 WMI_OEM_REQUEST_CMDID,
481 WMI_LPI_OEM_REQ_CMDID,
482 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
483 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
484 WMI_CHAN_AVOID_UPDATE_CMDID,
485 WMI_COEX_CONFIG_CMDID,
486 WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
487 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
488 WMI_SAR_LIMITS_CMDID,
489 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
490 WMI_OBSS_SCAN_DISABLE_CMDID,
John Crispin5a032c82019-12-17 15:19:20 +0100491 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
Kalle Valod5c65152019-11-23 09:58:40 +0200492 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
493 WMI_LPI_START_SCAN_CMDID,
494 WMI_LPI_STOP_SCAN_CMDID,
495 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
496 WMI_EXTSCAN_STOP_CMDID,
497 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
498 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
499 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
500 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
501 WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
502 WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
503 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
504 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
505 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
506 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
507 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
508 WMI_MDNS_SET_FQDN_CMDID,
509 WMI_MDNS_SET_RESPONSE_CMDID,
510 WMI_MDNS_GET_STATS_CMDID,
511 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
512 WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
513 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
514 WMI_OCB_SET_UTC_TIME_CMDID,
515 WMI_OCB_START_TIMING_ADVERT_CMDID,
516 WMI_OCB_STOP_TIMING_ADVERT_CMDID,
517 WMI_OCB_GET_TSF_TIMER_CMDID,
518 WMI_DCC_GET_STATS_CMDID,
519 WMI_DCC_CLEAR_STATS_CMDID,
520 WMI_DCC_UPDATE_NDL_CMDID,
521 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
522 WMI_SOC_SET_HW_MODE_CMDID,
523 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
524 WMI_SOC_SET_ANTENNA_MODE_CMDID,
525 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
526 WMI_PACKET_FILTER_ENABLE_CMDID,
527 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
528 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
529 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
530 WMI_BPF_GET_VDEV_STATS_CMDID,
531 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
532 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
533 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
534 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
535 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
536 WMI_11D_SCAN_START_CMDID,
537 WMI_11D_SCAN_STOP_CMDID,
538 WMI_SET_INIT_COUNTRY_CMDID,
539 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
540 WMI_NDP_INITIATOR_REQ_CMDID,
541 WMI_NDP_RESPONDER_REQ_CMDID,
542 WMI_NDP_END_REQ_CMDID,
543 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
John Crispin6d293d42019-11-25 16:36:28 +0000544 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
545 WMI_TWT_DISABLE_CMDID,
546 WMI_TWT_ADD_DIALOG_CMDID,
547 WMI_TWT_DEL_DIALOG_CMDID,
548 WMI_TWT_PAUSE_DIALOG_CMDID,
549 WMI_TWT_RESUME_DIALOG_CMDID,
John Crispin3f8be642019-11-25 16:36:29 +0000550 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
551 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
552 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
Kalle Valod5c65152019-11-23 09:58:40 +0200553};
554
555enum wmi_tlv_event_id {
556 WMI_SERVICE_READY_EVENTID = 0x1,
557 WMI_READY_EVENTID,
558 WMI_SERVICE_AVAILABLE_EVENTID,
559 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
560 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
561 WMI_CHAN_INFO_EVENTID,
562 WMI_PHYERR_EVENTID,
563 WMI_PDEV_DUMP_EVENTID,
564 WMI_TX_PAUSE_EVENTID,
565 WMI_DFS_RADAR_EVENTID,
566 WMI_PDEV_L1SS_TRACK_EVENTID,
567 WMI_PDEV_TEMPERATURE_EVENTID,
568 WMI_SERVICE_READY_EXT_EVENTID,
569 WMI_PDEV_FIPS_EVENTID,
570 WMI_PDEV_CHANNEL_HOPPING_EVENTID,
571 WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
572 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
573 WMI_PDEV_TPC_EVENTID,
574 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
575 WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
576 WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
577 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
578 WMI_PDEV_ANTDIV_STATUS_EVENTID,
579 WMI_PDEV_CHIP_POWER_STATS_EVENTID,
580 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
581 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
582 WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
583 WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
584 WMI_PDEV_BSS_CHAN_INFO_EVENTID,
585 WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
586 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
587 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
588 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
589 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
590 WMI_VDEV_STOPPED_EVENTID,
591 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
592 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
593 WMI_VDEV_TSF_REPORT_EVENTID,
594 WMI_VDEV_DELETE_RESP_EVENTID,
595 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
596 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
597 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
598 WMI_PEER_INFO_EVENTID,
599 WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
600 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
601 WMI_PEER_STATE_EVENTID,
602 WMI_PEER_ASSOC_CONF_EVENTID,
603 WMI_PEER_DELETE_RESP_EVENTID,
604 WMI_PEER_RATECODE_LIST_EVENTID,
605 WMI_WDS_PEER_EVENTID,
606 WMI_PEER_STA_PS_STATECHG_EVENTID,
607 WMI_PEER_ANTDIV_INFO_EVENTID,
John Crispin9cfbae42019-11-25 16:36:19 +0000608 WMI_PEER_RESERVED0_EVENTID,
609 WMI_PEER_RESERVED1_EVENTID,
610 WMI_PEER_RESERVED2_EVENTID,
611 WMI_PEER_RESERVED3_EVENTID,
612 WMI_PEER_RESERVED4_EVENTID,
613 WMI_PEER_RESERVED5_EVENTID,
614 WMI_PEER_RESERVED6_EVENTID,
615 WMI_PEER_RESERVED7_EVENTID,
616 WMI_PEER_RESERVED8_EVENTID,
617 WMI_PEER_RESERVED9_EVENTID,
618 WMI_PEER_RESERVED10_EVENTID,
619 WMI_PEER_OPER_MODE_CHANGE_EVENTID,
Kalle Valod5c65152019-11-23 09:58:40 +0200620 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
621 WMI_HOST_SWBA_EVENTID,
622 WMI_TBTTOFFSET_UPDATE_EVENTID,
623 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
624 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
625 WMI_MGMT_TX_COMPLETION_EVENTID,
626 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
627 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
628 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
629 WMI_TX_ADDBA_COMPLETE_EVENTID,
630 WMI_BA_RSP_SSN_EVENTID,
631 WMI_AGGR_STATE_TRIG_EVENTID,
632 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
633 WMI_PROFILE_MATCH,
634 WMI_ROAM_SYNCH_EVENTID,
635 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
636 WMI_P2P_NOA_EVENTID,
637 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
638 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
639 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
640 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
641 WMI_D0_WOW_DISABLE_ACK_EVENTID,
642 WMI_WOW_INITIAL_WAKEUP_EVENTID,
643 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
644 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
645 WMI_RTT_ERROR_REPORT_EVENTID,
646 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
647 WMI_IFACE_LINK_STATS_EVENTID,
648 WMI_PEER_LINK_STATS_EVENTID,
649 WMI_RADIO_LINK_STATS_EVENTID,
650 WMI_UPDATE_FW_MEM_DUMP_EVENTID,
651 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
652 WMI_INST_RSSI_STATS_EVENTID,
653 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
654 WMI_REPORT_STATS_EVENTID,
655 WMI_UPDATE_RCPI_EVENTID,
656 WMI_PEER_STATS_INFO_EVENTID,
657 WMI_RADIO_CHAN_STATS_EVENTID,
658 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
659 WMI_NLO_SCAN_COMPLETE_EVENTID,
660 WMI_APFIND_EVENTID,
661 WMI_PASSPOINT_MATCH_EVENTID,
662 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
663 WMI_GTK_REKEY_FAIL_EVENTID,
664 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
665 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
666 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
667 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
668 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
669 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
670 WMI_PDEV_UTF_EVENTID,
671 WMI_DEBUG_MESG_EVENTID,
672 WMI_UPDATE_STATS_EVENTID,
673 WMI_DEBUG_PRINT_EVENTID,
674 WMI_DCS_INTERFERENCE_EVENTID,
675 WMI_PDEV_QVIT_EVENTID,
676 WMI_WLAN_PROFILE_DATA_EVENTID,
677 WMI_PDEV_FTM_INTG_EVENTID,
678 WMI_WLAN_FREQ_AVOID_EVENTID,
679 WMI_VDEV_GET_KEEPALIVE_EVENTID,
680 WMI_THERMAL_MGMT_EVENTID,
681 WMI_DIAG_DATA_CONTAINER_EVENTID,
682 WMI_HOST_AUTO_SHUTDOWN_EVENTID,
683 WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
684 WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
685 WMI_DIAG_EVENTID,
686 WMI_OCB_SET_SCHED_EVENTID,
687 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
688 WMI_RSSI_BREACH_EVENTID,
689 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
690 WMI_PDEV_UTF_SCPC_EVENTID,
691 WMI_READ_DATA_FROM_FLASH_EVENTID,
692 WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
693 WMI_PKGID_EVENTID,
694 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
695 WMI_UPLOADH_EVENTID,
696 WMI_CAPTUREH_EVENTID,
697 WMI_RFKILL_STATE_CHANGE_EVENTID,
698 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
699 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
700 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
701 WMI_BATCH_SCAN_RESULT_EVENTID,
702 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
703 WMI_OEM_MEASUREMENT_REPORT_EVENTID,
704 WMI_OEM_ERROR_REPORT_EVENTID,
705 WMI_OEM_RESPONSE_EVENTID,
706 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
707 WMI_NAN_DISC_IFACE_CREATED_EVENTID,
708 WMI_NAN_DISC_IFACE_DELETED_EVENTID,
709 WMI_NAN_STARTED_CLUSTER_EVENTID,
710 WMI_NAN_JOINED_CLUSTER_EVENTID,
711 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
712 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
713 WMI_LPI_STATUS_EVENTID,
714 WMI_LPI_HANDOFF_EVENTID,
715 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
716 WMI_EXTSCAN_OPERATION_EVENTID,
717 WMI_EXTSCAN_TABLE_USAGE_EVENTID,
718 WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
719 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
720 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
721 WMI_EXTSCAN_CAPABILITIES_EVENTID,
722 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
723 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
724 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
725 WMI_SAP_OFL_DEL_STA_EVENTID,
726 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
727 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
728 WMI_DCC_GET_STATS_RESP_EVENTID,
729 WMI_DCC_UPDATE_NDL_RESP_EVENTID,
730 WMI_DCC_STATS_EVENTID,
731 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
732 WMI_SOC_HW_MODE_TRANSITION_EVENTID,
733 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
734 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
735 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
736 WMI_BPF_VDEV_STATS_INFO_EVENTID,
737 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
738 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
739 WMI_11D_NEW_COUNTRY_EVENTID,
740 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
741 WMI_NDP_INITIATOR_RSP_EVENTID,
742 WMI_NDP_RESPONDER_RSP_EVENTID,
743 WMI_NDP_END_RSP_EVENTID,
744 WMI_NDP_INDICATION_EVENTID,
745 WMI_NDP_CONFIRM_EVENTID,
746 WMI_NDP_END_INDICATION_EVENTID,
John Crispin6d293d42019-11-25 16:36:28 +0000747
748 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
749 WMI_TWT_DISABLE_EVENTID,
750 WMI_TWT_ADD_DIALOG_EVENTID,
751 WMI_TWT_DEL_DIALOG_EVENTID,
752 WMI_TWT_PAUSE_DIALOG_EVENTID,
753 WMI_TWT_RESUME_DIALOG_EVENTID,
Kalle Valod5c65152019-11-23 09:58:40 +0200754};
755
756enum wmi_tlv_pdev_param {
757 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
758 WMI_PDEV_PARAM_RX_CHAIN_MASK,
759 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
760 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
761 WMI_PDEV_PARAM_TXPOWER_SCALE,
762 WMI_PDEV_PARAM_BEACON_GEN_MODE,
763 WMI_PDEV_PARAM_BEACON_TX_MODE,
764 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
765 WMI_PDEV_PARAM_PROTECTION_MODE,
766 WMI_PDEV_PARAM_DYNAMIC_BW,
767 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
768 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
769 WMI_PDEV_PARAM_STA_KICKOUT_TH,
770 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
771 WMI_PDEV_PARAM_LTR_ENABLE,
772 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
773 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
774 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
775 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
776 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
777 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
778 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
779 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
780 WMI_PDEV_PARAM_L1SS_ENABLE,
781 WMI_PDEV_PARAM_DSLEEP_ENABLE,
782 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
783 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
784 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
785 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
786 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
787 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
788 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
789 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
790 WMI_PDEV_PARAM_PMF_QOS,
791 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
792 WMI_PDEV_PARAM_DCS,
793 WMI_PDEV_PARAM_ANI_ENABLE,
794 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
795 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
796 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
797 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
798 WMI_PDEV_PARAM_DYNTXCHAIN,
799 WMI_PDEV_PARAM_PROXY_STA,
800 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
801 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
802 WMI_PDEV_PARAM_RFKILL_ENABLE,
803 WMI_PDEV_PARAM_BURST_DUR,
804 WMI_PDEV_PARAM_BURST_ENABLE,
805 WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
806 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
807 WMI_PDEV_PARAM_L1SS_TRACK,
808 WMI_PDEV_PARAM_HYST_EN,
809 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
810 WMI_PDEV_PARAM_LED_SYS_STATE,
811 WMI_PDEV_PARAM_LED_ENABLE,
812 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
813 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
814 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
815 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
816 WMI_PDEV_PARAM_CTS_CBW,
817 WMI_PDEV_PARAM_WNTS_CONFIG,
818 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
819 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
820 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
821 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
822 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
823 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
824 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
825 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
826 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
827 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
828 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
829 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
830 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
831 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
832 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
833 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
834 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
835 WMI_PDEV_PARAM_TXPOWER_DECR_DB,
836 WMI_PDEV_PARAM_AGGR_BURST,
837 WMI_PDEV_PARAM_RX_DECAP_MODE,
838 WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
839 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
840 WMI_PDEV_PARAM_ANTENNA_GAIN,
841 WMI_PDEV_PARAM_RX_FILTER,
842 WMI_PDEV_SET_MCAST_TO_UCAST_TID,
843 WMI_PDEV_PARAM_PROXY_STA_MODE,
844 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
845 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
846 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
847 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
848 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
849 WMI_PDEV_PARAM_BLOCK_INTERBSS,
850 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
851 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
852 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
853 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
854 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
855 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
856 WMI_PDEV_PARAM_EN_STATS,
857 WMI_PDEV_PARAM_MU_GROUP_POLICY,
858 WMI_PDEV_PARAM_NOISE_DETECTION,
859 WMI_PDEV_PARAM_NOISE_THRESHOLD,
860 WMI_PDEV_PARAM_DPD_ENABLE,
861 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
862 WMI_PDEV_PARAM_ATF_STRICT_SCH,
863 WMI_PDEV_PARAM_ATF_SCHED_DURATION,
864 WMI_PDEV_PARAM_ANT_PLZN,
865 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
866 WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
867 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
868 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
869 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
870 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
871 WMI_PDEV_PARAM_CCA_THRESHOLD,
872 WMI_PDEV_PARAM_RTS_FIXED_RATE,
873 WMI_PDEV_PARAM_PDEV_RESET,
874 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
875 WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
876 WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
877 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
878 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
879 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
880 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
881 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
882 WMI_PDEV_PARAM_PROPAGATION_DELAY,
883 WMI_PDEV_PARAM_ENA_ANT_DIV,
884 WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
885 WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
886 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
887 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
888 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
889 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
890 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
891 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
892 WMI_PDEV_PARAM_TX_SCH_DELAY,
893 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
894 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
895 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
896 WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
897 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
898 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
899 WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
900};
901
902enum wmi_tlv_vdev_param {
903 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
904 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
905 WMI_VDEV_PARAM_BEACON_INTERVAL,
906 WMI_VDEV_PARAM_LISTEN_INTERVAL,
907 WMI_VDEV_PARAM_MULTICAST_RATE,
908 WMI_VDEV_PARAM_MGMT_TX_RATE,
909 WMI_VDEV_PARAM_SLOT_TIME,
910 WMI_VDEV_PARAM_PREAMBLE,
911 WMI_VDEV_PARAM_SWBA_TIME,
912 WMI_VDEV_STATS_UPDATE_PERIOD,
913 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
914 WMI_VDEV_HOST_SWBA_INTERVAL,
915 WMI_VDEV_PARAM_DTIM_PERIOD,
916 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
917 WMI_VDEV_PARAM_WDS,
918 WMI_VDEV_PARAM_ATIM_WINDOW,
919 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
920 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
921 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
922 WMI_VDEV_PARAM_FEATURE_WMM,
923 WMI_VDEV_PARAM_CHWIDTH,
924 WMI_VDEV_PARAM_CHEXTOFFSET,
925 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
926 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
927 WMI_VDEV_PARAM_MGMT_RATE,
928 WMI_VDEV_PARAM_PROTECTION_MODE,
929 WMI_VDEV_PARAM_FIXED_RATE,
930 WMI_VDEV_PARAM_SGI,
931 WMI_VDEV_PARAM_LDPC,
932 WMI_VDEV_PARAM_TX_STBC,
933 WMI_VDEV_PARAM_RX_STBC,
934 WMI_VDEV_PARAM_INTRA_BSS_FWD,
935 WMI_VDEV_PARAM_DEF_KEYID,
936 WMI_VDEV_PARAM_NSS,
937 WMI_VDEV_PARAM_BCAST_DATA_RATE,
938 WMI_VDEV_PARAM_MCAST_DATA_RATE,
939 WMI_VDEV_PARAM_MCAST_INDICATE,
940 WMI_VDEV_PARAM_DHCP_INDICATE,
941 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
942 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
943 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
944 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
945 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
946 WMI_VDEV_PARAM_ENABLE_RTSCTS,
947 WMI_VDEV_PARAM_TXBF,
948 WMI_VDEV_PARAM_PACKET_POWERSAVE,
949 WMI_VDEV_PARAM_DROP_UNENCRY,
950 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
951 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
952 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
953 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
954 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
955 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
956 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
957 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
958 WMI_VDEV_PARAM_TX_PWRLIMIT,
959 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
960 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
961 WMI_VDEV_PARAM_ENABLE_RMC,
962 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
963 WMI_VDEV_PARAM_MAX_RATE,
964 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
965 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
966 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
967 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
968 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
969 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
970 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
971 WMI_VDEV_PARAM_INACTIVITY_CNT,
972 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
973 WMI_VDEV_PARAM_DTIM_POLICY,
974 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
975 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
976 WMI_VDEV_PARAM_RX_LEAK_WINDOW,
977 WMI_VDEV_PARAM_STATS_AVG_FACTOR,
978 WMI_VDEV_PARAM_DISCONNECT_TH,
979 WMI_VDEV_PARAM_RTSCTS_RATE,
980 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
981 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
982 WMI_VDEV_PARAM_TXPOWER_SCALE,
983 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
984 WMI_VDEV_PARAM_MCAST2UCAST_SET,
985 WMI_VDEV_PARAM_RC_NUM_RETRIES,
986 WMI_VDEV_PARAM_CABQ_MAXDUR,
987 WMI_VDEV_PARAM_MFPTEST_SET,
988 WMI_VDEV_PARAM_RTS_FIXED_RATE,
989 WMI_VDEV_PARAM_VHT_SGIMASK,
990 WMI_VDEV_PARAM_VHT80_RATEMASK,
991 WMI_VDEV_PARAM_PROXY_STA,
992 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
993 WMI_VDEV_PARAM_RX_DECAP_TYPE,
994 WMI_VDEV_PARAM_BW_NSS_RATEMASK,
995 WMI_VDEV_PARAM_SENSOR_AP,
996 WMI_VDEV_PARAM_BEACON_RATE,
997 WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
998 WMI_VDEV_PARAM_STA_KICKOUT,
999 WMI_VDEV_PARAM_CAPABILITIES,
1000 WMI_VDEV_PARAM_TSF_INCREMENT,
1001 WMI_VDEV_PARAM_AMPDU_PER_AC,
1002 WMI_VDEV_PARAM_RX_FILTER,
1003 WMI_VDEV_PARAM_MGMT_TX_POWER,
1004 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1005 WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1006 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1007 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1008 WMI_VDEV_PARAM_HE_DCM,
1009 WMI_VDEV_PARAM_HE_RANGE_EXT,
1010 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1011 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
Pradeep Kumar Chitrapuaacb4622019-12-13 16:34:57 +01001012 WMI_VDEV_PARAM_BA_MODE = 0x7e,
Kalle Valod5c65152019-11-23 09:58:40 +02001013 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1014 WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1015 WMI_VDEV_PARAM_BSS_COLOR,
1016 WMI_VDEV_PARAM_SET_HEMU_MODE,
1017 WMI_VDEV_PARAM_TX_OFDMA_CPLEN,
1018};
1019
1020enum wmi_tlv_peer_flags {
1021 WMI_TLV_PEER_AUTH = 0x00000001,
1022 WMI_TLV_PEER_QOS = 0x00000002,
1023 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004,
1024 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010,
1025 WMI_TLV_PEER_APSD = 0x00000800,
1026 WMI_TLV_PEER_HT = 0x00001000,
1027 WMI_TLV_PEER_40MHZ = 0x00002000,
1028 WMI_TLV_PEER_STBC = 0x00008000,
1029 WMI_TLV_PEER_LDPC = 0x00010000,
1030 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000,
1031 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000,
1032 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000,
1033 WMI_TLV_PEER_VHT = 0x02000000,
1034 WMI_TLV_PEER_80MHZ = 0x04000000,
1035 WMI_TLV_PEER_PMF = 0x08000000,
1036 WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1037 WMI_PEER_160MHZ = 0x40000000,
1038 WMI_PEER_SAFEMODE_EN = 0x80000000,
1039
1040};
1041
1042/** Enum list of TLV Tags for each parameter structure type. */
1043enum wmi_tlv_tag {
1044 WMI_TAG_LAST_RESERVED = 15,
1045 WMI_TAG_FIRST_ARRAY_ENUM,
1046 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1047 WMI_TAG_ARRAY_BYTE,
1048 WMI_TAG_ARRAY_STRUCT,
1049 WMI_TAG_ARRAY_FIXED_STRUCT,
1050 WMI_TAG_LAST_ARRAY_ENUM = 31,
1051 WMI_TAG_SERVICE_READY_EVENT,
1052 WMI_TAG_HAL_REG_CAPABILITIES,
1053 WMI_TAG_WLAN_HOST_MEM_REQ,
1054 WMI_TAG_READY_EVENT,
1055 WMI_TAG_SCAN_EVENT,
1056 WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1057 WMI_TAG_CHAN_INFO_EVENT,
1058 WMI_TAG_COMB_PHYERR_RX_HDR,
1059 WMI_TAG_VDEV_START_RESPONSE_EVENT,
1060 WMI_TAG_VDEV_STOPPED_EVENT,
1061 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1062 WMI_TAG_PEER_STA_KICKOUT_EVENT,
1063 WMI_TAG_MGMT_RX_HDR,
1064 WMI_TAG_TBTT_OFFSET_EVENT,
1065 WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1066 WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1067 WMI_TAG_ROAM_EVENT,
1068 WMI_TAG_WOW_EVENT_INFO,
1069 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1070 WMI_TAG_RTT_EVENT_HEADER,
1071 WMI_TAG_RTT_ERROR_REPORT_EVENT,
1072 WMI_TAG_RTT_MEAS_EVENT,
1073 WMI_TAG_ECHO_EVENT,
1074 WMI_TAG_FTM_INTG_EVENT,
1075 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1076 WMI_TAG_GPIO_INPUT_EVENT,
1077 WMI_TAG_CSA_EVENT,
1078 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1079 WMI_TAG_IGTK_INFO,
1080 WMI_TAG_DCS_INTERFERENCE_EVENT,
1081 WMI_TAG_ATH_DCS_CW_INT,
1082 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1083 WMI_TAG_ATH_DCS_CW_INT,
1084 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1085 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1086 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1087 WMI_TAG_WLAN_PROFILE_CTX_T,
1088 WMI_TAG_WLAN_PROFILE_T,
1089 WMI_TAG_PDEV_QVIT_EVENT,
1090 WMI_TAG_HOST_SWBA_EVENT,
1091 WMI_TAG_TIM_INFO,
1092 WMI_TAG_P2P_NOA_INFO,
1093 WMI_TAG_STATS_EVENT,
1094 WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1095 WMI_TAG_AVOID_FREQ_RANGE_DESC,
1096 WMI_TAG_GTK_REKEY_FAIL_EVENT,
1097 WMI_TAG_INIT_CMD,
1098 WMI_TAG_RESOURCE_CONFIG,
1099 WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1100 WMI_TAG_START_SCAN_CMD,
1101 WMI_TAG_STOP_SCAN_CMD,
1102 WMI_TAG_SCAN_CHAN_LIST_CMD,
1103 WMI_TAG_CHANNEL,
1104 WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1105 WMI_TAG_PDEV_SET_PARAM_CMD,
1106 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1107 WMI_TAG_WMM_PARAMS,
1108 WMI_TAG_PDEV_SET_QUIET_CMD,
1109 WMI_TAG_VDEV_CREATE_CMD,
1110 WMI_TAG_VDEV_DELETE_CMD,
1111 WMI_TAG_VDEV_START_REQUEST_CMD,
1112 WMI_TAG_P2P_NOA_DESCRIPTOR,
1113 WMI_TAG_P2P_GO_SET_BEACON_IE,
1114 WMI_TAG_GTK_OFFLOAD_CMD,
1115 WMI_TAG_VDEV_UP_CMD,
1116 WMI_TAG_VDEV_STOP_CMD,
1117 WMI_TAG_VDEV_DOWN_CMD,
1118 WMI_TAG_VDEV_SET_PARAM_CMD,
1119 WMI_TAG_VDEV_INSTALL_KEY_CMD,
1120 WMI_TAG_PEER_CREATE_CMD,
1121 WMI_TAG_PEER_DELETE_CMD,
1122 WMI_TAG_PEER_FLUSH_TIDS_CMD,
1123 WMI_TAG_PEER_SET_PARAM_CMD,
1124 WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1125 WMI_TAG_VHT_RATE_SET,
1126 WMI_TAG_BCN_TMPL_CMD,
1127 WMI_TAG_PRB_TMPL_CMD,
1128 WMI_TAG_BCN_PRB_INFO,
1129 WMI_TAG_PEER_TID_ADDBA_CMD,
1130 WMI_TAG_PEER_TID_DELBA_CMD,
1131 WMI_TAG_STA_POWERSAVE_MODE_CMD,
1132 WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1133 WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1134 WMI_TAG_ROAM_SCAN_MODE,
1135 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1136 WMI_TAG_ROAM_SCAN_PERIOD,
1137 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1138 WMI_TAG_PDEV_SUSPEND_CMD,
1139 WMI_TAG_PDEV_RESUME_CMD,
1140 WMI_TAG_ADD_BCN_FILTER_CMD,
1141 WMI_TAG_RMV_BCN_FILTER_CMD,
1142 WMI_TAG_WOW_ENABLE_CMD,
1143 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1144 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1145 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1146 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1147 WMI_TAG_ARP_OFFLOAD_TUPLE,
1148 WMI_TAG_NS_OFFLOAD_TUPLE,
1149 WMI_TAG_FTM_INTG_CMD,
1150 WMI_TAG_STA_KEEPALIVE_CMD,
1151 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
1152 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1153 WMI_TAG_AP_PS_PEER_CMD,
1154 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1155 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1156 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1157 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1158 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1159 WMI_TAG_WOW_DEL_PATTERN_CMD,
1160 WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1161 WMI_TAG_RTT_MEASREQ_HEAD,
1162 WMI_TAG_RTT_MEASREQ_BODY,
1163 WMI_TAG_RTT_TSF_CMD,
1164 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1165 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1166 WMI_TAG_REQUEST_STATS_CMD,
1167 WMI_TAG_NLO_CONFIG_CMD,
1168 WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1169 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1170 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1171 WMI_TAG_CHATTER_SET_MODE_CMD,
1172 WMI_TAG_ECHO_CMD,
1173 WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1174 WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1175 WMI_TAG_FORCE_FW_HANG_CMD,
1176 WMI_TAG_GPIO_CONFIG_CMD,
1177 WMI_TAG_GPIO_OUTPUT_CMD,
1178 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1179 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1180 WMI_TAG_BCN_TX_HDR,
1181 WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1182 WMI_TAG_MGMT_TX_HDR,
1183 WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1184 WMI_TAG_ADDBA_SEND_CMD,
1185 WMI_TAG_DELBA_SEND_CMD,
1186 WMI_TAG_ADDBA_SETRESPONSE_CMD,
1187 WMI_TAG_SEND_SINGLEAMSDU_CMD,
1188 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1189 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1190 WMI_TAG_PDEV_SET_HT_IE_CMD,
1191 WMI_TAG_PDEV_SET_VHT_IE_CMD,
1192 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1193 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1194 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1195 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1196 WMI_TAG_PEER_MCAST_GROUP_CMD,
1197 WMI_TAG_ROAM_AP_PROFILE,
1198 WMI_TAG_AP_PROFILE,
1199 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1200 WMI_TAG_PDEV_DFS_ENABLE_CMD,
1201 WMI_TAG_PDEV_DFS_DISABLE_CMD,
1202 WMI_TAG_WOW_ADD_PATTERN_CMD,
1203 WMI_TAG_WOW_BITMAP_PATTERN_T,
1204 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1205 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1206 WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1207 WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1208 WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1209 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1210 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1211 WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1212 WMI_TAG_TXBF_CMD,
1213 WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1214 WMI_TAG_NLO_EVENT,
1215 WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1216 WMI_TAG_UPLOAD_H_HDR,
1217 WMI_TAG_CAPTURE_H_EVENT_HDR,
1218 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1219 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1220 WMI_TAG_VDEV_WMM_ADDTS_CMD,
1221 WMI_TAG_VDEV_WMM_DELTS_CMD,
1222 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1223 WMI_TAG_TDLS_SET_STATE_CMD,
1224 WMI_TAG_TDLS_PEER_UPDATE_CMD,
1225 WMI_TAG_TDLS_PEER_EVENT,
1226 WMI_TAG_TDLS_PEER_CAPABILITIES,
1227 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1228 WMI_TAG_ROAM_CHAN_LIST,
1229 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1230 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1231 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1232 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1233 WMI_TAG_BA_REQ_SSN_CMD,
1234 WMI_TAG_BA_RSP_SSN_EVENT,
1235 WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1236 WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1237 WMI_TAG_P2P_SET_OPPPS_CMD,
1238 WMI_TAG_P2P_SET_NOA_CMD,
1239 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1240 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1241 WMI_TAG_STA_SMPS_PARAM_CMD,
1242 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1243 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1244 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1245 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1246 WMI_TAG_P2P_NOA_EVENT,
1247 WMI_TAG_HB_SET_ENABLE_CMD,
1248 WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1249 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1250 WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1251 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1252 WMI_TAG_HB_IND_EVENT,
1253 WMI_TAG_TX_PAUSE_EVENT,
1254 WMI_TAG_RFKILL_EVENT,
1255 WMI_TAG_DFS_RADAR_EVENT,
1256 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1257 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1258 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1259 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1260 WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1261 WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1262 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1263 WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1264 WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1265 WMI_TAG_VDEV_PLMREQ_START_CMD,
1266 WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1267 WMI_TAG_THERMAL_MGMT_CMD,
1268 WMI_TAG_THERMAL_MGMT_EVENT,
1269 WMI_TAG_PEER_INFO_REQ_CMD,
1270 WMI_TAG_PEER_INFO_EVENT,
1271 WMI_TAG_PEER_INFO,
1272 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1273 WMI_TAG_RMC_SET_MODE_CMD,
1274 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1275 WMI_TAG_RMC_CONFIG_CMD,
1276 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1277 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1278 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1279 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1280 WMI_TAG_NAN_CMD_PARAM,
1281 WMI_TAG_NAN_EVENT_HDR,
1282 WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1283 WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1284 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1285 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1286 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1287 WMI_TAG_AGGR_STATE_TRIG_EVENT,
1288 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1289 WMI_TAG_ROAM_SCAN_CMD,
1290 WMI_TAG_REQ_STATS_EXT_CMD,
1291 WMI_TAG_STATS_EXT_EVENT,
1292 WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1293 WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1294 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1295 WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1296 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1297 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1298 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1299 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1300 WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1301 WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1302 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1303 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1304 WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1305 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1306 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1307 WMI_TAG_START_LINK_STATS_CMD,
1308 WMI_TAG_CLEAR_LINK_STATS_CMD,
1309 WMI_TAG_REQUEST_LINK_STATS_CMD,
1310 WMI_TAG_IFACE_LINK_STATS_EVENT,
1311 WMI_TAG_RADIO_LINK_STATS_EVENT,
1312 WMI_TAG_PEER_STATS_EVENT,
1313 WMI_TAG_CHANNEL_STATS,
1314 WMI_TAG_RADIO_LINK_STATS,
1315 WMI_TAG_RATE_STATS,
1316 WMI_TAG_PEER_LINK_STATS,
1317 WMI_TAG_WMM_AC_STATS,
1318 WMI_TAG_IFACE_LINK_STATS,
1319 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1320 WMI_TAG_LPI_START_SCAN_CMD,
1321 WMI_TAG_LPI_STOP_SCAN_CMD,
1322 WMI_TAG_LPI_RESULT_EVENT,
1323 WMI_TAG_PEER_STATE_EVENT,
1324 WMI_TAG_EXTSCAN_BUCKET_CMD,
1325 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1326 WMI_TAG_EXTSCAN_START_CMD,
1327 WMI_TAG_EXTSCAN_STOP_CMD,
1328 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1329 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1330 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1331 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1332 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1333 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1334 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1335 WMI_TAG_EXTSCAN_OPERATION_EVENT,
1336 WMI_TAG_EXTSCAN_START_STOP_EVENT,
1337 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1338 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1339 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1340 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1341 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1342 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1343 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1344 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1345 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1346 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1347 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1348 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1349 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1350 WMI_TAG_UNIT_TEST_CMD,
1351 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1352 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1353 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1354 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1355 WMI_TAG_ROAM_SYNCH_EVENT,
1356 WMI_TAG_ROAM_SYNCH_COMPLETE,
1357 WMI_TAG_EXTWOW_ENABLE_CMD,
1358 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1359 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1360 WMI_TAG_LPI_STATUS_EVENT,
1361 WMI_TAG_LPI_HANDOFF_EVENT,
1362 WMI_TAG_VDEV_RATE_STATS_EVENT,
1363 WMI_TAG_VDEV_RATE_HT_INFO,
1364 WMI_TAG_RIC_REQUEST,
1365 WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1366 WMI_TAG_PDEV_TEMPERATURE_EVENT,
1367 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1368 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1369 WMI_TAG_RIC_TSPEC,
1370 WMI_TAG_TPC_CHAINMASK_CONFIG,
1371 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1372 WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1373 WMI_TAG_KEY_MATERIAL,
1374 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1375 WMI_TAG_SET_LED_FLASHING_CMD,
1376 WMI_TAG_MDNS_OFFLOAD_CMD,
1377 WMI_TAG_MDNS_SET_FQDN_CMD,
1378 WMI_TAG_MDNS_SET_RESP_CMD,
1379 WMI_TAG_MDNS_GET_STATS_CMD,
1380 WMI_TAG_MDNS_STATS_EVENT,
1381 WMI_TAG_ROAM_INVOKE_CMD,
1382 WMI_TAG_PDEV_RESUME_EVENT,
1383 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1384 WMI_TAG_SAP_OFL_ENABLE_CMD,
1385 WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1386 WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1387 WMI_TAG_APFIND_CMD_PARAM,
1388 WMI_TAG_APFIND_EVENT_HDR,
1389 WMI_TAG_OCB_SET_SCHED_CMD,
1390 WMI_TAG_OCB_SET_SCHED_EVENT,
1391 WMI_TAG_OCB_SET_CONFIG_CMD,
1392 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1393 WMI_TAG_OCB_SET_UTC_TIME_CMD,
1394 WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1395 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1396 WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1397 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1398 WMI_TAG_DCC_GET_STATS_CMD,
1399 WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1400 WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1401 WMI_TAG_DCC_CLEAR_STATS_CMD,
1402 WMI_TAG_DCC_UPDATE_NDL_CMD,
1403 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1404 WMI_TAG_DCC_STATS_EVENT,
1405 WMI_TAG_OCB_CHANNEL,
1406 WMI_TAG_OCB_SCHEDULE_ELEMENT,
1407 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1408 WMI_TAG_DCC_NDL_CHAN,
1409 WMI_TAG_QOS_PARAMETER,
1410 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1411 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1412 WMI_TAG_ROAM_FILTER,
1413 WMI_TAG_PASSPOINT_CONFIG_CMD,
1414 WMI_TAG_PASSPOINT_EVENT_HDR,
1415 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1416 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1417 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1418 WMI_TAG_VDEV_TSF_REPORT_EVENT,
1419 WMI_TAG_GET_FW_MEM_DUMP,
1420 WMI_TAG_UPDATE_FW_MEM_DUMP,
1421 WMI_TAG_FW_MEM_DUMP_PARAMS,
1422 WMI_TAG_DEBUG_MESG_FLUSH,
1423 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1424 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1425 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1426 WMI_TAG_VDEV_SET_IE_CMD,
1427 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1428 WMI_TAG_RSSI_BREACH_EVENT,
1429 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1430 WMI_TAG_SOC_SET_PCL_CMD,
1431 WMI_TAG_SOC_SET_HW_MODE_CMD,
1432 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1433 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1434 WMI_TAG_VDEV_TXRX_STREAMS,
1435 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1436 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1437 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1438 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1439 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1440 WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1441 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1442 WMI_TAG_PACKET_FILTER_CONFIG,
1443 WMI_TAG_PACKET_FILTER_ENABLE,
1444 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1445 WMI_TAG_MGMT_TX_SEND_CMD,
1446 WMI_TAG_MGMT_TX_COMPL_EVENT,
1447 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1448 WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1449 WMI_TAG_LRO_INFO_CMD,
1450 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1451 WMI_TAG_SERVICE_READY_EXT_EVENT,
1452 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1453 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1454 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1455 WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1456 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1457 WMI_TAG_PEER_ASSOC_CONF_EVENT,
1458 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1459 WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1460 WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1461 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1462 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1463 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1464 WMI_TAG_SCPC_EVENT,
1465 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1466 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1467 WMI_TAG_BPF_GET_CAPABILITY_CMD,
1468 WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1469 WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1470 WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1471 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1472 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1473 WMI_TAG_VDEV_DELETE_RESP_EVENT,
1474 WMI_TAG_PEER_DELETE_RESP_EVENT,
1475 WMI_TAG_ROAM_DENSE_THRES_PARAM,
1476 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1477 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1478 WMI_TAG_VDEV_CONFIG_RATEMASK,
1479 WMI_TAG_PDEV_FIPS_CMD,
1480 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1481 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1482 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1483 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1484 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1485 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1486 WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1487 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1488 WMI_TAG_FWTEST_SET_PARAM_CMD,
1489 WMI_TAG_PEER_ATF_REQUEST,
1490 WMI_TAG_VDEV_ATF_REQUEST,
1491 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1492 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1493 WMI_TAG_INST_RSSI_STATS_RESP,
1494 WMI_TAG_MED_UTIL_REPORT_EVENT,
1495 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1496 WMI_TAG_WDS_ADDR_EVENT,
1497 WMI_TAG_PEER_RATECODE_LIST_EVENT,
1498 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1499 WMI_TAG_PDEV_TPC_EVENT,
1500 WMI_TAG_ANI_OFDM_EVENT,
1501 WMI_TAG_ANI_CCK_EVENT,
1502 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1503 WMI_TAG_PDEV_FIPS_EVENT,
1504 WMI_TAG_ATF_PEER_INFO,
1505 WMI_TAG_PDEV_GET_TPC_CMD,
1506 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1507 WMI_TAG_QBOOST_CFG_CMD,
1508 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1509 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1510 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1511 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1512 WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1513 WMI_TAG_PEER_MCS_RATE_INFO,
1514 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1515 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1516 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1517 WMI_TAG_MU_REPORT_TOTAL_MU,
1518 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1519 WMI_TAG_ROAM_SET_MBO,
1520 WMI_TAG_MIB_STATS_ENABLE_CMD,
1521 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1522 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1523 WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1524 WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1525 WMI_TAG_NDI_GET_CAP_REQ,
1526 WMI_TAG_NDP_INITIATOR_REQ,
1527 WMI_TAG_NDP_RESPONDER_REQ,
1528 WMI_TAG_NDP_END_REQ,
1529 WMI_TAG_NDI_CAP_RSP_EVENT,
1530 WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1531 WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1532 WMI_TAG_NDP_END_RSP_EVENT,
1533 WMI_TAG_NDP_INDICATION_EVENT,
1534 WMI_TAG_NDP_CONFIRM_EVENT,
1535 WMI_TAG_NDP_END_INDICATION_EVENT,
1536 WMI_TAG_VDEV_SET_QUIET_CMD,
1537 WMI_TAG_PDEV_SET_PCL_CMD,
1538 WMI_TAG_PDEV_SET_HW_MODE_CMD,
1539 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1540 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1541 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1542 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1543 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1544 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1545 WMI_TAG_COEX_CONFIG_CMD,
1546 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1547 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1548 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1549 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1550 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1551 WMI_TAG_MAC_PHY_CAPABILITIES,
1552 WMI_TAG_HW_MODE_CAPABILITIES,
1553 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1554 WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1555 WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1556 WMI_TAG_VDEV_WISA_CMD,
1557 WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1558 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1559 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1560 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1561 WMI_TAG_NDP_END_RSP_PER_NDI,
1562 WMI_TAG_PEER_BWF_REQUEST,
1563 WMI_TAG_BWF_PEER_INFO,
1564 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1565 WMI_TAG_RMC_SET_LEADER_CMD,
1566 WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1567 WMI_TAG_PER_CHAIN_RSSI_STATS,
1568 WMI_TAG_RSSI_STATS,
1569 WMI_TAG_P2P_LO_START_CMD,
1570 WMI_TAG_P2P_LO_STOP_CMD,
1571 WMI_TAG_P2P_LO_STOPPED_EVENT,
1572 WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1573 WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1574 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1575 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1576 WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1577 WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1578 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1579 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1580 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1581 WMI_TAG_TLV_BUF_LEN_PARAM,
1582 WMI_TAG_SERVICE_AVAILABLE_EVENT,
1583 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1584 WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1585 WMI_TAG_PEER_ANTDIV_INFO,
1586 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1587 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1588 WMI_TAG_MNT_FILTER_CMD,
1589 WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1590 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1591 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1592 WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1593 WMI_TAG_CHAN_CCA_STATS,
1594 WMI_TAG_PEER_SIGNAL_STATS,
1595 WMI_TAG_TX_STATS,
1596 WMI_TAG_PEER_AC_TX_STATS,
1597 WMI_TAG_RX_STATS,
1598 WMI_TAG_PEER_AC_RX_STATS,
1599 WMI_TAG_REPORT_STATS_EVENT,
1600 WMI_TAG_CHAN_CCA_STATS_THRESH,
1601 WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1602 WMI_TAG_TX_STATS_THRESH,
1603 WMI_TAG_RX_STATS_THRESH,
1604 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1605 WMI_TAG_REQUEST_WLAN_STATS_CMD,
1606 WMI_TAG_RX_AGGR_FAILURE_EVENT,
1607 WMI_TAG_RX_AGGR_FAILURE_INFO,
1608 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1609 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1610 WMI_TAG_PDEV_BAND_TO_MAC,
1611 WMI_TAG_TBTT_OFFSET_INFO,
1612 WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1613 WMI_TAG_SAR_LIMITS_CMD,
1614 WMI_TAG_SAR_LIMIT_CMD_ROW,
1615 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1616 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1617 WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1618 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1619 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1620 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1621 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1622 WMI_TAG_VENDOR_OUI,
1623 WMI_TAG_REQUEST_RCPI_CMD,
1624 WMI_TAG_UPDATE_RCPI_EVENT,
1625 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1626 WMI_TAG_PEER_STATS_INFO,
1627 WMI_TAG_PEER_STATS_INFO_EVENT,
1628 WMI_TAG_PKGID_EVENT,
1629 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1630 WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1631 WMI_TAG_REGULATORY_RULE_STRUCT,
1632 WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1633 WMI_TAG_11D_SCAN_START_CMD,
1634 WMI_TAG_11D_SCAN_STOP_CMD,
1635 WMI_TAG_11D_NEW_COUNTRY_EVENT,
1636 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1637 WMI_TAG_RADIO_CHAN_STATS,
1638 WMI_TAG_RADIO_CHAN_STATS_EVENT,
1639 WMI_TAG_ROAM_PER_CONFIG,
1640 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1641 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1642 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1643 WMI_TAG_HW_DATA_FILTER_CMD,
1644 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1645 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1646 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1647 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1648 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1649 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1650 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1651 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1652 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1653 WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1654 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1655 WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1656 WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1657 WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1658 WMI_TAG_IFACE_OFFLOAD_STATS,
1659 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1660 WMI_TAG_RSSI_CTL_EXT,
1661 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1662 WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1663 WMI_TAG_VDEV_GET_TX_POWER_CMD,
1664 WMI_TAG_VDEV_TX_POWER_EVENT,
1665 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1666 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1667 WMI_TAG_TX_SEND_PARAMS,
1668 WMI_TAG_HE_RATE_SET,
1669 WMI_TAG_CONGESTION_STATS,
1670 WMI_TAG_SET_INIT_COUNTRY_CMD,
1671 WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1672 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1673 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1674 WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1675 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1676 WMI_TAG_THERM_THROT_STATS_EVENT,
1677 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1678 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1679 WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1680 WMI_TAG_OEM_DMA_RING_CFG_REQ,
1681 WMI_TAG_OEM_DMA_RING_CFG_RSP,
1682 WMI_TAG_OEM_INDIRECT_DATA,
1683 WMI_TAG_OEM_DMA_BUF_RELEASE,
1684 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1685 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1686 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1687 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1688 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1689 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1690 WMI_TAG_UNIT_TEST_EVENT,
1691 WMI_TAG_ROAM_FILS_OFFLOAD,
1692 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1693 WMI_TAG_PMK_CACHE,
1694 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1695 WMI_TAG_ROAM_FILS_SYNCH,
1696 WMI_TAG_GTK_OFFLOAD_EXTENDED,
1697 WMI_TAG_ROAM_BG_SCAN_ROAMING,
1698 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1699 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1700 WMI_TAG_OIC_PING_HANDOFF_EVENT,
1701 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1702 WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1703 WMI_TAG_BTM_CONFIG,
1704 WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1705 WMI_TAG_WLM_CONFIG_CMD,
1706 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1707 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1708 WMI_TAG_ROAM_CND_SCORING_PARAM,
1709 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1710 WMI_TAG_VENDOR_OUI_EXT,
1711 WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1712 WMI_TAG_FD_SEND_FROM_HOST_CMD,
1713 WMI_TAG_ENABLE_FILS_CMD,
1714 WMI_TAG_HOST_SWFDA_EVENT,
1715 WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1716 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1717 WMI_TAG_STATS_PERIOD,
1718 WMI_TAG_NDL_SCHEDULE_UPDATE,
1719 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1720 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1721 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1722 WMI_TAG_SAR2_RESULT_EVENT,
1723 WMI_TAG_SAR_CAPABILITIES,
1724 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1725 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1726 WMI_TAG_DMA_RING_CAPABILITIES,
1727 WMI_TAG_DMA_RING_CFG_REQ,
1728 WMI_TAG_DMA_RING_CFG_RSP,
1729 WMI_TAG_DMA_BUF_RELEASE,
1730 WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1731 WMI_TAG_SAR_GET_LIMITS_CMD,
1732 WMI_TAG_SAR_GET_LIMITS_EVENT,
1733 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1734 WMI_TAG_OFFLOAD_11K_REPORT,
1735 WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1736 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1737 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1738 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1739 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1740 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1741 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1742 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1743 WMI_TAG_PDEV_GET_NFCAL_POWER,
1744 WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1745 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1746 WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1747 WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1748 WMI_TAG_TWT_ENABLE_CMD,
1749 WMI_TAG_TWT_DISABLE_CMD,
1750 WMI_TAG_TWT_ADD_DIALOG_CMD,
1751 WMI_TAG_TWT_DEL_DIALOG_CMD,
1752 WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1753 WMI_TAG_TWT_RESUME_DIALOG_CMD,
1754 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1755 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1756 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1757 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1758 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1759 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1760 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1761 WMI_TAG_ROAM_SCAN_STATS_EVENT,
1762 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1763 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1764 WMI_TAG_GET_TPC_POWER_CMD,
1765 WMI_TAG_GET_TPC_POWER_EVENT,
1766 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1767 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1768 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1769 WMI_TAG_MOTION_DET_START_STOP_CMD,
1770 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1771 WMI_TAG_MOTION_DET_EVENT,
1772 WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1773 WMI_TAG_NDP_TRANSPORT_IP,
1774 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1775 WMI_TAG_ESP_ESTIMATE_EVENT,
1776 WMI_TAG_NAN_HOST_CONFIG,
1777 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1778 WMI_TAG_PEER_CFR_CAPTURE_CMD,
1779 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1780 WMI_TAG_CHAN_WIDTH_PEER_LIST,
1781 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1782 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1783 WMI_TAG_PEER_EXTD2_STATS,
1784 WMI_TAG_HPCS_PULSE_START_CMD,
1785 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1786 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1787 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1788 WMI_TAG_NAN_EVENT_INFO,
1789 WMI_TAG_NDP_CHANNEL_INFO,
1790 WMI_TAG_NDP_CMD,
1791 WMI_TAG_NDP_EVENT,
1792 /* TODO add all the missing cmds */
1793 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1794 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1795 WMI_TAG_MAX
1796};
1797
1798enum wmi_tlv_service {
1799 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1800 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1801 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1802 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1803 WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1804 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1805 WMI_TLV_SERVICE_AP_UAPSD = 6,
1806 WMI_TLV_SERVICE_AP_DFS = 7,
1807 WMI_TLV_SERVICE_11AC = 8,
1808 WMI_TLV_SERVICE_BLOCKACK = 9,
1809 WMI_TLV_SERVICE_PHYERR = 10,
1810 WMI_TLV_SERVICE_BCN_FILTER = 11,
1811 WMI_TLV_SERVICE_RTT = 12,
1812 WMI_TLV_SERVICE_WOW = 13,
1813 WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1814 WMI_TLV_SERVICE_IRAM_TIDS = 15,
1815 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1816 WMI_TLV_SERVICE_NLO = 17,
1817 WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1818 WMI_TLV_SERVICE_SCAN_SCH = 19,
1819 WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1820 WMI_TLV_SERVICE_CHATTER = 21,
1821 WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1822 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1823 WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1824 WMI_TLV_SERVICE_GPIO = 25,
1825 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1826 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1827 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1828 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1829 WMI_TLV_SERVICE_TX_ENCAP = 30,
1830 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1831 WMI_TLV_SERVICE_EARLY_RX = 32,
1832 WMI_TLV_SERVICE_STA_SMPS = 33,
1833 WMI_TLV_SERVICE_FWTEST = 34,
1834 WMI_TLV_SERVICE_STA_WMMAC = 35,
1835 WMI_TLV_SERVICE_TDLS = 36,
1836 WMI_TLV_SERVICE_BURST = 37,
1837 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1838 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1839 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1840 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1841 WMI_TLV_SERVICE_WLAN_HB = 42,
1842 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1843 WMI_TLV_SERVICE_BATCH_SCAN = 44,
1844 WMI_TLV_SERVICE_QPOWER = 45,
1845 WMI_TLV_SERVICE_PLMREQ = 46,
1846 WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1847 WMI_TLV_SERVICE_RMC = 48,
1848 WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1849 WMI_TLV_SERVICE_COEX_SAR = 50,
1850 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1851 WMI_TLV_SERVICE_NAN = 52,
1852 WMI_TLV_SERVICE_L1SS_STAT = 53,
1853 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1854 WMI_TLV_SERVICE_OBSS_SCAN = 55,
1855 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1856 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1857 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1858 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1859 WMI_TLV_SERVICE_LPASS = 60,
1860 WMI_TLV_SERVICE_EXTSCAN = 61,
1861 WMI_TLV_SERVICE_D0WOW = 62,
1862 WMI_TLV_SERVICE_HSOFFLOAD = 63,
1863 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
1864 WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
1865 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
1866 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
1867 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
1868 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
1869 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
1870 WMI_TLV_SERVICE_OCB = 71,
1871 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
1872 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
1873 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
1874 WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
1875 WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
1876 WMI_TLV_SERVICE_EXT_MSG = 77,
1877 WMI_TLV_SERVICE_MAWC = 78,
1878 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
1879 WMI_TLV_SERVICE_EGAP = 80,
1880 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
1881 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
1882 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
1883 WMI_TLV_SERVICE_ATF = 84,
1884 WMI_TLV_SERVICE_COEX_GPIO = 85,
1885 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
1886 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
1887 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
1888 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
1889 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
1890 WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
1891 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
1892 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
1893 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
1894 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
1895 WMI_TLV_SERVICE_NAN_DATA = 96,
1896 WMI_TLV_SERVICE_NAN_RTT = 97,
1897 WMI_TLV_SERVICE_11AX = 98,
1898 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
1899 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
1900 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
1901 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
1902 WMI_TLV_SERVICE_MESH_11S = 103,
1903 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
1904 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
1905 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
1906 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
1907 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
1908 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
1909 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
1910 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
1911 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
1912 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
1913 WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
1914 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
1915 WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
1916 WMI_TLV_SERVICE_REGULATORY_DB = 117,
1917 WMI_TLV_SERVICE_11D_OFFLOAD = 118,
1918 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
1919 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
1920 WMI_TLV_SERVICE_PKT_ROUTING = 121,
1921 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
1922 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
1923 WMI_TLV_SERVICE_8SS_TX_BFEE = 124,
1924 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
1925 WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
1926 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
1927
1928 WMI_MAX_SERVICE = 128,
1929
1930 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
1931 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
1932 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
1933 WMI_TLV_SERVICE_FILS_SUPPORT = 131,
1934 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
1935 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
1936 WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
1937 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
1938 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
1939 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
1940 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
1941 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
1942 WMI_TLV_SERVICE_THERM_THROT = 140,
1943 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
1944 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
1945 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
1946 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
1947 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
1948 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
1949 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
1950 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
1951 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
1952 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
1953 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
1954 WMI_TLV_SERVICE_STA_TWT = 152,
1955 WMI_TLV_SERVICE_AP_TWT = 153,
1956 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
1957 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
1958 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
1959 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
1960 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
1961 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
1962 WMI_TLV_SERVICE_MOTION_DET = 160,
1963 WMI_TLV_SERVICE_INFRA_MBSSID = 161,
1964 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
1965 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
1966 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
1967 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
1968 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
1969 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
1970 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
1971 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
1972 WMI_TLV_SERVICE_ESP_SUPPORT = 170,
1973 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
1974 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
1975 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
1976 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
1977 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
1978 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
1979
1980 WMI_MAX_EXT_SERVICE
1981
1982};
1983
1984enum {
1985 WMI_SMPS_FORCED_MODE_NONE = 0,
1986 WMI_SMPS_FORCED_MODE_DISABLED,
1987 WMI_SMPS_FORCED_MODE_STATIC,
1988 WMI_SMPS_FORCED_MODE_DYNAMIC
1989};
1990
1991#define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0
1992#define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1
1993#define WMI_NUM_SUPPORTED_BAND_MAX 2
1994
1995#define WMI_PEER_MIMO_PS_STATE 0x1
1996#define WMI_PEER_AMPDU 0x2
1997#define WMI_PEER_AUTHORIZE 0x3
1998#define WMI_PEER_CHWIDTH 0x4
1999#define WMI_PEER_NSS 0x5
2000#define WMI_PEER_USE_4ADDR 0x6
2001#define WMI_PEER_MEMBERSHIP 0x7
2002#define WMI_PEER_USERPOS 0x8
2003#define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9
2004#define WMI_PEER_TX_FAIL_CNT_THR 0xA
2005#define WMI_PEER_SET_HW_RETRY_CTS2S 0xB
2006#define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC
2007#define WMI_PEER_PHYMODE 0xD
2008#define WMI_PEER_USE_FIXED_PWR 0xE
2009#define WMI_PEER_PARAM_FIXED_RATE 0xF
2010#define WMI_PEER_SET_MU_WHITELIST 0x10
2011#define WMI_PEER_SET_MAX_TX_RATE 0x11
2012#define WMI_PEER_SET_MIN_TX_RATE 0x12
2013#define WMI_PEER_SET_DEFAULT_ROUTING 0x13
2014
2015/* slot time long */
2016#define WMI_VDEV_SLOT_TIME_LONG 0x1
2017/* slot time short */
2018#define WMI_VDEV_SLOT_TIME_SHORT 0x2
2019/* preablbe long */
2020#define WMI_VDEV_PREAMBLE_LONG 0x1
2021/* preablbe short */
2022#define WMI_VDEV_PREAMBLE_SHORT 0x2
2023
2024enum wmi_peer_smps_state {
2025 WMI_PEER_SMPS_PS_NONE = 0x0,
2026 WMI_PEER_SMPS_STATIC = 0x1,
2027 WMI_PEER_SMPS_DYNAMIC = 0x2
2028};
2029
2030enum wmi_peer_chwidth {
2031 WMI_PEER_CHWIDTH_20MHZ = 0,
2032 WMI_PEER_CHWIDTH_40MHZ = 1,
2033 WMI_PEER_CHWIDTH_80MHZ = 2,
2034 WMI_PEER_CHWIDTH_160MHZ = 3,
2035};
2036
2037enum wmi_beacon_gen_mode {
2038 WMI_BEACON_STAGGERED_MODE = 0,
2039 WMI_BEACON_BURST_MODE = 1
2040};
2041
2042struct wmi_host_pdev_band_to_mac {
2043 u32 pdev_id;
2044 u32 start_freq;
2045 u32 end_freq;
2046};
2047
2048struct ath11k_ppe_threshold {
2049 u32 numss_m1;
2050 u32 ru_bit_mask;
2051 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2052};
2053
2054struct ath11k_service_ext_param {
2055 u32 default_conc_scan_config_bits;
2056 u32 default_fw_config_bits;
2057 struct ath11k_ppe_threshold ppet;
2058 u32 he_cap_info;
2059 u32 mpdu_density;
2060 u32 max_bssid_rx_filters;
2061 u32 num_hw_modes;
2062 u32 num_phy;
2063};
2064
2065struct ath11k_hw_mode_caps {
2066 u32 hw_mode_id;
2067 u32 phy_id_map;
2068 u32 hw_mode_config_type;
2069};
2070
2071#define PSOC_HOST_MAX_PHY_SIZE (3)
2072#define ATH11K_11B_SUPPORT BIT(0)
2073#define ATH11K_11G_SUPPORT BIT(1)
2074#define ATH11K_11A_SUPPORT BIT(2)
2075#define ATH11K_11N_SUPPORT BIT(3)
2076#define ATH11K_11AC_SUPPORT BIT(4)
2077#define ATH11K_11AX_SUPPORT BIT(5)
2078
2079struct ath11k_hal_reg_capabilities_ext {
2080 u32 phy_id;
2081 u32 eeprom_reg_domain;
2082 u32 eeprom_reg_domain_ext;
2083 u32 regcap1;
2084 u32 regcap2;
2085 u32 wireless_modes;
2086 u32 low_2ghz_chan;
2087 u32 high_2ghz_chan;
2088 u32 low_5ghz_chan;
2089 u32 high_5ghz_chan;
2090};
2091
2092#define WMI_HOST_MAX_PDEV 3
2093
2094struct wlan_host_mem_chunk {
2095 u32 tlv_header;
2096 u32 req_id;
2097 u32 ptr;
2098 u32 size;
2099} __packed;
2100
2101struct wmi_host_mem_chunk {
2102 void *vaddr;
2103 dma_addr_t paddr;
2104 u32 len;
2105 u32 req_id;
2106};
2107
2108struct wmi_init_cmd_param {
2109 u32 tlv_header;
2110 struct target_resource_config *res_cfg;
2111 u8 num_mem_chunks;
2112 struct wmi_host_mem_chunk *mem_chunks;
2113 u32 hw_mode_id;
2114 u32 num_band_to_mac;
2115 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
2116};
2117
2118struct wmi_pdev_band_to_mac {
2119 u32 tlv_header;
2120 u32 pdev_id;
2121 u32 start_freq;
2122 u32 end_freq;
2123} __packed;
2124
2125struct wmi_pdev_set_hw_mode_cmd_param {
2126 u32 tlv_header;
2127 u32 pdev_id;
2128 u32 hw_mode_index;
2129 u32 num_band_to_mac;
2130} __packed;
2131
2132struct wmi_ppe_threshold {
2133 u32 numss_m1; /** NSS - 1*/
2134 union {
2135 u32 ru_count;
2136 u32 ru_mask;
2137 } __packed;
2138 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2139} __packed;
2140
2141#define HW_BD_INFO_SIZE 5
2142
2143struct wmi_abi_version {
2144 u32 abi_version_0;
2145 u32 abi_version_1;
2146 u32 abi_version_ns_0;
2147 u32 abi_version_ns_1;
2148 u32 abi_version_ns_2;
2149 u32 abi_version_ns_3;
2150} __packed;
2151
2152struct wmi_init_cmd {
2153 u32 tlv_header;
2154 struct wmi_abi_version host_abi_vers;
2155 u32 num_host_mem_chunks;
2156} __packed;
2157
2158struct wmi_resource_config {
2159 u32 tlv_header;
2160 u32 num_vdevs;
2161 u32 num_peers;
2162 u32 num_offload_peers;
2163 u32 num_offload_reorder_buffs;
2164 u32 num_peer_keys;
2165 u32 num_tids;
2166 u32 ast_skid_limit;
2167 u32 tx_chain_mask;
2168 u32 rx_chain_mask;
2169 u32 rx_timeout_pri[4];
2170 u32 rx_decap_mode;
2171 u32 scan_max_pending_req;
2172 u32 bmiss_offload_max_vdev;
2173 u32 roam_offload_max_vdev;
2174 u32 roam_offload_max_ap_profiles;
2175 u32 num_mcast_groups;
2176 u32 num_mcast_table_elems;
2177 u32 mcast2ucast_mode;
2178 u32 tx_dbg_log_size;
2179 u32 num_wds_entries;
2180 u32 dma_burst_size;
2181 u32 mac_aggr_delim;
2182 u32 rx_skip_defrag_timeout_dup_detection_check;
2183 u32 vow_config;
2184 u32 gtk_offload_max_vdev;
2185 u32 num_msdu_desc;
2186 u32 max_frag_entries;
2187 u32 num_tdls_vdevs;
2188 u32 num_tdls_conn_table_entries;
2189 u32 beacon_tx_offload_max_vdev;
2190 u32 num_multicast_filter_entries;
2191 u32 num_wow_filters;
2192 u32 num_keep_alive_pattern;
2193 u32 keep_alive_pattern_size;
2194 u32 max_tdls_concurrent_sleep_sta;
2195 u32 max_tdls_concurrent_buffer_sta;
2196 u32 wmi_send_separate;
2197 u32 num_ocb_vdevs;
2198 u32 num_ocb_channels;
2199 u32 num_ocb_schedules;
2200 u32 flag1;
2201 u32 smart_ant_cap;
2202 u32 bk_minfree;
2203 u32 be_minfree;
2204 u32 vi_minfree;
2205 u32 vo_minfree;
2206 u32 alloc_frag_desc_for_data_pkt;
2207 u32 num_ns_ext_tuples_cfg;
2208 u32 bpf_instruction_size;
2209 u32 max_bssid_rx_filters;
2210 u32 use_pdev_id;
2211 u32 max_num_dbs_scan_duty_cycle;
2212 u32 max_num_group_keys;
2213 u32 peer_map_unmap_v2_support;
John Crispin6d293d42019-11-25 16:36:28 +00002214 u32 sched_params;
2215 u32 twt_ap_pdev_count;
2216 u32 twt_ap_sta_count;
Kalle Valod5c65152019-11-23 09:58:40 +02002217} __packed;
2218
2219struct wmi_service_ready_event {
2220 u32 fw_build_vers;
2221 struct wmi_abi_version fw_abi_vers;
2222 u32 phy_capability;
2223 u32 max_frag_entry;
2224 u32 num_rf_chains;
2225 u32 ht_cap_info;
2226 u32 vht_cap_info;
2227 u32 vht_supp_mcs;
2228 u32 hw_min_tx_power;
2229 u32 hw_max_tx_power;
2230 u32 sys_cap_info;
2231 u32 min_pkt_size_enable;
2232 u32 max_bcn_ie_size;
2233 u32 num_mem_reqs;
2234 u32 max_num_scan_channels;
2235 u32 hw_bd_id;
2236 u32 hw_bd_info[HW_BD_INFO_SIZE];
2237 u32 max_supported_macs;
2238 u32 wmi_fw_sub_feat_caps;
2239 u32 num_dbs_hw_modes;
2240 /* txrx_chainmask
2241 * [7:0] - 2G band tx chain mask
2242 * [15:8] - 2G band rx chain mask
2243 * [23:16] - 5G band tx chain mask
2244 * [31:24] - 5G band rx chain mask
2245 */
2246 u32 txrx_chainmask;
2247 u32 default_dbs_hw_mode_index;
2248 u32 num_msdu_desc;
2249} __packed;
2250
2251#define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2252
2253#define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2254#define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2255#define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2256#define WMI_SERVICE_BITS_IN_SIZE32 4
2257
2258struct wmi_service_ready_ext_event {
2259 u32 default_conc_scan_config_bits;
2260 u32 default_fw_config_bits;
2261 struct wmi_ppe_threshold ppet;
2262 u32 he_cap_info;
2263 u32 mpdu_density;
2264 u32 max_bssid_rx_filters;
2265 u32 fw_build_vers_ext;
2266 u32 max_nlo_ssids;
2267 u32 max_bssid_indicator;
2268 u32 he_cap_info_ext;
2269} __packed;
2270
2271struct wmi_soc_mac_phy_hw_mode_caps {
2272 u32 num_hw_modes;
2273 u32 num_chainmask_tables;
2274} __packed;
2275
2276struct wmi_hw_mode_capabilities {
2277 u32 tlv_header;
2278 u32 hw_mode_id;
2279 u32 phy_id_map;
2280 u32 hw_mode_config_type;
2281} __packed;
2282
2283#define WMI_MAX_HECAP_PHY_SIZE (3)
2284
2285struct wmi_mac_phy_capabilities {
Kalle Valod5c65152019-11-23 09:58:40 +02002286 u32 hw_mode_id;
2287 u32 pdev_id;
2288 u32 phy_id;
2289 u32 supported_flags;
2290 u32 supported_bands;
2291 u32 ampdu_density;
2292 u32 max_bw_supported_2g;
2293 u32 ht_cap_info_2g;
2294 u32 vht_cap_info_2g;
2295 u32 vht_supp_mcs_2g;
2296 u32 he_cap_info_2g;
2297 u32 he_supp_mcs_2g;
2298 u32 tx_chain_mask_2g;
2299 u32 rx_chain_mask_2g;
2300 u32 max_bw_supported_5g;
2301 u32 ht_cap_info_5g;
2302 u32 vht_cap_info_5g;
2303 u32 vht_supp_mcs_5g;
2304 u32 he_cap_info_5g;
2305 u32 he_supp_mcs_5g;
2306 u32 tx_chain_mask_5g;
2307 u32 rx_chain_mask_5g;
2308 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2309 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2310 struct wmi_ppe_threshold he_ppet2g;
2311 struct wmi_ppe_threshold he_ppet5g;
2312 u32 chainmask_table_id;
2313 u32 lmac_id;
2314 u32 he_cap_info_2g_ext;
2315 u32 he_cap_info_5g_ext;
2316 u32 he_cap_info_internal;
2317} __packed;
2318
2319struct wmi_hal_reg_capabilities_ext {
2320 u32 tlv_header;
2321 u32 phy_id;
2322 u32 eeprom_reg_domain;
2323 u32 eeprom_reg_domain_ext;
2324 u32 regcap1;
2325 u32 regcap2;
2326 u32 wireless_modes;
2327 u32 low_2ghz_chan;
2328 u32 high_2ghz_chan;
2329 u32 low_5ghz_chan;
2330 u32 high_5ghz_chan;
2331} __packed;
2332
2333struct wmi_soc_hal_reg_capabilities {
2334 u32 num_phy;
2335} __packed;
2336
2337/* 2 word representation of MAC addr */
2338struct wmi_mac_addr {
2339 union {
2340 u8 addr[6];
2341 struct {
2342 u32 word0;
2343 u32 word1;
2344 } __packed;
2345 } __packed;
2346} __packed;
2347
2348struct wmi_ready_event {
2349 struct wmi_abi_version fw_abi_vers;
2350 struct wmi_mac_addr mac_addr;
2351 u32 status;
2352 u32 num_dscp_table;
2353 u32 num_extra_mac_addr;
2354 u32 num_total_peers;
2355 u32 num_extra_peers;
2356} __packed;
2357
2358struct wmi_service_available_event {
2359 u32 wmi_service_segment_offset;
2360 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2361} __packed;
2362
2363struct ath11k_pdev_wmi {
John Crispin6bc9d6f72019-12-13 16:38:34 +01002364 struct ath11k_wmi_base *wmi_ab;
Kalle Valod5c65152019-11-23 09:58:40 +02002365 enum ath11k_htc_ep_id eid;
2366 const struct wmi_peer_flags_map *peer_flags;
2367 u32 rx_decap_mode;
2368};
2369
2370struct vdev_create_params {
2371 u8 if_id;
2372 u32 type;
2373 u32 subtype;
2374 struct {
2375 u8 tx;
2376 u8 rx;
2377 } chains[NUM_NL80211_BANDS];
2378 u32 pdev_id;
2379};
2380
2381struct wmi_vdev_create_cmd {
2382 u32 tlv_header;
2383 u32 vdev_id;
2384 u32 vdev_type;
2385 u32 vdev_subtype;
2386 struct wmi_mac_addr vdev_macaddr;
2387 u32 num_cfg_txrx_streams;
2388 u32 pdev_id;
2389} __packed;
2390
2391struct wmi_vdev_txrx_streams {
2392 u32 tlv_header;
2393 u32 band;
2394 u32 supported_tx_streams;
2395 u32 supported_rx_streams;
2396} __packed;
2397
2398struct wmi_vdev_delete_cmd {
2399 u32 tlv_header;
2400 u32 vdev_id;
2401} __packed;
2402
2403struct wmi_vdev_up_cmd {
2404 u32 tlv_header;
2405 u32 vdev_id;
2406 u32 vdev_assoc_id;
2407 struct wmi_mac_addr vdev_bssid;
2408 struct wmi_mac_addr trans_bssid;
2409 u32 profile_idx;
2410 u32 profile_num;
2411} __packed;
2412
2413struct wmi_vdev_stop_cmd {
2414 u32 tlv_header;
2415 u32 vdev_id;
2416} __packed;
2417
2418struct wmi_vdev_down_cmd {
2419 u32 tlv_header;
2420 u32 vdev_id;
2421} __packed;
2422
2423#define WMI_VDEV_START_HIDDEN_SSID BIT(0)
2424#define WMI_VDEV_START_PMF_ENABLED BIT(1)
2425#define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2426
2427struct wmi_ssid {
2428 u32 ssid_len;
2429 u32 ssid[8];
2430} __packed;
2431
2432#define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
2433
2434struct wmi_vdev_start_request_cmd {
2435 u32 tlv_header;
2436 u32 vdev_id;
2437 u32 requestor_id;
2438 u32 beacon_interval;
2439 u32 dtim_period;
2440 u32 flags;
2441 struct wmi_ssid ssid;
2442 u32 bcn_tx_rate;
2443 u32 bcn_txpower;
2444 u32 num_noa_descriptors;
2445 u32 disable_hw_ack;
2446 u32 preferred_tx_streams;
2447 u32 preferred_rx_streams;
2448 u32 he_ops;
2449 u32 cac_duration_ms;
2450 u32 regdomain;
2451} __packed;
2452
2453#define MGMT_TX_DL_FRM_LEN 64
2454#define WMI_MAC_MAX_SSID_LENGTH 32
2455struct mac_ssid {
2456 u8 length;
2457 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
2458} __packed;
2459
2460struct wmi_p2p_noa_descriptor {
2461 u32 type_count;
2462 u32 duration;
2463 u32 interval;
2464 u32 start_time;
2465};
2466
2467struct channel_param {
2468 u8 chan_id;
2469 u8 pwr;
2470 u32 mhz;
2471 u32 half_rate:1,
2472 quarter_rate:1,
2473 dfs_set:1,
2474 dfs_set_cfreq2:1,
2475 is_chan_passive:1,
2476 allow_ht:1,
2477 allow_vht:1,
John Crispin9f056ed2019-11-25 16:36:27 +00002478 allow_he:1,
Kalle Valod5c65152019-11-23 09:58:40 +02002479 set_agile:1;
2480 u32 phy_mode;
2481 u32 cfreq1;
2482 u32 cfreq2;
2483 char maxpower;
2484 char minpower;
2485 char maxregpower;
2486 u8 antennamax;
2487 u8 reg_class_id;
2488} __packed;
2489
2490enum wmi_phy_mode {
2491 MODE_11A = 0,
2492 MODE_11G = 1, /* 11b/g Mode */
2493 MODE_11B = 2, /* 11b Mode */
2494 MODE_11GONLY = 3, /* 11g only Mode */
2495 MODE_11NA_HT20 = 4,
2496 MODE_11NG_HT20 = 5,
2497 MODE_11NA_HT40 = 6,
2498 MODE_11NG_HT40 = 7,
2499 MODE_11AC_VHT20 = 8,
2500 MODE_11AC_VHT40 = 9,
2501 MODE_11AC_VHT80 = 10,
2502 MODE_11AC_VHT20_2G = 11,
2503 MODE_11AC_VHT40_2G = 12,
2504 MODE_11AC_VHT80_2G = 13,
2505 MODE_11AC_VHT80_80 = 14,
2506 MODE_11AC_VHT160 = 15,
2507 MODE_11AX_HE20 = 16,
2508 MODE_11AX_HE40 = 17,
2509 MODE_11AX_HE80 = 18,
2510 MODE_11AX_HE80_80 = 19,
2511 MODE_11AX_HE160 = 20,
2512 MODE_11AX_HE20_2G = 21,
2513 MODE_11AX_HE40_2G = 22,
2514 MODE_11AX_HE80_2G = 23,
2515 MODE_UNKNOWN = 24,
2516 MODE_MAX = 24
2517};
2518
2519static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
2520{
2521 switch (mode) {
2522 case MODE_11A:
2523 return "11a";
2524 case MODE_11G:
2525 return "11g";
2526 case MODE_11B:
2527 return "11b";
2528 case MODE_11GONLY:
2529 return "11gonly";
2530 case MODE_11NA_HT20:
2531 return "11na-ht20";
2532 case MODE_11NG_HT20:
2533 return "11ng-ht20";
2534 case MODE_11NA_HT40:
2535 return "11na-ht40";
2536 case MODE_11NG_HT40:
2537 return "11ng-ht40";
2538 case MODE_11AC_VHT20:
2539 return "11ac-vht20";
2540 case MODE_11AC_VHT40:
2541 return "11ac-vht40";
2542 case MODE_11AC_VHT80:
2543 return "11ac-vht80";
2544 case MODE_11AC_VHT160:
2545 return "11ac-vht160";
2546 case MODE_11AC_VHT80_80:
2547 return "11ac-vht80+80";
2548 case MODE_11AC_VHT20_2G:
2549 return "11ac-vht20-2g";
2550 case MODE_11AC_VHT40_2G:
2551 return "11ac-vht40-2g";
2552 case MODE_11AC_VHT80_2G:
2553 return "11ac-vht80-2g";
2554 case MODE_11AX_HE20:
2555 return "11ax-he20";
2556 case MODE_11AX_HE40:
2557 return "11ax-he40";
2558 case MODE_11AX_HE80:
2559 return "11ax-he80";
2560 case MODE_11AX_HE80_80:
2561 return "11ax-he80+80";
2562 case MODE_11AX_HE160:
2563 return "11ax-he160";
2564 case MODE_11AX_HE20_2G:
2565 return "11ax-he20-2g";
2566 case MODE_11AX_HE40_2G:
2567 return "11ax-he40-2g";
2568 case MODE_11AX_HE80_2G:
2569 return "11ax-he80-2g";
2570 case MODE_UNKNOWN:
2571 /* skip */
2572 break;
2573
2574 /* no default handler to allow compiler to check that the
2575 * enum is fully handled
2576 */
zhengbind1389e12019-12-14 18:22:34 +08002577 }
Kalle Valod5c65152019-11-23 09:58:40 +02002578
2579 return "<unknown>";
2580}
2581
2582struct wmi_channel_arg {
2583 u32 freq;
2584 u32 band_center_freq1;
2585 u32 band_center_freq2;
2586 bool passive;
2587 bool allow_ibss;
2588 bool allow_ht;
2589 bool allow_vht;
2590 bool ht40plus;
2591 bool chan_radar;
2592 bool freq2_radar;
2593 bool allow_he;
2594 u32 min_power;
2595 u32 max_power;
2596 u32 max_reg_power;
2597 u32 max_antenna_gain;
2598 enum wmi_phy_mode mode;
2599};
2600
2601struct wmi_vdev_start_req_arg {
2602 u32 vdev_id;
2603 struct wmi_channel_arg channel;
2604 u32 bcn_intval;
2605 u32 dtim_period;
2606 u8 *ssid;
2607 u32 ssid_len;
2608 u32 bcn_tx_rate;
2609 u32 bcn_tx_power;
2610 bool disable_hw_ack;
2611 bool hidden_ssid;
2612 bool pmf_enabled;
2613 u32 he_ops;
2614 u32 cac_duration_ms;
2615 u32 regdomain;
2616 u32 pref_rx_streams;
2617 u32 pref_tx_streams;
2618 u32 num_noa_descriptors;
2619};
2620
2621struct peer_create_params {
2622 const u8 *peer_addr;
2623 u32 peer_type;
2624 u32 vdev_id;
2625};
2626
2627struct peer_delete_params {
2628 u8 vdev_id;
2629};
2630
2631struct peer_flush_params {
2632 u32 peer_tid_bitmap;
2633 u8 vdev_id;
2634};
2635
2636struct pdev_set_regdomain_params {
2637 u16 current_rd_in_use;
2638 u16 current_rd_2g;
2639 u16 current_rd_5g;
2640 u32 ctl_2g;
2641 u32 ctl_5g;
2642 u8 dfs_domain;
2643 u32 pdev_id;
2644};
2645
2646struct rx_reorder_queue_remove_params {
2647 u8 *peer_macaddr;
2648 u16 vdev_id;
2649 u32 peer_tid_bitmap;
2650};
2651
2652#define WMI_HOST_PDEV_ID_SOC 0xFF
2653#define WMI_HOST_PDEV_ID_0 0
2654#define WMI_HOST_PDEV_ID_1 1
2655#define WMI_HOST_PDEV_ID_2 2
2656
2657#define WMI_PDEV_ID_SOC 0
2658#define WMI_PDEV_ID_1ST 1
2659#define WMI_PDEV_ID_2ND 2
2660#define WMI_PDEV_ID_3RD 3
2661
2662/* Freq units in MHz */
2663#define REG_RULE_START_FREQ 0x0000ffff
2664#define REG_RULE_END_FREQ 0xffff0000
2665#define REG_RULE_FLAGS 0x0000ffff
2666#define REG_RULE_MAX_BW 0x0000ffff
2667#define REG_RULE_REG_PWR 0x00ff0000
2668#define REG_RULE_ANT_GAIN 0xff000000
2669
2670#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2671#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2672#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2673#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2674
2675#define HECAP_PHYDWORD_0 0
2676#define HECAP_PHYDWORD_1 1
2677#define HECAP_PHYDWORD_2 2
2678
2679#define HECAP_PHY_SU_BFER BIT(31)
2680#define HECAP_PHY_SU_BFEE BIT(0)
2681#define HECAP_PHY_MU_BFER BIT(1)
2682#define HECAP_PHY_UL_MUMIMO BIT(22)
2683#define HECAP_PHY_UL_MUOFDMA BIT(23)
2684
2685#define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2686 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
2687
2688#define HECAP_PHY_SUBFME_GET(hecap_phy) \
2689 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
2690
2691#define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2692 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
2693
2694#define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2695 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
2696
2697#define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2698 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
2699
2700#define HE_MODE_SU_TX_BFEE BIT(0)
2701#define HE_MODE_SU_TX_BFER BIT(1)
2702#define HE_MODE_MU_TX_BFEE BIT(2)
2703#define HE_MODE_MU_TX_BFER BIT(3)
2704#define HE_MODE_DL_OFDMA BIT(4)
2705#define HE_MODE_UL_OFDMA BIT(5)
2706#define HE_MODE_UL_MUMIMO BIT(6)
2707
2708#define HE_DL_MUOFDMA_ENABLE 1
2709#define HE_UL_MUOFDMA_ENABLE 1
2710#define HE_DL_MUMIMO_ENABLE 1
2711#define HE_MU_BFEE_ENABLE 1
2712#define HE_SU_BFEE_ENABLE 1
2713
2714#define HE_VHT_SOUNDING_MODE_ENABLE 1
2715#define HE_SU_MU_SOUNDING_MODE_ENABLE 1
2716#define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1
2717
2718/* HE or VHT Sounding */
2719#define HE_VHT_SOUNDING_MODE BIT(0)
2720/* SU or MU Sounding */
2721#define HE_SU_MU_SOUNDING_MODE BIT(2)
2722/* Trig or Non-Trig Sounding */
2723#define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3)
2724
2725#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
2726#define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
2727#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
2728#define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700
2729
2730struct pdev_params {
2731 u32 param_id;
2732 u32 param_value;
2733};
2734
2735enum wmi_peer_type {
2736 WMI_PEER_TYPE_DEFAULT = 0,
2737 WMI_PEER_TYPE_BSS = 1,
2738 WMI_PEER_TYPE_TDLS = 2,
2739};
2740
2741struct wmi_peer_create_cmd {
2742 u32 tlv_header;
2743 u32 vdev_id;
2744 struct wmi_mac_addr peer_macaddr;
2745 u32 peer_type;
2746} __packed;
2747
2748struct wmi_peer_delete_cmd {
2749 u32 tlv_header;
2750 u32 vdev_id;
2751 struct wmi_mac_addr peer_macaddr;
2752} __packed;
2753
2754struct wmi_peer_reorder_queue_setup_cmd {
2755 u32 tlv_header;
2756 u32 vdev_id;
2757 struct wmi_mac_addr peer_macaddr;
2758 u32 tid;
2759 u32 queue_ptr_lo;
2760 u32 queue_ptr_hi;
2761 u32 queue_no;
2762 u32 ba_window_size_valid;
2763 u32 ba_window_size;
2764} __packed;
2765
2766struct wmi_peer_reorder_queue_remove_cmd {
2767 u32 tlv_header;
2768 u32 vdev_id;
2769 struct wmi_mac_addr peer_macaddr;
2770 u32 tid_mask;
2771} __packed;
2772
2773struct gpio_config_params {
2774 u32 gpio_num;
2775 u32 input;
2776 u32 pull_type;
2777 u32 intr_mode;
2778};
2779
2780enum wmi_gpio_type {
2781 WMI_GPIO_PULL_NONE,
2782 WMI_GPIO_PULL_UP,
2783 WMI_GPIO_PULL_DOWN
2784};
2785
2786enum wmi_gpio_intr_type {
2787 WMI_GPIO_INTTYPE_DISABLE,
2788 WMI_GPIO_INTTYPE_RISING_EDGE,
2789 WMI_GPIO_INTTYPE_FALLING_EDGE,
2790 WMI_GPIO_INTTYPE_BOTH_EDGE,
2791 WMI_GPIO_INTTYPE_LEVEL_LOW,
2792 WMI_GPIO_INTTYPE_LEVEL_HIGH
2793};
2794
2795enum wmi_bss_chan_info_req_type {
2796 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
2797 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
2798};
2799
2800struct wmi_gpio_config_cmd_param {
2801 u32 tlv_header;
2802 u32 gpio_num;
2803 u32 input;
2804 u32 pull_type;
2805 u32 intr_mode;
2806};
2807
2808struct gpio_output_params {
2809 u32 gpio_num;
2810 u32 set;
2811};
2812
2813struct wmi_gpio_output_cmd_param {
2814 u32 tlv_header;
2815 u32 gpio_num;
2816 u32 set;
2817};
2818
2819struct set_fwtest_params {
2820 u32 arg;
2821 u32 value;
2822};
2823
2824struct wmi_fwtest_set_param_cmd_param {
2825 u32 tlv_header;
2826 u32 param_id;
2827 u32 param_value;
2828};
2829
2830struct wmi_pdev_set_param_cmd {
2831 u32 tlv_header;
2832 u32 pdev_id;
2833 u32 param_id;
2834 u32 param_value;
2835} __packed;
2836
John Crispin97c63742019-12-13 16:38:31 +01002837struct wmi_pdev_set_ps_mode_cmd {
2838 u32 tlv_header;
2839 u32 vdev_id;
2840 u32 sta_ps_mode;
2841} __packed;
2842
Kalle Valod5c65152019-11-23 09:58:40 +02002843struct wmi_pdev_suspend_cmd {
2844 u32 tlv_header;
2845 u32 pdev_id;
2846 u32 suspend_opt;
2847} __packed;
2848
2849struct wmi_pdev_resume_cmd {
2850 u32 tlv_header;
2851 u32 pdev_id;
2852} __packed;
2853
2854struct wmi_pdev_bss_chan_info_req_cmd {
2855 u32 tlv_header;
2856 /* ref wmi_bss_chan_info_req_type */
2857 u32 req_type;
2858} __packed;
2859
2860struct wmi_ap_ps_peer_cmd {
2861 u32 tlv_header;
2862 u32 vdev_id;
2863 struct wmi_mac_addr peer_macaddr;
2864 u32 param;
2865 u32 value;
2866} __packed;
2867
2868struct wmi_sta_powersave_param_cmd {
2869 u32 tlv_header;
2870 u32 vdev_id;
2871 u32 param;
2872 u32 value;
2873} __packed;
2874
2875struct wmi_pdev_set_regdomain_cmd {
2876 u32 tlv_header;
2877 u32 pdev_id;
2878 u32 reg_domain;
2879 u32 reg_domain_2g;
2880 u32 reg_domain_5g;
2881 u32 conformance_test_limit_2g;
2882 u32 conformance_test_limit_5g;
2883 u32 dfs_domain;
2884} __packed;
2885
2886struct wmi_peer_set_param_cmd {
2887 u32 tlv_header;
2888 u32 vdev_id;
2889 struct wmi_mac_addr peer_macaddr;
2890 u32 param_id;
2891 u32 param_value;
2892} __packed;
2893
2894struct wmi_peer_flush_tids_cmd {
2895 u32 tlv_header;
2896 u32 vdev_id;
2897 struct wmi_mac_addr peer_macaddr;
2898 u32 peer_tid_bitmap;
2899} __packed;
2900
2901struct wmi_dfs_phyerr_offload_cmd {
2902 u32 tlv_header;
2903 u32 pdev_id;
2904} __packed;
2905
2906struct wmi_bcn_offload_ctrl_cmd {
2907 u32 tlv_header;
2908 u32 vdev_id;
2909 u32 bcn_ctrl_op;
2910} __packed;
2911
Kalle Valod5c65152019-11-23 09:58:40 +02002912enum scan_dwelltime_adaptive_mode {
2913 SCAN_DWELL_MODE_DEFAULT = 0,
2914 SCAN_DWELL_MODE_CONSERVATIVE = 1,
2915 SCAN_DWELL_MODE_MODERATE = 2,
2916 SCAN_DWELL_MODE_AGGRESSIVE = 3,
2917 SCAN_DWELL_MODE_STATIC = 4
2918};
2919
2920#define WLAN_SCAN_MAX_NUM_SSID 10
2921#define WLAN_SCAN_MAX_NUM_BSSID 10
2922#define WLAN_SCAN_MAX_NUM_CHANNELS 40
2923
2924#define WLAN_SSID_MAX_LEN 32
2925
2926struct element_info {
2927 u32 len;
2928 u8 *ptr;
2929};
2930
2931struct wlan_ssid {
2932 u8 length;
2933 u8 ssid[WLAN_SSID_MAX_LEN];
2934};
2935
2936#define WMI_IE_BITMAP_SIZE 8
2937
2938#define WMI_SCAN_MAX_NUM_SSID 0x0A
2939/* prefix used by scan requestor ids on the host */
2940#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
2941
2942/* prefix used by scan request ids generated on the host */
2943/* host cycles through the lower 12 bits to generate ids */
2944#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
2945
2946#define WLAN_SCAN_PARAMS_MAX_SSID 16
2947#define WLAN_SCAN_PARAMS_MAX_BSSID 4
2948#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
2949
2950/* Values lower than this may be refused by some firmware revisions with a scan
2951 * completion with a timedout reason.
2952 */
2953#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
2954
2955/* Scan priority numbers must be sequential, starting with 0 */
2956enum wmi_scan_priority {
2957 WMI_SCAN_PRIORITY_VERY_LOW = 0,
2958 WMI_SCAN_PRIORITY_LOW,
2959 WMI_SCAN_PRIORITY_MEDIUM,
2960 WMI_SCAN_PRIORITY_HIGH,
2961 WMI_SCAN_PRIORITY_VERY_HIGH,
2962 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
2963};
2964
2965enum wmi_scan_event_type {
2966 WMI_SCAN_EVENT_STARTED = BIT(0),
2967 WMI_SCAN_EVENT_COMPLETED = BIT(1),
2968 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
2969 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3),
2970 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
2971 /* possibly by high-prio scan */
2972 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
2973 WMI_SCAN_EVENT_START_FAILED = BIT(6),
2974 WMI_SCAN_EVENT_RESTARTED = BIT(7),
2975 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8),
2976 WMI_SCAN_EVENT_SUSPENDED = BIT(9),
2977 WMI_SCAN_EVENT_RESUMED = BIT(10),
2978 WMI_SCAN_EVENT_MAX = BIT(15),
2979};
2980
2981enum wmi_scan_completion_reason {
2982 WMI_SCAN_REASON_COMPLETED,
2983 WMI_SCAN_REASON_CANCELLED,
2984 WMI_SCAN_REASON_PREEMPTED,
2985 WMI_SCAN_REASON_TIMEDOUT,
2986 WMI_SCAN_REASON_INTERNAL_FAILURE,
2987 WMI_SCAN_REASON_MAX,
2988};
2989
2990struct wmi_start_scan_cmd {
2991 u32 tlv_header;
2992 u32 scan_id;
2993 u32 scan_req_id;
2994 u32 vdev_id;
2995 u32 scan_priority;
2996 u32 notify_scan_events;
2997 u32 dwell_time_active;
2998 u32 dwell_time_passive;
2999 u32 min_rest_time;
3000 u32 max_rest_time;
3001 u32 repeat_probe_time;
3002 u32 probe_spacing_time;
3003 u32 idle_time;
3004 u32 max_scan_time;
3005 u32 probe_delay;
3006 u32 scan_ctrl_flags;
3007 u32 burst_duration;
3008 u32 num_chan;
3009 u32 num_bssid;
3010 u32 num_ssids;
3011 u32 ie_len;
3012 u32 n_probes;
3013 struct wmi_mac_addr mac_addr;
3014 struct wmi_mac_addr mac_mask;
3015 u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3016 u32 num_vendor_oui;
3017 u32 scan_ctrl_flags_ext;
3018 u32 dwell_time_active_2g;
3019} __packed;
3020
3021#define WMI_SCAN_FLAG_PASSIVE 0x1
3022#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3023#define WMI_SCAN_ADD_CCK_RATES 0x4
3024#define WMI_SCAN_ADD_OFDM_RATES 0x8
3025#define WMI_SCAN_CHAN_STAT_EVENT 0x10
3026#define WMI_SCAN_FILTER_PROBE_REQ 0x20
3027#define WMI_SCAN_BYPASS_DFS_CHN 0x40
3028#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3029#define WMI_SCAN_FILTER_PROMISCUOS 0x100
3030#define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3031#define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400
3032#define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800
3033#define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000
3034#define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000
3035#define WMI_SCAN_OFFCHAN_DATA_TX 0x4000
3036#define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000
3037#define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3038#define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000
3039#define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000
3040#define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3041#define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3042
3043#define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
3044#define WMI_SCAN_DWELL_MODE_SHIFT 21
3045
3046enum {
3047 WMI_SCAN_DWELL_MODE_DEFAULT = 0,
3048 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3049 WMI_SCAN_DWELL_MODE_MODERATE = 2,
3050 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3,
3051 WMI_SCAN_DWELL_MODE_STATIC = 4,
3052};
3053
3054#define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
3055 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
3056 WMI_SCAN_DWELL_MODE_MASK))
3057
3058struct scan_req_params {
3059 u32 scan_id;
3060 u32 scan_req_id;
3061 u32 vdev_id;
3062 u32 pdev_id;
Nathan Chancellor509421a2019-12-11 12:22:52 -07003063 enum wmi_scan_priority scan_priority;
Kalle Valod5c65152019-11-23 09:58:40 +02003064 union {
3065 struct {
3066 u32 scan_ev_started:1,
3067 scan_ev_completed:1,
3068 scan_ev_bss_chan:1,
3069 scan_ev_foreign_chan:1,
3070 scan_ev_dequeued:1,
3071 scan_ev_preempted:1,
3072 scan_ev_start_failed:1,
3073 scan_ev_restarted:1,
3074 scan_ev_foreign_chn_exit:1,
3075 scan_ev_invalid:1,
3076 scan_ev_gpio_timeout:1,
3077 scan_ev_suspended:1,
3078 scan_ev_resumed:1;
3079 };
3080 u32 scan_events;
3081 };
3082 u32 dwell_time_active;
3083 u32 dwell_time_active_2g;
3084 u32 dwell_time_passive;
3085 u32 min_rest_time;
3086 u32 max_rest_time;
3087 u32 repeat_probe_time;
3088 u32 probe_spacing_time;
3089 u32 idle_time;
3090 u32 max_scan_time;
3091 u32 probe_delay;
3092 union {
3093 struct {
3094 u32 scan_f_passive:1,
3095 scan_f_bcast_probe:1,
3096 scan_f_cck_rates:1,
3097 scan_f_ofdm_rates:1,
3098 scan_f_chan_stat_evnt:1,
3099 scan_f_filter_prb_req:1,
3100 scan_f_bypass_dfs_chn:1,
3101 scan_f_continue_on_err:1,
3102 scan_f_offchan_mgmt_tx:1,
3103 scan_f_offchan_data_tx:1,
3104 scan_f_promisc_mode:1,
3105 scan_f_capture_phy_err:1,
3106 scan_f_strict_passive_pch:1,
3107 scan_f_half_rate:1,
3108 scan_f_quarter_rate:1,
3109 scan_f_force_active_dfs_chn:1,
3110 scan_f_add_tpc_ie_in_probe:1,
3111 scan_f_add_ds_ie_in_probe:1,
3112 scan_f_add_spoofed_mac_in_probe:1,
3113 scan_f_add_rand_seq_in_probe:1,
3114 scan_f_en_ie_whitelist_in_probe:1,
3115 scan_f_forced:1,
3116 scan_f_2ghz:1,
3117 scan_f_5ghz:1,
3118 scan_f_80mhz:1;
3119 };
3120 u32 scan_flags;
3121 };
3122 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3123 u32 burst_duration;
3124 u32 num_chan;
3125 u32 num_bssid;
3126 u32 num_ssids;
3127 u32 n_probes;
3128 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS];
3129 u32 notify_scan_events;
3130 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID];
3131 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID];
3132 struct element_info extraie;
3133 struct element_info htcap;
3134 struct element_info vhtcap;
3135};
3136
3137struct wmi_ssid_arg {
3138 int len;
3139 const u8 *ssid;
3140};
3141
3142struct wmi_bssid_arg {
3143 const u8 *bssid;
3144};
3145
3146struct wmi_start_scan_arg {
3147 u32 scan_id;
3148 u32 scan_req_id;
3149 u32 vdev_id;
3150 u32 scan_priority;
3151 u32 notify_scan_events;
3152 u32 dwell_time_active;
3153 u32 dwell_time_passive;
3154 u32 min_rest_time;
3155 u32 max_rest_time;
3156 u32 repeat_probe_time;
3157 u32 probe_spacing_time;
3158 u32 idle_time;
3159 u32 max_scan_time;
3160 u32 probe_delay;
3161 u32 scan_ctrl_flags;
3162
3163 u32 ie_len;
3164 u32 n_channels;
3165 u32 n_ssids;
3166 u32 n_bssids;
3167
3168 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3169 u32 channels[64];
3170 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3171 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3172};
3173
3174#define WMI_SCAN_STOP_ONE 0x00000000
3175#define WMI_SCN_STOP_VAP_ALL 0x01000000
3176#define WMI_SCAN_STOP_ALL 0x04000000
3177
3178/* Prefix 0xA000 indicates that the scan request
3179 * is trigger by HOST
3180 */
3181#define ATH11K_SCAN_ID 0xA000
3182
3183enum scan_cancel_req_type {
3184 WLAN_SCAN_CANCEL_SINGLE = 1,
3185 WLAN_SCAN_CANCEL_VDEV_ALL,
3186 WLAN_SCAN_CANCEL_PDEV_ALL,
3187};
3188
3189struct scan_cancel_param {
3190 u32 requester;
3191 u32 scan_id;
3192 enum scan_cancel_req_type req_type;
3193 u32 vdev_id;
3194 u32 pdev_id;
3195};
3196
3197struct wmi_bcn_send_from_host_cmd {
3198 u32 tlv_header;
3199 u32 vdev_id;
3200 u32 data_len;
3201 union {
3202 u32 frag_ptr;
3203 u32 frag_ptr_lo;
3204 };
3205 u32 frame_ctrl;
3206 u32 dtim_flag;
3207 u32 bcn_antenna;
3208 u32 frag_ptr_hi;
3209};
3210
3211#define WMI_CHAN_INFO_MODE GENMASK(5, 0)
3212#define WMI_CHAN_INFO_HT40_PLUS BIT(6)
3213#define WMI_CHAN_INFO_PASSIVE BIT(7)
3214#define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8)
3215#define WMI_CHAN_INFO_AP_DISABLED BIT(9)
3216#define WMI_CHAN_INFO_DFS BIT(10)
3217#define WMI_CHAN_INFO_ALLOW_HT BIT(11)
3218#define WMI_CHAN_INFO_ALLOW_VHT BIT(12)
3219#define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13)
3220#define WMI_CHAN_INFO_HALF_RATE BIT(14)
3221#define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
3222#define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
3223#define WMI_CHAN_INFO_ALLOW_HE BIT(17)
3224
3225#define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
3226#define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
3227#define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16)
3228#define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24)
3229
3230#define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0)
3231#define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8)
3232
3233struct wmi_channel {
3234 u32 tlv_header;
3235 u32 mhz;
3236 u32 band_center_freq1;
3237 u32 band_center_freq2;
3238 u32 info;
3239 u32 reg_info_1;
3240 u32 reg_info_2;
3241} __packed;
3242
3243struct wmi_mgmt_params {
3244 void *tx_frame;
3245 u16 frm_len;
3246 u8 vdev_id;
3247 u16 chanfreq;
3248 void *pdata;
3249 u16 desc_id;
3250 u8 *macaddr;
3251 void *qdf_ctx;
3252};
3253
3254enum wmi_sta_ps_mode {
3255 WMI_STA_PS_MODE_DISABLED = 0,
3256 WMI_STA_PS_MODE_ENABLED = 1,
3257};
3258
3259#define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3260#define WMI_SMPS_MASK_UPPER_3BITS 0x7
3261#define WMI_SMPS_PARAM_VALUE_SHIFT 29
3262
3263#define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
3264#define ATH11K_WMI_FW_HANG_DELAY 0
3265
3266/* type, 0:unused 1: ASSERT 2: not respond detect command
3267 * delay_time_ms, the simulate will delay time
3268 */
3269
3270struct wmi_force_fw_hang_cmd {
3271 u32 tlv_header;
3272 u32 type;
3273 u32 delay_time_ms;
3274};
3275
3276struct wmi_vdev_set_param_cmd {
3277 u32 tlv_header;
3278 u32 vdev_id;
3279 u32 param_id;
3280 u32 param_value;
3281} __packed;
3282
3283enum wmi_stats_id {
3284 WMI_REQUEST_PEER_STAT = BIT(0),
3285 WMI_REQUEST_AP_STAT = BIT(1),
3286 WMI_REQUEST_PDEV_STAT = BIT(2),
3287 WMI_REQUEST_VDEV_STAT = BIT(3),
3288 WMI_REQUEST_BCNFLT_STAT = BIT(4),
3289 WMI_REQUEST_VDEV_RATE_STAT = BIT(5),
3290 WMI_REQUEST_INST_STAT = BIT(6),
3291 WMI_REQUEST_MIB_STAT = BIT(7),
3292 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8),
3293 WMI_REQUEST_CONGESTION_STAT = BIT(9),
3294 WMI_REQUEST_PEER_EXTD_STAT = BIT(10),
3295 WMI_REQUEST_BCN_STAT = BIT(11),
3296 WMI_REQUEST_BCN_STAT_RESET = BIT(12),
3297 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13),
3298};
3299
3300struct wmi_request_stats_cmd {
3301 u32 tlv_header;
3302 enum wmi_stats_id stats_id;
3303 u32 vdev_id;
3304 struct wmi_mac_addr peer_macaddr;
3305 u32 pdev_id;
3306} __packed;
3307
Pradeep Kumar Chitrapua41d1032020-02-15 05:55:22 +05303308struct wmi_get_pdev_temperature_cmd {
3309 u32 tlv_header;
3310 u32 param;
3311 u32 pdev_id;
3312} __packed;
3313
Kalle Valod5c65152019-11-23 09:58:40 +02003314#define WMI_BEACON_TX_BUFFER_SIZE 512
3315
3316struct wmi_bcn_tmpl_cmd {
3317 u32 tlv_header;
3318 u32 vdev_id;
3319 u32 tim_ie_offset;
3320 u32 buf_len;
3321 u32 csa_switch_count_offset;
3322 u32 ext_csa_switch_count_offset;
3323 u32 csa_event_bitmap;
3324 u32 mbssid_ie_offset;
3325 u32 esp_ie_offset;
3326} __packed;
3327
3328struct wmi_key_seq_counter {
3329 u32 key_seq_counter_l;
3330 u32 key_seq_counter_h;
3331} __packed;
3332
3333struct wmi_vdev_install_key_cmd {
3334 u32 tlv_header;
3335 u32 vdev_id;
3336 struct wmi_mac_addr peer_macaddr;
3337 u32 key_idx;
3338 u32 key_flags;
3339 u32 key_cipher;
3340 struct wmi_key_seq_counter key_rsc_counter;
3341 struct wmi_key_seq_counter key_global_rsc_counter;
3342 struct wmi_key_seq_counter key_tsc_counter;
3343 u8 wpi_key_rsc_counter[16];
3344 u8 wpi_key_tsc_counter[16];
3345 u32 key_len;
3346 u32 key_txmic_len;
3347 u32 key_rxmic_len;
3348 u32 is_group_key_id_valid;
3349 u32 group_key_id;
3350
3351 /* Followed by key_data containing key followed by
3352 * tx mic and then rx mic
3353 */
3354} __packed;
3355
3356struct wmi_vdev_install_key_arg {
3357 u32 vdev_id;
3358 const u8 *macaddr;
3359 u32 key_idx;
3360 u32 key_flags;
3361 u32 key_cipher;
3362 u32 key_len;
3363 u32 key_txmic_len;
3364 u32 key_rxmic_len;
3365 u64 key_rsc_counter;
3366 const void *key_data;
3367};
3368
3369#define WMI_MAX_SUPPORTED_RATES 128
3370#define WMI_HOST_MAX_HECAP_PHY_SIZE 3
John Crispin9f056ed2019-11-25 16:36:27 +00003371#define WMI_HOST_MAX_HE_RATE_SET 3
3372#define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
3373#define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
3374#define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
Kalle Valod5c65152019-11-23 09:58:40 +02003375
3376struct wmi_rate_set_arg {
3377 u32 num_rates;
3378 u8 rates[WMI_MAX_SUPPORTED_RATES];
3379};
3380
3381struct peer_assoc_params {
3382 struct wmi_mac_addr peer_macaddr;
3383 u32 vdev_id;
3384 u32 peer_new_assoc;
3385 u32 peer_associd;
3386 u32 peer_flags;
3387 u32 peer_caps;
3388 u32 peer_listen_intval;
3389 u32 peer_ht_caps;
3390 u32 peer_max_mpdu;
3391 u32 peer_mpdu_density;
3392 u32 peer_rate_caps;
3393 u32 peer_nss;
3394 u32 peer_vht_caps;
3395 u32 peer_phymode;
3396 u32 peer_ht_info[2];
3397 struct wmi_rate_set_arg peer_legacy_rates;
3398 struct wmi_rate_set_arg peer_ht_rates;
3399 u32 rx_max_rate;
3400 u32 rx_mcs_set;
3401 u32 tx_max_rate;
3402 u32 tx_mcs_set;
3403 u8 vht_capable;
3404 u32 tx_max_mcs_nss;
3405 u32 peer_bw_rxnss_override;
3406 bool is_pmf_enabled;
3407 bool is_wme_set;
3408 bool qos_flag;
3409 bool apsd_flag;
3410 bool ht_flag;
3411 bool bw_40;
3412 bool bw_80;
3413 bool bw_160;
3414 bool stbc_flag;
3415 bool ldpc_flag;
3416 bool static_mimops_flag;
3417 bool dynamic_mimops_flag;
3418 bool spatial_mux_flag;
3419 bool vht_flag;
3420 bool vht_ng_flag;
3421 bool need_ptk_4_way;
3422 bool need_gtk_2_way;
3423 bool auth_flag;
3424 bool safe_mode_enabled;
3425 bool amsdu_disable;
3426 /* Use common structure */
3427 u8 peer_mac[ETH_ALEN];
3428
3429 bool he_flag;
3430 u32 peer_he_cap_macinfo[2];
3431 u32 peer_he_cap_macinfo_internal;
3432 u32 peer_he_ops;
3433 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3434 u32 peer_he_mcs_count;
3435 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3436 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
John Crispin6d293d42019-11-25 16:36:28 +00003437 bool twt_responder;
3438 bool twt_requester;
Kalle Valod5c65152019-11-23 09:58:40 +02003439 struct ath11k_ppe_threshold peer_ppet;
3440};
3441
3442struct wmi_peer_assoc_complete_cmd {
3443 u32 tlv_header;
3444 struct wmi_mac_addr peer_macaddr;
3445 u32 vdev_id;
3446 u32 peer_new_assoc;
3447 u32 peer_associd;
3448 u32 peer_flags;
3449 u32 peer_caps;
3450 u32 peer_listen_intval;
3451 u32 peer_ht_caps;
3452 u32 peer_max_mpdu;
3453 u32 peer_mpdu_density;
3454 u32 peer_rate_caps;
3455 u32 peer_nss;
3456 u32 peer_vht_caps;
3457 u32 peer_phymode;
3458 u32 peer_ht_info[2];
3459 u32 num_peer_legacy_rates;
3460 u32 num_peer_ht_rates;
3461 u32 peer_bw_rxnss_override;
3462 struct wmi_ppe_threshold peer_ppet;
3463 u32 peer_he_cap_info;
3464 u32 peer_he_ops;
3465 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3466 u32 peer_he_mcs;
3467 u32 peer_he_cap_info_ext;
3468 u32 peer_he_cap_info_internal;
3469} __packed;
3470
3471struct wmi_stop_scan_cmd {
3472 u32 tlv_header;
3473 u32 requestor;
3474 u32 scan_id;
3475 u32 req_type;
3476 u32 vdev_id;
3477 u32 pdev_id;
3478};
3479
3480struct scan_chan_list_params {
3481 u32 pdev_id;
3482 u16 nallchans;
3483 struct channel_param ch_param[1];
3484};
3485
3486struct wmi_scan_chan_list_cmd {
3487 u32 tlv_header;
3488 u32 num_scan_chans;
3489 u32 flags;
3490 u32 pdev_id;
3491} __packed;
3492
3493#define WMI_MGMT_SEND_DOWNLD_LEN 64
3494
3495#define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
3496#define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
3497#define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20)
3498#define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28)
3499
3500#define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0)
3501#define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8)
3502#define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15)
3503#define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20)
3504#define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21)
3505
3506struct wmi_mgmt_send_params {
3507 u32 tlv_header;
3508 u32 tx_params_dword0;
3509 u32 tx_params_dword1;
3510};
3511
3512struct wmi_mgmt_send_cmd {
3513 u32 tlv_header;
3514 u32 vdev_id;
3515 u32 desc_id;
3516 u32 chanfreq;
3517 u32 paddr_lo;
3518 u32 paddr_hi;
3519 u32 frame_len;
3520 u32 buf_len;
3521 u32 tx_params_valid;
3522
3523 /* This TLV is followed by struct wmi_mgmt_frame */
3524
3525 /* Followed by struct wmi_mgmt_send_params */
3526} __packed;
3527
3528struct wmi_sta_powersave_mode_cmd {
3529 u32 tlv_header;
3530 u32 vdev_id;
3531 u32 sta_ps_mode;
3532};
3533
3534struct wmi_sta_smps_force_mode_cmd {
3535 u32 tlv_header;
3536 u32 vdev_id;
3537 u32 forced_mode;
3538};
3539
3540struct wmi_sta_smps_param_cmd {
3541 u32 tlv_header;
3542 u32 vdev_id;
3543 u32 param;
3544 u32 value;
3545};
3546
3547struct wmi_bcn_prb_info {
3548 u32 tlv_header;
3549 u32 caps;
3550 u32 erp;
3551} __packed;
3552
3553enum {
3554 WMI_PDEV_SUSPEND,
3555 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3556};
3557
3558struct green_ap_ps_params {
3559 u32 value;
3560};
3561
3562struct wmi_pdev_green_ap_ps_enable_cmd_param {
3563 u32 tlv_header;
3564 u32 pdev_id;
3565 u32 enable;
3566};
3567
3568struct ap_ps_params {
3569 u32 vdev_id;
3570 u32 param;
3571 u32 value;
3572};
3573
3574struct vdev_set_params {
3575 u32 if_id;
3576 u32 param_id;
3577 u32 param_value;
3578};
3579
3580struct stats_request_params {
3581 u32 stats_id;
3582 u32 vdev_id;
3583 u32 pdev_id;
3584};
3585
3586enum set_init_cc_type {
3587 WMI_COUNTRY_INFO_TYPE_ALPHA,
3588 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3589 WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3590};
3591
3592enum set_init_cc_flags {
3593 INVALID_CC,
3594 CC_IS_SET,
3595 REGDMN_IS_SET,
3596 ALPHA_IS_SET,
3597};
3598
3599struct wmi_init_country_params {
3600 union {
3601 u16 country_code;
3602 u16 regdom_id;
3603 u8 alpha2[3];
3604 } cc_info;
3605 enum set_init_cc_flags flags;
3606};
3607
3608struct wmi_init_country_cmd {
3609 u32 tlv_header;
3610 u32 pdev_id;
3611 u32 init_cc_type;
3612 union {
3613 u32 country_code;
3614 u32 regdom_id;
3615 u32 alpha2;
3616 } cc_info;
3617} __packed;
3618
Pradeep Kumar Chitrapu2a63bbc2020-02-15 05:55:21 +05303619#define THERMAL_LEVELS 1
3620struct tt_level_config {
3621 u32 tmplwm;
3622 u32 tmphwm;
3623 u32 dcoffpercent;
3624 u32 priority;
3625};
3626
3627struct thermal_mitigation_params {
3628 u32 pdev_id;
3629 u32 enable;
3630 u32 dc;
3631 u32 dc_per_event;
3632 struct tt_level_config levelconf[THERMAL_LEVELS];
3633};
3634
3635struct wmi_therm_throt_config_request_cmd {
3636 u32 tlv_header;
3637 u32 pdev_id;
3638 u32 enable;
3639 u32 dc;
3640 u32 dc_per_event;
3641 u32 therm_throt_levels;
3642} __packed;
3643
3644struct wmi_therm_throt_level_config_info {
3645 u32 tlv_header;
3646 u32 temp_lwm;
3647 u32 temp_hwm;
3648 u32 dc_off_percent;
3649 u32 prio;
3650} __packed;
3651
Maharaja Kennadyrajan9556dfa2020-03-26 18:36:32 +02003652struct wmi_delba_send_cmd {
3653 u32 tlv_header;
3654 u32 vdev_id;
3655 struct wmi_mac_addr peer_macaddr;
3656 u32 tid;
3657 u32 initiator;
3658 u32 reasoncode;
3659} __packed;
3660
3661struct wmi_addba_setresponse_cmd {
3662 u32 tlv_header;
3663 u32 vdev_id;
3664 struct wmi_mac_addr peer_macaddr;
3665 u32 tid;
3666 u32 statuscode;
3667} __packed;
3668
3669struct wmi_addba_send_cmd {
3670 u32 tlv_header;
3671 u32 vdev_id;
3672 struct wmi_mac_addr peer_macaddr;
3673 u32 tid;
3674 u32 buffersize;
3675} __packed;
3676
3677struct wmi_addba_clear_resp_cmd {
3678 u32 tlv_header;
3679 u32 vdev_id;
3680 struct wmi_mac_addr peer_macaddr;
3681} __packed;
3682
Kalle Valod5c65152019-11-23 09:58:40 +02003683struct wmi_pdev_pktlog_filter_info {
3684 u32 tlv_header;
3685 struct wmi_mac_addr peer_macaddr;
3686} __packed;
3687
3688struct wmi_pdev_pktlog_filter_cmd {
3689 u32 tlv_header;
3690 u32 pdev_id;
3691 u32 enable;
3692 u32 filter_type;
3693 u32 num_mac;
3694} __packed;
3695
3696enum ath11k_wmi_pktlog_enable {
3697 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0,
3698 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
3699};
3700
3701struct wmi_pktlog_enable_cmd {
3702 u32 tlv_header;
3703 u32 pdev_id;
3704 u32 evlist; /* WMI_PKTLOG_EVENT */
3705 u32 enable;
3706} __packed;
3707
3708struct wmi_pktlog_disable_cmd {
3709 u32 tlv_header;
3710 u32 pdev_id;
3711} __packed;
3712
3713#define DFS_PHYERR_UNIT_TEST_CMD 0
3714#define DFS_UNIT_TEST_MODULE 0x2b
3715#define DFS_UNIT_TEST_TOKEN 0xAA
3716
3717enum dfs_test_args_idx {
3718 DFS_TEST_CMDID = 0,
3719 DFS_TEST_PDEV_ID,
3720 DFS_TEST_RADAR_PARAM,
3721 DFS_MAX_TEST_ARGS,
3722};
3723
3724struct wmi_dfs_unit_test_arg {
3725 u32 cmd_id;
3726 u32 pdev_id;
3727 u32 radar_param;
3728};
3729
3730struct wmi_unit_test_cmd {
3731 u32 tlv_header;
3732 u32 vdev_id;
3733 u32 module_id;
3734 u32 num_args;
3735 u32 diag_token;
3736 /* Followed by test args*/
3737} __packed;
3738
3739#define MAX_SUPPORTED_RATES 128
3740
3741#define WMI_PEER_AUTH 0x00000001
3742#define WMI_PEER_QOS 0x00000002
3743#define WMI_PEER_NEED_PTK_4_WAY 0x00000004
3744#define WMI_PEER_NEED_GTK_2_WAY 0x00000010
3745#define WMI_PEER_HE 0x00000400
3746#define WMI_PEER_APSD 0x00000800
3747#define WMI_PEER_HT 0x00001000
3748#define WMI_PEER_40MHZ 0x00002000
3749#define WMI_PEER_STBC 0x00008000
3750#define WMI_PEER_LDPC 0x00010000
3751#define WMI_PEER_DYN_MIMOPS 0x00020000
3752#define WMI_PEER_STATIC_MIMOPS 0x00040000
3753#define WMI_PEER_SPATIAL_MUX 0x00200000
John Crispin6d293d42019-11-25 16:36:28 +00003754#define WMI_PEER_TWT_REQ 0x00400000
3755#define WMI_PEER_TWT_RESP 0x00800000
Kalle Valod5c65152019-11-23 09:58:40 +02003756#define WMI_PEER_VHT 0x02000000
3757#define WMI_PEER_80MHZ 0x04000000
3758#define WMI_PEER_PMF 0x08000000
3759/* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000.
3760 * Need to be cleaned up
3761 */
3762#define WMI_PEER_IS_P2P_CAPABLE 0x20000000
3763#define WMI_PEER_160MHZ 0x40000000
3764#define WMI_PEER_SAFEMODE_EN 0x80000000
3765
3766struct beacon_tmpl_params {
3767 u8 vdev_id;
3768 u32 tim_ie_offset;
3769 u32 tmpl_len;
3770 u32 tmpl_len_aligned;
3771 u32 csa_switch_count_offset;
3772 u32 ext_csa_switch_count_offset;
3773 u8 *frm;
3774};
3775
3776struct wmi_rate_set {
3777 u32 num_rates;
3778 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
3779};
3780
3781struct wmi_vht_rate_set {
3782 u32 tlv_header;
3783 u32 rx_max_rate;
3784 u32 rx_mcs_set;
3785 u32 tx_max_rate;
3786 u32 tx_mcs_set;
3787 u32 tx_max_mcs_nss;
3788} __packed;
3789
3790struct wmi_he_rate_set {
3791 u32 tlv_header;
3792 u32 rx_mcs_set;
3793 u32 tx_mcs_set;
3794} __packed;
3795
3796#define MAX_REG_RULES 10
3797#define REG_ALPHA2_LEN 2
3798
3799enum wmi_start_event_param {
3800 WMI_VDEV_START_RESP_EVENT = 0,
3801 WMI_VDEV_RESTART_RESP_EVENT,
3802};
3803
3804struct wmi_vdev_start_resp_event {
3805 u32 vdev_id;
3806 u32 requestor_id;
3807 enum wmi_start_event_param resp_type;
3808 u32 status;
3809 u32 chain_mask;
3810 u32 smps_mode;
3811 union {
3812 u32 mac_id;
3813 u32 pdev_id;
3814 };
3815 u32 cfgd_tx_streams;
3816 u32 cfgd_rx_streams;
3817} __packed;
3818
3819/* VDEV start response status codes */
3820enum wmi_vdev_start_resp_status_code {
3821 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
3822 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
3823 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
3824 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
3825 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
3826};
3827
3828;
3829enum cc_setting_code {
3830 REG_SET_CC_STATUS_PASS = 0,
3831 REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3832 REG_INIT_ALPHA2_NOT_FOUND = 2,
3833 REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3834 REG_SET_CC_STATUS_NO_MEMORY = 4,
3835 REG_SET_CC_STATUS_FAIL = 5,
3836};
3837
3838/* Regaulatory Rule Flags Passed by FW */
3839#define REGULATORY_CHAN_DISABLED BIT(0)
3840#define REGULATORY_CHAN_NO_IR BIT(1)
3841#define REGULATORY_CHAN_RADAR BIT(3)
3842#define REGULATORY_CHAN_NO_OFDM BIT(6)
3843#define REGULATORY_CHAN_INDOOR_ONLY BIT(9)
3844
3845#define REGULATORY_CHAN_NO_HT40 BIT(4)
3846#define REGULATORY_CHAN_NO_80MHZ BIT(7)
3847#define REGULATORY_CHAN_NO_160MHZ BIT(8)
3848#define REGULATORY_CHAN_NO_20MHZ BIT(11)
3849#define REGULATORY_CHAN_NO_10MHZ BIT(12)
3850
3851enum {
3852 WMI_REG_SET_CC_STATUS_PASS = 0,
3853 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3854 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
3855 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3856 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
3857 WMI_REG_SET_CC_STATUS_FAIL = 5,
3858};
3859
3860struct cur_reg_rule {
3861 u16 start_freq;
3862 u16 end_freq;
3863 u16 max_bw;
3864 u8 reg_power;
3865 u8 ant_gain;
3866 u16 flags;
3867};
3868
3869struct cur_regulatory_info {
3870 enum cc_setting_code status_code;
3871 u8 num_phy;
3872 u8 phy_id;
3873 u16 reg_dmn_pair;
3874 u16 ctry_code;
3875 u8 alpha2[REG_ALPHA2_LEN + 1];
3876 u32 dfs_region;
3877 u32 phybitmap;
3878 u32 min_bw_2g;
3879 u32 max_bw_2g;
3880 u32 min_bw_5g;
3881 u32 max_bw_5g;
3882 u32 num_2g_reg_rules;
3883 u32 num_5g_reg_rules;
3884 struct cur_reg_rule *reg_rules_2g_ptr;
3885 struct cur_reg_rule *reg_rules_5g_ptr;
3886};
3887
3888struct wmi_reg_chan_list_cc_event {
3889 u32 status_code;
3890 u32 phy_id;
3891 u32 alpha2;
3892 u32 num_phy;
3893 u32 country_id;
3894 u32 domain_code;
3895 u32 dfs_region;
3896 u32 phybitmap;
3897 u32 min_bw_2g;
3898 u32 max_bw_2g;
3899 u32 min_bw_5g;
3900 u32 max_bw_5g;
3901 u32 num_2g_reg_rules;
3902 u32 num_5g_reg_rules;
3903} __packed;
3904
3905struct wmi_regulatory_rule_struct {
3906 u32 tlv_header;
3907 u32 freq_info;
3908 u32 bw_pwr_info;
3909 u32 flag_info;
3910};
3911
3912struct wmi_peer_delete_resp_event {
3913 u32 vdev_id;
3914 struct wmi_mac_addr peer_macaddr;
3915} __packed;
3916
3917struct wmi_bcn_tx_status_event {
3918 u32 vdev_id;
3919 u32 tx_status;
3920} __packed;
3921
3922struct wmi_vdev_stopped_event {
3923 u32 vdev_id;
3924} __packed;
3925
3926struct wmi_pdev_bss_chan_info_event {
3927 u32 pdev_id;
3928 u32 freq; /* Units in MHz */
3929 u32 noise_floor; /* units are dBm */
3930 /* rx clear - how often the channel was unused */
3931 u32 rx_clear_count_low;
3932 u32 rx_clear_count_high;
3933 /* cycle count - elapsed time during measured period, in clock ticks */
3934 u32 cycle_count_low;
3935 u32 cycle_count_high;
3936 /* tx cycle count - elapsed time spent in tx, in clock ticks */
3937 u32 tx_cycle_count_low;
3938 u32 tx_cycle_count_high;
3939 /* rx cycle count - elapsed time spent in rx, in clock ticks */
3940 u32 rx_cycle_count_low;
3941 u32 rx_cycle_count_high;
3942 /*rx_cycle cnt for my bss in 64bits format */
3943 u32 rx_bss_cycle_count_low;
3944 u32 rx_bss_cycle_count_high;
3945} __packed;
3946
3947#define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
3948
3949struct wmi_vdev_install_key_compl_event {
3950 u32 vdev_id;
3951 struct wmi_mac_addr peer_macaddr;
3952 u32 key_idx;
3953 u32 key_flags;
3954 u32 status;
3955} __packed;
3956
3957struct wmi_vdev_install_key_complete_arg {
3958 u32 vdev_id;
3959 const u8 *macaddr;
3960 u32 key_idx;
3961 u32 key_flags;
3962 u32 status;
3963};
3964
3965struct wmi_peer_assoc_conf_event {
3966 u32 vdev_id;
3967 struct wmi_mac_addr peer_macaddr;
3968} __packed;
3969
3970struct wmi_peer_assoc_conf_arg {
3971 u32 vdev_id;
3972 const u8 *macaddr;
3973};
3974
3975/*
3976 * PDEV statistics
3977 */
3978struct wmi_pdev_stats_base {
3979 s32 chan_nf;
3980 u32 tx_frame_count; /* Cycles spent transmitting frames */
3981 u32 rx_frame_count; /* Cycles spent receiving frames */
3982 u32 rx_clear_count; /* Total channel busy time, evidently */
3983 u32 cycle_count; /* Total on-channel time */
3984 u32 phy_err_count;
3985 u32 chan_tx_pwr;
3986} __packed;
3987
3988struct wmi_pdev_stats_extra {
3989 u32 ack_rx_bad;
3990 u32 rts_bad;
3991 u32 rts_good;
3992 u32 fcs_bad;
3993 u32 no_beacons;
3994 u32 mib_int_count;
3995} __packed;
3996
3997struct wmi_pdev_stats_tx {
3998 /* Num HTT cookies queued to dispatch list */
3999 s32 comp_queued;
4000
4001 /* Num HTT cookies dispatched */
4002 s32 comp_delivered;
4003
4004 /* Num MSDU queued to WAL */
4005 s32 msdu_enqued;
4006
4007 /* Num MPDU queue to WAL */
4008 s32 mpdu_enqued;
4009
4010 /* Num MSDUs dropped by WMM limit */
4011 s32 wmm_drop;
4012
4013 /* Num Local frames queued */
4014 s32 local_enqued;
4015
4016 /* Num Local frames done */
4017 s32 local_freed;
4018
4019 /* Num queued to HW */
4020 s32 hw_queued;
4021
4022 /* Num PPDU reaped from HW */
4023 s32 hw_reaped;
4024
4025 /* Num underruns */
4026 s32 underrun;
4027
4028 /* Num PPDUs cleaned up in TX abort */
4029 s32 tx_abort;
4030
4031 /* Num MPDUs requed by SW */
4032 s32 mpdus_requed;
4033
4034 /* excessive retries */
4035 u32 tx_ko;
4036
4037 /* data hw rate code */
4038 u32 data_rc;
4039
4040 /* Scheduler self triggers */
4041 u32 self_triggers;
4042
4043 /* frames dropped due to excessive sw retries */
4044 u32 sw_retry_failure;
4045
4046 /* illegal rate phy errors */
4047 u32 illgl_rate_phy_err;
4048
4049 /* wal pdev continuous xretry */
4050 u32 pdev_cont_xretry;
4051
4052 /* wal pdev tx timeouts */
4053 u32 pdev_tx_timeout;
4054
4055 /* wal pdev resets */
4056 u32 pdev_resets;
4057
4058 /* frames dropped due to non-availability of stateless TIDs */
4059 u32 stateless_tid_alloc_failure;
4060
4061 /* PhY/BB underrun */
4062 u32 phy_underrun;
4063
4064 /* MPDU is more than txop limit */
4065 u32 txop_ovf;
4066} __packed;
4067
4068struct wmi_pdev_stats_rx {
4069 /* Cnts any change in ring routing mid-ppdu */
4070 s32 mid_ppdu_route_change;
4071
4072 /* Total number of statuses processed */
4073 s32 status_rcvd;
4074
4075 /* Extra frags on rings 0-3 */
4076 s32 r0_frags;
4077 s32 r1_frags;
4078 s32 r2_frags;
4079 s32 r3_frags;
4080
4081 /* MSDUs / MPDUs delivered to HTT */
4082 s32 htt_msdus;
4083 s32 htt_mpdus;
4084
4085 /* MSDUs / MPDUs delivered to local stack */
4086 s32 loc_msdus;
4087 s32 loc_mpdus;
4088
4089 /* AMSDUs that have more MSDUs than the status ring size */
4090 s32 oversize_amsdu;
4091
4092 /* Number of PHY errors */
4093 s32 phy_errs;
4094
4095 /* Number of PHY errors drops */
4096 s32 phy_err_drop;
4097
4098 /* Number of mpdu errors - FCS, MIC, ENC etc. */
4099 s32 mpdu_errs;
4100} __packed;
4101
4102struct wmi_pdev_stats {
4103 struct wmi_pdev_stats_base base;
4104 struct wmi_pdev_stats_tx tx;
4105 struct wmi_pdev_stats_rx rx;
4106} __packed;
4107
4108#define WLAN_MAX_AC 4
4109#define MAX_TX_RATE_VALUES 10
4110#define MAX_TX_RATE_VALUES 10
4111
4112struct wmi_vdev_stats {
4113 u32 vdev_id;
4114 u32 beacon_snr;
4115 u32 data_snr;
4116 u32 num_tx_frames[WLAN_MAX_AC];
4117 u32 num_rx_frames;
4118 u32 num_tx_frames_retries[WLAN_MAX_AC];
4119 u32 num_tx_frames_failures[WLAN_MAX_AC];
4120 u32 num_rts_fail;
4121 u32 num_rts_success;
4122 u32 num_rx_err;
4123 u32 num_rx_discard;
4124 u32 num_tx_not_acked;
4125 u32 tx_rate_history[MAX_TX_RATE_VALUES];
4126 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
4127} __packed;
4128
4129struct wmi_bcn_stats {
4130 u32 vdev_id;
4131 u32 tx_bcn_succ_cnt;
4132 u32 tx_bcn_outage_cnt;
4133} __packed;
4134
4135struct wmi_stats_event {
4136 u32 stats_id;
4137 u32 num_pdev_stats;
4138 u32 num_vdev_stats;
4139 u32 num_peer_stats;
4140 u32 num_bcnflt_stats;
4141 u32 num_chan_stats;
4142 u32 num_mib_stats;
4143 u32 pdev_id;
4144 u32 num_bcn_stats;
4145 u32 num_peer_extd_stats;
4146 u32 num_peer_extd2_stats;
4147} __packed;
4148
4149struct wmi_pdev_ctl_failsafe_chk_event {
4150 u32 pdev_id;
4151 u32 ctl_failsafe_status;
4152} __packed;
4153
4154struct wmi_pdev_csa_switch_ev {
4155 u32 pdev_id;
4156 u32 current_switch_count;
4157 u32 num_vdevs;
4158} __packed;
4159
4160struct wmi_pdev_radar_ev {
4161 u32 pdev_id;
4162 u32 detection_mode;
4163 u32 chan_freq;
4164 u32 chan_width;
4165 u32 detector_id;
4166 u32 segment_id;
4167 u32 timestamp;
4168 u32 is_chirp;
4169 s32 freq_offset;
4170 s32 sidx;
4171} __packed;
4172
Pradeep Kumar Chitrapua41d1032020-02-15 05:55:22 +05304173struct wmi_pdev_temperature_event {
4174 /* temperature value in Celcius degree */
4175 s32 temp;
4176 u32 pdev_id;
4177} __packed;
4178
Kalle Valod5c65152019-11-23 09:58:40 +02004179#define WMI_RX_STATUS_OK 0x00
4180#define WMI_RX_STATUS_ERR_CRC 0x01
4181#define WMI_RX_STATUS_ERR_DECRYPT 0x08
4182#define WMI_RX_STATUS_ERR_MIC 0x10
4183#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
4184
4185#define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4186
4187struct mgmt_rx_event_params {
4188 u32 channel;
4189 u32 snr;
4190 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4191 u32 rate;
4192 enum wmi_phy_mode phy_mode;
4193 u32 buf_len;
4194 int status;
4195 u32 flags;
4196 int rssi;
4197 u32 tsf_delta;
4198 u8 pdev_id;
4199};
4200
4201#define ATH_MAX_ANTENNA 4
4202
4203struct wmi_mgmt_rx_hdr {
4204 u32 channel;
4205 u32 snr;
4206 u32 rate;
4207 u32 phy_mode;
4208 u32 buf_len;
4209 u32 status;
4210 u32 rssi_ctl[ATH_MAX_ANTENNA];
4211 u32 flags;
4212 int rssi;
4213 u32 tsf_delta;
4214 u32 rx_tsf_l32;
4215 u32 rx_tsf_u32;
4216 u32 pdev_id;
4217} __packed;
4218
4219#define MAX_ANTENNA_EIGHT 8
4220
4221struct wmi_rssi_ctl_ext {
4222 u32 tlv_header;
4223 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
4224};
4225
4226struct wmi_mgmt_tx_compl_event {
4227 u32 desc_id;
4228 u32 status;
4229 u32 pdev_id;
4230} __packed;
4231
4232struct wmi_scan_event {
4233 u32 event_type; /* %WMI_SCAN_EVENT_ */
4234 u32 reason; /* %WMI_SCAN_REASON_ */
4235 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4236 u32 scan_req_id;
4237 u32 scan_id;
4238 u32 vdev_id;
4239 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4240 * In case of AP it is TSF of the AP vdev
4241 * In case of STA connected state, this is the TSF of the AP
4242 * In case of STA not connected, it will be the free running HW timer
4243 */
4244 u32 tsf_timestamp;
4245} __packed;
4246
4247struct wmi_peer_sta_kickout_arg {
4248 const u8 *mac_addr;
4249};
4250
4251struct wmi_peer_sta_kickout_event {
4252 struct wmi_mac_addr peer_macaddr;
4253} __packed;
4254
4255enum wmi_roam_reason {
4256 WMI_ROAM_REASON_BETTER_AP = 1,
4257 WMI_ROAM_REASON_BEACON_MISS = 2,
4258 WMI_ROAM_REASON_LOW_RSSI = 3,
4259 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4260 WMI_ROAM_REASON_HO_FAILED = 5,
4261
4262 /* keep last */
4263 WMI_ROAM_REASON_MAX,
4264};
4265
4266struct wmi_roam_event {
4267 u32 vdev_id;
4268 u32 reason;
4269 u32 rssi;
4270} __packed;
4271
4272#define WMI_CHAN_INFO_START_RESP 0
4273#define WMI_CHAN_INFO_END_RESP 1
4274
4275struct wmi_chan_info_event {
4276 u32 err_code;
4277 u32 freq;
4278 u32 cmd_flags;
4279 u32 noise_floor;
4280 u32 rx_clear_count;
4281 u32 cycle_count;
4282 u32 chan_tx_pwr_range;
4283 u32 chan_tx_pwr_tp;
4284 u32 rx_frame_count;
4285 u32 my_bss_rx_cycle_count;
4286 u32 rx_11b_mode_data_duration;
4287 u32 tx_frame_cnt;
4288 u32 mac_clk_mhz;
4289 u32 vdev_id;
4290} __packed;
4291
4292struct ath11k_targ_cap {
4293 u32 phy_capability;
4294 u32 max_frag_entry;
4295 u32 num_rf_chains;
4296 u32 ht_cap_info;
4297 u32 vht_cap_info;
4298 u32 vht_supp_mcs;
4299 u32 hw_min_tx_power;
4300 u32 hw_max_tx_power;
4301 u32 sys_cap_info;
4302 u32 min_pkt_size_enable;
4303 u32 max_bcn_ie_size;
4304 u32 max_num_scan_channels;
4305 u32 max_supported_macs;
4306 u32 wmi_fw_sub_feat_caps;
4307 u32 txrx_chainmask;
4308 u32 default_dbs_hw_mode_index;
4309 u32 num_msdu_desc;
4310};
4311
4312enum wmi_vdev_type {
4313 WMI_VDEV_TYPE_AP = 1,
4314 WMI_VDEV_TYPE_STA = 2,
4315 WMI_VDEV_TYPE_IBSS = 3,
4316 WMI_VDEV_TYPE_MONITOR = 4,
4317};
4318
4319enum wmi_vdev_subtype {
4320 WMI_VDEV_SUBTYPE_NONE,
4321 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4322 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4323 WMI_VDEV_SUBTYPE_P2P_GO,
4324 WMI_VDEV_SUBTYPE_PROXY_STA,
4325 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4326 WMI_VDEV_SUBTYPE_MESH_11S,
4327};
4328
4329enum wmi_sta_powersave_param {
4330 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4331 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
4332 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
4333 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
4334 WMI_STA_PS_PARAM_UAPSD = 4,
4335};
4336
4337#define WMI_UAPSD_AC_TYPE_DELI 0
4338#define WMI_UAPSD_AC_TYPE_TRIG 1
4339
4340#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
4341 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \
4342 (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
4343
4344enum wmi_sta_ps_param_uapsd {
4345 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4346 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4347 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4348 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4349 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4350 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4351 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4352 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4353};
4354
4355#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
4356
4357struct wmi_sta_uapsd_auto_trig_param {
4358 u32 wmm_ac;
4359 u32 user_priority;
4360 u32 service_interval;
4361 u32 suspend_interval;
4362 u32 delay_interval;
4363};
4364
4365struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
4366 u32 vdev_id;
4367 struct wmi_mac_addr peer_macaddr;
4368 u32 num_ac;
4369};
4370
4371struct wmi_sta_uapsd_auto_trig_arg {
4372 u32 wmm_ac;
4373 u32 user_priority;
4374 u32 service_interval;
4375 u32 suspend_interval;
4376 u32 delay_interval;
4377};
4378
4379enum wmi_sta_ps_param_tx_wake_threshold {
4380 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
4381 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
4382
4383 /* Values greater than one indicate that many TX attempts per beacon
4384 * interval before the STA will wake up
4385 */
4386};
4387
4388/* The maximum number of PS-Poll frames the FW will send in response to
4389 * traffic advertised in TIM before waking up (by sending a null frame with PS
4390 * = 0). Value 0 has a special meaning: there is no maximum count and the FW
4391 * will send as many PS-Poll as are necessary to retrieve buffered BU. This
4392 * parameter is used when the RX wake policy is
4393 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
4394 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
4395 */
4396enum wmi_sta_ps_param_pspoll_count {
4397 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
4398 /* Values greater than 0 indicate the maximum numer of PS-Poll frames
4399 * FW will send before waking up.
4400 */
4401};
4402
4403/* U-APSD configuration of peer station from (re)assoc request and TSPECs */
4404enum wmi_ap_ps_param_uapsd {
4405 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4406 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4407 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4408 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4409 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4410 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4411 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4412 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4413};
4414
4415/* U-APSD maximum service period of peer station */
4416enum wmi_ap_ps_peer_param_max_sp {
4417 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
4418 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
4419 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
4420 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
4421 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
4422};
4423
4424enum wmi_ap_ps_peer_param {
4425 /** Set uapsd configuration for a given peer.
4426 *
4427 * This include the delivery and trigger enabled state for each AC.
4428 * The host MLME needs to set this based on AP capability and stations
4429 * request Set in the association request received from the station.
4430 *
4431 * Lower 8 bits of the value specify the UAPSD configuration.
4432 *
4433 * (see enum wmi_ap_ps_param_uapsd)
4434 * The default value is 0.
4435 */
4436 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
4437
4438 /**
4439 * Set the service period for a UAPSD capable station
4440 *
4441 * The service period from wme ie in the (re)assoc request frame.
4442 *
4443 * (see enum wmi_ap_ps_peer_param_max_sp)
4444 */
4445 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
4446
4447 /** Time in seconds for aging out buffered frames
4448 * for STA in power save
4449 */
4450 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
4451
4452 /** Specify frame types that are considered SIFS
4453 * RESP trigger frame
4454 */
4455 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
4456
4457 /** Specifies the trigger state of TID.
4458 * Valid only for UAPSD frame type
4459 */
4460 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
4461
4462 /* Specifies the WNM sleep state of a STA */
4463 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
4464};
4465
4466#define DISABLE_SIFS_RESPONSE_TRIGGER 0
4467
4468#define WMI_MAX_KEY_INDEX 3
4469#define WMI_MAX_KEY_LEN 32
4470
4471#define WMI_KEY_PAIRWISE 0x00
4472#define WMI_KEY_GROUP 0x01
4473
4474#define WMI_CIPHER_NONE 0x0 /* clear key */
4475#define WMI_CIPHER_WEP 0x1
4476#define WMI_CIPHER_TKIP 0x2
4477#define WMI_CIPHER_AES_OCB 0x3
4478#define WMI_CIPHER_AES_CCM 0x4
4479#define WMI_CIPHER_WAPI 0x5
4480#define WMI_CIPHER_CKIP 0x6
4481#define WMI_CIPHER_AES_CMAC 0x7
4482#define WMI_CIPHER_ANY 0x8
4483#define WMI_CIPHER_AES_GCM 0x9
4484#define WMI_CIPHER_AES_GMAC 0xa
4485
4486/* Value to disable fixed rate setting */
4487#define WMI_FIXED_RATE_NONE (0xffff)
4488
4489#define ATH11K_RC_VERSION_OFFSET 28
4490#define ATH11K_RC_PREAMBLE_OFFSET 8
4491#define ATH11K_RC_NSS_OFFSET 5
4492
4493#define ATH11K_HW_RATE_CODE(rate, nss, preamble) \
4494 ((1 << ATH11K_RC_VERSION_OFFSET) | \
4495 ((nss) << ATH11K_RC_NSS_OFFSET) | \
4496 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \
4497 (rate))
4498
4499/* Preamble types to be used with VDEV fixed rate configuration */
4500enum wmi_rate_preamble {
4501 WMI_RATE_PREAMBLE_OFDM,
4502 WMI_RATE_PREAMBLE_CCK,
4503 WMI_RATE_PREAMBLE_HT,
4504 WMI_RATE_PREAMBLE_VHT,
4505 WMI_RATE_PREAMBLE_HE,
4506};
4507
4508/**
4509 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
4510 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled.
4511 * @WMI_USE_RTS_CTS : RTS/CTS Enabled.
4512 * @WMI_USE_CTS2SELF : CTS to self protection Enabled.
4513 */
4514enum wmi_rtscts_prot_mode {
4515 WMI_RTS_CTS_DISABLED = 0,
4516 WMI_USE_RTS_CTS = 1,
4517 WMI_USE_CTS2SELF = 2,
4518};
4519
4520/**
4521 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
4522 * protection mode.
4523 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS
4524 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS
4525 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS,
4526 * but if there's a sw retry, both the rate
4527 * series will use RTS-CTS.
4528 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU.
4529 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series.
4530 */
4531enum wmi_rtscts_profile {
4532 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
4533 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
4534 WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
4535 WMI_RTSCTS_ERP = 3,
4536 WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
4537};
4538
4539struct ath11k_hal_reg_cap {
4540 u32 eeprom_rd;
4541 u32 eeprom_rd_ext;
4542 u32 regcap1;
4543 u32 regcap2;
4544 u32 wireless_modes;
4545 u32 low_2ghz_chan;
4546 u32 high_2ghz_chan;
4547 u32 low_5ghz_chan;
4548 u32 high_5ghz_chan;
4549};
4550
4551struct ath11k_mem_chunk {
4552 void *vaddr;
4553 dma_addr_t paddr;
4554 u32 len;
4555 u32 req_id;
4556};
4557
4558#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
4559
4560enum wmi_sta_ps_param_rx_wake_policy {
4561 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
4562 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
4563};
4564
4565enum ath11k_hw_txrx_mode {
4566 ATH11K_HW_TXRX_RAW = 0,
4567 ATH11K_HW_TXRX_NATIVE_WIFI = 1,
4568 ATH11K_HW_TXRX_ETHERNET = 2,
4569};
4570
4571struct wmi_wmm_params {
4572 u32 tlv_header;
4573 u32 cwmin;
4574 u32 cwmax;
4575 u32 aifs;
4576 u32 txoplimit;
4577 u32 acm;
4578 u32 no_ack;
4579} __packed;
4580
4581struct wmi_wmm_params_arg {
4582 u8 acm;
4583 u8 aifs;
Karthikeyan Periyasamyf1d34a02019-11-27 18:29:58 +02004584 u16 cwmin;
4585 u16 cwmax;
Kalle Valod5c65152019-11-23 09:58:40 +02004586 u16 txop;
4587 u8 no_ack;
4588};
4589
4590struct wmi_vdev_set_wmm_params_cmd {
4591 u32 tlv_header;
4592 u32 vdev_id;
4593 struct wmi_wmm_params wmm_params[4];
4594 u32 wmm_param_type;
4595} __packed;
4596
4597struct wmi_wmm_params_all_arg {
4598 struct wmi_wmm_params_arg ac_be;
4599 struct wmi_wmm_params_arg ac_bk;
4600 struct wmi_wmm_params_arg ac_vi;
4601 struct wmi_wmm_params_arg ac_vo;
4602};
4603
John Crispin6d293d42019-11-25 16:36:28 +00004604#define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000
4605#define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10
4606#define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50
4607#define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20
4608#define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100
4609#define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80
4610#define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50
4611#define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10
4612#define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2
4613#define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2
4614#define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2
4615#define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500
4616#define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000
4617#define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000
4618#define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000
4619
4620struct wmi_twt_enable_params_cmd {
4621 u32 tlv_header;
4622 u32 pdev_id;
4623 u32 sta_cong_timer_ms;
4624 u32 mbss_support;
4625 u32 default_slot_size;
4626 u32 congestion_thresh_setup;
4627 u32 congestion_thresh_teardown;
4628 u32 congestion_thresh_critical;
4629 u32 interference_thresh_teardown;
4630 u32 interference_thresh_setup;
4631 u32 min_no_sta_setup;
4632 u32 min_no_sta_teardown;
4633 u32 no_of_bcast_mcast_slots;
4634 u32 min_no_twt_slots;
4635 u32 max_no_sta_twt;
4636 u32 mode_check_interval;
4637 u32 add_sta_slot_interval;
4638 u32 remove_sta_slot_interval;
John Crispin20c3c4f2019-12-05 07:26:44 +01004639} __packed;
John Crispin6d293d42019-11-25 16:36:28 +00004640
4641struct wmi_twt_disable_params_cmd {
4642 u32 tlv_header;
4643 u32 pdev_id;
John Crispin20c3c4f2019-12-05 07:26:44 +01004644} __packed;
John Crispin6d293d42019-11-25 16:36:28 +00004645
John Crispin3f8be642019-11-25 16:36:29 +00004646struct wmi_obss_spatial_reuse_params_cmd {
4647 u32 tlv_header;
4648 u32 pdev_id;
4649 u32 enable;
4650 s32 obss_min;
4651 s32 obss_max;
4652 u32 vdev_id;
John Crispin20c3c4f2019-12-05 07:26:44 +01004653} __packed;
John Crispin3f8be642019-11-25 16:36:29 +00004654
John Crispin5a032c82019-12-17 15:19:20 +01004655#define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200
4656#define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0
4657#define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1
4658
4659#define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000
4660#define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000
4661
4662struct wmi_obss_color_collision_cfg_params_cmd {
4663 u32 tlv_header;
4664 u32 vdev_id;
4665 u32 flags;
4666 u32 evt_type;
4667 u32 current_bss_color;
4668 u32 detection_period_ms;
4669 u32 scan_period_ms;
4670 u32 free_slot_expiry_time_ms;
4671} __packed;
4672
4673struct wmi_bss_color_change_enable_params_cmd {
4674 u32 tlv_header;
4675 u32 vdev_id;
4676 u32 enable;
4677} __packed;
4678
Sriram R26c799272020-03-17 17:07:02 +05304679#define ATH11K_IPV4_TH_SEED_SIZE 5
4680#define ATH11K_IPV6_TH_SEED_SIZE 11
4681
4682struct ath11k_wmi_pdev_lro_config_cmd {
4683 u32 tlv_header;
4684 u32 lro_enable;
4685 u32 res;
4686 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE];
4687 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE];
4688 u32 pdev_id;
4689} __packed;
4690
Kalle Valod5c65152019-11-23 09:58:40 +02004691struct target_resource_config {
4692 u32 num_vdevs;
4693 u32 num_peers;
4694 u32 num_active_peers;
4695 u32 num_offload_peers;
4696 u32 num_offload_reorder_buffs;
4697 u32 num_peer_keys;
4698 u32 num_tids;
4699 u32 ast_skid_limit;
4700 u32 tx_chain_mask;
4701 u32 rx_chain_mask;
4702 u32 rx_timeout_pri[4];
4703 u32 rx_decap_mode;
4704 u32 scan_max_pending_req;
4705 u32 bmiss_offload_max_vdev;
4706 u32 roam_offload_max_vdev;
4707 u32 roam_offload_max_ap_profiles;
4708 u32 num_mcast_groups;
4709 u32 num_mcast_table_elems;
4710 u32 mcast2ucast_mode;
4711 u32 tx_dbg_log_size;
4712 u32 num_wds_entries;
4713 u32 dma_burst_size;
4714 u32 mac_aggr_delim;
4715 u32 rx_skip_defrag_timeout_dup_detection_check;
4716 u32 vow_config;
4717 u32 gtk_offload_max_vdev;
4718 u32 num_msdu_desc;
4719 u32 max_frag_entries;
4720 u32 max_peer_ext_stats;
4721 u32 smart_ant_cap;
4722 u32 bk_minfree;
4723 u32 be_minfree;
4724 u32 vi_minfree;
4725 u32 vo_minfree;
4726 u32 rx_batchmode;
4727 u32 tt_support;
4728 u32 atf_config;
4729 u32 iphdr_pad_config;
4730 u32 qwrap_config:16,
4731 alloc_frag_desc_for_data_pkt:16;
4732 u32 num_tdls_vdevs;
4733 u32 num_tdls_conn_table_entries;
4734 u32 beacon_tx_offload_max_vdev;
4735 u32 num_multicast_filter_entries;
4736 u32 num_wow_filters;
4737 u32 num_keep_alive_pattern;
4738 u32 keep_alive_pattern_size;
4739 u32 max_tdls_concurrent_sleep_sta;
4740 u32 max_tdls_concurrent_buffer_sta;
4741 u32 wmi_send_separate;
4742 u32 num_ocb_vdevs;
4743 u32 num_ocb_channels;
4744 u32 num_ocb_schedules;
4745 u32 num_ns_ext_tuples_cfg;
4746 u32 bpf_instruction_size;
4747 u32 max_bssid_rx_filters;
4748 u32 use_pdev_id;
4749 u32 peer_map_unmap_v2_support;
John Crispin6d293d42019-11-25 16:36:28 +00004750 u32 sched_params;
4751 u32 twt_ap_pdev_count;
4752 u32 twt_ap_sta_count;
Kalle Valod5c65152019-11-23 09:58:40 +02004753};
4754
4755#define WMI_MAX_MEM_REQS 32
4756
4757#define MAX_RADIOS 3
4758
4759#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
4760#define WMI_SEND_TIMEOUT_HZ (3 * HZ)
4761
4762struct ath11k_wmi_base {
4763 struct ath11k_base *ab;
4764 struct ath11k_pdev_wmi wmi[MAX_RADIOS];
4765 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
4766 u32 max_msg_len[MAX_RADIOS];
4767
4768 struct completion service_ready;
4769 struct completion unified_ready;
4770 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE);
4771 wait_queue_head_t tx_credits_wq;
4772 const struct wmi_peer_flags_map *peer_flags;
4773 u32 num_mem_chunks;
4774 u32 rx_decap_mode;
4775 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
4776
4777 enum wmi_host_hw_mode_config_type preferred_hw_mode;
4778 struct target_resource_config wlan_resource_config;
4779
4780 struct ath11k_targ_cap *targ_cap;
4781};
4782
4783int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
4784 u32 cmd_id);
4785struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
4786int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
4787 struct sk_buff *frame);
4788int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
4789 struct ieee80211_mutable_offsets *offs,
4790 struct sk_buff *bcn);
4791int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
4792int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
4793 const u8 *bssid);
4794int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
4795int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
4796 bool restart);
4797int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
4798 u32 vdev_id, u32 param_id, u32 param_val);
4799int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
4800 u32 param_value, u8 pdev_id);
John Crispin97c63742019-12-13 16:38:31 +01004801int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable);
Kalle Valod5c65152019-11-23 09:58:40 +02004802int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
4803int ath11k_wmi_cmd_init(struct ath11k_base *ab);
4804int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
4805int ath11k_wmi_connect(struct ath11k_base *ab);
4806int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
4807 u8 pdev_id);
4808int ath11k_wmi_attach(struct ath11k_base *ab);
4809void ath11k_wmi_detach(struct ath11k_base *ab);
4810int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
4811 struct vdev_create_params *param);
4812int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
4813 const u8 *addr, dma_addr_t paddr,
4814 u8 tid, u8 ba_window_size_valid,
4815 u32 ba_window_size);
4816int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
4817 struct peer_create_params *param);
4818int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
4819 u32 param_id, u32 param_value);
4820
4821int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
4822 u32 param, u32 param_value);
4823int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
4824int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
4825 const u8 *peer_addr, u8 vdev_id);
4826int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
4827void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
4828int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
4829 struct scan_req_params *params);
4830int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
4831 struct scan_cancel_param *param);
4832int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
4833 struct wmi_wmm_params_all_arg *param);
4834int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
4835 u32 pdev_id);
4836int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
4837
4838int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
4839 struct peer_assoc_params *param);
4840int ath11k_wmi_vdev_install_key(struct ath11k *ar,
4841 struct wmi_vdev_install_key_arg *arg);
4842int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
4843 enum wmi_bss_chan_info_req_type type);
4844int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
4845 struct stats_request_params *param);
Pradeep Kumar Chitrapua41d1032020-02-15 05:55:22 +05304846int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
Kalle Valod5c65152019-11-23 09:58:40 +02004847int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
4848 u8 peer_addr[ETH_ALEN],
4849 struct peer_flush_params *param);
4850int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
4851 struct ap_ps_params *param);
4852int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
4853 struct scan_chan_list_params *chan_list);
4854int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
4855 u32 pdev_id);
Maharaja Kennadyrajan9556dfa2020-03-26 18:36:32 +02004856int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac);
4857int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
4858 u32 tid, u32 buf_size);
4859int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac,
4860 u32 tid, u32 status);
4861int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
4862 u32 tid, u32 initiator, u32 reason);
Kalle Valod5c65152019-11-23 09:58:40 +02004863int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
4864 u32 vdev_id, u32 bcn_ctrl_op);
4865int
4866ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
4867 struct wmi_init_country_params init_cc_param);
Pradeep Kumar Chitrapu2a63bbc2020-02-15 05:55:21 +05304868int
4869ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
4870 struct thermal_mitigation_params *param);
Kalle Valod5c65152019-11-23 09:58:40 +02004871int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
4872int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
4873int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
4874int
4875ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
4876 struct rx_reorder_queue_remove_params *param);
4877int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
4878 struct pdev_set_regdomain_params *param);
4879int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
4880 struct ath11k_fw_stats *stats);
4881size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head);
4882size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head);
4883size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head);
4884void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
4885 struct ath11k_fw_stats *fw_stats, u32 stats_id,
4886 char *buf);
4887int ath11k_wmi_simulate_radar(struct ath11k *ar);
John Crispin6d293d42019-11-25 16:36:28 +00004888int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id);
4889int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
John Crispin3f8be642019-11-25 16:36:29 +00004890int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
4891 struct ieee80211_he_obss_pd *he_obss_pd);
John Crispin5a032c82019-12-17 15:19:20 +01004892int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
4893 u8 bss_color, u32 period,
4894 bool enable);
4895int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
4896 bool enable);
Sriram R26c799272020-03-17 17:07:02 +05304897int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
Kalle Valod5c65152019-11-23 09:58:40 +02004898#endif