blob: fd1ffa593a412bed04cb6ebeb40284373021997e [file] [log] [blame]
Kalle Valod5c65152019-11-23 09:58:40 +02001/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2/*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 */
5
6#ifndef ATH11K_WMI_H
7#define ATH11K_WMI_H
8
9#include <net/mac80211.h>
10#include "htc.h"
11
12struct ath11k_base;
13struct ath11k;
14struct ath11k_fw_stats;
15
16#define PSOC_HOST_MAX_NUM_SS (8)
17
18/* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */
19#define MAX_HE_NSS 8
20#define MAX_HE_MODULATION 8
21#define MAX_HE_RU 4
22#define HE_MODULATION_NONE 7
23#define HE_PET_0_USEC 0
24#define HE_PET_8_USEC 1
25#define HE_PET_16_USEC 2
26
27#define WMI_MAX_NUM_SS MAX_HE_NSS
28#define WMI_MAX_NUM_RU MAX_HE_RU
29
30#define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
31#define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
32#define WMI_TLV_CMD_UNSUPPORTED 0
33#define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
34#define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
35
36struct wmi_cmd_hdr {
37 u32 cmd_id;
38} __packed;
39
40struct wmi_tlv {
41 u32 header;
42 u8 value[0];
43} __packed;
44
45#define WMI_TLV_LEN GENMASK(15, 0)
46#define WMI_TLV_TAG GENMASK(31, 16)
47#define TLV_HDR_SIZE FIELD_SIZEOF(struct wmi_tlv, header)
48
49#define WMI_CMD_HDR_CMD_ID GENMASK(23, 0)
50#define WMI_MAX_MEM_REQS 32
51#define ATH11K_MAX_HW_LISTEN_INTERVAL 5
52
53#define WLAN_SCAN_PARAMS_MAX_SSID 16
54#define WLAN_SCAN_PARAMS_MAX_BSSID 4
55#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
56
57/*
58 * HW mode config type replicated from FW header
59 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
60 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
61 * one in 2G and another in 5G.
62 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
63 * same band; no tx allowed.
64 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
65 * Support for both PHYs within one band is planned
66 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
67 * but could be extended to other bands in the future.
68 * The separation of the band between the two PHYs needs
69 * to be communicated separately.
70 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
71 * as in WMI_HW_MODE_SBS, and 3rd on the other band
72 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
73 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
74 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
75 */
76enum wmi_host_hw_mode_config_type {
77 WMI_HOST_HW_MODE_SINGLE = 0,
78 WMI_HOST_HW_MODE_DBS = 1,
79 WMI_HOST_HW_MODE_SBS_PASSIVE = 2,
80 WMI_HOST_HW_MODE_SBS = 3,
81 WMI_HOST_HW_MODE_DBS_SBS = 4,
82 WMI_HOST_HW_MODE_DBS_OR_SBS = 5,
83
84 /* keep last */
85 WMI_HOST_HW_MODE_MAX
86};
87
88/* HW mode priority values used to detect the preferred HW mode
89 * on the available modes.
90 */
91enum wmi_host_hw_mode_priority {
92 WMI_HOST_HW_MODE_DBS_SBS_PRI,
93 WMI_HOST_HW_MODE_DBS_PRI,
94 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
95 WMI_HOST_HW_MODE_SBS_PRI,
96 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
97 WMI_HOST_HW_MODE_SINGLE_PRI,
98
99 /* keep last the lowest priority */
100 WMI_HOST_HW_MODE_MAX_PRI
101};
102
103enum {
104 WMI_HOST_WLAN_2G_CAP = 0x1,
105 WMI_HOST_WLAN_5G_CAP = 0x2,
106 WMI_HOST_WLAN_2G_5G_CAP = 0x3,
107};
108
109/*
110 * wmi command groups.
111 */
112enum wmi_cmd_group {
113 /* 0 to 2 are reserved */
114 WMI_GRP_START = 0x3,
115 WMI_GRP_SCAN = WMI_GRP_START,
116 WMI_GRP_PDEV = 0x4,
117 WMI_GRP_VDEV = 0x5,
118 WMI_GRP_PEER = 0x6,
119 WMI_GRP_MGMT = 0x7,
120 WMI_GRP_BA_NEG = 0x8,
121 WMI_GRP_STA_PS = 0x9,
122 WMI_GRP_DFS = 0xa,
123 WMI_GRP_ROAM = 0xb,
124 WMI_GRP_OFL_SCAN = 0xc,
125 WMI_GRP_P2P = 0xd,
126 WMI_GRP_AP_PS = 0xe,
127 WMI_GRP_RATE_CTRL = 0xf,
128 WMI_GRP_PROFILE = 0x10,
129 WMI_GRP_SUSPEND = 0x11,
130 WMI_GRP_BCN_FILTER = 0x12,
131 WMI_GRP_WOW = 0x13,
132 WMI_GRP_RTT = 0x14,
133 WMI_GRP_SPECTRAL = 0x15,
134 WMI_GRP_STATS = 0x16,
135 WMI_GRP_ARP_NS_OFL = 0x17,
136 WMI_GRP_NLO_OFL = 0x18,
137 WMI_GRP_GTK_OFL = 0x19,
138 WMI_GRP_CSA_OFL = 0x1a,
139 WMI_GRP_CHATTER = 0x1b,
140 WMI_GRP_TID_ADDBA = 0x1c,
141 WMI_GRP_MISC = 0x1d,
142 WMI_GRP_GPIO = 0x1e,
143 WMI_GRP_FWTEST = 0x1f,
144 WMI_GRP_TDLS = 0x20,
145 WMI_GRP_RESMGR = 0x21,
146 WMI_GRP_STA_SMPS = 0x22,
147 WMI_GRP_WLAN_HB = 0x23,
148 WMI_GRP_RMC = 0x24,
149 WMI_GRP_MHF_OFL = 0x25,
150 WMI_GRP_LOCATION_SCAN = 0x26,
151 WMI_GRP_OEM = 0x27,
152 WMI_GRP_NAN = 0x28,
153 WMI_GRP_COEX = 0x29,
154 WMI_GRP_OBSS_OFL = 0x2a,
155 WMI_GRP_LPI = 0x2b,
156 WMI_GRP_EXTSCAN = 0x2c,
157 WMI_GRP_DHCP_OFL = 0x2d,
158 WMI_GRP_IPA = 0x2e,
159 WMI_GRP_MDNS_OFL = 0x2f,
160 WMI_GRP_SAP_OFL = 0x30,
161 WMI_GRP_OCB = 0x31,
162 WMI_GRP_SOC = 0x32,
163 WMI_GRP_PKT_FILTER = 0x33,
164 WMI_GRP_MAWC = 0x34,
165 WMI_GRP_PMF_OFFLOAD = 0x35,
166 WMI_GRP_BPF_OFFLOAD = 0x36,
167 WMI_GRP_NAN_DATA = 0x37,
168 WMI_GRP_PROTOTYPE = 0x38,
169 WMI_GRP_MONITOR = 0x39,
170 WMI_GRP_REGULATORY = 0x3a,
171 WMI_GRP_HW_DATA_FILTER = 0x3b,
172};
173
174#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
175#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
176
177#define WMI_CMD_UNSUPPORTED 0
178
179enum wmi_tlv_cmd_id {
180 WMI_INIT_CMDID = 0x1,
181 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
182 WMI_STOP_SCAN_CMDID,
183 WMI_SCAN_CHAN_LIST_CMDID,
184 WMI_SCAN_SCH_PRIO_TBL_CMDID,
185 WMI_SCAN_UPDATE_REQUEST_CMDID,
186 WMI_SCAN_PROB_REQ_OUI_CMDID,
187 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
188 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
189 WMI_PDEV_SET_CHANNEL_CMDID,
190 WMI_PDEV_SET_PARAM_CMDID,
191 WMI_PDEV_PKTLOG_ENABLE_CMDID,
192 WMI_PDEV_PKTLOG_DISABLE_CMDID,
193 WMI_PDEV_SET_WMM_PARAMS_CMDID,
194 WMI_PDEV_SET_HT_CAP_IE_CMDID,
195 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
196 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
197 WMI_PDEV_SET_QUIET_MODE_CMDID,
198 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
199 WMI_PDEV_GET_TPC_CONFIG_CMDID,
200 WMI_PDEV_SET_BASE_MACADDR_CMDID,
201 WMI_PDEV_DUMP_CMDID,
202 WMI_PDEV_SET_LED_CONFIG_CMDID,
203 WMI_PDEV_GET_TEMPERATURE_CMDID,
204 WMI_PDEV_SET_LED_FLASHING_CMDID,
205 WMI_PDEV_SMART_ANT_ENABLE_CMDID,
206 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
207 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
208 WMI_PDEV_SET_CTL_TABLE_CMDID,
209 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
210 WMI_PDEV_FIPS_CMDID,
211 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
212 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
213 WMI_PDEV_GET_NFCAL_POWER_CMDID,
214 WMI_PDEV_GET_TPC_CMDID,
215 WMI_MIB_STATS_ENABLE_CMDID,
216 WMI_PDEV_SET_PCL_CMDID,
217 WMI_PDEV_SET_HW_MODE_CMDID,
218 WMI_PDEV_SET_MAC_CONFIG_CMDID,
219 WMI_PDEV_SET_ANTENNA_MODE_CMDID,
220 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
221 WMI_PDEV_WAL_POWER_DEBUG_CMDID,
222 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
223 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
224 WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
225 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
226 WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
227 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
228 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
229 WMI_PDEV_CHECK_CAL_VERSION_CMDID,
230 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
231 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
232 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
233 WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
234 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
235 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
236 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
237 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
238 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
239 WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
240 WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
241 WMI_PDEV_PKTLOG_FILTER_CMDID,
242 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
243 WMI_VDEV_DELETE_CMDID,
244 WMI_VDEV_START_REQUEST_CMDID,
245 WMI_VDEV_RESTART_REQUEST_CMDID,
246 WMI_VDEV_UP_CMDID,
247 WMI_VDEV_STOP_CMDID,
248 WMI_VDEV_DOWN_CMDID,
249 WMI_VDEV_SET_PARAM_CMDID,
250 WMI_VDEV_INSTALL_KEY_CMDID,
251 WMI_VDEV_WNM_SLEEPMODE_CMDID,
252 WMI_VDEV_WMM_ADDTS_CMDID,
253 WMI_VDEV_WMM_DELTS_CMDID,
254 WMI_VDEV_SET_WMM_PARAMS_CMDID,
255 WMI_VDEV_SET_GTX_PARAMS_CMDID,
256 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
257 WMI_VDEV_PLMREQ_START_CMDID,
258 WMI_VDEV_PLMREQ_STOP_CMDID,
259 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
260 WMI_VDEV_SET_IE_CMDID,
261 WMI_VDEV_RATEMASK_CMDID,
262 WMI_VDEV_ATF_REQUEST_CMDID,
263 WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
264 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
265 WMI_VDEV_SET_QUIET_MODE_CMDID,
266 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
267 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
268 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
269 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
270 WMI_PEER_DELETE_CMDID,
271 WMI_PEER_FLUSH_TIDS_CMDID,
272 WMI_PEER_SET_PARAM_CMDID,
273 WMI_PEER_ASSOC_CMDID,
274 WMI_PEER_ADD_WDS_ENTRY_CMDID,
275 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
276 WMI_PEER_MCAST_GROUP_CMDID,
277 WMI_PEER_INFO_REQ_CMDID,
278 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
279 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
280 WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
281 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
282 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
283 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
284 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
285 WMI_PEER_ATF_REQUEST_CMDID,
286 WMI_PEER_BWF_REQUEST_CMDID,
287 WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
288 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
289 WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
290 WMI_PEER_ANTDIV_INFO_REQ_CMDID,
Kalle Valod5c65152019-11-23 09:58:40 +0200291 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
292 WMI_PDEV_SEND_BCN_CMDID,
293 WMI_BCN_TMPL_CMDID,
294 WMI_BCN_FILTER_RX_CMDID,
295 WMI_PRB_REQ_FILTER_RX_CMDID,
296 WMI_MGMT_TX_CMDID,
297 WMI_PRB_TMPL_CMDID,
298 WMI_MGMT_TX_SEND_CMDID,
299 WMI_OFFCHAN_DATA_TX_SEND_CMDID,
300 WMI_PDEV_SEND_FD_CMDID,
301 WMI_BCN_OFFLOAD_CTRL_CMDID,
302 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
303 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
304 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
305 WMI_ADDBA_SEND_CMDID,
306 WMI_ADDBA_STATUS_CMDID,
307 WMI_DELBA_SEND_CMDID,
308 WMI_ADDBA_SET_RESP_CMDID,
309 WMI_SEND_SINGLEAMSDU_CMDID,
310 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
311 WMI_STA_POWERSAVE_PARAM_CMDID,
312 WMI_STA_MIMO_PS_MODE_CMDID,
313 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
314 WMI_PDEV_DFS_DISABLE_CMDID,
315 WMI_DFS_PHYERR_FILTER_ENA_CMDID,
316 WMI_DFS_PHYERR_FILTER_DIS_CMDID,
317 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
318 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
319 WMI_VDEV_ADFS_CH_CFG_CMDID,
320 WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
321 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
322 WMI_ROAM_SCAN_RSSI_THRESHOLD,
323 WMI_ROAM_SCAN_PERIOD,
324 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
325 WMI_ROAM_AP_PROFILE,
326 WMI_ROAM_CHAN_LIST,
327 WMI_ROAM_SCAN_CMD,
328 WMI_ROAM_SYNCH_COMPLETE,
329 WMI_ROAM_SET_RIC_REQUEST_CMDID,
330 WMI_ROAM_INVOKE_CMDID,
331 WMI_ROAM_FILTER_CMDID,
332 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
333 WMI_ROAM_CONFIGURE_MAWC_CMDID,
334 WMI_ROAM_SET_MBO_PARAM_CMDID,
335 WMI_ROAM_PER_CONFIG_CMDID,
336 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
337 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
338 WMI_OFL_SCAN_PERIOD,
339 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
340 WMI_P2P_DEV_SET_DISCOVERABILITY,
341 WMI_P2P_GO_SET_BEACON_IE,
342 WMI_P2P_GO_SET_PROBE_RESP_IE,
343 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
344 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
345 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
346 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
347 WMI_P2P_SET_OPPPS_PARAM_CMDID,
348 WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
349 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
350 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
351 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
352 WMI_AP_PS_EGAP_PARAM_CMDID,
353 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
354 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
355 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
356 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
357 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
358 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
359 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
360 WMI_PDEV_RESUME_CMDID,
361 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
362 WMI_RMV_BCN_FILTER_CMDID,
363 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
364 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
365 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
366 WMI_WOW_ENABLE_CMDID,
367 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
368 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
369 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
370 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
371 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
372 WMI_D0_WOW_ENABLE_DISABLE_CMDID,
373 WMI_EXTWOW_ENABLE_CMDID,
374 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
375 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
376 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
377 WMI_WOW_UDP_SVC_OFLD_CMDID,
378 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
379 WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
380 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
381 WMI_RTT_TSF_CMDID,
382 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
383 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
384 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
385 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
386 WMI_REQUEST_STATS_EXT_CMDID,
387 WMI_REQUEST_LINK_STATS_CMDID,
388 WMI_START_LINK_STATS_CMDID,
389 WMI_CLEAR_LINK_STATS_CMDID,
390 WMI_GET_FW_MEM_DUMP_CMDID,
391 WMI_DEBUG_MESG_FLUSH_CMDID,
392 WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
393 WMI_REQUEST_WLAN_STATS_CMDID,
394 WMI_REQUEST_RCPI_CMDID,
395 WMI_REQUEST_PEER_STATS_INFO_CMDID,
396 WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
397 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
398 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
399 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
400 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
401 WMI_APFIND_CMDID,
402 WMI_PASSPOINT_LIST_CONFIG_CMDID,
403 WMI_NLO_CONFIGURE_MAWC_CMDID,
404 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
405 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
406 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
407 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
408 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
409 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
410 WMI_CHATTER_COALESCING_QUERY_CMDID,
411 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
412 WMI_PEER_TID_DELBA_CMDID,
413 WMI_STA_DTIM_PS_METHOD_CMDID,
414 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
415 WMI_STA_KEEPALIVE_CMDID,
416 WMI_BA_REQ_SSN_CMDID,
417 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
418 WMI_PDEV_UTF_CMDID,
419 WMI_DBGLOG_CFG_CMDID,
420 WMI_PDEV_QVIT_CMDID,
421 WMI_PDEV_FTM_INTG_CMDID,
422 WMI_VDEV_SET_KEEPALIVE_CMDID,
423 WMI_VDEV_GET_KEEPALIVE_CMDID,
424 WMI_FORCE_FW_HANG_CMDID,
425 WMI_SET_MCASTBCAST_FILTER_CMDID,
426 WMI_THERMAL_MGMT_CMDID,
427 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
428 WMI_TPC_CHAINMASK_CONFIG_CMDID,
429 WMI_SET_ANTENNA_DIVERSITY_CMDID,
430 WMI_OCB_SET_SCHED_CMDID,
431 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
432 WMI_LRO_CONFIG_CMDID,
433 WMI_TRANSFER_DATA_TO_FLASH_CMDID,
434 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
435 WMI_VDEV_WISA_CMDID,
436 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
437 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
438 WMI_READ_DATA_FROM_FLASH_CMDID,
439 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
440 WMI_GPIO_OUTPUT_CMDID,
441 WMI_TXBF_CMDID,
442 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
443 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
444 WMI_UNIT_TEST_CMDID,
445 WMI_FWTEST_CMDID,
446 WMI_QBOOST_CFG_CMDID,
447 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
448 WMI_TDLS_PEER_UPDATE_CMDID,
449 WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
450 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
451 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
452 WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
453 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
454 WMI_STA_SMPS_PARAM_CMDID,
455 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
456 WMI_HB_SET_TCP_PARAMS_CMDID,
457 WMI_HB_SET_TCP_PKT_FILTER_CMDID,
458 WMI_HB_SET_UDP_PARAMS_CMDID,
459 WMI_HB_SET_UDP_PKT_FILTER_CMDID,
460 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
461 WMI_RMC_SET_ACTION_PERIOD_CMDID,
462 WMI_RMC_CONFIG_CMDID,
463 WMI_RMC_SET_MANUAL_LEADER_CMDID,
464 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
465 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
466 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
467 WMI_BATCH_SCAN_DISABLE_CMDID,
468 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
469 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
470 WMI_OEM_REQUEST_CMDID,
471 WMI_LPI_OEM_REQ_CMDID,
472 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
473 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
474 WMI_CHAN_AVOID_UPDATE_CMDID,
475 WMI_COEX_CONFIG_CMDID,
476 WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
477 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
478 WMI_SAR_LIMITS_CMDID,
479 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
480 WMI_OBSS_SCAN_DISABLE_CMDID,
481 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
482 WMI_LPI_START_SCAN_CMDID,
483 WMI_LPI_STOP_SCAN_CMDID,
484 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
485 WMI_EXTSCAN_STOP_CMDID,
486 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
487 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
488 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
489 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
490 WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
491 WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
492 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
493 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
494 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
495 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
496 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
497 WMI_MDNS_SET_FQDN_CMDID,
498 WMI_MDNS_SET_RESPONSE_CMDID,
499 WMI_MDNS_GET_STATS_CMDID,
500 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
501 WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
502 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
503 WMI_OCB_SET_UTC_TIME_CMDID,
504 WMI_OCB_START_TIMING_ADVERT_CMDID,
505 WMI_OCB_STOP_TIMING_ADVERT_CMDID,
506 WMI_OCB_GET_TSF_TIMER_CMDID,
507 WMI_DCC_GET_STATS_CMDID,
508 WMI_DCC_CLEAR_STATS_CMDID,
509 WMI_DCC_UPDATE_NDL_CMDID,
510 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
511 WMI_SOC_SET_HW_MODE_CMDID,
512 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
513 WMI_SOC_SET_ANTENNA_MODE_CMDID,
514 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
515 WMI_PACKET_FILTER_ENABLE_CMDID,
516 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
517 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
518 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
519 WMI_BPF_GET_VDEV_STATS_CMDID,
520 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
521 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
522 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
523 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
524 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
525 WMI_11D_SCAN_START_CMDID,
526 WMI_11D_SCAN_STOP_CMDID,
527 WMI_SET_INIT_COUNTRY_CMDID,
528 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
529 WMI_NDP_INITIATOR_REQ_CMDID,
530 WMI_NDP_RESPONDER_REQ_CMDID,
531 WMI_NDP_END_REQ_CMDID,
532 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
533};
534
535enum wmi_tlv_event_id {
536 WMI_SERVICE_READY_EVENTID = 0x1,
537 WMI_READY_EVENTID,
538 WMI_SERVICE_AVAILABLE_EVENTID,
539 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
540 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
541 WMI_CHAN_INFO_EVENTID,
542 WMI_PHYERR_EVENTID,
543 WMI_PDEV_DUMP_EVENTID,
544 WMI_TX_PAUSE_EVENTID,
545 WMI_DFS_RADAR_EVENTID,
546 WMI_PDEV_L1SS_TRACK_EVENTID,
547 WMI_PDEV_TEMPERATURE_EVENTID,
548 WMI_SERVICE_READY_EXT_EVENTID,
549 WMI_PDEV_FIPS_EVENTID,
550 WMI_PDEV_CHANNEL_HOPPING_EVENTID,
551 WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
552 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
553 WMI_PDEV_TPC_EVENTID,
554 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
555 WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
556 WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
557 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
558 WMI_PDEV_ANTDIV_STATUS_EVENTID,
559 WMI_PDEV_CHIP_POWER_STATS_EVENTID,
560 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
561 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
562 WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
563 WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
564 WMI_PDEV_BSS_CHAN_INFO_EVENTID,
565 WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
566 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
567 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
568 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
569 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
570 WMI_VDEV_STOPPED_EVENTID,
571 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
572 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
573 WMI_VDEV_TSF_REPORT_EVENTID,
574 WMI_VDEV_DELETE_RESP_EVENTID,
575 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
576 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
577 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
578 WMI_PEER_INFO_EVENTID,
579 WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
580 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
581 WMI_PEER_STATE_EVENTID,
582 WMI_PEER_ASSOC_CONF_EVENTID,
583 WMI_PEER_DELETE_RESP_EVENTID,
584 WMI_PEER_RATECODE_LIST_EVENTID,
585 WMI_WDS_PEER_EVENTID,
586 WMI_PEER_STA_PS_STATECHG_EVENTID,
587 WMI_PEER_ANTDIV_INFO_EVENTID,
John Crispin9cfbae42019-11-25 16:36:19 +0000588 WMI_PEER_RESERVED0_EVENTID,
589 WMI_PEER_RESERVED1_EVENTID,
590 WMI_PEER_RESERVED2_EVENTID,
591 WMI_PEER_RESERVED3_EVENTID,
592 WMI_PEER_RESERVED4_EVENTID,
593 WMI_PEER_RESERVED5_EVENTID,
594 WMI_PEER_RESERVED6_EVENTID,
595 WMI_PEER_RESERVED7_EVENTID,
596 WMI_PEER_RESERVED8_EVENTID,
597 WMI_PEER_RESERVED9_EVENTID,
598 WMI_PEER_RESERVED10_EVENTID,
599 WMI_PEER_OPER_MODE_CHANGE_EVENTID,
Kalle Valod5c65152019-11-23 09:58:40 +0200600 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
601 WMI_HOST_SWBA_EVENTID,
602 WMI_TBTTOFFSET_UPDATE_EVENTID,
603 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
604 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
605 WMI_MGMT_TX_COMPLETION_EVENTID,
606 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
607 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
608 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
609 WMI_TX_ADDBA_COMPLETE_EVENTID,
610 WMI_BA_RSP_SSN_EVENTID,
611 WMI_AGGR_STATE_TRIG_EVENTID,
612 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
613 WMI_PROFILE_MATCH,
614 WMI_ROAM_SYNCH_EVENTID,
615 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
616 WMI_P2P_NOA_EVENTID,
617 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
618 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
619 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
620 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
621 WMI_D0_WOW_DISABLE_ACK_EVENTID,
622 WMI_WOW_INITIAL_WAKEUP_EVENTID,
623 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
624 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
625 WMI_RTT_ERROR_REPORT_EVENTID,
626 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
627 WMI_IFACE_LINK_STATS_EVENTID,
628 WMI_PEER_LINK_STATS_EVENTID,
629 WMI_RADIO_LINK_STATS_EVENTID,
630 WMI_UPDATE_FW_MEM_DUMP_EVENTID,
631 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
632 WMI_INST_RSSI_STATS_EVENTID,
633 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
634 WMI_REPORT_STATS_EVENTID,
635 WMI_UPDATE_RCPI_EVENTID,
636 WMI_PEER_STATS_INFO_EVENTID,
637 WMI_RADIO_CHAN_STATS_EVENTID,
638 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
639 WMI_NLO_SCAN_COMPLETE_EVENTID,
640 WMI_APFIND_EVENTID,
641 WMI_PASSPOINT_MATCH_EVENTID,
642 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
643 WMI_GTK_REKEY_FAIL_EVENTID,
644 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
645 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
646 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
647 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
648 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
649 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
650 WMI_PDEV_UTF_EVENTID,
651 WMI_DEBUG_MESG_EVENTID,
652 WMI_UPDATE_STATS_EVENTID,
653 WMI_DEBUG_PRINT_EVENTID,
654 WMI_DCS_INTERFERENCE_EVENTID,
655 WMI_PDEV_QVIT_EVENTID,
656 WMI_WLAN_PROFILE_DATA_EVENTID,
657 WMI_PDEV_FTM_INTG_EVENTID,
658 WMI_WLAN_FREQ_AVOID_EVENTID,
659 WMI_VDEV_GET_KEEPALIVE_EVENTID,
660 WMI_THERMAL_MGMT_EVENTID,
661 WMI_DIAG_DATA_CONTAINER_EVENTID,
662 WMI_HOST_AUTO_SHUTDOWN_EVENTID,
663 WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
664 WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
665 WMI_DIAG_EVENTID,
666 WMI_OCB_SET_SCHED_EVENTID,
667 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
668 WMI_RSSI_BREACH_EVENTID,
669 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
670 WMI_PDEV_UTF_SCPC_EVENTID,
671 WMI_READ_DATA_FROM_FLASH_EVENTID,
672 WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
673 WMI_PKGID_EVENTID,
674 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
675 WMI_UPLOADH_EVENTID,
676 WMI_CAPTUREH_EVENTID,
677 WMI_RFKILL_STATE_CHANGE_EVENTID,
678 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
679 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
680 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
681 WMI_BATCH_SCAN_RESULT_EVENTID,
682 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
683 WMI_OEM_MEASUREMENT_REPORT_EVENTID,
684 WMI_OEM_ERROR_REPORT_EVENTID,
685 WMI_OEM_RESPONSE_EVENTID,
686 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
687 WMI_NAN_DISC_IFACE_CREATED_EVENTID,
688 WMI_NAN_DISC_IFACE_DELETED_EVENTID,
689 WMI_NAN_STARTED_CLUSTER_EVENTID,
690 WMI_NAN_JOINED_CLUSTER_EVENTID,
691 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
692 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
693 WMI_LPI_STATUS_EVENTID,
694 WMI_LPI_HANDOFF_EVENTID,
695 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
696 WMI_EXTSCAN_OPERATION_EVENTID,
697 WMI_EXTSCAN_TABLE_USAGE_EVENTID,
698 WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
699 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
700 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
701 WMI_EXTSCAN_CAPABILITIES_EVENTID,
702 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
703 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
704 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
705 WMI_SAP_OFL_DEL_STA_EVENTID,
706 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
707 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
708 WMI_DCC_GET_STATS_RESP_EVENTID,
709 WMI_DCC_UPDATE_NDL_RESP_EVENTID,
710 WMI_DCC_STATS_EVENTID,
711 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
712 WMI_SOC_HW_MODE_TRANSITION_EVENTID,
713 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
714 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
715 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
716 WMI_BPF_VDEV_STATS_INFO_EVENTID,
717 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
718 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
719 WMI_11D_NEW_COUNTRY_EVENTID,
720 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
721 WMI_NDP_INITIATOR_RSP_EVENTID,
722 WMI_NDP_RESPONDER_RSP_EVENTID,
723 WMI_NDP_END_RSP_EVENTID,
724 WMI_NDP_INDICATION_EVENTID,
725 WMI_NDP_CONFIRM_EVENTID,
726 WMI_NDP_END_INDICATION_EVENTID,
727};
728
729enum wmi_tlv_pdev_param {
730 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
731 WMI_PDEV_PARAM_RX_CHAIN_MASK,
732 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
733 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
734 WMI_PDEV_PARAM_TXPOWER_SCALE,
735 WMI_PDEV_PARAM_BEACON_GEN_MODE,
736 WMI_PDEV_PARAM_BEACON_TX_MODE,
737 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
738 WMI_PDEV_PARAM_PROTECTION_MODE,
739 WMI_PDEV_PARAM_DYNAMIC_BW,
740 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
741 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
742 WMI_PDEV_PARAM_STA_KICKOUT_TH,
743 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
744 WMI_PDEV_PARAM_LTR_ENABLE,
745 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
746 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
747 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
748 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
749 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
750 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
751 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
752 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
753 WMI_PDEV_PARAM_L1SS_ENABLE,
754 WMI_PDEV_PARAM_DSLEEP_ENABLE,
755 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
756 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
757 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
758 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
759 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
760 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
761 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
762 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
763 WMI_PDEV_PARAM_PMF_QOS,
764 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
765 WMI_PDEV_PARAM_DCS,
766 WMI_PDEV_PARAM_ANI_ENABLE,
767 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
768 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
769 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
770 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
771 WMI_PDEV_PARAM_DYNTXCHAIN,
772 WMI_PDEV_PARAM_PROXY_STA,
773 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
774 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
775 WMI_PDEV_PARAM_RFKILL_ENABLE,
776 WMI_PDEV_PARAM_BURST_DUR,
777 WMI_PDEV_PARAM_BURST_ENABLE,
778 WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
779 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
780 WMI_PDEV_PARAM_L1SS_TRACK,
781 WMI_PDEV_PARAM_HYST_EN,
782 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
783 WMI_PDEV_PARAM_LED_SYS_STATE,
784 WMI_PDEV_PARAM_LED_ENABLE,
785 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
786 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
787 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
788 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
789 WMI_PDEV_PARAM_CTS_CBW,
790 WMI_PDEV_PARAM_WNTS_CONFIG,
791 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
792 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
793 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
794 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
795 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
796 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
797 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
798 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
799 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
800 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
801 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
802 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
803 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
804 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
805 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
806 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
807 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
808 WMI_PDEV_PARAM_TXPOWER_DECR_DB,
809 WMI_PDEV_PARAM_AGGR_BURST,
810 WMI_PDEV_PARAM_RX_DECAP_MODE,
811 WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
812 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
813 WMI_PDEV_PARAM_ANTENNA_GAIN,
814 WMI_PDEV_PARAM_RX_FILTER,
815 WMI_PDEV_SET_MCAST_TO_UCAST_TID,
816 WMI_PDEV_PARAM_PROXY_STA_MODE,
817 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
818 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
819 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
820 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
821 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
822 WMI_PDEV_PARAM_BLOCK_INTERBSS,
823 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
824 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
825 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
826 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
827 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
828 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
829 WMI_PDEV_PARAM_EN_STATS,
830 WMI_PDEV_PARAM_MU_GROUP_POLICY,
831 WMI_PDEV_PARAM_NOISE_DETECTION,
832 WMI_PDEV_PARAM_NOISE_THRESHOLD,
833 WMI_PDEV_PARAM_DPD_ENABLE,
834 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
835 WMI_PDEV_PARAM_ATF_STRICT_SCH,
836 WMI_PDEV_PARAM_ATF_SCHED_DURATION,
837 WMI_PDEV_PARAM_ANT_PLZN,
838 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
839 WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
840 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
841 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
842 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
843 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
844 WMI_PDEV_PARAM_CCA_THRESHOLD,
845 WMI_PDEV_PARAM_RTS_FIXED_RATE,
846 WMI_PDEV_PARAM_PDEV_RESET,
847 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
848 WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
849 WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
850 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
851 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
852 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
853 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
854 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
855 WMI_PDEV_PARAM_PROPAGATION_DELAY,
856 WMI_PDEV_PARAM_ENA_ANT_DIV,
857 WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
858 WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
859 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
860 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
861 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
862 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
863 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
864 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
865 WMI_PDEV_PARAM_TX_SCH_DELAY,
866 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
867 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
868 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
869 WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
870 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
871 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
872 WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
873};
874
875enum wmi_tlv_vdev_param {
876 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
877 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
878 WMI_VDEV_PARAM_BEACON_INTERVAL,
879 WMI_VDEV_PARAM_LISTEN_INTERVAL,
880 WMI_VDEV_PARAM_MULTICAST_RATE,
881 WMI_VDEV_PARAM_MGMT_TX_RATE,
882 WMI_VDEV_PARAM_SLOT_TIME,
883 WMI_VDEV_PARAM_PREAMBLE,
884 WMI_VDEV_PARAM_SWBA_TIME,
885 WMI_VDEV_STATS_UPDATE_PERIOD,
886 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
887 WMI_VDEV_HOST_SWBA_INTERVAL,
888 WMI_VDEV_PARAM_DTIM_PERIOD,
889 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
890 WMI_VDEV_PARAM_WDS,
891 WMI_VDEV_PARAM_ATIM_WINDOW,
892 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
893 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
894 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
895 WMI_VDEV_PARAM_FEATURE_WMM,
896 WMI_VDEV_PARAM_CHWIDTH,
897 WMI_VDEV_PARAM_CHEXTOFFSET,
898 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
899 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
900 WMI_VDEV_PARAM_MGMT_RATE,
901 WMI_VDEV_PARAM_PROTECTION_MODE,
902 WMI_VDEV_PARAM_FIXED_RATE,
903 WMI_VDEV_PARAM_SGI,
904 WMI_VDEV_PARAM_LDPC,
905 WMI_VDEV_PARAM_TX_STBC,
906 WMI_VDEV_PARAM_RX_STBC,
907 WMI_VDEV_PARAM_INTRA_BSS_FWD,
908 WMI_VDEV_PARAM_DEF_KEYID,
909 WMI_VDEV_PARAM_NSS,
910 WMI_VDEV_PARAM_BCAST_DATA_RATE,
911 WMI_VDEV_PARAM_MCAST_DATA_RATE,
912 WMI_VDEV_PARAM_MCAST_INDICATE,
913 WMI_VDEV_PARAM_DHCP_INDICATE,
914 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
915 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
916 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
917 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
918 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
919 WMI_VDEV_PARAM_ENABLE_RTSCTS,
920 WMI_VDEV_PARAM_TXBF,
921 WMI_VDEV_PARAM_PACKET_POWERSAVE,
922 WMI_VDEV_PARAM_DROP_UNENCRY,
923 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
924 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
925 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
926 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
927 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
928 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
929 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
930 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
931 WMI_VDEV_PARAM_TX_PWRLIMIT,
932 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
933 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
934 WMI_VDEV_PARAM_ENABLE_RMC,
935 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
936 WMI_VDEV_PARAM_MAX_RATE,
937 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
938 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
939 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
940 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
941 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
942 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
943 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
944 WMI_VDEV_PARAM_INACTIVITY_CNT,
945 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
946 WMI_VDEV_PARAM_DTIM_POLICY,
947 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
948 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
949 WMI_VDEV_PARAM_RX_LEAK_WINDOW,
950 WMI_VDEV_PARAM_STATS_AVG_FACTOR,
951 WMI_VDEV_PARAM_DISCONNECT_TH,
952 WMI_VDEV_PARAM_RTSCTS_RATE,
953 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
954 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
955 WMI_VDEV_PARAM_TXPOWER_SCALE,
956 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
957 WMI_VDEV_PARAM_MCAST2UCAST_SET,
958 WMI_VDEV_PARAM_RC_NUM_RETRIES,
959 WMI_VDEV_PARAM_CABQ_MAXDUR,
960 WMI_VDEV_PARAM_MFPTEST_SET,
961 WMI_VDEV_PARAM_RTS_FIXED_RATE,
962 WMI_VDEV_PARAM_VHT_SGIMASK,
963 WMI_VDEV_PARAM_VHT80_RATEMASK,
964 WMI_VDEV_PARAM_PROXY_STA,
965 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
966 WMI_VDEV_PARAM_RX_DECAP_TYPE,
967 WMI_VDEV_PARAM_BW_NSS_RATEMASK,
968 WMI_VDEV_PARAM_SENSOR_AP,
969 WMI_VDEV_PARAM_BEACON_RATE,
970 WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
971 WMI_VDEV_PARAM_STA_KICKOUT,
972 WMI_VDEV_PARAM_CAPABILITIES,
973 WMI_VDEV_PARAM_TSF_INCREMENT,
974 WMI_VDEV_PARAM_AMPDU_PER_AC,
975 WMI_VDEV_PARAM_RX_FILTER,
976 WMI_VDEV_PARAM_MGMT_TX_POWER,
977 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
978 WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
979 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
980 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
981 WMI_VDEV_PARAM_HE_DCM,
982 WMI_VDEV_PARAM_HE_RANGE_EXT,
983 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
984 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
985 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
986 WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
987 WMI_VDEV_PARAM_BSS_COLOR,
988 WMI_VDEV_PARAM_SET_HEMU_MODE,
989 WMI_VDEV_PARAM_TX_OFDMA_CPLEN,
990};
991
992enum wmi_tlv_peer_flags {
993 WMI_TLV_PEER_AUTH = 0x00000001,
994 WMI_TLV_PEER_QOS = 0x00000002,
995 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004,
996 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010,
997 WMI_TLV_PEER_APSD = 0x00000800,
998 WMI_TLV_PEER_HT = 0x00001000,
999 WMI_TLV_PEER_40MHZ = 0x00002000,
1000 WMI_TLV_PEER_STBC = 0x00008000,
1001 WMI_TLV_PEER_LDPC = 0x00010000,
1002 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000,
1003 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000,
1004 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000,
1005 WMI_TLV_PEER_VHT = 0x02000000,
1006 WMI_TLV_PEER_80MHZ = 0x04000000,
1007 WMI_TLV_PEER_PMF = 0x08000000,
1008 WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1009 WMI_PEER_160MHZ = 0x40000000,
1010 WMI_PEER_SAFEMODE_EN = 0x80000000,
1011
1012};
1013
1014/** Enum list of TLV Tags for each parameter structure type. */
1015enum wmi_tlv_tag {
1016 WMI_TAG_LAST_RESERVED = 15,
1017 WMI_TAG_FIRST_ARRAY_ENUM,
1018 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1019 WMI_TAG_ARRAY_BYTE,
1020 WMI_TAG_ARRAY_STRUCT,
1021 WMI_TAG_ARRAY_FIXED_STRUCT,
1022 WMI_TAG_LAST_ARRAY_ENUM = 31,
1023 WMI_TAG_SERVICE_READY_EVENT,
1024 WMI_TAG_HAL_REG_CAPABILITIES,
1025 WMI_TAG_WLAN_HOST_MEM_REQ,
1026 WMI_TAG_READY_EVENT,
1027 WMI_TAG_SCAN_EVENT,
1028 WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1029 WMI_TAG_CHAN_INFO_EVENT,
1030 WMI_TAG_COMB_PHYERR_RX_HDR,
1031 WMI_TAG_VDEV_START_RESPONSE_EVENT,
1032 WMI_TAG_VDEV_STOPPED_EVENT,
1033 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1034 WMI_TAG_PEER_STA_KICKOUT_EVENT,
1035 WMI_TAG_MGMT_RX_HDR,
1036 WMI_TAG_TBTT_OFFSET_EVENT,
1037 WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1038 WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1039 WMI_TAG_ROAM_EVENT,
1040 WMI_TAG_WOW_EVENT_INFO,
1041 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1042 WMI_TAG_RTT_EVENT_HEADER,
1043 WMI_TAG_RTT_ERROR_REPORT_EVENT,
1044 WMI_TAG_RTT_MEAS_EVENT,
1045 WMI_TAG_ECHO_EVENT,
1046 WMI_TAG_FTM_INTG_EVENT,
1047 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1048 WMI_TAG_GPIO_INPUT_EVENT,
1049 WMI_TAG_CSA_EVENT,
1050 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1051 WMI_TAG_IGTK_INFO,
1052 WMI_TAG_DCS_INTERFERENCE_EVENT,
1053 WMI_TAG_ATH_DCS_CW_INT,
1054 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1055 WMI_TAG_ATH_DCS_CW_INT,
1056 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1057 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1058 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1059 WMI_TAG_WLAN_PROFILE_CTX_T,
1060 WMI_TAG_WLAN_PROFILE_T,
1061 WMI_TAG_PDEV_QVIT_EVENT,
1062 WMI_TAG_HOST_SWBA_EVENT,
1063 WMI_TAG_TIM_INFO,
1064 WMI_TAG_P2P_NOA_INFO,
1065 WMI_TAG_STATS_EVENT,
1066 WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1067 WMI_TAG_AVOID_FREQ_RANGE_DESC,
1068 WMI_TAG_GTK_REKEY_FAIL_EVENT,
1069 WMI_TAG_INIT_CMD,
1070 WMI_TAG_RESOURCE_CONFIG,
1071 WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1072 WMI_TAG_START_SCAN_CMD,
1073 WMI_TAG_STOP_SCAN_CMD,
1074 WMI_TAG_SCAN_CHAN_LIST_CMD,
1075 WMI_TAG_CHANNEL,
1076 WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1077 WMI_TAG_PDEV_SET_PARAM_CMD,
1078 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1079 WMI_TAG_WMM_PARAMS,
1080 WMI_TAG_PDEV_SET_QUIET_CMD,
1081 WMI_TAG_VDEV_CREATE_CMD,
1082 WMI_TAG_VDEV_DELETE_CMD,
1083 WMI_TAG_VDEV_START_REQUEST_CMD,
1084 WMI_TAG_P2P_NOA_DESCRIPTOR,
1085 WMI_TAG_P2P_GO_SET_BEACON_IE,
1086 WMI_TAG_GTK_OFFLOAD_CMD,
1087 WMI_TAG_VDEV_UP_CMD,
1088 WMI_TAG_VDEV_STOP_CMD,
1089 WMI_TAG_VDEV_DOWN_CMD,
1090 WMI_TAG_VDEV_SET_PARAM_CMD,
1091 WMI_TAG_VDEV_INSTALL_KEY_CMD,
1092 WMI_TAG_PEER_CREATE_CMD,
1093 WMI_TAG_PEER_DELETE_CMD,
1094 WMI_TAG_PEER_FLUSH_TIDS_CMD,
1095 WMI_TAG_PEER_SET_PARAM_CMD,
1096 WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1097 WMI_TAG_VHT_RATE_SET,
1098 WMI_TAG_BCN_TMPL_CMD,
1099 WMI_TAG_PRB_TMPL_CMD,
1100 WMI_TAG_BCN_PRB_INFO,
1101 WMI_TAG_PEER_TID_ADDBA_CMD,
1102 WMI_TAG_PEER_TID_DELBA_CMD,
1103 WMI_TAG_STA_POWERSAVE_MODE_CMD,
1104 WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1105 WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1106 WMI_TAG_ROAM_SCAN_MODE,
1107 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1108 WMI_TAG_ROAM_SCAN_PERIOD,
1109 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1110 WMI_TAG_PDEV_SUSPEND_CMD,
1111 WMI_TAG_PDEV_RESUME_CMD,
1112 WMI_TAG_ADD_BCN_FILTER_CMD,
1113 WMI_TAG_RMV_BCN_FILTER_CMD,
1114 WMI_TAG_WOW_ENABLE_CMD,
1115 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1116 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1117 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1118 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1119 WMI_TAG_ARP_OFFLOAD_TUPLE,
1120 WMI_TAG_NS_OFFLOAD_TUPLE,
1121 WMI_TAG_FTM_INTG_CMD,
1122 WMI_TAG_STA_KEEPALIVE_CMD,
1123 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
1124 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1125 WMI_TAG_AP_PS_PEER_CMD,
1126 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1127 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1128 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1129 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1130 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1131 WMI_TAG_WOW_DEL_PATTERN_CMD,
1132 WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1133 WMI_TAG_RTT_MEASREQ_HEAD,
1134 WMI_TAG_RTT_MEASREQ_BODY,
1135 WMI_TAG_RTT_TSF_CMD,
1136 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1137 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1138 WMI_TAG_REQUEST_STATS_CMD,
1139 WMI_TAG_NLO_CONFIG_CMD,
1140 WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1141 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1142 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1143 WMI_TAG_CHATTER_SET_MODE_CMD,
1144 WMI_TAG_ECHO_CMD,
1145 WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1146 WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1147 WMI_TAG_FORCE_FW_HANG_CMD,
1148 WMI_TAG_GPIO_CONFIG_CMD,
1149 WMI_TAG_GPIO_OUTPUT_CMD,
1150 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1151 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1152 WMI_TAG_BCN_TX_HDR,
1153 WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1154 WMI_TAG_MGMT_TX_HDR,
1155 WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1156 WMI_TAG_ADDBA_SEND_CMD,
1157 WMI_TAG_DELBA_SEND_CMD,
1158 WMI_TAG_ADDBA_SETRESPONSE_CMD,
1159 WMI_TAG_SEND_SINGLEAMSDU_CMD,
1160 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1161 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1162 WMI_TAG_PDEV_SET_HT_IE_CMD,
1163 WMI_TAG_PDEV_SET_VHT_IE_CMD,
1164 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1165 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1166 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1167 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1168 WMI_TAG_PEER_MCAST_GROUP_CMD,
1169 WMI_TAG_ROAM_AP_PROFILE,
1170 WMI_TAG_AP_PROFILE,
1171 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1172 WMI_TAG_PDEV_DFS_ENABLE_CMD,
1173 WMI_TAG_PDEV_DFS_DISABLE_CMD,
1174 WMI_TAG_WOW_ADD_PATTERN_CMD,
1175 WMI_TAG_WOW_BITMAP_PATTERN_T,
1176 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1177 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1178 WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1179 WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1180 WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1181 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1182 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1183 WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1184 WMI_TAG_TXBF_CMD,
1185 WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1186 WMI_TAG_NLO_EVENT,
1187 WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1188 WMI_TAG_UPLOAD_H_HDR,
1189 WMI_TAG_CAPTURE_H_EVENT_HDR,
1190 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1191 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1192 WMI_TAG_VDEV_WMM_ADDTS_CMD,
1193 WMI_TAG_VDEV_WMM_DELTS_CMD,
1194 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1195 WMI_TAG_TDLS_SET_STATE_CMD,
1196 WMI_TAG_TDLS_PEER_UPDATE_CMD,
1197 WMI_TAG_TDLS_PEER_EVENT,
1198 WMI_TAG_TDLS_PEER_CAPABILITIES,
1199 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1200 WMI_TAG_ROAM_CHAN_LIST,
1201 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1202 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1203 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1204 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1205 WMI_TAG_BA_REQ_SSN_CMD,
1206 WMI_TAG_BA_RSP_SSN_EVENT,
1207 WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1208 WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1209 WMI_TAG_P2P_SET_OPPPS_CMD,
1210 WMI_TAG_P2P_SET_NOA_CMD,
1211 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1212 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1213 WMI_TAG_STA_SMPS_PARAM_CMD,
1214 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1215 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1216 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1217 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1218 WMI_TAG_P2P_NOA_EVENT,
1219 WMI_TAG_HB_SET_ENABLE_CMD,
1220 WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1221 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1222 WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1223 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1224 WMI_TAG_HB_IND_EVENT,
1225 WMI_TAG_TX_PAUSE_EVENT,
1226 WMI_TAG_RFKILL_EVENT,
1227 WMI_TAG_DFS_RADAR_EVENT,
1228 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1229 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1230 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1231 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1232 WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1233 WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1234 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1235 WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1236 WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1237 WMI_TAG_VDEV_PLMREQ_START_CMD,
1238 WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1239 WMI_TAG_THERMAL_MGMT_CMD,
1240 WMI_TAG_THERMAL_MGMT_EVENT,
1241 WMI_TAG_PEER_INFO_REQ_CMD,
1242 WMI_TAG_PEER_INFO_EVENT,
1243 WMI_TAG_PEER_INFO,
1244 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1245 WMI_TAG_RMC_SET_MODE_CMD,
1246 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1247 WMI_TAG_RMC_CONFIG_CMD,
1248 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1249 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1250 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1251 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1252 WMI_TAG_NAN_CMD_PARAM,
1253 WMI_TAG_NAN_EVENT_HDR,
1254 WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1255 WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1256 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1257 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1258 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1259 WMI_TAG_AGGR_STATE_TRIG_EVENT,
1260 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1261 WMI_TAG_ROAM_SCAN_CMD,
1262 WMI_TAG_REQ_STATS_EXT_CMD,
1263 WMI_TAG_STATS_EXT_EVENT,
1264 WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1265 WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1266 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1267 WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1268 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1269 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1270 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1271 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1272 WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1273 WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1274 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1275 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1276 WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1277 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1278 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1279 WMI_TAG_START_LINK_STATS_CMD,
1280 WMI_TAG_CLEAR_LINK_STATS_CMD,
1281 WMI_TAG_REQUEST_LINK_STATS_CMD,
1282 WMI_TAG_IFACE_LINK_STATS_EVENT,
1283 WMI_TAG_RADIO_LINK_STATS_EVENT,
1284 WMI_TAG_PEER_STATS_EVENT,
1285 WMI_TAG_CHANNEL_STATS,
1286 WMI_TAG_RADIO_LINK_STATS,
1287 WMI_TAG_RATE_STATS,
1288 WMI_TAG_PEER_LINK_STATS,
1289 WMI_TAG_WMM_AC_STATS,
1290 WMI_TAG_IFACE_LINK_STATS,
1291 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1292 WMI_TAG_LPI_START_SCAN_CMD,
1293 WMI_TAG_LPI_STOP_SCAN_CMD,
1294 WMI_TAG_LPI_RESULT_EVENT,
1295 WMI_TAG_PEER_STATE_EVENT,
1296 WMI_TAG_EXTSCAN_BUCKET_CMD,
1297 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1298 WMI_TAG_EXTSCAN_START_CMD,
1299 WMI_TAG_EXTSCAN_STOP_CMD,
1300 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1301 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1302 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1303 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1304 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1305 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1306 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1307 WMI_TAG_EXTSCAN_OPERATION_EVENT,
1308 WMI_TAG_EXTSCAN_START_STOP_EVENT,
1309 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1310 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1311 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1312 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1313 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1314 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1315 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1316 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1317 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1318 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1319 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1320 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1321 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1322 WMI_TAG_UNIT_TEST_CMD,
1323 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1324 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1325 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1326 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1327 WMI_TAG_ROAM_SYNCH_EVENT,
1328 WMI_TAG_ROAM_SYNCH_COMPLETE,
1329 WMI_TAG_EXTWOW_ENABLE_CMD,
1330 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1331 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1332 WMI_TAG_LPI_STATUS_EVENT,
1333 WMI_TAG_LPI_HANDOFF_EVENT,
1334 WMI_TAG_VDEV_RATE_STATS_EVENT,
1335 WMI_TAG_VDEV_RATE_HT_INFO,
1336 WMI_TAG_RIC_REQUEST,
1337 WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1338 WMI_TAG_PDEV_TEMPERATURE_EVENT,
1339 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1340 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1341 WMI_TAG_RIC_TSPEC,
1342 WMI_TAG_TPC_CHAINMASK_CONFIG,
1343 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1344 WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1345 WMI_TAG_KEY_MATERIAL,
1346 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1347 WMI_TAG_SET_LED_FLASHING_CMD,
1348 WMI_TAG_MDNS_OFFLOAD_CMD,
1349 WMI_TAG_MDNS_SET_FQDN_CMD,
1350 WMI_TAG_MDNS_SET_RESP_CMD,
1351 WMI_TAG_MDNS_GET_STATS_CMD,
1352 WMI_TAG_MDNS_STATS_EVENT,
1353 WMI_TAG_ROAM_INVOKE_CMD,
1354 WMI_TAG_PDEV_RESUME_EVENT,
1355 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1356 WMI_TAG_SAP_OFL_ENABLE_CMD,
1357 WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1358 WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1359 WMI_TAG_APFIND_CMD_PARAM,
1360 WMI_TAG_APFIND_EVENT_HDR,
1361 WMI_TAG_OCB_SET_SCHED_CMD,
1362 WMI_TAG_OCB_SET_SCHED_EVENT,
1363 WMI_TAG_OCB_SET_CONFIG_CMD,
1364 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1365 WMI_TAG_OCB_SET_UTC_TIME_CMD,
1366 WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1367 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1368 WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1369 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1370 WMI_TAG_DCC_GET_STATS_CMD,
1371 WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1372 WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1373 WMI_TAG_DCC_CLEAR_STATS_CMD,
1374 WMI_TAG_DCC_UPDATE_NDL_CMD,
1375 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1376 WMI_TAG_DCC_STATS_EVENT,
1377 WMI_TAG_OCB_CHANNEL,
1378 WMI_TAG_OCB_SCHEDULE_ELEMENT,
1379 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1380 WMI_TAG_DCC_NDL_CHAN,
1381 WMI_TAG_QOS_PARAMETER,
1382 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1383 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1384 WMI_TAG_ROAM_FILTER,
1385 WMI_TAG_PASSPOINT_CONFIG_CMD,
1386 WMI_TAG_PASSPOINT_EVENT_HDR,
1387 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1388 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1389 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1390 WMI_TAG_VDEV_TSF_REPORT_EVENT,
1391 WMI_TAG_GET_FW_MEM_DUMP,
1392 WMI_TAG_UPDATE_FW_MEM_DUMP,
1393 WMI_TAG_FW_MEM_DUMP_PARAMS,
1394 WMI_TAG_DEBUG_MESG_FLUSH,
1395 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1396 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1397 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1398 WMI_TAG_VDEV_SET_IE_CMD,
1399 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1400 WMI_TAG_RSSI_BREACH_EVENT,
1401 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1402 WMI_TAG_SOC_SET_PCL_CMD,
1403 WMI_TAG_SOC_SET_HW_MODE_CMD,
1404 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1405 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1406 WMI_TAG_VDEV_TXRX_STREAMS,
1407 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1408 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1409 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1410 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1411 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1412 WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1413 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1414 WMI_TAG_PACKET_FILTER_CONFIG,
1415 WMI_TAG_PACKET_FILTER_ENABLE,
1416 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1417 WMI_TAG_MGMT_TX_SEND_CMD,
1418 WMI_TAG_MGMT_TX_COMPL_EVENT,
1419 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1420 WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1421 WMI_TAG_LRO_INFO_CMD,
1422 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1423 WMI_TAG_SERVICE_READY_EXT_EVENT,
1424 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1425 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1426 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1427 WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1428 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1429 WMI_TAG_PEER_ASSOC_CONF_EVENT,
1430 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1431 WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1432 WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1433 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1434 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1435 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1436 WMI_TAG_SCPC_EVENT,
1437 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1438 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1439 WMI_TAG_BPF_GET_CAPABILITY_CMD,
1440 WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1441 WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1442 WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1443 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1444 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1445 WMI_TAG_VDEV_DELETE_RESP_EVENT,
1446 WMI_TAG_PEER_DELETE_RESP_EVENT,
1447 WMI_TAG_ROAM_DENSE_THRES_PARAM,
1448 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1449 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1450 WMI_TAG_VDEV_CONFIG_RATEMASK,
1451 WMI_TAG_PDEV_FIPS_CMD,
1452 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1453 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1454 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1455 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1456 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1457 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1458 WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1459 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1460 WMI_TAG_FWTEST_SET_PARAM_CMD,
1461 WMI_TAG_PEER_ATF_REQUEST,
1462 WMI_TAG_VDEV_ATF_REQUEST,
1463 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1464 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1465 WMI_TAG_INST_RSSI_STATS_RESP,
1466 WMI_TAG_MED_UTIL_REPORT_EVENT,
1467 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1468 WMI_TAG_WDS_ADDR_EVENT,
1469 WMI_TAG_PEER_RATECODE_LIST_EVENT,
1470 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1471 WMI_TAG_PDEV_TPC_EVENT,
1472 WMI_TAG_ANI_OFDM_EVENT,
1473 WMI_TAG_ANI_CCK_EVENT,
1474 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1475 WMI_TAG_PDEV_FIPS_EVENT,
1476 WMI_TAG_ATF_PEER_INFO,
1477 WMI_TAG_PDEV_GET_TPC_CMD,
1478 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1479 WMI_TAG_QBOOST_CFG_CMD,
1480 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1481 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1482 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1483 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1484 WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1485 WMI_TAG_PEER_MCS_RATE_INFO,
1486 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1487 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1488 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1489 WMI_TAG_MU_REPORT_TOTAL_MU,
1490 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1491 WMI_TAG_ROAM_SET_MBO,
1492 WMI_TAG_MIB_STATS_ENABLE_CMD,
1493 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1494 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1495 WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1496 WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1497 WMI_TAG_NDI_GET_CAP_REQ,
1498 WMI_TAG_NDP_INITIATOR_REQ,
1499 WMI_TAG_NDP_RESPONDER_REQ,
1500 WMI_TAG_NDP_END_REQ,
1501 WMI_TAG_NDI_CAP_RSP_EVENT,
1502 WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1503 WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1504 WMI_TAG_NDP_END_RSP_EVENT,
1505 WMI_TAG_NDP_INDICATION_EVENT,
1506 WMI_TAG_NDP_CONFIRM_EVENT,
1507 WMI_TAG_NDP_END_INDICATION_EVENT,
1508 WMI_TAG_VDEV_SET_QUIET_CMD,
1509 WMI_TAG_PDEV_SET_PCL_CMD,
1510 WMI_TAG_PDEV_SET_HW_MODE_CMD,
1511 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1512 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1513 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1514 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1515 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1516 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1517 WMI_TAG_COEX_CONFIG_CMD,
1518 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1519 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1520 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1521 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1522 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1523 WMI_TAG_MAC_PHY_CAPABILITIES,
1524 WMI_TAG_HW_MODE_CAPABILITIES,
1525 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1526 WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1527 WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1528 WMI_TAG_VDEV_WISA_CMD,
1529 WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1530 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1531 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1532 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1533 WMI_TAG_NDP_END_RSP_PER_NDI,
1534 WMI_TAG_PEER_BWF_REQUEST,
1535 WMI_TAG_BWF_PEER_INFO,
1536 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1537 WMI_TAG_RMC_SET_LEADER_CMD,
1538 WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1539 WMI_TAG_PER_CHAIN_RSSI_STATS,
1540 WMI_TAG_RSSI_STATS,
1541 WMI_TAG_P2P_LO_START_CMD,
1542 WMI_TAG_P2P_LO_STOP_CMD,
1543 WMI_TAG_P2P_LO_STOPPED_EVENT,
1544 WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1545 WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1546 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1547 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1548 WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1549 WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1550 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1551 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1552 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1553 WMI_TAG_TLV_BUF_LEN_PARAM,
1554 WMI_TAG_SERVICE_AVAILABLE_EVENT,
1555 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1556 WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1557 WMI_TAG_PEER_ANTDIV_INFO,
1558 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1559 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1560 WMI_TAG_MNT_FILTER_CMD,
1561 WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1562 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1563 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1564 WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1565 WMI_TAG_CHAN_CCA_STATS,
1566 WMI_TAG_PEER_SIGNAL_STATS,
1567 WMI_TAG_TX_STATS,
1568 WMI_TAG_PEER_AC_TX_STATS,
1569 WMI_TAG_RX_STATS,
1570 WMI_TAG_PEER_AC_RX_STATS,
1571 WMI_TAG_REPORT_STATS_EVENT,
1572 WMI_TAG_CHAN_CCA_STATS_THRESH,
1573 WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1574 WMI_TAG_TX_STATS_THRESH,
1575 WMI_TAG_RX_STATS_THRESH,
1576 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1577 WMI_TAG_REQUEST_WLAN_STATS_CMD,
1578 WMI_TAG_RX_AGGR_FAILURE_EVENT,
1579 WMI_TAG_RX_AGGR_FAILURE_INFO,
1580 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1581 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1582 WMI_TAG_PDEV_BAND_TO_MAC,
1583 WMI_TAG_TBTT_OFFSET_INFO,
1584 WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1585 WMI_TAG_SAR_LIMITS_CMD,
1586 WMI_TAG_SAR_LIMIT_CMD_ROW,
1587 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1588 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1589 WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1590 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1591 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1592 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1593 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1594 WMI_TAG_VENDOR_OUI,
1595 WMI_TAG_REQUEST_RCPI_CMD,
1596 WMI_TAG_UPDATE_RCPI_EVENT,
1597 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1598 WMI_TAG_PEER_STATS_INFO,
1599 WMI_TAG_PEER_STATS_INFO_EVENT,
1600 WMI_TAG_PKGID_EVENT,
1601 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1602 WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1603 WMI_TAG_REGULATORY_RULE_STRUCT,
1604 WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1605 WMI_TAG_11D_SCAN_START_CMD,
1606 WMI_TAG_11D_SCAN_STOP_CMD,
1607 WMI_TAG_11D_NEW_COUNTRY_EVENT,
1608 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1609 WMI_TAG_RADIO_CHAN_STATS,
1610 WMI_TAG_RADIO_CHAN_STATS_EVENT,
1611 WMI_TAG_ROAM_PER_CONFIG,
1612 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1613 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1614 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1615 WMI_TAG_HW_DATA_FILTER_CMD,
1616 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1617 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1618 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1619 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1620 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1621 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1622 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1623 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1624 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1625 WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1626 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1627 WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1628 WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1629 WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1630 WMI_TAG_IFACE_OFFLOAD_STATS,
1631 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1632 WMI_TAG_RSSI_CTL_EXT,
1633 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1634 WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1635 WMI_TAG_VDEV_GET_TX_POWER_CMD,
1636 WMI_TAG_VDEV_TX_POWER_EVENT,
1637 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1638 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1639 WMI_TAG_TX_SEND_PARAMS,
1640 WMI_TAG_HE_RATE_SET,
1641 WMI_TAG_CONGESTION_STATS,
1642 WMI_TAG_SET_INIT_COUNTRY_CMD,
1643 WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1644 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1645 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1646 WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1647 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1648 WMI_TAG_THERM_THROT_STATS_EVENT,
1649 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1650 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1651 WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1652 WMI_TAG_OEM_DMA_RING_CFG_REQ,
1653 WMI_TAG_OEM_DMA_RING_CFG_RSP,
1654 WMI_TAG_OEM_INDIRECT_DATA,
1655 WMI_TAG_OEM_DMA_BUF_RELEASE,
1656 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1657 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1658 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1659 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1660 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1661 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1662 WMI_TAG_UNIT_TEST_EVENT,
1663 WMI_TAG_ROAM_FILS_OFFLOAD,
1664 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1665 WMI_TAG_PMK_CACHE,
1666 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1667 WMI_TAG_ROAM_FILS_SYNCH,
1668 WMI_TAG_GTK_OFFLOAD_EXTENDED,
1669 WMI_TAG_ROAM_BG_SCAN_ROAMING,
1670 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1671 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1672 WMI_TAG_OIC_PING_HANDOFF_EVENT,
1673 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1674 WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1675 WMI_TAG_BTM_CONFIG,
1676 WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1677 WMI_TAG_WLM_CONFIG_CMD,
1678 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1679 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1680 WMI_TAG_ROAM_CND_SCORING_PARAM,
1681 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1682 WMI_TAG_VENDOR_OUI_EXT,
1683 WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1684 WMI_TAG_FD_SEND_FROM_HOST_CMD,
1685 WMI_TAG_ENABLE_FILS_CMD,
1686 WMI_TAG_HOST_SWFDA_EVENT,
1687 WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1688 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1689 WMI_TAG_STATS_PERIOD,
1690 WMI_TAG_NDL_SCHEDULE_UPDATE,
1691 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1692 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1693 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1694 WMI_TAG_SAR2_RESULT_EVENT,
1695 WMI_TAG_SAR_CAPABILITIES,
1696 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1697 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1698 WMI_TAG_DMA_RING_CAPABILITIES,
1699 WMI_TAG_DMA_RING_CFG_REQ,
1700 WMI_TAG_DMA_RING_CFG_RSP,
1701 WMI_TAG_DMA_BUF_RELEASE,
1702 WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1703 WMI_TAG_SAR_GET_LIMITS_CMD,
1704 WMI_TAG_SAR_GET_LIMITS_EVENT,
1705 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1706 WMI_TAG_OFFLOAD_11K_REPORT,
1707 WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1708 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1709 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1710 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1711 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1712 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1713 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1714 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1715 WMI_TAG_PDEV_GET_NFCAL_POWER,
1716 WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1717 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1718 WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1719 WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1720 WMI_TAG_TWT_ENABLE_CMD,
1721 WMI_TAG_TWT_DISABLE_CMD,
1722 WMI_TAG_TWT_ADD_DIALOG_CMD,
1723 WMI_TAG_TWT_DEL_DIALOG_CMD,
1724 WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1725 WMI_TAG_TWT_RESUME_DIALOG_CMD,
1726 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1727 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1728 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1729 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1730 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1731 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1732 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1733 WMI_TAG_ROAM_SCAN_STATS_EVENT,
1734 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1735 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1736 WMI_TAG_GET_TPC_POWER_CMD,
1737 WMI_TAG_GET_TPC_POWER_EVENT,
1738 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1739 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1740 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1741 WMI_TAG_MOTION_DET_START_STOP_CMD,
1742 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1743 WMI_TAG_MOTION_DET_EVENT,
1744 WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1745 WMI_TAG_NDP_TRANSPORT_IP,
1746 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1747 WMI_TAG_ESP_ESTIMATE_EVENT,
1748 WMI_TAG_NAN_HOST_CONFIG,
1749 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1750 WMI_TAG_PEER_CFR_CAPTURE_CMD,
1751 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1752 WMI_TAG_CHAN_WIDTH_PEER_LIST,
1753 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1754 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1755 WMI_TAG_PEER_EXTD2_STATS,
1756 WMI_TAG_HPCS_PULSE_START_CMD,
1757 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1758 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1759 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1760 WMI_TAG_NAN_EVENT_INFO,
1761 WMI_TAG_NDP_CHANNEL_INFO,
1762 WMI_TAG_NDP_CMD,
1763 WMI_TAG_NDP_EVENT,
1764 /* TODO add all the missing cmds */
1765 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1766 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1767 WMI_TAG_MAX
1768};
1769
1770enum wmi_tlv_service {
1771 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1772 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1773 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1774 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1775 WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1776 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1777 WMI_TLV_SERVICE_AP_UAPSD = 6,
1778 WMI_TLV_SERVICE_AP_DFS = 7,
1779 WMI_TLV_SERVICE_11AC = 8,
1780 WMI_TLV_SERVICE_BLOCKACK = 9,
1781 WMI_TLV_SERVICE_PHYERR = 10,
1782 WMI_TLV_SERVICE_BCN_FILTER = 11,
1783 WMI_TLV_SERVICE_RTT = 12,
1784 WMI_TLV_SERVICE_WOW = 13,
1785 WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1786 WMI_TLV_SERVICE_IRAM_TIDS = 15,
1787 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1788 WMI_TLV_SERVICE_NLO = 17,
1789 WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1790 WMI_TLV_SERVICE_SCAN_SCH = 19,
1791 WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1792 WMI_TLV_SERVICE_CHATTER = 21,
1793 WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1794 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1795 WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1796 WMI_TLV_SERVICE_GPIO = 25,
1797 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1798 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1799 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1800 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1801 WMI_TLV_SERVICE_TX_ENCAP = 30,
1802 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1803 WMI_TLV_SERVICE_EARLY_RX = 32,
1804 WMI_TLV_SERVICE_STA_SMPS = 33,
1805 WMI_TLV_SERVICE_FWTEST = 34,
1806 WMI_TLV_SERVICE_STA_WMMAC = 35,
1807 WMI_TLV_SERVICE_TDLS = 36,
1808 WMI_TLV_SERVICE_BURST = 37,
1809 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1810 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1811 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1812 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1813 WMI_TLV_SERVICE_WLAN_HB = 42,
1814 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1815 WMI_TLV_SERVICE_BATCH_SCAN = 44,
1816 WMI_TLV_SERVICE_QPOWER = 45,
1817 WMI_TLV_SERVICE_PLMREQ = 46,
1818 WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1819 WMI_TLV_SERVICE_RMC = 48,
1820 WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1821 WMI_TLV_SERVICE_COEX_SAR = 50,
1822 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1823 WMI_TLV_SERVICE_NAN = 52,
1824 WMI_TLV_SERVICE_L1SS_STAT = 53,
1825 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1826 WMI_TLV_SERVICE_OBSS_SCAN = 55,
1827 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1828 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1829 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1830 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1831 WMI_TLV_SERVICE_LPASS = 60,
1832 WMI_TLV_SERVICE_EXTSCAN = 61,
1833 WMI_TLV_SERVICE_D0WOW = 62,
1834 WMI_TLV_SERVICE_HSOFFLOAD = 63,
1835 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
1836 WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
1837 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
1838 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
1839 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
1840 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
1841 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
1842 WMI_TLV_SERVICE_OCB = 71,
1843 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
1844 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
1845 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
1846 WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
1847 WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
1848 WMI_TLV_SERVICE_EXT_MSG = 77,
1849 WMI_TLV_SERVICE_MAWC = 78,
1850 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
1851 WMI_TLV_SERVICE_EGAP = 80,
1852 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
1853 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
1854 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
1855 WMI_TLV_SERVICE_ATF = 84,
1856 WMI_TLV_SERVICE_COEX_GPIO = 85,
1857 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
1858 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
1859 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
1860 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
1861 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
1862 WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
1863 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
1864 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
1865 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
1866 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
1867 WMI_TLV_SERVICE_NAN_DATA = 96,
1868 WMI_TLV_SERVICE_NAN_RTT = 97,
1869 WMI_TLV_SERVICE_11AX = 98,
1870 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
1871 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
1872 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
1873 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
1874 WMI_TLV_SERVICE_MESH_11S = 103,
1875 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
1876 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
1877 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
1878 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
1879 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
1880 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
1881 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
1882 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
1883 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
1884 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
1885 WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
1886 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
1887 WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
1888 WMI_TLV_SERVICE_REGULATORY_DB = 117,
1889 WMI_TLV_SERVICE_11D_OFFLOAD = 118,
1890 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
1891 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
1892 WMI_TLV_SERVICE_PKT_ROUTING = 121,
1893 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
1894 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
1895 WMI_TLV_SERVICE_8SS_TX_BFEE = 124,
1896 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
1897 WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
1898 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
1899
1900 WMI_MAX_SERVICE = 128,
1901
1902 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
1903 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
1904 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
1905 WMI_TLV_SERVICE_FILS_SUPPORT = 131,
1906 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
1907 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
1908 WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
1909 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
1910 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
1911 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
1912 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
1913 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
1914 WMI_TLV_SERVICE_THERM_THROT = 140,
1915 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
1916 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
1917 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
1918 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
1919 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
1920 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
1921 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
1922 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
1923 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
1924 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
1925 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
1926 WMI_TLV_SERVICE_STA_TWT = 152,
1927 WMI_TLV_SERVICE_AP_TWT = 153,
1928 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
1929 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
1930 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
1931 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
1932 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
1933 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
1934 WMI_TLV_SERVICE_MOTION_DET = 160,
1935 WMI_TLV_SERVICE_INFRA_MBSSID = 161,
1936 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
1937 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
1938 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
1939 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
1940 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
1941 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
1942 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
1943 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
1944 WMI_TLV_SERVICE_ESP_SUPPORT = 170,
1945 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
1946 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
1947 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
1948 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
1949 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
1950 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
1951
1952 WMI_MAX_EXT_SERVICE
1953
1954};
1955
1956enum {
1957 WMI_SMPS_FORCED_MODE_NONE = 0,
1958 WMI_SMPS_FORCED_MODE_DISABLED,
1959 WMI_SMPS_FORCED_MODE_STATIC,
1960 WMI_SMPS_FORCED_MODE_DYNAMIC
1961};
1962
1963#define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0
1964#define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1
1965#define WMI_NUM_SUPPORTED_BAND_MAX 2
1966
1967#define WMI_PEER_MIMO_PS_STATE 0x1
1968#define WMI_PEER_AMPDU 0x2
1969#define WMI_PEER_AUTHORIZE 0x3
1970#define WMI_PEER_CHWIDTH 0x4
1971#define WMI_PEER_NSS 0x5
1972#define WMI_PEER_USE_4ADDR 0x6
1973#define WMI_PEER_MEMBERSHIP 0x7
1974#define WMI_PEER_USERPOS 0x8
1975#define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9
1976#define WMI_PEER_TX_FAIL_CNT_THR 0xA
1977#define WMI_PEER_SET_HW_RETRY_CTS2S 0xB
1978#define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC
1979#define WMI_PEER_PHYMODE 0xD
1980#define WMI_PEER_USE_FIXED_PWR 0xE
1981#define WMI_PEER_PARAM_FIXED_RATE 0xF
1982#define WMI_PEER_SET_MU_WHITELIST 0x10
1983#define WMI_PEER_SET_MAX_TX_RATE 0x11
1984#define WMI_PEER_SET_MIN_TX_RATE 0x12
1985#define WMI_PEER_SET_DEFAULT_ROUTING 0x13
1986
1987/* slot time long */
1988#define WMI_VDEV_SLOT_TIME_LONG 0x1
1989/* slot time short */
1990#define WMI_VDEV_SLOT_TIME_SHORT 0x2
1991/* preablbe long */
1992#define WMI_VDEV_PREAMBLE_LONG 0x1
1993/* preablbe short */
1994#define WMI_VDEV_PREAMBLE_SHORT 0x2
1995
1996enum wmi_peer_smps_state {
1997 WMI_PEER_SMPS_PS_NONE = 0x0,
1998 WMI_PEER_SMPS_STATIC = 0x1,
1999 WMI_PEER_SMPS_DYNAMIC = 0x2
2000};
2001
2002enum wmi_peer_chwidth {
2003 WMI_PEER_CHWIDTH_20MHZ = 0,
2004 WMI_PEER_CHWIDTH_40MHZ = 1,
2005 WMI_PEER_CHWIDTH_80MHZ = 2,
2006 WMI_PEER_CHWIDTH_160MHZ = 3,
2007};
2008
2009enum wmi_beacon_gen_mode {
2010 WMI_BEACON_STAGGERED_MODE = 0,
2011 WMI_BEACON_BURST_MODE = 1
2012};
2013
2014struct wmi_host_pdev_band_to_mac {
2015 u32 pdev_id;
2016 u32 start_freq;
2017 u32 end_freq;
2018};
2019
2020struct ath11k_ppe_threshold {
2021 u32 numss_m1;
2022 u32 ru_bit_mask;
2023 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2024};
2025
2026struct ath11k_service_ext_param {
2027 u32 default_conc_scan_config_bits;
2028 u32 default_fw_config_bits;
2029 struct ath11k_ppe_threshold ppet;
2030 u32 he_cap_info;
2031 u32 mpdu_density;
2032 u32 max_bssid_rx_filters;
2033 u32 num_hw_modes;
2034 u32 num_phy;
2035};
2036
2037struct ath11k_hw_mode_caps {
2038 u32 hw_mode_id;
2039 u32 phy_id_map;
2040 u32 hw_mode_config_type;
2041};
2042
2043#define PSOC_HOST_MAX_PHY_SIZE (3)
2044#define ATH11K_11B_SUPPORT BIT(0)
2045#define ATH11K_11G_SUPPORT BIT(1)
2046#define ATH11K_11A_SUPPORT BIT(2)
2047#define ATH11K_11N_SUPPORT BIT(3)
2048#define ATH11K_11AC_SUPPORT BIT(4)
2049#define ATH11K_11AX_SUPPORT BIT(5)
2050
2051struct ath11k_hal_reg_capabilities_ext {
2052 u32 phy_id;
2053 u32 eeprom_reg_domain;
2054 u32 eeprom_reg_domain_ext;
2055 u32 regcap1;
2056 u32 regcap2;
2057 u32 wireless_modes;
2058 u32 low_2ghz_chan;
2059 u32 high_2ghz_chan;
2060 u32 low_5ghz_chan;
2061 u32 high_5ghz_chan;
2062};
2063
2064#define WMI_HOST_MAX_PDEV 3
2065
2066struct wlan_host_mem_chunk {
2067 u32 tlv_header;
2068 u32 req_id;
2069 u32 ptr;
2070 u32 size;
2071} __packed;
2072
2073struct wmi_host_mem_chunk {
2074 void *vaddr;
2075 dma_addr_t paddr;
2076 u32 len;
2077 u32 req_id;
2078};
2079
2080struct wmi_init_cmd_param {
2081 u32 tlv_header;
2082 struct target_resource_config *res_cfg;
2083 u8 num_mem_chunks;
2084 struct wmi_host_mem_chunk *mem_chunks;
2085 u32 hw_mode_id;
2086 u32 num_band_to_mac;
2087 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
2088};
2089
2090struct wmi_pdev_band_to_mac {
2091 u32 tlv_header;
2092 u32 pdev_id;
2093 u32 start_freq;
2094 u32 end_freq;
2095} __packed;
2096
2097struct wmi_pdev_set_hw_mode_cmd_param {
2098 u32 tlv_header;
2099 u32 pdev_id;
2100 u32 hw_mode_index;
2101 u32 num_band_to_mac;
2102} __packed;
2103
2104struct wmi_ppe_threshold {
2105 u32 numss_m1; /** NSS - 1*/
2106 union {
2107 u32 ru_count;
2108 u32 ru_mask;
2109 } __packed;
2110 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2111} __packed;
2112
2113#define HW_BD_INFO_SIZE 5
2114
2115struct wmi_abi_version {
2116 u32 abi_version_0;
2117 u32 abi_version_1;
2118 u32 abi_version_ns_0;
2119 u32 abi_version_ns_1;
2120 u32 abi_version_ns_2;
2121 u32 abi_version_ns_3;
2122} __packed;
2123
2124struct wmi_init_cmd {
2125 u32 tlv_header;
2126 struct wmi_abi_version host_abi_vers;
2127 u32 num_host_mem_chunks;
2128} __packed;
2129
2130struct wmi_resource_config {
2131 u32 tlv_header;
2132 u32 num_vdevs;
2133 u32 num_peers;
2134 u32 num_offload_peers;
2135 u32 num_offload_reorder_buffs;
2136 u32 num_peer_keys;
2137 u32 num_tids;
2138 u32 ast_skid_limit;
2139 u32 tx_chain_mask;
2140 u32 rx_chain_mask;
2141 u32 rx_timeout_pri[4];
2142 u32 rx_decap_mode;
2143 u32 scan_max_pending_req;
2144 u32 bmiss_offload_max_vdev;
2145 u32 roam_offload_max_vdev;
2146 u32 roam_offload_max_ap_profiles;
2147 u32 num_mcast_groups;
2148 u32 num_mcast_table_elems;
2149 u32 mcast2ucast_mode;
2150 u32 tx_dbg_log_size;
2151 u32 num_wds_entries;
2152 u32 dma_burst_size;
2153 u32 mac_aggr_delim;
2154 u32 rx_skip_defrag_timeout_dup_detection_check;
2155 u32 vow_config;
2156 u32 gtk_offload_max_vdev;
2157 u32 num_msdu_desc;
2158 u32 max_frag_entries;
2159 u32 num_tdls_vdevs;
2160 u32 num_tdls_conn_table_entries;
2161 u32 beacon_tx_offload_max_vdev;
2162 u32 num_multicast_filter_entries;
2163 u32 num_wow_filters;
2164 u32 num_keep_alive_pattern;
2165 u32 keep_alive_pattern_size;
2166 u32 max_tdls_concurrent_sleep_sta;
2167 u32 max_tdls_concurrent_buffer_sta;
2168 u32 wmi_send_separate;
2169 u32 num_ocb_vdevs;
2170 u32 num_ocb_channels;
2171 u32 num_ocb_schedules;
2172 u32 flag1;
2173 u32 smart_ant_cap;
2174 u32 bk_minfree;
2175 u32 be_minfree;
2176 u32 vi_minfree;
2177 u32 vo_minfree;
2178 u32 alloc_frag_desc_for_data_pkt;
2179 u32 num_ns_ext_tuples_cfg;
2180 u32 bpf_instruction_size;
2181 u32 max_bssid_rx_filters;
2182 u32 use_pdev_id;
2183 u32 max_num_dbs_scan_duty_cycle;
2184 u32 max_num_group_keys;
2185 u32 peer_map_unmap_v2_support;
2186} __packed;
2187
2188struct wmi_service_ready_event {
2189 u32 fw_build_vers;
2190 struct wmi_abi_version fw_abi_vers;
2191 u32 phy_capability;
2192 u32 max_frag_entry;
2193 u32 num_rf_chains;
2194 u32 ht_cap_info;
2195 u32 vht_cap_info;
2196 u32 vht_supp_mcs;
2197 u32 hw_min_tx_power;
2198 u32 hw_max_tx_power;
2199 u32 sys_cap_info;
2200 u32 min_pkt_size_enable;
2201 u32 max_bcn_ie_size;
2202 u32 num_mem_reqs;
2203 u32 max_num_scan_channels;
2204 u32 hw_bd_id;
2205 u32 hw_bd_info[HW_BD_INFO_SIZE];
2206 u32 max_supported_macs;
2207 u32 wmi_fw_sub_feat_caps;
2208 u32 num_dbs_hw_modes;
2209 /* txrx_chainmask
2210 * [7:0] - 2G band tx chain mask
2211 * [15:8] - 2G band rx chain mask
2212 * [23:16] - 5G band tx chain mask
2213 * [31:24] - 5G band rx chain mask
2214 */
2215 u32 txrx_chainmask;
2216 u32 default_dbs_hw_mode_index;
2217 u32 num_msdu_desc;
2218} __packed;
2219
2220#define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2221
2222#define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2223#define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2224#define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2225#define WMI_SERVICE_BITS_IN_SIZE32 4
2226
2227struct wmi_service_ready_ext_event {
2228 u32 default_conc_scan_config_bits;
2229 u32 default_fw_config_bits;
2230 struct wmi_ppe_threshold ppet;
2231 u32 he_cap_info;
2232 u32 mpdu_density;
2233 u32 max_bssid_rx_filters;
2234 u32 fw_build_vers_ext;
2235 u32 max_nlo_ssids;
2236 u32 max_bssid_indicator;
2237 u32 he_cap_info_ext;
2238} __packed;
2239
2240struct wmi_soc_mac_phy_hw_mode_caps {
2241 u32 num_hw_modes;
2242 u32 num_chainmask_tables;
2243} __packed;
2244
2245struct wmi_hw_mode_capabilities {
2246 u32 tlv_header;
2247 u32 hw_mode_id;
2248 u32 phy_id_map;
2249 u32 hw_mode_config_type;
2250} __packed;
2251
2252#define WMI_MAX_HECAP_PHY_SIZE (3)
2253
2254struct wmi_mac_phy_capabilities {
2255 u32 tlv_header;
2256 u32 hw_mode_id;
2257 u32 pdev_id;
2258 u32 phy_id;
2259 u32 supported_flags;
2260 u32 supported_bands;
2261 u32 ampdu_density;
2262 u32 max_bw_supported_2g;
2263 u32 ht_cap_info_2g;
2264 u32 vht_cap_info_2g;
2265 u32 vht_supp_mcs_2g;
2266 u32 he_cap_info_2g;
2267 u32 he_supp_mcs_2g;
2268 u32 tx_chain_mask_2g;
2269 u32 rx_chain_mask_2g;
2270 u32 max_bw_supported_5g;
2271 u32 ht_cap_info_5g;
2272 u32 vht_cap_info_5g;
2273 u32 vht_supp_mcs_5g;
2274 u32 he_cap_info_5g;
2275 u32 he_supp_mcs_5g;
2276 u32 tx_chain_mask_5g;
2277 u32 rx_chain_mask_5g;
2278 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2279 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2280 struct wmi_ppe_threshold he_ppet2g;
2281 struct wmi_ppe_threshold he_ppet5g;
2282 u32 chainmask_table_id;
2283 u32 lmac_id;
2284 u32 he_cap_info_2g_ext;
2285 u32 he_cap_info_5g_ext;
2286 u32 he_cap_info_internal;
2287} __packed;
2288
2289struct wmi_hal_reg_capabilities_ext {
2290 u32 tlv_header;
2291 u32 phy_id;
2292 u32 eeprom_reg_domain;
2293 u32 eeprom_reg_domain_ext;
2294 u32 regcap1;
2295 u32 regcap2;
2296 u32 wireless_modes;
2297 u32 low_2ghz_chan;
2298 u32 high_2ghz_chan;
2299 u32 low_5ghz_chan;
2300 u32 high_5ghz_chan;
2301} __packed;
2302
2303struct wmi_soc_hal_reg_capabilities {
2304 u32 num_phy;
2305} __packed;
2306
2307/* 2 word representation of MAC addr */
2308struct wmi_mac_addr {
2309 union {
2310 u8 addr[6];
2311 struct {
2312 u32 word0;
2313 u32 word1;
2314 } __packed;
2315 } __packed;
2316} __packed;
2317
2318struct wmi_ready_event {
2319 struct wmi_abi_version fw_abi_vers;
2320 struct wmi_mac_addr mac_addr;
2321 u32 status;
2322 u32 num_dscp_table;
2323 u32 num_extra_mac_addr;
2324 u32 num_total_peers;
2325 u32 num_extra_peers;
2326} __packed;
2327
2328struct wmi_service_available_event {
2329 u32 wmi_service_segment_offset;
2330 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2331} __packed;
2332
2333struct ath11k_pdev_wmi {
2334 struct ath11k_wmi_base *wmi_sc;
2335 enum ath11k_htc_ep_id eid;
2336 const struct wmi_peer_flags_map *peer_flags;
2337 u32 rx_decap_mode;
2338};
2339
2340struct vdev_create_params {
2341 u8 if_id;
2342 u32 type;
2343 u32 subtype;
2344 struct {
2345 u8 tx;
2346 u8 rx;
2347 } chains[NUM_NL80211_BANDS];
2348 u32 pdev_id;
2349};
2350
2351struct wmi_vdev_create_cmd {
2352 u32 tlv_header;
2353 u32 vdev_id;
2354 u32 vdev_type;
2355 u32 vdev_subtype;
2356 struct wmi_mac_addr vdev_macaddr;
2357 u32 num_cfg_txrx_streams;
2358 u32 pdev_id;
2359} __packed;
2360
2361struct wmi_vdev_txrx_streams {
2362 u32 tlv_header;
2363 u32 band;
2364 u32 supported_tx_streams;
2365 u32 supported_rx_streams;
2366} __packed;
2367
2368struct wmi_vdev_delete_cmd {
2369 u32 tlv_header;
2370 u32 vdev_id;
2371} __packed;
2372
2373struct wmi_vdev_up_cmd {
2374 u32 tlv_header;
2375 u32 vdev_id;
2376 u32 vdev_assoc_id;
2377 struct wmi_mac_addr vdev_bssid;
2378 struct wmi_mac_addr trans_bssid;
2379 u32 profile_idx;
2380 u32 profile_num;
2381} __packed;
2382
2383struct wmi_vdev_stop_cmd {
2384 u32 tlv_header;
2385 u32 vdev_id;
2386} __packed;
2387
2388struct wmi_vdev_down_cmd {
2389 u32 tlv_header;
2390 u32 vdev_id;
2391} __packed;
2392
2393#define WMI_VDEV_START_HIDDEN_SSID BIT(0)
2394#define WMI_VDEV_START_PMF_ENABLED BIT(1)
2395#define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2396
2397struct wmi_ssid {
2398 u32 ssid_len;
2399 u32 ssid[8];
2400} __packed;
2401
2402#define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
2403
2404struct wmi_vdev_start_request_cmd {
2405 u32 tlv_header;
2406 u32 vdev_id;
2407 u32 requestor_id;
2408 u32 beacon_interval;
2409 u32 dtim_period;
2410 u32 flags;
2411 struct wmi_ssid ssid;
2412 u32 bcn_tx_rate;
2413 u32 bcn_txpower;
2414 u32 num_noa_descriptors;
2415 u32 disable_hw_ack;
2416 u32 preferred_tx_streams;
2417 u32 preferred_rx_streams;
2418 u32 he_ops;
2419 u32 cac_duration_ms;
2420 u32 regdomain;
2421} __packed;
2422
2423#define MGMT_TX_DL_FRM_LEN 64
2424#define WMI_MAC_MAX_SSID_LENGTH 32
2425struct mac_ssid {
2426 u8 length;
2427 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
2428} __packed;
2429
2430struct wmi_p2p_noa_descriptor {
2431 u32 type_count;
2432 u32 duration;
2433 u32 interval;
2434 u32 start_time;
2435};
2436
2437struct channel_param {
2438 u8 chan_id;
2439 u8 pwr;
2440 u32 mhz;
2441 u32 half_rate:1,
2442 quarter_rate:1,
2443 dfs_set:1,
2444 dfs_set_cfreq2:1,
2445 is_chan_passive:1,
2446 allow_ht:1,
2447 allow_vht:1,
John Crispin9f056ed2019-11-25 16:36:27 +00002448 allow_he:1,
Kalle Valod5c65152019-11-23 09:58:40 +02002449 set_agile:1;
2450 u32 phy_mode;
2451 u32 cfreq1;
2452 u32 cfreq2;
2453 char maxpower;
2454 char minpower;
2455 char maxregpower;
2456 u8 antennamax;
2457 u8 reg_class_id;
2458} __packed;
2459
2460enum wmi_phy_mode {
2461 MODE_11A = 0,
2462 MODE_11G = 1, /* 11b/g Mode */
2463 MODE_11B = 2, /* 11b Mode */
2464 MODE_11GONLY = 3, /* 11g only Mode */
2465 MODE_11NA_HT20 = 4,
2466 MODE_11NG_HT20 = 5,
2467 MODE_11NA_HT40 = 6,
2468 MODE_11NG_HT40 = 7,
2469 MODE_11AC_VHT20 = 8,
2470 MODE_11AC_VHT40 = 9,
2471 MODE_11AC_VHT80 = 10,
2472 MODE_11AC_VHT20_2G = 11,
2473 MODE_11AC_VHT40_2G = 12,
2474 MODE_11AC_VHT80_2G = 13,
2475 MODE_11AC_VHT80_80 = 14,
2476 MODE_11AC_VHT160 = 15,
2477 MODE_11AX_HE20 = 16,
2478 MODE_11AX_HE40 = 17,
2479 MODE_11AX_HE80 = 18,
2480 MODE_11AX_HE80_80 = 19,
2481 MODE_11AX_HE160 = 20,
2482 MODE_11AX_HE20_2G = 21,
2483 MODE_11AX_HE40_2G = 22,
2484 MODE_11AX_HE80_2G = 23,
2485 MODE_UNKNOWN = 24,
2486 MODE_MAX = 24
2487};
2488
2489static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
2490{
2491 switch (mode) {
2492 case MODE_11A:
2493 return "11a";
2494 case MODE_11G:
2495 return "11g";
2496 case MODE_11B:
2497 return "11b";
2498 case MODE_11GONLY:
2499 return "11gonly";
2500 case MODE_11NA_HT20:
2501 return "11na-ht20";
2502 case MODE_11NG_HT20:
2503 return "11ng-ht20";
2504 case MODE_11NA_HT40:
2505 return "11na-ht40";
2506 case MODE_11NG_HT40:
2507 return "11ng-ht40";
2508 case MODE_11AC_VHT20:
2509 return "11ac-vht20";
2510 case MODE_11AC_VHT40:
2511 return "11ac-vht40";
2512 case MODE_11AC_VHT80:
2513 return "11ac-vht80";
2514 case MODE_11AC_VHT160:
2515 return "11ac-vht160";
2516 case MODE_11AC_VHT80_80:
2517 return "11ac-vht80+80";
2518 case MODE_11AC_VHT20_2G:
2519 return "11ac-vht20-2g";
2520 case MODE_11AC_VHT40_2G:
2521 return "11ac-vht40-2g";
2522 case MODE_11AC_VHT80_2G:
2523 return "11ac-vht80-2g";
2524 case MODE_11AX_HE20:
2525 return "11ax-he20";
2526 case MODE_11AX_HE40:
2527 return "11ax-he40";
2528 case MODE_11AX_HE80:
2529 return "11ax-he80";
2530 case MODE_11AX_HE80_80:
2531 return "11ax-he80+80";
2532 case MODE_11AX_HE160:
2533 return "11ax-he160";
2534 case MODE_11AX_HE20_2G:
2535 return "11ax-he20-2g";
2536 case MODE_11AX_HE40_2G:
2537 return "11ax-he40-2g";
2538 case MODE_11AX_HE80_2G:
2539 return "11ax-he80-2g";
2540 case MODE_UNKNOWN:
2541 /* skip */
2542 break;
2543
2544 /* no default handler to allow compiler to check that the
2545 * enum is fully handled
2546 */
2547 };
2548
2549 return "<unknown>";
2550}
2551
2552struct wmi_channel_arg {
2553 u32 freq;
2554 u32 band_center_freq1;
2555 u32 band_center_freq2;
2556 bool passive;
2557 bool allow_ibss;
2558 bool allow_ht;
2559 bool allow_vht;
2560 bool ht40plus;
2561 bool chan_radar;
2562 bool freq2_radar;
2563 bool allow_he;
2564 u32 min_power;
2565 u32 max_power;
2566 u32 max_reg_power;
2567 u32 max_antenna_gain;
2568 enum wmi_phy_mode mode;
2569};
2570
2571struct wmi_vdev_start_req_arg {
2572 u32 vdev_id;
2573 struct wmi_channel_arg channel;
2574 u32 bcn_intval;
2575 u32 dtim_period;
2576 u8 *ssid;
2577 u32 ssid_len;
2578 u32 bcn_tx_rate;
2579 u32 bcn_tx_power;
2580 bool disable_hw_ack;
2581 bool hidden_ssid;
2582 bool pmf_enabled;
2583 u32 he_ops;
2584 u32 cac_duration_ms;
2585 u32 regdomain;
2586 u32 pref_rx_streams;
2587 u32 pref_tx_streams;
2588 u32 num_noa_descriptors;
2589};
2590
2591struct peer_create_params {
2592 const u8 *peer_addr;
2593 u32 peer_type;
2594 u32 vdev_id;
2595};
2596
2597struct peer_delete_params {
2598 u8 vdev_id;
2599};
2600
2601struct peer_flush_params {
2602 u32 peer_tid_bitmap;
2603 u8 vdev_id;
2604};
2605
2606struct pdev_set_regdomain_params {
2607 u16 current_rd_in_use;
2608 u16 current_rd_2g;
2609 u16 current_rd_5g;
2610 u32 ctl_2g;
2611 u32 ctl_5g;
2612 u8 dfs_domain;
2613 u32 pdev_id;
2614};
2615
2616struct rx_reorder_queue_remove_params {
2617 u8 *peer_macaddr;
2618 u16 vdev_id;
2619 u32 peer_tid_bitmap;
2620};
2621
2622#define WMI_HOST_PDEV_ID_SOC 0xFF
2623#define WMI_HOST_PDEV_ID_0 0
2624#define WMI_HOST_PDEV_ID_1 1
2625#define WMI_HOST_PDEV_ID_2 2
2626
2627#define WMI_PDEV_ID_SOC 0
2628#define WMI_PDEV_ID_1ST 1
2629#define WMI_PDEV_ID_2ND 2
2630#define WMI_PDEV_ID_3RD 3
2631
2632/* Freq units in MHz */
2633#define REG_RULE_START_FREQ 0x0000ffff
2634#define REG_RULE_END_FREQ 0xffff0000
2635#define REG_RULE_FLAGS 0x0000ffff
2636#define REG_RULE_MAX_BW 0x0000ffff
2637#define REG_RULE_REG_PWR 0x00ff0000
2638#define REG_RULE_ANT_GAIN 0xff000000
2639
2640#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2641#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2642#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2643#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2644
2645#define HECAP_PHYDWORD_0 0
2646#define HECAP_PHYDWORD_1 1
2647#define HECAP_PHYDWORD_2 2
2648
2649#define HECAP_PHY_SU_BFER BIT(31)
2650#define HECAP_PHY_SU_BFEE BIT(0)
2651#define HECAP_PHY_MU_BFER BIT(1)
2652#define HECAP_PHY_UL_MUMIMO BIT(22)
2653#define HECAP_PHY_UL_MUOFDMA BIT(23)
2654
2655#define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2656 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
2657
2658#define HECAP_PHY_SUBFME_GET(hecap_phy) \
2659 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
2660
2661#define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2662 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
2663
2664#define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2665 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
2666
2667#define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2668 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
2669
2670#define HE_MODE_SU_TX_BFEE BIT(0)
2671#define HE_MODE_SU_TX_BFER BIT(1)
2672#define HE_MODE_MU_TX_BFEE BIT(2)
2673#define HE_MODE_MU_TX_BFER BIT(3)
2674#define HE_MODE_DL_OFDMA BIT(4)
2675#define HE_MODE_UL_OFDMA BIT(5)
2676#define HE_MODE_UL_MUMIMO BIT(6)
2677
2678#define HE_DL_MUOFDMA_ENABLE 1
2679#define HE_UL_MUOFDMA_ENABLE 1
2680#define HE_DL_MUMIMO_ENABLE 1
2681#define HE_MU_BFEE_ENABLE 1
2682#define HE_SU_BFEE_ENABLE 1
2683
2684#define HE_VHT_SOUNDING_MODE_ENABLE 1
2685#define HE_SU_MU_SOUNDING_MODE_ENABLE 1
2686#define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1
2687
2688/* HE or VHT Sounding */
2689#define HE_VHT_SOUNDING_MODE BIT(0)
2690/* SU or MU Sounding */
2691#define HE_SU_MU_SOUNDING_MODE BIT(2)
2692/* Trig or Non-Trig Sounding */
2693#define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3)
2694
2695#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
2696#define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
2697#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
2698#define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700
2699
2700struct pdev_params {
2701 u32 param_id;
2702 u32 param_value;
2703};
2704
2705enum wmi_peer_type {
2706 WMI_PEER_TYPE_DEFAULT = 0,
2707 WMI_PEER_TYPE_BSS = 1,
2708 WMI_PEER_TYPE_TDLS = 2,
2709};
2710
2711struct wmi_peer_create_cmd {
2712 u32 tlv_header;
2713 u32 vdev_id;
2714 struct wmi_mac_addr peer_macaddr;
2715 u32 peer_type;
2716} __packed;
2717
2718struct wmi_peer_delete_cmd {
2719 u32 tlv_header;
2720 u32 vdev_id;
2721 struct wmi_mac_addr peer_macaddr;
2722} __packed;
2723
2724struct wmi_peer_reorder_queue_setup_cmd {
2725 u32 tlv_header;
2726 u32 vdev_id;
2727 struct wmi_mac_addr peer_macaddr;
2728 u32 tid;
2729 u32 queue_ptr_lo;
2730 u32 queue_ptr_hi;
2731 u32 queue_no;
2732 u32 ba_window_size_valid;
2733 u32 ba_window_size;
2734} __packed;
2735
2736struct wmi_peer_reorder_queue_remove_cmd {
2737 u32 tlv_header;
2738 u32 vdev_id;
2739 struct wmi_mac_addr peer_macaddr;
2740 u32 tid_mask;
2741} __packed;
2742
2743struct gpio_config_params {
2744 u32 gpio_num;
2745 u32 input;
2746 u32 pull_type;
2747 u32 intr_mode;
2748};
2749
2750enum wmi_gpio_type {
2751 WMI_GPIO_PULL_NONE,
2752 WMI_GPIO_PULL_UP,
2753 WMI_GPIO_PULL_DOWN
2754};
2755
2756enum wmi_gpio_intr_type {
2757 WMI_GPIO_INTTYPE_DISABLE,
2758 WMI_GPIO_INTTYPE_RISING_EDGE,
2759 WMI_GPIO_INTTYPE_FALLING_EDGE,
2760 WMI_GPIO_INTTYPE_BOTH_EDGE,
2761 WMI_GPIO_INTTYPE_LEVEL_LOW,
2762 WMI_GPIO_INTTYPE_LEVEL_HIGH
2763};
2764
2765enum wmi_bss_chan_info_req_type {
2766 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
2767 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
2768};
2769
2770struct wmi_gpio_config_cmd_param {
2771 u32 tlv_header;
2772 u32 gpio_num;
2773 u32 input;
2774 u32 pull_type;
2775 u32 intr_mode;
2776};
2777
2778struct gpio_output_params {
2779 u32 gpio_num;
2780 u32 set;
2781};
2782
2783struct wmi_gpio_output_cmd_param {
2784 u32 tlv_header;
2785 u32 gpio_num;
2786 u32 set;
2787};
2788
2789struct set_fwtest_params {
2790 u32 arg;
2791 u32 value;
2792};
2793
2794struct wmi_fwtest_set_param_cmd_param {
2795 u32 tlv_header;
2796 u32 param_id;
2797 u32 param_value;
2798};
2799
2800struct wmi_pdev_set_param_cmd {
2801 u32 tlv_header;
2802 u32 pdev_id;
2803 u32 param_id;
2804 u32 param_value;
2805} __packed;
2806
2807struct wmi_pdev_suspend_cmd {
2808 u32 tlv_header;
2809 u32 pdev_id;
2810 u32 suspend_opt;
2811} __packed;
2812
2813struct wmi_pdev_resume_cmd {
2814 u32 tlv_header;
2815 u32 pdev_id;
2816} __packed;
2817
2818struct wmi_pdev_bss_chan_info_req_cmd {
2819 u32 tlv_header;
2820 /* ref wmi_bss_chan_info_req_type */
2821 u32 req_type;
2822} __packed;
2823
2824struct wmi_ap_ps_peer_cmd {
2825 u32 tlv_header;
2826 u32 vdev_id;
2827 struct wmi_mac_addr peer_macaddr;
2828 u32 param;
2829 u32 value;
2830} __packed;
2831
2832struct wmi_sta_powersave_param_cmd {
2833 u32 tlv_header;
2834 u32 vdev_id;
2835 u32 param;
2836 u32 value;
2837} __packed;
2838
2839struct wmi_pdev_set_regdomain_cmd {
2840 u32 tlv_header;
2841 u32 pdev_id;
2842 u32 reg_domain;
2843 u32 reg_domain_2g;
2844 u32 reg_domain_5g;
2845 u32 conformance_test_limit_2g;
2846 u32 conformance_test_limit_5g;
2847 u32 dfs_domain;
2848} __packed;
2849
2850struct wmi_peer_set_param_cmd {
2851 u32 tlv_header;
2852 u32 vdev_id;
2853 struct wmi_mac_addr peer_macaddr;
2854 u32 param_id;
2855 u32 param_value;
2856} __packed;
2857
2858struct wmi_peer_flush_tids_cmd {
2859 u32 tlv_header;
2860 u32 vdev_id;
2861 struct wmi_mac_addr peer_macaddr;
2862 u32 peer_tid_bitmap;
2863} __packed;
2864
2865struct wmi_dfs_phyerr_offload_cmd {
2866 u32 tlv_header;
2867 u32 pdev_id;
2868} __packed;
2869
2870struct wmi_bcn_offload_ctrl_cmd {
2871 u32 tlv_header;
2872 u32 vdev_id;
2873 u32 bcn_ctrl_op;
2874} __packed;
2875
2876enum scan_priority {
2877 SCAN_PRIORITY_VERY_LOW,
2878 SCAN_PRIORITY_LOW,
2879 SCAN_PRIORITY_MEDIUM,
2880 SCAN_PRIORITY_HIGH,
2881 SCAN_PRIORITY_VERY_HIGH,
2882 SCAN_PRIORITY_COUNT,
2883};
2884
2885enum scan_dwelltime_adaptive_mode {
2886 SCAN_DWELL_MODE_DEFAULT = 0,
2887 SCAN_DWELL_MODE_CONSERVATIVE = 1,
2888 SCAN_DWELL_MODE_MODERATE = 2,
2889 SCAN_DWELL_MODE_AGGRESSIVE = 3,
2890 SCAN_DWELL_MODE_STATIC = 4
2891};
2892
2893#define WLAN_SCAN_MAX_NUM_SSID 10
2894#define WLAN_SCAN_MAX_NUM_BSSID 10
2895#define WLAN_SCAN_MAX_NUM_CHANNELS 40
2896
2897#define WLAN_SSID_MAX_LEN 32
2898
2899struct element_info {
2900 u32 len;
2901 u8 *ptr;
2902};
2903
2904struct wlan_ssid {
2905 u8 length;
2906 u8 ssid[WLAN_SSID_MAX_LEN];
2907};
2908
2909#define WMI_IE_BITMAP_SIZE 8
2910
2911#define WMI_SCAN_MAX_NUM_SSID 0x0A
2912/* prefix used by scan requestor ids on the host */
2913#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
2914
2915/* prefix used by scan request ids generated on the host */
2916/* host cycles through the lower 12 bits to generate ids */
2917#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
2918
2919#define WLAN_SCAN_PARAMS_MAX_SSID 16
2920#define WLAN_SCAN_PARAMS_MAX_BSSID 4
2921#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
2922
2923/* Values lower than this may be refused by some firmware revisions with a scan
2924 * completion with a timedout reason.
2925 */
2926#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
2927
2928/* Scan priority numbers must be sequential, starting with 0 */
2929enum wmi_scan_priority {
2930 WMI_SCAN_PRIORITY_VERY_LOW = 0,
2931 WMI_SCAN_PRIORITY_LOW,
2932 WMI_SCAN_PRIORITY_MEDIUM,
2933 WMI_SCAN_PRIORITY_HIGH,
2934 WMI_SCAN_PRIORITY_VERY_HIGH,
2935 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
2936};
2937
2938enum wmi_scan_event_type {
2939 WMI_SCAN_EVENT_STARTED = BIT(0),
2940 WMI_SCAN_EVENT_COMPLETED = BIT(1),
2941 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
2942 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3),
2943 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
2944 /* possibly by high-prio scan */
2945 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
2946 WMI_SCAN_EVENT_START_FAILED = BIT(6),
2947 WMI_SCAN_EVENT_RESTARTED = BIT(7),
2948 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8),
2949 WMI_SCAN_EVENT_SUSPENDED = BIT(9),
2950 WMI_SCAN_EVENT_RESUMED = BIT(10),
2951 WMI_SCAN_EVENT_MAX = BIT(15),
2952};
2953
2954enum wmi_scan_completion_reason {
2955 WMI_SCAN_REASON_COMPLETED,
2956 WMI_SCAN_REASON_CANCELLED,
2957 WMI_SCAN_REASON_PREEMPTED,
2958 WMI_SCAN_REASON_TIMEDOUT,
2959 WMI_SCAN_REASON_INTERNAL_FAILURE,
2960 WMI_SCAN_REASON_MAX,
2961};
2962
2963struct wmi_start_scan_cmd {
2964 u32 tlv_header;
2965 u32 scan_id;
2966 u32 scan_req_id;
2967 u32 vdev_id;
2968 u32 scan_priority;
2969 u32 notify_scan_events;
2970 u32 dwell_time_active;
2971 u32 dwell_time_passive;
2972 u32 min_rest_time;
2973 u32 max_rest_time;
2974 u32 repeat_probe_time;
2975 u32 probe_spacing_time;
2976 u32 idle_time;
2977 u32 max_scan_time;
2978 u32 probe_delay;
2979 u32 scan_ctrl_flags;
2980 u32 burst_duration;
2981 u32 num_chan;
2982 u32 num_bssid;
2983 u32 num_ssids;
2984 u32 ie_len;
2985 u32 n_probes;
2986 struct wmi_mac_addr mac_addr;
2987 struct wmi_mac_addr mac_mask;
2988 u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
2989 u32 num_vendor_oui;
2990 u32 scan_ctrl_flags_ext;
2991 u32 dwell_time_active_2g;
2992} __packed;
2993
2994#define WMI_SCAN_FLAG_PASSIVE 0x1
2995#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
2996#define WMI_SCAN_ADD_CCK_RATES 0x4
2997#define WMI_SCAN_ADD_OFDM_RATES 0x8
2998#define WMI_SCAN_CHAN_STAT_EVENT 0x10
2999#define WMI_SCAN_FILTER_PROBE_REQ 0x20
3000#define WMI_SCAN_BYPASS_DFS_CHN 0x40
3001#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3002#define WMI_SCAN_FILTER_PROMISCUOS 0x100
3003#define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3004#define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400
3005#define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800
3006#define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000
3007#define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000
3008#define WMI_SCAN_OFFCHAN_DATA_TX 0x4000
3009#define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000
3010#define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3011#define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000
3012#define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000
3013#define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3014#define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3015
3016#define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
3017#define WMI_SCAN_DWELL_MODE_SHIFT 21
3018
3019enum {
3020 WMI_SCAN_DWELL_MODE_DEFAULT = 0,
3021 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3022 WMI_SCAN_DWELL_MODE_MODERATE = 2,
3023 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3,
3024 WMI_SCAN_DWELL_MODE_STATIC = 4,
3025};
3026
3027#define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
3028 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
3029 WMI_SCAN_DWELL_MODE_MASK))
3030
3031struct scan_req_params {
3032 u32 scan_id;
3033 u32 scan_req_id;
3034 u32 vdev_id;
3035 u32 pdev_id;
3036 enum scan_priority scan_priority;
3037 union {
3038 struct {
3039 u32 scan_ev_started:1,
3040 scan_ev_completed:1,
3041 scan_ev_bss_chan:1,
3042 scan_ev_foreign_chan:1,
3043 scan_ev_dequeued:1,
3044 scan_ev_preempted:1,
3045 scan_ev_start_failed:1,
3046 scan_ev_restarted:1,
3047 scan_ev_foreign_chn_exit:1,
3048 scan_ev_invalid:1,
3049 scan_ev_gpio_timeout:1,
3050 scan_ev_suspended:1,
3051 scan_ev_resumed:1;
3052 };
3053 u32 scan_events;
3054 };
3055 u32 dwell_time_active;
3056 u32 dwell_time_active_2g;
3057 u32 dwell_time_passive;
3058 u32 min_rest_time;
3059 u32 max_rest_time;
3060 u32 repeat_probe_time;
3061 u32 probe_spacing_time;
3062 u32 idle_time;
3063 u32 max_scan_time;
3064 u32 probe_delay;
3065 union {
3066 struct {
3067 u32 scan_f_passive:1,
3068 scan_f_bcast_probe:1,
3069 scan_f_cck_rates:1,
3070 scan_f_ofdm_rates:1,
3071 scan_f_chan_stat_evnt:1,
3072 scan_f_filter_prb_req:1,
3073 scan_f_bypass_dfs_chn:1,
3074 scan_f_continue_on_err:1,
3075 scan_f_offchan_mgmt_tx:1,
3076 scan_f_offchan_data_tx:1,
3077 scan_f_promisc_mode:1,
3078 scan_f_capture_phy_err:1,
3079 scan_f_strict_passive_pch:1,
3080 scan_f_half_rate:1,
3081 scan_f_quarter_rate:1,
3082 scan_f_force_active_dfs_chn:1,
3083 scan_f_add_tpc_ie_in_probe:1,
3084 scan_f_add_ds_ie_in_probe:1,
3085 scan_f_add_spoofed_mac_in_probe:1,
3086 scan_f_add_rand_seq_in_probe:1,
3087 scan_f_en_ie_whitelist_in_probe:1,
3088 scan_f_forced:1,
3089 scan_f_2ghz:1,
3090 scan_f_5ghz:1,
3091 scan_f_80mhz:1;
3092 };
3093 u32 scan_flags;
3094 };
3095 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3096 u32 burst_duration;
3097 u32 num_chan;
3098 u32 num_bssid;
3099 u32 num_ssids;
3100 u32 n_probes;
3101 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS];
3102 u32 notify_scan_events;
3103 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID];
3104 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID];
3105 struct element_info extraie;
3106 struct element_info htcap;
3107 struct element_info vhtcap;
3108};
3109
3110struct wmi_ssid_arg {
3111 int len;
3112 const u8 *ssid;
3113};
3114
3115struct wmi_bssid_arg {
3116 const u8 *bssid;
3117};
3118
3119struct wmi_start_scan_arg {
3120 u32 scan_id;
3121 u32 scan_req_id;
3122 u32 vdev_id;
3123 u32 scan_priority;
3124 u32 notify_scan_events;
3125 u32 dwell_time_active;
3126 u32 dwell_time_passive;
3127 u32 min_rest_time;
3128 u32 max_rest_time;
3129 u32 repeat_probe_time;
3130 u32 probe_spacing_time;
3131 u32 idle_time;
3132 u32 max_scan_time;
3133 u32 probe_delay;
3134 u32 scan_ctrl_flags;
3135
3136 u32 ie_len;
3137 u32 n_channels;
3138 u32 n_ssids;
3139 u32 n_bssids;
3140
3141 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3142 u32 channels[64];
3143 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3144 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3145};
3146
3147#define WMI_SCAN_STOP_ONE 0x00000000
3148#define WMI_SCN_STOP_VAP_ALL 0x01000000
3149#define WMI_SCAN_STOP_ALL 0x04000000
3150
3151/* Prefix 0xA000 indicates that the scan request
3152 * is trigger by HOST
3153 */
3154#define ATH11K_SCAN_ID 0xA000
3155
3156enum scan_cancel_req_type {
3157 WLAN_SCAN_CANCEL_SINGLE = 1,
3158 WLAN_SCAN_CANCEL_VDEV_ALL,
3159 WLAN_SCAN_CANCEL_PDEV_ALL,
3160};
3161
3162struct scan_cancel_param {
3163 u32 requester;
3164 u32 scan_id;
3165 enum scan_cancel_req_type req_type;
3166 u32 vdev_id;
3167 u32 pdev_id;
3168};
3169
3170struct wmi_bcn_send_from_host_cmd {
3171 u32 tlv_header;
3172 u32 vdev_id;
3173 u32 data_len;
3174 union {
3175 u32 frag_ptr;
3176 u32 frag_ptr_lo;
3177 };
3178 u32 frame_ctrl;
3179 u32 dtim_flag;
3180 u32 bcn_antenna;
3181 u32 frag_ptr_hi;
3182};
3183
3184#define WMI_CHAN_INFO_MODE GENMASK(5, 0)
3185#define WMI_CHAN_INFO_HT40_PLUS BIT(6)
3186#define WMI_CHAN_INFO_PASSIVE BIT(7)
3187#define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8)
3188#define WMI_CHAN_INFO_AP_DISABLED BIT(9)
3189#define WMI_CHAN_INFO_DFS BIT(10)
3190#define WMI_CHAN_INFO_ALLOW_HT BIT(11)
3191#define WMI_CHAN_INFO_ALLOW_VHT BIT(12)
3192#define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13)
3193#define WMI_CHAN_INFO_HALF_RATE BIT(14)
3194#define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
3195#define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
3196#define WMI_CHAN_INFO_ALLOW_HE BIT(17)
3197
3198#define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
3199#define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
3200#define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16)
3201#define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24)
3202
3203#define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0)
3204#define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8)
3205
3206struct wmi_channel {
3207 u32 tlv_header;
3208 u32 mhz;
3209 u32 band_center_freq1;
3210 u32 band_center_freq2;
3211 u32 info;
3212 u32 reg_info_1;
3213 u32 reg_info_2;
3214} __packed;
3215
3216struct wmi_mgmt_params {
3217 void *tx_frame;
3218 u16 frm_len;
3219 u8 vdev_id;
3220 u16 chanfreq;
3221 void *pdata;
3222 u16 desc_id;
3223 u8 *macaddr;
3224 void *qdf_ctx;
3225};
3226
3227enum wmi_sta_ps_mode {
3228 WMI_STA_PS_MODE_DISABLED = 0,
3229 WMI_STA_PS_MODE_ENABLED = 1,
3230};
3231
3232#define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3233#define WMI_SMPS_MASK_UPPER_3BITS 0x7
3234#define WMI_SMPS_PARAM_VALUE_SHIFT 29
3235
3236#define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
3237#define ATH11K_WMI_FW_HANG_DELAY 0
3238
3239/* type, 0:unused 1: ASSERT 2: not respond detect command
3240 * delay_time_ms, the simulate will delay time
3241 */
3242
3243struct wmi_force_fw_hang_cmd {
3244 u32 tlv_header;
3245 u32 type;
3246 u32 delay_time_ms;
3247};
3248
3249struct wmi_vdev_set_param_cmd {
3250 u32 tlv_header;
3251 u32 vdev_id;
3252 u32 param_id;
3253 u32 param_value;
3254} __packed;
3255
3256enum wmi_stats_id {
3257 WMI_REQUEST_PEER_STAT = BIT(0),
3258 WMI_REQUEST_AP_STAT = BIT(1),
3259 WMI_REQUEST_PDEV_STAT = BIT(2),
3260 WMI_REQUEST_VDEV_STAT = BIT(3),
3261 WMI_REQUEST_BCNFLT_STAT = BIT(4),
3262 WMI_REQUEST_VDEV_RATE_STAT = BIT(5),
3263 WMI_REQUEST_INST_STAT = BIT(6),
3264 WMI_REQUEST_MIB_STAT = BIT(7),
3265 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8),
3266 WMI_REQUEST_CONGESTION_STAT = BIT(9),
3267 WMI_REQUEST_PEER_EXTD_STAT = BIT(10),
3268 WMI_REQUEST_BCN_STAT = BIT(11),
3269 WMI_REQUEST_BCN_STAT_RESET = BIT(12),
3270 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13),
3271};
3272
3273struct wmi_request_stats_cmd {
3274 u32 tlv_header;
3275 enum wmi_stats_id stats_id;
3276 u32 vdev_id;
3277 struct wmi_mac_addr peer_macaddr;
3278 u32 pdev_id;
3279} __packed;
3280
3281#define WMI_BEACON_TX_BUFFER_SIZE 512
3282
3283struct wmi_bcn_tmpl_cmd {
3284 u32 tlv_header;
3285 u32 vdev_id;
3286 u32 tim_ie_offset;
3287 u32 buf_len;
3288 u32 csa_switch_count_offset;
3289 u32 ext_csa_switch_count_offset;
3290 u32 csa_event_bitmap;
3291 u32 mbssid_ie_offset;
3292 u32 esp_ie_offset;
3293} __packed;
3294
3295struct wmi_key_seq_counter {
3296 u32 key_seq_counter_l;
3297 u32 key_seq_counter_h;
3298} __packed;
3299
3300struct wmi_vdev_install_key_cmd {
3301 u32 tlv_header;
3302 u32 vdev_id;
3303 struct wmi_mac_addr peer_macaddr;
3304 u32 key_idx;
3305 u32 key_flags;
3306 u32 key_cipher;
3307 struct wmi_key_seq_counter key_rsc_counter;
3308 struct wmi_key_seq_counter key_global_rsc_counter;
3309 struct wmi_key_seq_counter key_tsc_counter;
3310 u8 wpi_key_rsc_counter[16];
3311 u8 wpi_key_tsc_counter[16];
3312 u32 key_len;
3313 u32 key_txmic_len;
3314 u32 key_rxmic_len;
3315 u32 is_group_key_id_valid;
3316 u32 group_key_id;
3317
3318 /* Followed by key_data containing key followed by
3319 * tx mic and then rx mic
3320 */
3321} __packed;
3322
3323struct wmi_vdev_install_key_arg {
3324 u32 vdev_id;
3325 const u8 *macaddr;
3326 u32 key_idx;
3327 u32 key_flags;
3328 u32 key_cipher;
3329 u32 key_len;
3330 u32 key_txmic_len;
3331 u32 key_rxmic_len;
3332 u64 key_rsc_counter;
3333 const void *key_data;
3334};
3335
3336#define WMI_MAX_SUPPORTED_RATES 128
3337#define WMI_HOST_MAX_HECAP_PHY_SIZE 3
John Crispin9f056ed2019-11-25 16:36:27 +00003338#define WMI_HOST_MAX_HE_RATE_SET 3
3339#define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
3340#define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
3341#define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
Kalle Valod5c65152019-11-23 09:58:40 +02003342
3343struct wmi_rate_set_arg {
3344 u32 num_rates;
3345 u8 rates[WMI_MAX_SUPPORTED_RATES];
3346};
3347
3348struct peer_assoc_params {
3349 struct wmi_mac_addr peer_macaddr;
3350 u32 vdev_id;
3351 u32 peer_new_assoc;
3352 u32 peer_associd;
3353 u32 peer_flags;
3354 u32 peer_caps;
3355 u32 peer_listen_intval;
3356 u32 peer_ht_caps;
3357 u32 peer_max_mpdu;
3358 u32 peer_mpdu_density;
3359 u32 peer_rate_caps;
3360 u32 peer_nss;
3361 u32 peer_vht_caps;
3362 u32 peer_phymode;
3363 u32 peer_ht_info[2];
3364 struct wmi_rate_set_arg peer_legacy_rates;
3365 struct wmi_rate_set_arg peer_ht_rates;
3366 u32 rx_max_rate;
3367 u32 rx_mcs_set;
3368 u32 tx_max_rate;
3369 u32 tx_mcs_set;
3370 u8 vht_capable;
3371 u32 tx_max_mcs_nss;
3372 u32 peer_bw_rxnss_override;
3373 bool is_pmf_enabled;
3374 bool is_wme_set;
3375 bool qos_flag;
3376 bool apsd_flag;
3377 bool ht_flag;
3378 bool bw_40;
3379 bool bw_80;
3380 bool bw_160;
3381 bool stbc_flag;
3382 bool ldpc_flag;
3383 bool static_mimops_flag;
3384 bool dynamic_mimops_flag;
3385 bool spatial_mux_flag;
3386 bool vht_flag;
3387 bool vht_ng_flag;
3388 bool need_ptk_4_way;
3389 bool need_gtk_2_way;
3390 bool auth_flag;
3391 bool safe_mode_enabled;
3392 bool amsdu_disable;
3393 /* Use common structure */
3394 u8 peer_mac[ETH_ALEN];
3395
3396 bool he_flag;
3397 u32 peer_he_cap_macinfo[2];
3398 u32 peer_he_cap_macinfo_internal;
3399 u32 peer_he_ops;
3400 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3401 u32 peer_he_mcs_count;
3402 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3403 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3404 struct ath11k_ppe_threshold peer_ppet;
3405};
3406
3407struct wmi_peer_assoc_complete_cmd {
3408 u32 tlv_header;
3409 struct wmi_mac_addr peer_macaddr;
3410 u32 vdev_id;
3411 u32 peer_new_assoc;
3412 u32 peer_associd;
3413 u32 peer_flags;
3414 u32 peer_caps;
3415 u32 peer_listen_intval;
3416 u32 peer_ht_caps;
3417 u32 peer_max_mpdu;
3418 u32 peer_mpdu_density;
3419 u32 peer_rate_caps;
3420 u32 peer_nss;
3421 u32 peer_vht_caps;
3422 u32 peer_phymode;
3423 u32 peer_ht_info[2];
3424 u32 num_peer_legacy_rates;
3425 u32 num_peer_ht_rates;
3426 u32 peer_bw_rxnss_override;
3427 struct wmi_ppe_threshold peer_ppet;
3428 u32 peer_he_cap_info;
3429 u32 peer_he_ops;
3430 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3431 u32 peer_he_mcs;
3432 u32 peer_he_cap_info_ext;
3433 u32 peer_he_cap_info_internal;
3434} __packed;
3435
3436struct wmi_stop_scan_cmd {
3437 u32 tlv_header;
3438 u32 requestor;
3439 u32 scan_id;
3440 u32 req_type;
3441 u32 vdev_id;
3442 u32 pdev_id;
3443};
3444
3445struct scan_chan_list_params {
3446 u32 pdev_id;
3447 u16 nallchans;
3448 struct channel_param ch_param[1];
3449};
3450
3451struct wmi_scan_chan_list_cmd {
3452 u32 tlv_header;
3453 u32 num_scan_chans;
3454 u32 flags;
3455 u32 pdev_id;
3456} __packed;
3457
3458#define WMI_MGMT_SEND_DOWNLD_LEN 64
3459
3460#define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
3461#define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
3462#define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20)
3463#define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28)
3464
3465#define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0)
3466#define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8)
3467#define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15)
3468#define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20)
3469#define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21)
3470
3471struct wmi_mgmt_send_params {
3472 u32 tlv_header;
3473 u32 tx_params_dword0;
3474 u32 tx_params_dword1;
3475};
3476
3477struct wmi_mgmt_send_cmd {
3478 u32 tlv_header;
3479 u32 vdev_id;
3480 u32 desc_id;
3481 u32 chanfreq;
3482 u32 paddr_lo;
3483 u32 paddr_hi;
3484 u32 frame_len;
3485 u32 buf_len;
3486 u32 tx_params_valid;
3487
3488 /* This TLV is followed by struct wmi_mgmt_frame */
3489
3490 /* Followed by struct wmi_mgmt_send_params */
3491} __packed;
3492
3493struct wmi_sta_powersave_mode_cmd {
3494 u32 tlv_header;
3495 u32 vdev_id;
3496 u32 sta_ps_mode;
3497};
3498
3499struct wmi_sta_smps_force_mode_cmd {
3500 u32 tlv_header;
3501 u32 vdev_id;
3502 u32 forced_mode;
3503};
3504
3505struct wmi_sta_smps_param_cmd {
3506 u32 tlv_header;
3507 u32 vdev_id;
3508 u32 param;
3509 u32 value;
3510};
3511
3512struct wmi_bcn_prb_info {
3513 u32 tlv_header;
3514 u32 caps;
3515 u32 erp;
3516} __packed;
3517
3518enum {
3519 WMI_PDEV_SUSPEND,
3520 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3521};
3522
3523struct green_ap_ps_params {
3524 u32 value;
3525};
3526
3527struct wmi_pdev_green_ap_ps_enable_cmd_param {
3528 u32 tlv_header;
3529 u32 pdev_id;
3530 u32 enable;
3531};
3532
3533struct ap_ps_params {
3534 u32 vdev_id;
3535 u32 param;
3536 u32 value;
3537};
3538
3539struct vdev_set_params {
3540 u32 if_id;
3541 u32 param_id;
3542 u32 param_value;
3543};
3544
3545struct stats_request_params {
3546 u32 stats_id;
3547 u32 vdev_id;
3548 u32 pdev_id;
3549};
3550
3551enum set_init_cc_type {
3552 WMI_COUNTRY_INFO_TYPE_ALPHA,
3553 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3554 WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3555};
3556
3557enum set_init_cc_flags {
3558 INVALID_CC,
3559 CC_IS_SET,
3560 REGDMN_IS_SET,
3561 ALPHA_IS_SET,
3562};
3563
3564struct wmi_init_country_params {
3565 union {
3566 u16 country_code;
3567 u16 regdom_id;
3568 u8 alpha2[3];
3569 } cc_info;
3570 enum set_init_cc_flags flags;
3571};
3572
3573struct wmi_init_country_cmd {
3574 u32 tlv_header;
3575 u32 pdev_id;
3576 u32 init_cc_type;
3577 union {
3578 u32 country_code;
3579 u32 regdom_id;
3580 u32 alpha2;
3581 } cc_info;
3582} __packed;
3583
3584struct wmi_pdev_pktlog_filter_info {
3585 u32 tlv_header;
3586 struct wmi_mac_addr peer_macaddr;
3587} __packed;
3588
3589struct wmi_pdev_pktlog_filter_cmd {
3590 u32 tlv_header;
3591 u32 pdev_id;
3592 u32 enable;
3593 u32 filter_type;
3594 u32 num_mac;
3595} __packed;
3596
3597enum ath11k_wmi_pktlog_enable {
3598 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0,
3599 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
3600};
3601
3602struct wmi_pktlog_enable_cmd {
3603 u32 tlv_header;
3604 u32 pdev_id;
3605 u32 evlist; /* WMI_PKTLOG_EVENT */
3606 u32 enable;
3607} __packed;
3608
3609struct wmi_pktlog_disable_cmd {
3610 u32 tlv_header;
3611 u32 pdev_id;
3612} __packed;
3613
3614#define DFS_PHYERR_UNIT_TEST_CMD 0
3615#define DFS_UNIT_TEST_MODULE 0x2b
3616#define DFS_UNIT_TEST_TOKEN 0xAA
3617
3618enum dfs_test_args_idx {
3619 DFS_TEST_CMDID = 0,
3620 DFS_TEST_PDEV_ID,
3621 DFS_TEST_RADAR_PARAM,
3622 DFS_MAX_TEST_ARGS,
3623};
3624
3625struct wmi_dfs_unit_test_arg {
3626 u32 cmd_id;
3627 u32 pdev_id;
3628 u32 radar_param;
3629};
3630
3631struct wmi_unit_test_cmd {
3632 u32 tlv_header;
3633 u32 vdev_id;
3634 u32 module_id;
3635 u32 num_args;
3636 u32 diag_token;
3637 /* Followed by test args*/
3638} __packed;
3639
3640#define MAX_SUPPORTED_RATES 128
3641
3642#define WMI_PEER_AUTH 0x00000001
3643#define WMI_PEER_QOS 0x00000002
3644#define WMI_PEER_NEED_PTK_4_WAY 0x00000004
3645#define WMI_PEER_NEED_GTK_2_WAY 0x00000010
3646#define WMI_PEER_HE 0x00000400
3647#define WMI_PEER_APSD 0x00000800
3648#define WMI_PEER_HT 0x00001000
3649#define WMI_PEER_40MHZ 0x00002000
3650#define WMI_PEER_STBC 0x00008000
3651#define WMI_PEER_LDPC 0x00010000
3652#define WMI_PEER_DYN_MIMOPS 0x00020000
3653#define WMI_PEER_STATIC_MIMOPS 0x00040000
3654#define WMI_PEER_SPATIAL_MUX 0x00200000
3655#define WMI_PEER_VHT 0x02000000
3656#define WMI_PEER_80MHZ 0x04000000
3657#define WMI_PEER_PMF 0x08000000
3658/* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000.
3659 * Need to be cleaned up
3660 */
3661#define WMI_PEER_IS_P2P_CAPABLE 0x20000000
3662#define WMI_PEER_160MHZ 0x40000000
3663#define WMI_PEER_SAFEMODE_EN 0x80000000
3664
3665struct beacon_tmpl_params {
3666 u8 vdev_id;
3667 u32 tim_ie_offset;
3668 u32 tmpl_len;
3669 u32 tmpl_len_aligned;
3670 u32 csa_switch_count_offset;
3671 u32 ext_csa_switch_count_offset;
3672 u8 *frm;
3673};
3674
3675struct wmi_rate_set {
3676 u32 num_rates;
3677 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
3678};
3679
3680struct wmi_vht_rate_set {
3681 u32 tlv_header;
3682 u32 rx_max_rate;
3683 u32 rx_mcs_set;
3684 u32 tx_max_rate;
3685 u32 tx_mcs_set;
3686 u32 tx_max_mcs_nss;
3687} __packed;
3688
3689struct wmi_he_rate_set {
3690 u32 tlv_header;
3691 u32 rx_mcs_set;
3692 u32 tx_mcs_set;
3693} __packed;
3694
3695#define MAX_REG_RULES 10
3696#define REG_ALPHA2_LEN 2
3697
3698enum wmi_start_event_param {
3699 WMI_VDEV_START_RESP_EVENT = 0,
3700 WMI_VDEV_RESTART_RESP_EVENT,
3701};
3702
3703struct wmi_vdev_start_resp_event {
3704 u32 vdev_id;
3705 u32 requestor_id;
3706 enum wmi_start_event_param resp_type;
3707 u32 status;
3708 u32 chain_mask;
3709 u32 smps_mode;
3710 union {
3711 u32 mac_id;
3712 u32 pdev_id;
3713 };
3714 u32 cfgd_tx_streams;
3715 u32 cfgd_rx_streams;
3716} __packed;
3717
3718/* VDEV start response status codes */
3719enum wmi_vdev_start_resp_status_code {
3720 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
3721 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
3722 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
3723 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
3724 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
3725};
3726
3727;
3728enum cc_setting_code {
3729 REG_SET_CC_STATUS_PASS = 0,
3730 REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3731 REG_INIT_ALPHA2_NOT_FOUND = 2,
3732 REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3733 REG_SET_CC_STATUS_NO_MEMORY = 4,
3734 REG_SET_CC_STATUS_FAIL = 5,
3735};
3736
3737/* Regaulatory Rule Flags Passed by FW */
3738#define REGULATORY_CHAN_DISABLED BIT(0)
3739#define REGULATORY_CHAN_NO_IR BIT(1)
3740#define REGULATORY_CHAN_RADAR BIT(3)
3741#define REGULATORY_CHAN_NO_OFDM BIT(6)
3742#define REGULATORY_CHAN_INDOOR_ONLY BIT(9)
3743
3744#define REGULATORY_CHAN_NO_HT40 BIT(4)
3745#define REGULATORY_CHAN_NO_80MHZ BIT(7)
3746#define REGULATORY_CHAN_NO_160MHZ BIT(8)
3747#define REGULATORY_CHAN_NO_20MHZ BIT(11)
3748#define REGULATORY_CHAN_NO_10MHZ BIT(12)
3749
3750enum {
3751 WMI_REG_SET_CC_STATUS_PASS = 0,
3752 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3753 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
3754 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3755 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
3756 WMI_REG_SET_CC_STATUS_FAIL = 5,
3757};
3758
3759struct cur_reg_rule {
3760 u16 start_freq;
3761 u16 end_freq;
3762 u16 max_bw;
3763 u8 reg_power;
3764 u8 ant_gain;
3765 u16 flags;
3766};
3767
3768struct cur_regulatory_info {
3769 enum cc_setting_code status_code;
3770 u8 num_phy;
3771 u8 phy_id;
3772 u16 reg_dmn_pair;
3773 u16 ctry_code;
3774 u8 alpha2[REG_ALPHA2_LEN + 1];
3775 u32 dfs_region;
3776 u32 phybitmap;
3777 u32 min_bw_2g;
3778 u32 max_bw_2g;
3779 u32 min_bw_5g;
3780 u32 max_bw_5g;
3781 u32 num_2g_reg_rules;
3782 u32 num_5g_reg_rules;
3783 struct cur_reg_rule *reg_rules_2g_ptr;
3784 struct cur_reg_rule *reg_rules_5g_ptr;
3785};
3786
3787struct wmi_reg_chan_list_cc_event {
3788 u32 status_code;
3789 u32 phy_id;
3790 u32 alpha2;
3791 u32 num_phy;
3792 u32 country_id;
3793 u32 domain_code;
3794 u32 dfs_region;
3795 u32 phybitmap;
3796 u32 min_bw_2g;
3797 u32 max_bw_2g;
3798 u32 min_bw_5g;
3799 u32 max_bw_5g;
3800 u32 num_2g_reg_rules;
3801 u32 num_5g_reg_rules;
3802} __packed;
3803
3804struct wmi_regulatory_rule_struct {
3805 u32 tlv_header;
3806 u32 freq_info;
3807 u32 bw_pwr_info;
3808 u32 flag_info;
3809};
3810
3811struct wmi_peer_delete_resp_event {
3812 u32 vdev_id;
3813 struct wmi_mac_addr peer_macaddr;
3814} __packed;
3815
3816struct wmi_bcn_tx_status_event {
3817 u32 vdev_id;
3818 u32 tx_status;
3819} __packed;
3820
3821struct wmi_vdev_stopped_event {
3822 u32 vdev_id;
3823} __packed;
3824
3825struct wmi_pdev_bss_chan_info_event {
3826 u32 pdev_id;
3827 u32 freq; /* Units in MHz */
3828 u32 noise_floor; /* units are dBm */
3829 /* rx clear - how often the channel was unused */
3830 u32 rx_clear_count_low;
3831 u32 rx_clear_count_high;
3832 /* cycle count - elapsed time during measured period, in clock ticks */
3833 u32 cycle_count_low;
3834 u32 cycle_count_high;
3835 /* tx cycle count - elapsed time spent in tx, in clock ticks */
3836 u32 tx_cycle_count_low;
3837 u32 tx_cycle_count_high;
3838 /* rx cycle count - elapsed time spent in rx, in clock ticks */
3839 u32 rx_cycle_count_low;
3840 u32 rx_cycle_count_high;
3841 /*rx_cycle cnt for my bss in 64bits format */
3842 u32 rx_bss_cycle_count_low;
3843 u32 rx_bss_cycle_count_high;
3844} __packed;
3845
3846#define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
3847
3848struct wmi_vdev_install_key_compl_event {
3849 u32 vdev_id;
3850 struct wmi_mac_addr peer_macaddr;
3851 u32 key_idx;
3852 u32 key_flags;
3853 u32 status;
3854} __packed;
3855
3856struct wmi_vdev_install_key_complete_arg {
3857 u32 vdev_id;
3858 const u8 *macaddr;
3859 u32 key_idx;
3860 u32 key_flags;
3861 u32 status;
3862};
3863
3864struct wmi_peer_assoc_conf_event {
3865 u32 vdev_id;
3866 struct wmi_mac_addr peer_macaddr;
3867} __packed;
3868
3869struct wmi_peer_assoc_conf_arg {
3870 u32 vdev_id;
3871 const u8 *macaddr;
3872};
3873
3874/*
3875 * PDEV statistics
3876 */
3877struct wmi_pdev_stats_base {
3878 s32 chan_nf;
3879 u32 tx_frame_count; /* Cycles spent transmitting frames */
3880 u32 rx_frame_count; /* Cycles spent receiving frames */
3881 u32 rx_clear_count; /* Total channel busy time, evidently */
3882 u32 cycle_count; /* Total on-channel time */
3883 u32 phy_err_count;
3884 u32 chan_tx_pwr;
3885} __packed;
3886
3887struct wmi_pdev_stats_extra {
3888 u32 ack_rx_bad;
3889 u32 rts_bad;
3890 u32 rts_good;
3891 u32 fcs_bad;
3892 u32 no_beacons;
3893 u32 mib_int_count;
3894} __packed;
3895
3896struct wmi_pdev_stats_tx {
3897 /* Num HTT cookies queued to dispatch list */
3898 s32 comp_queued;
3899
3900 /* Num HTT cookies dispatched */
3901 s32 comp_delivered;
3902
3903 /* Num MSDU queued to WAL */
3904 s32 msdu_enqued;
3905
3906 /* Num MPDU queue to WAL */
3907 s32 mpdu_enqued;
3908
3909 /* Num MSDUs dropped by WMM limit */
3910 s32 wmm_drop;
3911
3912 /* Num Local frames queued */
3913 s32 local_enqued;
3914
3915 /* Num Local frames done */
3916 s32 local_freed;
3917
3918 /* Num queued to HW */
3919 s32 hw_queued;
3920
3921 /* Num PPDU reaped from HW */
3922 s32 hw_reaped;
3923
3924 /* Num underruns */
3925 s32 underrun;
3926
3927 /* Num PPDUs cleaned up in TX abort */
3928 s32 tx_abort;
3929
3930 /* Num MPDUs requed by SW */
3931 s32 mpdus_requed;
3932
3933 /* excessive retries */
3934 u32 tx_ko;
3935
3936 /* data hw rate code */
3937 u32 data_rc;
3938
3939 /* Scheduler self triggers */
3940 u32 self_triggers;
3941
3942 /* frames dropped due to excessive sw retries */
3943 u32 sw_retry_failure;
3944
3945 /* illegal rate phy errors */
3946 u32 illgl_rate_phy_err;
3947
3948 /* wal pdev continuous xretry */
3949 u32 pdev_cont_xretry;
3950
3951 /* wal pdev tx timeouts */
3952 u32 pdev_tx_timeout;
3953
3954 /* wal pdev resets */
3955 u32 pdev_resets;
3956
3957 /* frames dropped due to non-availability of stateless TIDs */
3958 u32 stateless_tid_alloc_failure;
3959
3960 /* PhY/BB underrun */
3961 u32 phy_underrun;
3962
3963 /* MPDU is more than txop limit */
3964 u32 txop_ovf;
3965} __packed;
3966
3967struct wmi_pdev_stats_rx {
3968 /* Cnts any change in ring routing mid-ppdu */
3969 s32 mid_ppdu_route_change;
3970
3971 /* Total number of statuses processed */
3972 s32 status_rcvd;
3973
3974 /* Extra frags on rings 0-3 */
3975 s32 r0_frags;
3976 s32 r1_frags;
3977 s32 r2_frags;
3978 s32 r3_frags;
3979
3980 /* MSDUs / MPDUs delivered to HTT */
3981 s32 htt_msdus;
3982 s32 htt_mpdus;
3983
3984 /* MSDUs / MPDUs delivered to local stack */
3985 s32 loc_msdus;
3986 s32 loc_mpdus;
3987
3988 /* AMSDUs that have more MSDUs than the status ring size */
3989 s32 oversize_amsdu;
3990
3991 /* Number of PHY errors */
3992 s32 phy_errs;
3993
3994 /* Number of PHY errors drops */
3995 s32 phy_err_drop;
3996
3997 /* Number of mpdu errors - FCS, MIC, ENC etc. */
3998 s32 mpdu_errs;
3999} __packed;
4000
4001struct wmi_pdev_stats {
4002 struct wmi_pdev_stats_base base;
4003 struct wmi_pdev_stats_tx tx;
4004 struct wmi_pdev_stats_rx rx;
4005} __packed;
4006
4007#define WLAN_MAX_AC 4
4008#define MAX_TX_RATE_VALUES 10
4009#define MAX_TX_RATE_VALUES 10
4010
4011struct wmi_vdev_stats {
4012 u32 vdev_id;
4013 u32 beacon_snr;
4014 u32 data_snr;
4015 u32 num_tx_frames[WLAN_MAX_AC];
4016 u32 num_rx_frames;
4017 u32 num_tx_frames_retries[WLAN_MAX_AC];
4018 u32 num_tx_frames_failures[WLAN_MAX_AC];
4019 u32 num_rts_fail;
4020 u32 num_rts_success;
4021 u32 num_rx_err;
4022 u32 num_rx_discard;
4023 u32 num_tx_not_acked;
4024 u32 tx_rate_history[MAX_TX_RATE_VALUES];
4025 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
4026} __packed;
4027
4028struct wmi_bcn_stats {
4029 u32 vdev_id;
4030 u32 tx_bcn_succ_cnt;
4031 u32 tx_bcn_outage_cnt;
4032} __packed;
4033
4034struct wmi_stats_event {
4035 u32 stats_id;
4036 u32 num_pdev_stats;
4037 u32 num_vdev_stats;
4038 u32 num_peer_stats;
4039 u32 num_bcnflt_stats;
4040 u32 num_chan_stats;
4041 u32 num_mib_stats;
4042 u32 pdev_id;
4043 u32 num_bcn_stats;
4044 u32 num_peer_extd_stats;
4045 u32 num_peer_extd2_stats;
4046} __packed;
4047
4048struct wmi_pdev_ctl_failsafe_chk_event {
4049 u32 pdev_id;
4050 u32 ctl_failsafe_status;
4051} __packed;
4052
4053struct wmi_pdev_csa_switch_ev {
4054 u32 pdev_id;
4055 u32 current_switch_count;
4056 u32 num_vdevs;
4057} __packed;
4058
4059struct wmi_pdev_radar_ev {
4060 u32 pdev_id;
4061 u32 detection_mode;
4062 u32 chan_freq;
4063 u32 chan_width;
4064 u32 detector_id;
4065 u32 segment_id;
4066 u32 timestamp;
4067 u32 is_chirp;
4068 s32 freq_offset;
4069 s32 sidx;
4070} __packed;
4071
4072#define WMI_RX_STATUS_OK 0x00
4073#define WMI_RX_STATUS_ERR_CRC 0x01
4074#define WMI_RX_STATUS_ERR_DECRYPT 0x08
4075#define WMI_RX_STATUS_ERR_MIC 0x10
4076#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
4077
4078#define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4079
4080struct mgmt_rx_event_params {
4081 u32 channel;
4082 u32 snr;
4083 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4084 u32 rate;
4085 enum wmi_phy_mode phy_mode;
4086 u32 buf_len;
4087 int status;
4088 u32 flags;
4089 int rssi;
4090 u32 tsf_delta;
4091 u8 pdev_id;
4092};
4093
4094#define ATH_MAX_ANTENNA 4
4095
4096struct wmi_mgmt_rx_hdr {
4097 u32 channel;
4098 u32 snr;
4099 u32 rate;
4100 u32 phy_mode;
4101 u32 buf_len;
4102 u32 status;
4103 u32 rssi_ctl[ATH_MAX_ANTENNA];
4104 u32 flags;
4105 int rssi;
4106 u32 tsf_delta;
4107 u32 rx_tsf_l32;
4108 u32 rx_tsf_u32;
4109 u32 pdev_id;
4110} __packed;
4111
4112#define MAX_ANTENNA_EIGHT 8
4113
4114struct wmi_rssi_ctl_ext {
4115 u32 tlv_header;
4116 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
4117};
4118
4119struct wmi_mgmt_tx_compl_event {
4120 u32 desc_id;
4121 u32 status;
4122 u32 pdev_id;
4123} __packed;
4124
4125struct wmi_scan_event {
4126 u32 event_type; /* %WMI_SCAN_EVENT_ */
4127 u32 reason; /* %WMI_SCAN_REASON_ */
4128 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4129 u32 scan_req_id;
4130 u32 scan_id;
4131 u32 vdev_id;
4132 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4133 * In case of AP it is TSF of the AP vdev
4134 * In case of STA connected state, this is the TSF of the AP
4135 * In case of STA not connected, it will be the free running HW timer
4136 */
4137 u32 tsf_timestamp;
4138} __packed;
4139
4140struct wmi_peer_sta_kickout_arg {
4141 const u8 *mac_addr;
4142};
4143
4144struct wmi_peer_sta_kickout_event {
4145 struct wmi_mac_addr peer_macaddr;
4146} __packed;
4147
4148enum wmi_roam_reason {
4149 WMI_ROAM_REASON_BETTER_AP = 1,
4150 WMI_ROAM_REASON_BEACON_MISS = 2,
4151 WMI_ROAM_REASON_LOW_RSSI = 3,
4152 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4153 WMI_ROAM_REASON_HO_FAILED = 5,
4154
4155 /* keep last */
4156 WMI_ROAM_REASON_MAX,
4157};
4158
4159struct wmi_roam_event {
4160 u32 vdev_id;
4161 u32 reason;
4162 u32 rssi;
4163} __packed;
4164
4165#define WMI_CHAN_INFO_START_RESP 0
4166#define WMI_CHAN_INFO_END_RESP 1
4167
4168struct wmi_chan_info_event {
4169 u32 err_code;
4170 u32 freq;
4171 u32 cmd_flags;
4172 u32 noise_floor;
4173 u32 rx_clear_count;
4174 u32 cycle_count;
4175 u32 chan_tx_pwr_range;
4176 u32 chan_tx_pwr_tp;
4177 u32 rx_frame_count;
4178 u32 my_bss_rx_cycle_count;
4179 u32 rx_11b_mode_data_duration;
4180 u32 tx_frame_cnt;
4181 u32 mac_clk_mhz;
4182 u32 vdev_id;
4183} __packed;
4184
4185struct ath11k_targ_cap {
4186 u32 phy_capability;
4187 u32 max_frag_entry;
4188 u32 num_rf_chains;
4189 u32 ht_cap_info;
4190 u32 vht_cap_info;
4191 u32 vht_supp_mcs;
4192 u32 hw_min_tx_power;
4193 u32 hw_max_tx_power;
4194 u32 sys_cap_info;
4195 u32 min_pkt_size_enable;
4196 u32 max_bcn_ie_size;
4197 u32 max_num_scan_channels;
4198 u32 max_supported_macs;
4199 u32 wmi_fw_sub_feat_caps;
4200 u32 txrx_chainmask;
4201 u32 default_dbs_hw_mode_index;
4202 u32 num_msdu_desc;
4203};
4204
4205enum wmi_vdev_type {
4206 WMI_VDEV_TYPE_AP = 1,
4207 WMI_VDEV_TYPE_STA = 2,
4208 WMI_VDEV_TYPE_IBSS = 3,
4209 WMI_VDEV_TYPE_MONITOR = 4,
4210};
4211
4212enum wmi_vdev_subtype {
4213 WMI_VDEV_SUBTYPE_NONE,
4214 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4215 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4216 WMI_VDEV_SUBTYPE_P2P_GO,
4217 WMI_VDEV_SUBTYPE_PROXY_STA,
4218 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4219 WMI_VDEV_SUBTYPE_MESH_11S,
4220};
4221
4222enum wmi_sta_powersave_param {
4223 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4224 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
4225 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
4226 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
4227 WMI_STA_PS_PARAM_UAPSD = 4,
4228};
4229
4230#define WMI_UAPSD_AC_TYPE_DELI 0
4231#define WMI_UAPSD_AC_TYPE_TRIG 1
4232
4233#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
4234 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \
4235 (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
4236
4237enum wmi_sta_ps_param_uapsd {
4238 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4239 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4240 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4241 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4242 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4243 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4244 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4245 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4246};
4247
4248#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
4249
4250struct wmi_sta_uapsd_auto_trig_param {
4251 u32 wmm_ac;
4252 u32 user_priority;
4253 u32 service_interval;
4254 u32 suspend_interval;
4255 u32 delay_interval;
4256};
4257
4258struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
4259 u32 vdev_id;
4260 struct wmi_mac_addr peer_macaddr;
4261 u32 num_ac;
4262};
4263
4264struct wmi_sta_uapsd_auto_trig_arg {
4265 u32 wmm_ac;
4266 u32 user_priority;
4267 u32 service_interval;
4268 u32 suspend_interval;
4269 u32 delay_interval;
4270};
4271
4272enum wmi_sta_ps_param_tx_wake_threshold {
4273 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
4274 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
4275
4276 /* Values greater than one indicate that many TX attempts per beacon
4277 * interval before the STA will wake up
4278 */
4279};
4280
4281/* The maximum number of PS-Poll frames the FW will send in response to
4282 * traffic advertised in TIM before waking up (by sending a null frame with PS
4283 * = 0). Value 0 has a special meaning: there is no maximum count and the FW
4284 * will send as many PS-Poll as are necessary to retrieve buffered BU. This
4285 * parameter is used when the RX wake policy is
4286 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
4287 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
4288 */
4289enum wmi_sta_ps_param_pspoll_count {
4290 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
4291 /* Values greater than 0 indicate the maximum numer of PS-Poll frames
4292 * FW will send before waking up.
4293 */
4294};
4295
4296/* U-APSD configuration of peer station from (re)assoc request and TSPECs */
4297enum wmi_ap_ps_param_uapsd {
4298 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4299 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4300 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4301 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4302 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4303 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4304 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4305 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4306};
4307
4308/* U-APSD maximum service period of peer station */
4309enum wmi_ap_ps_peer_param_max_sp {
4310 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
4311 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
4312 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
4313 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
4314 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
4315};
4316
4317enum wmi_ap_ps_peer_param {
4318 /** Set uapsd configuration for a given peer.
4319 *
4320 * This include the delivery and trigger enabled state for each AC.
4321 * The host MLME needs to set this based on AP capability and stations
4322 * request Set in the association request received from the station.
4323 *
4324 * Lower 8 bits of the value specify the UAPSD configuration.
4325 *
4326 * (see enum wmi_ap_ps_param_uapsd)
4327 * The default value is 0.
4328 */
4329 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
4330
4331 /**
4332 * Set the service period for a UAPSD capable station
4333 *
4334 * The service period from wme ie in the (re)assoc request frame.
4335 *
4336 * (see enum wmi_ap_ps_peer_param_max_sp)
4337 */
4338 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
4339
4340 /** Time in seconds for aging out buffered frames
4341 * for STA in power save
4342 */
4343 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
4344
4345 /** Specify frame types that are considered SIFS
4346 * RESP trigger frame
4347 */
4348 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
4349
4350 /** Specifies the trigger state of TID.
4351 * Valid only for UAPSD frame type
4352 */
4353 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
4354
4355 /* Specifies the WNM sleep state of a STA */
4356 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
4357};
4358
4359#define DISABLE_SIFS_RESPONSE_TRIGGER 0
4360
4361#define WMI_MAX_KEY_INDEX 3
4362#define WMI_MAX_KEY_LEN 32
4363
4364#define WMI_KEY_PAIRWISE 0x00
4365#define WMI_KEY_GROUP 0x01
4366
4367#define WMI_CIPHER_NONE 0x0 /* clear key */
4368#define WMI_CIPHER_WEP 0x1
4369#define WMI_CIPHER_TKIP 0x2
4370#define WMI_CIPHER_AES_OCB 0x3
4371#define WMI_CIPHER_AES_CCM 0x4
4372#define WMI_CIPHER_WAPI 0x5
4373#define WMI_CIPHER_CKIP 0x6
4374#define WMI_CIPHER_AES_CMAC 0x7
4375#define WMI_CIPHER_ANY 0x8
4376#define WMI_CIPHER_AES_GCM 0x9
4377#define WMI_CIPHER_AES_GMAC 0xa
4378
4379/* Value to disable fixed rate setting */
4380#define WMI_FIXED_RATE_NONE (0xffff)
4381
4382#define ATH11K_RC_VERSION_OFFSET 28
4383#define ATH11K_RC_PREAMBLE_OFFSET 8
4384#define ATH11K_RC_NSS_OFFSET 5
4385
4386#define ATH11K_HW_RATE_CODE(rate, nss, preamble) \
4387 ((1 << ATH11K_RC_VERSION_OFFSET) | \
4388 ((nss) << ATH11K_RC_NSS_OFFSET) | \
4389 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \
4390 (rate))
4391
4392/* Preamble types to be used with VDEV fixed rate configuration */
4393enum wmi_rate_preamble {
4394 WMI_RATE_PREAMBLE_OFDM,
4395 WMI_RATE_PREAMBLE_CCK,
4396 WMI_RATE_PREAMBLE_HT,
4397 WMI_RATE_PREAMBLE_VHT,
4398 WMI_RATE_PREAMBLE_HE,
4399};
4400
4401/**
4402 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
4403 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled.
4404 * @WMI_USE_RTS_CTS : RTS/CTS Enabled.
4405 * @WMI_USE_CTS2SELF : CTS to self protection Enabled.
4406 */
4407enum wmi_rtscts_prot_mode {
4408 WMI_RTS_CTS_DISABLED = 0,
4409 WMI_USE_RTS_CTS = 1,
4410 WMI_USE_CTS2SELF = 2,
4411};
4412
4413/**
4414 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
4415 * protection mode.
4416 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS
4417 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS
4418 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS,
4419 * but if there's a sw retry, both the rate
4420 * series will use RTS-CTS.
4421 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU.
4422 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series.
4423 */
4424enum wmi_rtscts_profile {
4425 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
4426 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
4427 WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
4428 WMI_RTSCTS_ERP = 3,
4429 WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
4430};
4431
4432struct ath11k_hal_reg_cap {
4433 u32 eeprom_rd;
4434 u32 eeprom_rd_ext;
4435 u32 regcap1;
4436 u32 regcap2;
4437 u32 wireless_modes;
4438 u32 low_2ghz_chan;
4439 u32 high_2ghz_chan;
4440 u32 low_5ghz_chan;
4441 u32 high_5ghz_chan;
4442};
4443
4444struct ath11k_mem_chunk {
4445 void *vaddr;
4446 dma_addr_t paddr;
4447 u32 len;
4448 u32 req_id;
4449};
4450
4451#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
4452
4453enum wmi_sta_ps_param_rx_wake_policy {
4454 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
4455 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
4456};
4457
4458enum ath11k_hw_txrx_mode {
4459 ATH11K_HW_TXRX_RAW = 0,
4460 ATH11K_HW_TXRX_NATIVE_WIFI = 1,
4461 ATH11K_HW_TXRX_ETHERNET = 2,
4462};
4463
4464struct wmi_wmm_params {
4465 u32 tlv_header;
4466 u32 cwmin;
4467 u32 cwmax;
4468 u32 aifs;
4469 u32 txoplimit;
4470 u32 acm;
4471 u32 no_ack;
4472} __packed;
4473
4474struct wmi_wmm_params_arg {
4475 u8 acm;
4476 u8 aifs;
4477 u8 cwmin;
4478 u8 cwmax;
4479 u16 txop;
4480 u8 no_ack;
4481};
4482
4483struct wmi_vdev_set_wmm_params_cmd {
4484 u32 tlv_header;
4485 u32 vdev_id;
4486 struct wmi_wmm_params wmm_params[4];
4487 u32 wmm_param_type;
4488} __packed;
4489
4490struct wmi_wmm_params_all_arg {
4491 struct wmi_wmm_params_arg ac_be;
4492 struct wmi_wmm_params_arg ac_bk;
4493 struct wmi_wmm_params_arg ac_vi;
4494 struct wmi_wmm_params_arg ac_vo;
4495};
4496
4497struct target_resource_config {
4498 u32 num_vdevs;
4499 u32 num_peers;
4500 u32 num_active_peers;
4501 u32 num_offload_peers;
4502 u32 num_offload_reorder_buffs;
4503 u32 num_peer_keys;
4504 u32 num_tids;
4505 u32 ast_skid_limit;
4506 u32 tx_chain_mask;
4507 u32 rx_chain_mask;
4508 u32 rx_timeout_pri[4];
4509 u32 rx_decap_mode;
4510 u32 scan_max_pending_req;
4511 u32 bmiss_offload_max_vdev;
4512 u32 roam_offload_max_vdev;
4513 u32 roam_offload_max_ap_profiles;
4514 u32 num_mcast_groups;
4515 u32 num_mcast_table_elems;
4516 u32 mcast2ucast_mode;
4517 u32 tx_dbg_log_size;
4518 u32 num_wds_entries;
4519 u32 dma_burst_size;
4520 u32 mac_aggr_delim;
4521 u32 rx_skip_defrag_timeout_dup_detection_check;
4522 u32 vow_config;
4523 u32 gtk_offload_max_vdev;
4524 u32 num_msdu_desc;
4525 u32 max_frag_entries;
4526 u32 max_peer_ext_stats;
4527 u32 smart_ant_cap;
4528 u32 bk_minfree;
4529 u32 be_minfree;
4530 u32 vi_minfree;
4531 u32 vo_minfree;
4532 u32 rx_batchmode;
4533 u32 tt_support;
4534 u32 atf_config;
4535 u32 iphdr_pad_config;
4536 u32 qwrap_config:16,
4537 alloc_frag_desc_for_data_pkt:16;
4538 u32 num_tdls_vdevs;
4539 u32 num_tdls_conn_table_entries;
4540 u32 beacon_tx_offload_max_vdev;
4541 u32 num_multicast_filter_entries;
4542 u32 num_wow_filters;
4543 u32 num_keep_alive_pattern;
4544 u32 keep_alive_pattern_size;
4545 u32 max_tdls_concurrent_sleep_sta;
4546 u32 max_tdls_concurrent_buffer_sta;
4547 u32 wmi_send_separate;
4548 u32 num_ocb_vdevs;
4549 u32 num_ocb_channels;
4550 u32 num_ocb_schedules;
4551 u32 num_ns_ext_tuples_cfg;
4552 u32 bpf_instruction_size;
4553 u32 max_bssid_rx_filters;
4554 u32 use_pdev_id;
4555 u32 peer_map_unmap_v2_support;
4556};
4557
4558#define WMI_MAX_MEM_REQS 32
4559
4560#define MAX_RADIOS 3
4561
4562#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
4563#define WMI_SEND_TIMEOUT_HZ (3 * HZ)
4564
4565struct ath11k_wmi_base {
4566 struct ath11k_base *ab;
4567 struct ath11k_pdev_wmi wmi[MAX_RADIOS];
4568 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
4569 u32 max_msg_len[MAX_RADIOS];
4570
4571 struct completion service_ready;
4572 struct completion unified_ready;
4573 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE);
4574 wait_queue_head_t tx_credits_wq;
4575 const struct wmi_peer_flags_map *peer_flags;
4576 u32 num_mem_chunks;
4577 u32 rx_decap_mode;
4578 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
4579
4580 enum wmi_host_hw_mode_config_type preferred_hw_mode;
4581 struct target_resource_config wlan_resource_config;
4582
4583 struct ath11k_targ_cap *targ_cap;
4584};
4585
4586int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
4587 u32 cmd_id);
4588struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
4589int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
4590 struct sk_buff *frame);
4591int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
4592 struct ieee80211_mutable_offsets *offs,
4593 struct sk_buff *bcn);
4594int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
4595int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
4596 const u8 *bssid);
4597int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
4598int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
4599 bool restart);
4600int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
4601 u32 vdev_id, u32 param_id, u32 param_val);
4602int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
4603 u32 param_value, u8 pdev_id);
4604int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
4605int ath11k_wmi_cmd_init(struct ath11k_base *ab);
4606int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
4607int ath11k_wmi_connect(struct ath11k_base *ab);
4608int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
4609 u8 pdev_id);
4610int ath11k_wmi_attach(struct ath11k_base *ab);
4611void ath11k_wmi_detach(struct ath11k_base *ab);
4612int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
4613 struct vdev_create_params *param);
4614int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
4615 const u8 *addr, dma_addr_t paddr,
4616 u8 tid, u8 ba_window_size_valid,
4617 u32 ba_window_size);
4618int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
4619 struct peer_create_params *param);
4620int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
4621 u32 param_id, u32 param_value);
4622
4623int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
4624 u32 param, u32 param_value);
4625int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
4626int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
4627 const u8 *peer_addr, u8 vdev_id);
4628int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
4629void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
4630int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
4631 struct scan_req_params *params);
4632int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
4633 struct scan_cancel_param *param);
4634int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
4635 struct wmi_wmm_params_all_arg *param);
4636int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
4637 u32 pdev_id);
4638int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
4639
4640int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
4641 struct peer_assoc_params *param);
4642int ath11k_wmi_vdev_install_key(struct ath11k *ar,
4643 struct wmi_vdev_install_key_arg *arg);
4644int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
4645 enum wmi_bss_chan_info_req_type type);
4646int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
4647 struct stats_request_params *param);
4648int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
4649 u8 peer_addr[ETH_ALEN],
4650 struct peer_flush_params *param);
4651int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
4652 struct ap_ps_params *param);
4653int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
4654 struct scan_chan_list_params *chan_list);
4655int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
4656 u32 pdev_id);
4657int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
4658 u32 vdev_id, u32 bcn_ctrl_op);
4659int
4660ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
4661 struct wmi_init_country_params init_cc_param);
4662int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
4663int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
4664int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
4665int
4666ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
4667 struct rx_reorder_queue_remove_params *param);
4668int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
4669 struct pdev_set_regdomain_params *param);
4670int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
4671 struct ath11k_fw_stats *stats);
4672size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head);
4673size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head);
4674size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head);
4675void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
4676 struct ath11k_fw_stats *fw_stats, u32 stats_id,
4677 char *buf);
4678int ath11k_wmi_simulate_radar(struct ath11k *ar);
4679#endif