blob: 740cae00dac2c3c7d6d298fe685f9882b061ced1 [file] [log] [blame]
Miquel Raynal3bda7592021-10-15 10:14:27 +02001// SPDX-License-Identifier: GPL-2.0-only
Patil, Rachna01636eb2012-10-16 12:55:43 +05302/*
3 * TI Touch Screen / ADC MFD driver
4 *
Alexander A. Klimov4f4ed4542020-07-22 21:24:54 +02005 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
Patil, Rachna01636eb2012-10-16 12:55:43 +05306 */
7
8#include <linux/module.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +05309#include <linux/slab.h>
10#include <linux/err.h>
11#include <linux/io.h>
12#include <linux/clk.h>
13#include <linux/regmap.h>
14#include <linux/mfd/core.h>
15#include <linux/pm_runtime.h>
Patil, Rachnaa6543a12013-01-24 03:45:09 +000016#include <linux/of.h>
17#include <linux/of_device.h>
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010018#include <linux/sched.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +053019
20#include <linux/mfd/ti_am335x_tscadc.h>
21
Patil, Rachna01636eb2012-10-16 12:55:43 +053022static const struct regmap_config tscadc_regmap_config = {
23 .name = "ti_tscadc",
24 .reg_bits = 32,
25 .reg_stride = 4,
26 .val_bits = 32,
27};
28
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050029void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
Patil, Rachnaabeccee2013-01-24 03:45:05 +000030{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +020031 unsigned long flags;
32
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050033 spin_lock_irqsave(&tscadc->reg_lock, flags);
34 tscadc->reg_se_cache |= val;
35 if (tscadc->adc_waiting)
36 wake_up(&tscadc->reg_se_wait);
37 else if (!tscadc->adc_in_use)
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050038 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010039
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050040 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +000041}
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010042EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
43
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050044static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010045{
46 DEFINE_WAIT(wait);
47 u32 reg;
48
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050049 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010050 if (reg & SEQ_STATUS) {
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050051 tscadc->adc_waiting = true;
52 prepare_to_wait(&tscadc->reg_se_wait, &wait,
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010053 TASK_UNINTERRUPTIBLE);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050054 spin_unlock_irq(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010055
56 schedule();
57
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050058 spin_lock_irq(&tscadc->reg_lock);
59 finish_wait(&tscadc->reg_se_wait, &wait);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010060
Vignesh Rb10848e2015-01-07 11:19:36 +053061 /*
62 * Sequencer should either be idle or
63 * busy applying the charge step.
64 */
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050065 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
Vignesh Rb10848e2015-01-07 11:19:36 +053066 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050067 tscadc->adc_waiting = false;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010068 }
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050069 tscadc->adc_in_use = true;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010070}
71
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050072void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010073{
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050074 spin_lock_irq(&tscadc->reg_lock);
75 am335x_tscadc_need_adc(tscadc);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010076
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050077 regmap_write(tscadc->regmap, REG_SE, val);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050078 spin_unlock_irq(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010079}
80EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
81
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050082void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010083{
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010084 unsigned long flags;
85
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050086 spin_lock_irqsave(&tscadc->reg_lock, flags);
87 tscadc->adc_in_use = false;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050088 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050089 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010090}
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010091EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
Patil, Rachnaabeccee2013-01-24 03:45:05 +000092
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050093void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
Patil, Rachnaabeccee2013-01-24 03:45:05 +000094{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +020095 unsigned long flags;
96
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050097 spin_lock_irqsave(&tscadc->reg_lock, flags);
98 tscadc->reg_se_cache &= ~val;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050099 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500100 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000101}
102EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
103
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500104static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530105{
106 unsigned int idleconfig;
107
Miquel Raynalbf0f3942021-10-15 10:14:53 +0200108 idleconfig = STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM;
109 if (ti_adc_with_touchscreen(tscadc))
110 idleconfig |= STEPCONFIG_YNN | STEPCONFIG_YPN;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530111
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500112 regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530113}
114
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800115static int ti_tscadc_probe(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530116{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200117 struct ti_tscadc_dev *tscadc;
118 struct resource *res;
119 struct clk *clk;
120 struct device_node *node;
121 struct mfd_cell *cell;
122 struct property *prop;
123 const __be32 *cur;
Miquel Raynal0a123302021-10-15 10:14:54 +0200124 bool use_tsc = false, use_mag = false;
Miquel Raynal36e48f02021-10-15 10:14:29 +0200125 u32 val;
Miquel Raynalb813f322021-10-15 10:14:40 +0200126 int err;
Miquel Raynal430b98f2021-10-15 10:14:50 +0200127 int tscmag_wires = 0, adc_channels = 0, cell_idx = 0, total_channels;
Miquel Raynal0a123302021-10-15 10:14:54 +0200128 int readouts = 0, mag_tracks = 0;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530129
Miquel Raynal61479472021-10-15 10:14:34 +0200130 /* Allocate memory for device */
131 tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
132 if (!tscadc)
133 return -ENOMEM;
134
135 tscadc->dev = &pdev->dev;
136
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200137 if (!pdev->dev.of_node) {
138 dev_err(&pdev->dev, "Could not find valid DT data.\n");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530139 return -EINVAL;
140 }
141
Miquel Raynalf7834842021-10-15 10:14:35 +0200142 tscadc->data = of_device_get_match_data(&pdev->dev);
143
Miquel Raynalbf0f3942021-10-15 10:14:53 +0200144 if (ti_adc_with_touchscreen(tscadc)) {
145 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
146 of_property_read_u32(node, "ti,wires", &tscmag_wires);
Miquel Raynal90fc6ff2021-10-15 10:14:55 +0200147 err = of_property_read_u32(node, "ti,coordinate-readouts",
148 &readouts);
149 if (err < 0)
150 of_property_read_u32(node, "ti,coordiante-readouts",
151 &readouts);
152
Miquel Raynalbf0f3942021-10-15 10:14:53 +0200153 of_node_put(node);
Miquel Raynal90fc6ff2021-10-15 10:14:55 +0200154
Miquel Raynalbf0f3942021-10-15 10:14:53 +0200155 if (tscmag_wires)
156 use_tsc = true;
Miquel Raynal0a123302021-10-15 10:14:54 +0200157 } else {
158 /*
159 * When adding support for the magnetic stripe reader, here is
160 * the place to look for the number of tracks used from device
161 * tree. Let's default to 0 for now.
162 */
163 mag_tracks = 0;
164 tscmag_wires = mag_tracks * 2;
165 if (tscmag_wires)
166 use_mag = true;
Miquel Raynalbf0f3942021-10-15 10:14:53 +0200167 }
Patil, Rachna5e53a692012-10-16 12:55:45 +0530168
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200169 node = of_get_child_by_name(pdev->dev.of_node, "adc");
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200170 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
171 adc_channels++;
172 if (val > 7) {
173 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
Miquel Raynal243e3cb2021-10-15 10:14:28 +0200174 val);
Miquel Raynal29f95e82021-10-15 10:14:26 +0200175 of_node_put(node);
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200176 return -EINVAL;
177 }
178 }
Miquel Raynal29f95e82021-10-15 10:14:26 +0200179
180 of_node_put(node);
181
Miquel Raynal430b98f2021-10-15 10:14:50 +0200182 total_channels = tscmag_wires + adc_channels;
Patil, Rachna5e53a692012-10-16 12:55:45 +0530183 if (total_channels > 8) {
184 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
185 return -EINVAL;
186 }
Miquel Raynal243e3cb2021-10-15 10:14:28 +0200187
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300188 if (total_channels == 0) {
189 dev_err(&pdev->dev, "Need atleast one channel.\n");
190 return -EINVAL;
191 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530192
Miquel Raynal2a4e3332021-10-15 10:14:52 +0200193 if (use_tsc && (readouts * 2 + 2 + adc_channels > 16)) {
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200194 dev_err(&pdev->dev, "Too many step configurations requested\n");
195 return -EINVAL;
196 }
197
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530198 err = platform_get_irq(pdev, 0);
Tang Binbc239d82021-08-11 20:19:34 +0800199 if (err < 0)
Miquel Raynal287ee122021-10-15 10:14:30 +0200200 return err;
Tang Binbc239d82021-08-11 20:19:34 +0800201 else
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530202 tscadc->irq = err;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530203
Jingoo Han924ff912014-02-12 14:31:49 +0900204 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
205 tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
206 if (IS_ERR(tscadc->tscadc_base))
207 return PTR_ERR(tscadc->tscadc_base);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530208
Vignesh Raghavendrade98a432019-11-09 10:36:18 +0530209 tscadc->tscadc_phys_base = res->start;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500210 tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
Miquel Raynal243e3cb2021-10-15 10:14:28 +0200211 tscadc->tscadc_base,
212 &tscadc_regmap_config);
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500213 if (IS_ERR(tscadc->regmap)) {
Patil, Rachna01636eb2012-10-16 12:55:43 +0530214 dev_err(&pdev->dev, "regmap init failed\n");
Miquel Raynal287ee122021-10-15 10:14:30 +0200215 return PTR_ERR(tscadc->regmap);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530216 }
217
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000218 spin_lock_init(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100219 init_waitqueue_head(&tscadc->reg_se_wait);
220
Patil, Rachna01636eb2012-10-16 12:55:43 +0530221 pm_runtime_enable(&pdev->dev);
222 pm_runtime_get_sync(&pdev->dev);
223
224 /*
Miquel Raynalc4359f72021-10-15 10:14:31 +0200225 * The TSC_ADC_Subsystem has 2 clock domains: OCP_CLK and ADC_CLK.
226 * ADCs produce a 12-bit sample every 15 ADC_CLK cycles.
227 * am33xx ADCs expect to capture 200ksps.
Miquel Raynal0a123302021-10-15 10:14:54 +0200228 * am47xx ADCs expect to capture 867ksps.
229 * We need ADC clocks respectively running at 3MHz and 13MHz.
230 * These frequencies are valid since TSC_ADC_SS controller design
Miquel Raynalc4359f72021-10-15 10:14:31 +0200231 * assumes the OCP clock is at least 6x faster than the ADC clock.
Patil, Rachna01636eb2012-10-16 12:55:43 +0530232 */
Miquel Raynal235a96e2021-10-15 10:14:32 +0200233 clk = devm_clk_get(&pdev->dev, NULL);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530234 if (IS_ERR(clk)) {
Miquel Raynale40b5972021-10-15 10:14:51 +0200235 dev_err(&pdev->dev, "failed to get fck\n");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530236 err = PTR_ERR(clk);
237 goto err_disable_clk;
238 }
Patil, Rachnaefe31262013-07-20 17:27:35 +0100239
Miquel Raynalf7834842021-10-15 10:14:35 +0200240 tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500241 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530242
Miquel Raynalb813f322021-10-15 10:14:40 +0200243 /*
244 * Set the control register bits. tscadc->ctrl stores the configuration
245 * of the CTRL register but not the subsystem enable bit which must be
246 * added manually when timely.
247 */
Miquel Raynalbf0f3942021-10-15 10:14:53 +0200248 tscadc->ctrl = CNTRLREG_STEPID;
249 if (ti_adc_with_touchscreen(tscadc)) {
250 tscadc->ctrl |= CNTRLREG_TSC_STEPCONFIGWRT;
251 if (use_tsc) {
252 tscadc->ctrl |= CNTRLREG_TSC_ENB;
253 if (tscmag_wires == 5)
254 tscadc->ctrl |= CNTRLREG_TSC_5WIRE;
255 else
256 tscadc->ctrl |= CNTRLREG_TSC_4WIRE;
257 }
Miquel Raynal0a123302021-10-15 10:14:54 +0200258 } else {
259 tscadc->ctrl |= CNTRLREG_MAG_PREAMP_PWRDOWN |
260 CNTRLREG_MAG_PREAMP_BYPASS;
Jeff Lancef0933a62014-09-04 19:01:57 +0200261 }
Miquel Raynalb813f322021-10-15 10:14:40 +0200262 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530263
Miquel Raynal25b15d02021-10-15 10:14:38 +0200264 tscadc_idle_config(tscadc);
265
Patil, Rachna01636eb2012-10-16 12:55:43 +0530266 /* Enable the TSC module enable bit */
Miquel Raynalc3e36b5d02021-10-15 10:14:48 +0200267 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530268
Miquel Raynal0a123302021-10-15 10:14:54 +0200269 /* TSC or MAG Cell */
270 if (use_tsc || use_mag) {
Miquel Raynal7c605802021-10-15 10:14:37 +0200271 cell = &tscadc->cells[cell_idx++];
Miquel Raynalf7834842021-10-15 10:14:35 +0200272 cell->name = tscadc->data->secondary_feature_name;
273 cell->of_compatible = tscadc->data->secondary_feature_compatible;
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300274 cell->platform_data = &tscadc;
275 cell->pdata_size = sizeof(tscadc);
276 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530277
Patil, Rachna5e53a692012-10-16 12:55:45 +0530278 /* ADC Cell */
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300279 if (adc_channels > 0) {
Miquel Raynal7c605802021-10-15 10:14:37 +0200280 cell = &tscadc->cells[cell_idx++];
Miquel Raynalf7834842021-10-15 10:14:35 +0200281 cell->name = tscadc->data->adc_feature_name;
282 cell->of_compatible = tscadc->data->adc_feature_compatible;
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300283 cell->platform_data = &tscadc;
284 cell->pdata_size = sizeof(tscadc);
285 }
Patil, Rachna5e53a692012-10-16 12:55:45 +0530286
Vignesh Rb40ee002018-12-03 13:31:17 +0530287 err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
Miquel Raynal7c605802021-10-15 10:14:37 +0200288 tscadc->cells, cell_idx, NULL, 0, NULL);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530289 if (err < 0)
290 goto err_disable_clk;
291
Patil, Rachna01636eb2012-10-16 12:55:43 +0530292 platform_set_drvdata(pdev, tscadc);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530293 return 0;
294
295err_disable_clk:
296 pm_runtime_put_sync(&pdev->dev);
297 pm_runtime_disable(&pdev->dev);
Miquel Raynal287ee122021-10-15 10:14:30 +0200298
Patil, Rachna01636eb2012-10-16 12:55:43 +0530299 return err;
300}
301
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800302static int ti_tscadc_remove(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530303{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200304 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530305
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500306 regmap_write(tscadc->regmap, REG_SE, 0x00);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530307
308 pm_runtime_put_sync(&pdev->dev);
309 pm_runtime_disable(&pdev->dev);
310
311 mfd_remove_devices(tscadc->dev);
312
313 return 0;
314}
315
Vignesh Rc974ac72018-06-30 16:03:16 +0530316static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
317{
318 return device_may_wakeup(dev);
319}
320
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500321static int __maybe_unused tscadc_suspend(struct device *dev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530322{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200323 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530324
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500325 regmap_write(tscadc->regmap, REG_SE, 0x00);
Vignesh Rc974ac72018-06-30 16:03:16 +0530326 if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
327 u32 ctrl;
328
329 regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
330 ctrl &= ~(CNTRLREG_POWERDOWN);
Miquel Raynalc3e36b5d02021-10-15 10:14:48 +0200331 ctrl |= CNTRLREG_SSENB;
Vignesh Rc974ac72018-06-30 16:03:16 +0530332 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
333 }
Patil, Rachna01636eb2012-10-16 12:55:43 +0530334 pm_runtime_put_sync(dev);
335
336 return 0;
337}
338
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500339static int __maybe_unused tscadc_resume(struct device *dev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530340{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200341 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530342
343 pm_runtime_get_sync(dev);
344
Miquel Raynal3dafbe92021-10-15 10:14:39 +0200345 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
Miquel Raynalb813f322021-10-15 10:14:40 +0200346 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
Miquel Raynal25b15d02021-10-15 10:14:38 +0200347 tscadc_idle_config(tscadc);
Miquel Raynalc3e36b5d02021-10-15 10:14:48 +0200348 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530349
350 return 0;
351}
352
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500353static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530354
Miquel Raynalf7834842021-10-15 10:14:35 +0200355static const struct ti_tscadc_data tscdata = {
356 .adc_feature_name = "TI-am335x-adc",
357 .adc_feature_compatible = "ti,am3359-adc",
358 .secondary_feature_name = "TI-am335x-tsc",
359 .secondary_feature_compatible = "ti,am3359-tsc",
Miquel Raynal2f89c262021-10-15 10:14:49 +0200360 .target_clk_rate = TSC_ADC_CLK,
Miquel Raynalf7834842021-10-15 10:14:35 +0200361};
362
Miquel Raynal0a123302021-10-15 10:14:54 +0200363static const struct ti_tscadc_data magdata = {
364 .adc_feature_name = "TI-am43xx-adc",
365 .adc_feature_compatible = "ti,am4372-adc",
366 .secondary_feature_name = "TI-am43xx-mag",
367 .secondary_feature_compatible = "ti,am4372-mag",
368 .target_clk_rate = MAG_ADC_CLK,
369};
370
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000371static const struct of_device_id ti_tscadc_dt_ids[] = {
Miquel Raynalf7834842021-10-15 10:14:35 +0200372 { .compatible = "ti,am3359-tscadc", .data = &tscdata },
Miquel Raynal0a123302021-10-15 10:14:54 +0200373 { .compatible = "ti,am4372-magadc", .data = &magdata },
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000374 { }
375};
376MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
377
Patil, Rachna01636eb2012-10-16 12:55:43 +0530378static struct platform_driver ti_tscadc_driver = {
379 .driver = {
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000380 .name = "ti_am3359-tscadc",
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500381 .pm = &tscadc_pm_ops,
Sachin Kamat131221b2013-10-15 09:18:49 +0530382 .of_match_table = ti_tscadc_dt_ids,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530383 },
384 .probe = ti_tscadc_probe,
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800385 .remove = ti_tscadc_remove,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530386
387};
388
389module_platform_driver(ti_tscadc_driver);
390
Miquel Raynal0a123302021-10-15 10:14:54 +0200391MODULE_DESCRIPTION("TI touchscreen/magnetic stripe reader/ADC MFD controller driver");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530392MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
393MODULE_LICENSE("GPL");