Miquel Raynal | 3bda759 | 2021-10-15 10:14:27 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 2 | /* |
| 3 | * TI Touch Screen / ADC MFD driver |
| 4 | * |
Alexander A. Klimov | 4f4ed454 | 2020-07-22 21:24:54 +0200 | [diff] [blame] | 5 | * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/module.h> |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 9 | #include <linux/slab.h> |
| 10 | #include <linux/err.h> |
| 11 | #include <linux/io.h> |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/regmap.h> |
| 14 | #include <linux/mfd/core.h> |
| 15 | #include <linux/pm_runtime.h> |
Patil, Rachna | a6543a1 | 2013-01-24 03:45:09 +0000 | [diff] [blame] | 16 | #include <linux/of.h> |
| 17 | #include <linux/of_device.h> |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 18 | #include <linux/sched.h> |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 19 | |
| 20 | #include <linux/mfd/ti_am335x_tscadc.h> |
| 21 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 22 | static const struct regmap_config tscadc_regmap_config = { |
| 23 | .name = "ti_tscadc", |
| 24 | .reg_bits = 32, |
| 25 | .reg_stride = 4, |
| 26 | .val_bits = 32, |
| 27 | }; |
| 28 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 29 | void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val) |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 30 | { |
Sebastian Andrzej Siewior | 317b209 | 2013-10-22 16:12:39 +0200 | [diff] [blame] | 31 | unsigned long flags; |
| 32 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 33 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
| 34 | tscadc->reg_se_cache |= val; |
| 35 | if (tscadc->adc_waiting) |
| 36 | wake_up(&tscadc->reg_se_wait); |
| 37 | else if (!tscadc->adc_in_use) |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 38 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 39 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 40 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 41 | } |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 42 | EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache); |
| 43 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 44 | static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc) |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 45 | { |
| 46 | DEFINE_WAIT(wait); |
| 47 | u32 reg; |
| 48 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 49 | regmap_read(tscadc->regmap, REG_ADCFSM, ®); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 50 | if (reg & SEQ_STATUS) { |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 51 | tscadc->adc_waiting = true; |
| 52 | prepare_to_wait(&tscadc->reg_se_wait, &wait, |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 53 | TASK_UNINTERRUPTIBLE); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 54 | spin_unlock_irq(&tscadc->reg_lock); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 55 | |
| 56 | schedule(); |
| 57 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 58 | spin_lock_irq(&tscadc->reg_lock); |
| 59 | finish_wait(&tscadc->reg_se_wait, &wait); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 60 | |
Vignesh R | b10848e | 2015-01-07 11:19:36 +0530 | [diff] [blame] | 61 | /* |
| 62 | * Sequencer should either be idle or |
| 63 | * busy applying the charge step. |
| 64 | */ |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 65 | regmap_read(tscadc->regmap, REG_ADCFSM, ®); |
Vignesh R | b10848e | 2015-01-07 11:19:36 +0530 | [diff] [blame] | 66 | WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP)); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 67 | tscadc->adc_waiting = false; |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 68 | } |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 69 | tscadc->adc_in_use = true; |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 70 | } |
| 71 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 72 | void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val) |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 73 | { |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 74 | spin_lock_irq(&tscadc->reg_lock); |
| 75 | am335x_tscadc_need_adc(tscadc); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 76 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 77 | regmap_write(tscadc->regmap, REG_SE, val); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 78 | spin_unlock_irq(&tscadc->reg_lock); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 79 | } |
| 80 | EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once); |
| 81 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 82 | void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc) |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 83 | { |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 84 | unsigned long flags; |
| 85 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 86 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
| 87 | tscadc->adc_in_use = false; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 88 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 89 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 90 | } |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 91 | EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done); |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 92 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 93 | void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val) |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 94 | { |
Sebastian Andrzej Siewior | 317b209 | 2013-10-22 16:12:39 +0200 | [diff] [blame] | 95 | unsigned long flags; |
| 96 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 97 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
| 98 | tscadc->reg_se_cache &= ~val; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 99 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 100 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 101 | } |
| 102 | EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); |
| 103 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 104 | static void tscadc_idle_config(struct ti_tscadc_dev *tscadc) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 105 | { |
| 106 | unsigned int idleconfig; |
| 107 | |
Miquel Raynal | bf0f394 | 2021-10-15 10:14:53 +0200 | [diff] [blame] | 108 | idleconfig = STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM; |
| 109 | if (ti_adc_with_touchscreen(tscadc)) |
| 110 | idleconfig |= STEPCONFIG_YNN | STEPCONFIG_YPN; |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 111 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 112 | regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 113 | } |
| 114 | |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 115 | static int ti_tscadc_probe(struct platform_device *pdev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 116 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame] | 117 | struct ti_tscadc_dev *tscadc; |
| 118 | struct resource *res; |
| 119 | struct clk *clk; |
| 120 | struct device_node *node; |
| 121 | struct mfd_cell *cell; |
| 122 | struct property *prop; |
| 123 | const __be32 *cur; |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 124 | bool use_tsc = false, use_mag = false; |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame] | 125 | u32 val; |
Miquel Raynal | b813f32 | 2021-10-15 10:14:40 +0200 | [diff] [blame] | 126 | int err; |
Miquel Raynal | 430b98f | 2021-10-15 10:14:50 +0200 | [diff] [blame] | 127 | int tscmag_wires = 0, adc_channels = 0, cell_idx = 0, total_channels; |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 128 | int readouts = 0, mag_tracks = 0; |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 129 | |
Miquel Raynal | 6147947 | 2021-10-15 10:14:34 +0200 | [diff] [blame] | 130 | /* Allocate memory for device */ |
| 131 | tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL); |
| 132 | if (!tscadc) |
| 133 | return -ENOMEM; |
| 134 | |
| 135 | tscadc->dev = &pdev->dev; |
| 136 | |
Sebastian Andrzej Siewior | 9e5775f | 2013-05-21 17:56:49 +0200 | [diff] [blame] | 137 | if (!pdev->dev.of_node) { |
| 138 | dev_err(&pdev->dev, "Could not find valid DT data.\n"); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 139 | return -EINVAL; |
| 140 | } |
| 141 | |
Miquel Raynal | f783484 | 2021-10-15 10:14:35 +0200 | [diff] [blame] | 142 | tscadc->data = of_device_get_match_data(&pdev->dev); |
| 143 | |
Miquel Raynal | bf0f394 | 2021-10-15 10:14:53 +0200 | [diff] [blame] | 144 | if (ti_adc_with_touchscreen(tscadc)) { |
| 145 | node = of_get_child_by_name(pdev->dev.of_node, "tsc"); |
| 146 | of_property_read_u32(node, "ti,wires", &tscmag_wires); |
Miquel Raynal | 90fc6ff | 2021-10-15 10:14:55 +0200 | [diff] [blame^] | 147 | err = of_property_read_u32(node, "ti,coordinate-readouts", |
| 148 | &readouts); |
| 149 | if (err < 0) |
| 150 | of_property_read_u32(node, "ti,coordiante-readouts", |
| 151 | &readouts); |
| 152 | |
Miquel Raynal | bf0f394 | 2021-10-15 10:14:53 +0200 | [diff] [blame] | 153 | of_node_put(node); |
Miquel Raynal | 90fc6ff | 2021-10-15 10:14:55 +0200 | [diff] [blame^] | 154 | |
Miquel Raynal | bf0f394 | 2021-10-15 10:14:53 +0200 | [diff] [blame] | 155 | if (tscmag_wires) |
| 156 | use_tsc = true; |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 157 | } else { |
| 158 | /* |
| 159 | * When adding support for the magnetic stripe reader, here is |
| 160 | * the place to look for the number of tracks used from device |
| 161 | * tree. Let's default to 0 for now. |
| 162 | */ |
| 163 | mag_tracks = 0; |
| 164 | tscmag_wires = mag_tracks * 2; |
| 165 | if (tscmag_wires) |
| 166 | use_mag = true; |
Miquel Raynal | bf0f394 | 2021-10-15 10:14:53 +0200 | [diff] [blame] | 167 | } |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 168 | |
Sebastian Andrzej Siewior | 9e5775f | 2013-05-21 17:56:49 +0200 | [diff] [blame] | 169 | node = of_get_child_by_name(pdev->dev.of_node, "adc"); |
Sebastian Andrzej Siewior | 18926ed | 2013-05-29 17:39:02 +0200 | [diff] [blame] | 170 | of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { |
| 171 | adc_channels++; |
| 172 | if (val > 7) { |
| 173 | dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", |
Miquel Raynal | 243e3cb | 2021-10-15 10:14:28 +0200 | [diff] [blame] | 174 | val); |
Miquel Raynal | 29f95e8 | 2021-10-15 10:14:26 +0200 | [diff] [blame] | 175 | of_node_put(node); |
Sebastian Andrzej Siewior | 18926ed | 2013-05-29 17:39:02 +0200 | [diff] [blame] | 176 | return -EINVAL; |
| 177 | } |
| 178 | } |
Miquel Raynal | 29f95e8 | 2021-10-15 10:14:26 +0200 | [diff] [blame] | 179 | |
| 180 | of_node_put(node); |
| 181 | |
Miquel Raynal | 430b98f | 2021-10-15 10:14:50 +0200 | [diff] [blame] | 182 | total_channels = tscmag_wires + adc_channels; |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 183 | if (total_channels > 8) { |
| 184 | dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); |
| 185 | return -EINVAL; |
| 186 | } |
Miquel Raynal | 243e3cb | 2021-10-15 10:14:28 +0200 | [diff] [blame] | 187 | |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 188 | if (total_channels == 0) { |
| 189 | dev_err(&pdev->dev, "Need atleast one channel.\n"); |
| 190 | return -EINVAL; |
| 191 | } |
Patil, Rachna | 2b99baf | 2012-10-16 12:55:44 +0530 | [diff] [blame] | 192 | |
Miquel Raynal | 2a4e333 | 2021-10-15 10:14:52 +0200 | [diff] [blame] | 193 | if (use_tsc && (readouts * 2 + 2 + adc_channels > 16)) { |
Sebastian Andrzej Siewior | 18926ed | 2013-05-29 17:39:02 +0200 | [diff] [blame] | 194 | dev_err(&pdev->dev, "Too many step configurations requested\n"); |
| 195 | return -EINVAL; |
| 196 | } |
| 197 | |
Patil, Rachna | 3c39c9c | 2012-11-06 13:39:03 +0530 | [diff] [blame] | 198 | err = platform_get_irq(pdev, 0); |
Tang Bin | bc239d8 | 2021-08-11 20:19:34 +0800 | [diff] [blame] | 199 | if (err < 0) |
Miquel Raynal | 287ee12 | 2021-10-15 10:14:30 +0200 | [diff] [blame] | 200 | return err; |
Tang Bin | bc239d8 | 2021-08-11 20:19:34 +0800 | [diff] [blame] | 201 | else |
Patil, Rachna | 3c39c9c | 2012-11-06 13:39:03 +0530 | [diff] [blame] | 202 | tscadc->irq = err; |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 203 | |
Jingoo Han | 924ff91 | 2014-02-12 14:31:49 +0900 | [diff] [blame] | 204 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 205 | tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res); |
| 206 | if (IS_ERR(tscadc->tscadc_base)) |
| 207 | return PTR_ERR(tscadc->tscadc_base); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 208 | |
Vignesh Raghavendra | de98a43 | 2019-11-09 10:36:18 +0530 | [diff] [blame] | 209 | tscadc->tscadc_phys_base = res->start; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 210 | tscadc->regmap = devm_regmap_init_mmio(&pdev->dev, |
Miquel Raynal | 243e3cb | 2021-10-15 10:14:28 +0200 | [diff] [blame] | 211 | tscadc->tscadc_base, |
| 212 | &tscadc_regmap_config); |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 213 | if (IS_ERR(tscadc->regmap)) { |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 214 | dev_err(&pdev->dev, "regmap init failed\n"); |
Miquel Raynal | 287ee12 | 2021-10-15 10:14:30 +0200 | [diff] [blame] | 215 | return PTR_ERR(tscadc->regmap); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 216 | } |
| 217 | |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 218 | spin_lock_init(&tscadc->reg_lock); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 219 | init_waitqueue_head(&tscadc->reg_se_wait); |
| 220 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 221 | pm_runtime_enable(&pdev->dev); |
| 222 | pm_runtime_get_sync(&pdev->dev); |
| 223 | |
| 224 | /* |
Miquel Raynal | c4359f7 | 2021-10-15 10:14:31 +0200 | [diff] [blame] | 225 | * The TSC_ADC_Subsystem has 2 clock domains: OCP_CLK and ADC_CLK. |
| 226 | * ADCs produce a 12-bit sample every 15 ADC_CLK cycles. |
| 227 | * am33xx ADCs expect to capture 200ksps. |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 228 | * am47xx ADCs expect to capture 867ksps. |
| 229 | * We need ADC clocks respectively running at 3MHz and 13MHz. |
| 230 | * These frequencies are valid since TSC_ADC_SS controller design |
Miquel Raynal | c4359f7 | 2021-10-15 10:14:31 +0200 | [diff] [blame] | 231 | * assumes the OCP clock is at least 6x faster than the ADC clock. |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 232 | */ |
Miquel Raynal | 235a96e | 2021-10-15 10:14:32 +0200 | [diff] [blame] | 233 | clk = devm_clk_get(&pdev->dev, NULL); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 234 | if (IS_ERR(clk)) { |
Miquel Raynal | e40b597 | 2021-10-15 10:14:51 +0200 | [diff] [blame] | 235 | dev_err(&pdev->dev, "failed to get fck\n"); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 236 | err = PTR_ERR(clk); |
| 237 | goto err_disable_clk; |
| 238 | } |
Patil, Rachna | efe3126 | 2013-07-20 17:27:35 +0100 | [diff] [blame] | 239 | |
Miquel Raynal | f783484 | 2021-10-15 10:14:35 +0200 | [diff] [blame] | 240 | tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 241 | regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 242 | |
Miquel Raynal | b813f32 | 2021-10-15 10:14:40 +0200 | [diff] [blame] | 243 | /* |
| 244 | * Set the control register bits. tscadc->ctrl stores the configuration |
| 245 | * of the CTRL register but not the subsystem enable bit which must be |
| 246 | * added manually when timely. |
| 247 | */ |
Miquel Raynal | bf0f394 | 2021-10-15 10:14:53 +0200 | [diff] [blame] | 248 | tscadc->ctrl = CNTRLREG_STEPID; |
| 249 | if (ti_adc_with_touchscreen(tscadc)) { |
| 250 | tscadc->ctrl |= CNTRLREG_TSC_STEPCONFIGWRT; |
| 251 | if (use_tsc) { |
| 252 | tscadc->ctrl |= CNTRLREG_TSC_ENB; |
| 253 | if (tscmag_wires == 5) |
| 254 | tscadc->ctrl |= CNTRLREG_TSC_5WIRE; |
| 255 | else |
| 256 | tscadc->ctrl |= CNTRLREG_TSC_4WIRE; |
| 257 | } |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 258 | } else { |
| 259 | tscadc->ctrl |= CNTRLREG_MAG_PREAMP_PWRDOWN | |
| 260 | CNTRLREG_MAG_PREAMP_BYPASS; |
Jeff Lance | f0933a6 | 2014-09-04 19:01:57 +0200 | [diff] [blame] | 261 | } |
Miquel Raynal | b813f32 | 2021-10-15 10:14:40 +0200 | [diff] [blame] | 262 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 263 | |
Miquel Raynal | 25b15d0 | 2021-10-15 10:14:38 +0200 | [diff] [blame] | 264 | tscadc_idle_config(tscadc); |
| 265 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 266 | /* Enable the TSC module enable bit */ |
Miquel Raynal | c3e36b5d0 | 2021-10-15 10:14:48 +0200 | [diff] [blame] | 267 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 268 | |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 269 | /* TSC or MAG Cell */ |
| 270 | if (use_tsc || use_mag) { |
Miquel Raynal | 7c60580 | 2021-10-15 10:14:37 +0200 | [diff] [blame] | 271 | cell = &tscadc->cells[cell_idx++]; |
Miquel Raynal | f783484 | 2021-10-15 10:14:35 +0200 | [diff] [blame] | 272 | cell->name = tscadc->data->secondary_feature_name; |
| 273 | cell->of_compatible = tscadc->data->secondary_feature_compatible; |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 274 | cell->platform_data = &tscadc; |
| 275 | cell->pdata_size = sizeof(tscadc); |
| 276 | } |
Patil, Rachna | 2b99baf | 2012-10-16 12:55:44 +0530 | [diff] [blame] | 277 | |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 278 | /* ADC Cell */ |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 279 | if (adc_channels > 0) { |
Miquel Raynal | 7c60580 | 2021-10-15 10:14:37 +0200 | [diff] [blame] | 280 | cell = &tscadc->cells[cell_idx++]; |
Miquel Raynal | f783484 | 2021-10-15 10:14:35 +0200 | [diff] [blame] | 281 | cell->name = tscadc->data->adc_feature_name; |
| 282 | cell->of_compatible = tscadc->data->adc_feature_compatible; |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 283 | cell->platform_data = &tscadc; |
| 284 | cell->pdata_size = sizeof(tscadc); |
| 285 | } |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 286 | |
Vignesh R | b40ee00 | 2018-12-03 13:31:17 +0530 | [diff] [blame] | 287 | err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, |
Miquel Raynal | 7c60580 | 2021-10-15 10:14:37 +0200 | [diff] [blame] | 288 | tscadc->cells, cell_idx, NULL, 0, NULL); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 289 | if (err < 0) |
| 290 | goto err_disable_clk; |
| 291 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 292 | platform_set_drvdata(pdev, tscadc); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 293 | return 0; |
| 294 | |
| 295 | err_disable_clk: |
| 296 | pm_runtime_put_sync(&pdev->dev); |
| 297 | pm_runtime_disable(&pdev->dev); |
Miquel Raynal | 287ee12 | 2021-10-15 10:14:30 +0200 | [diff] [blame] | 298 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 299 | return err; |
| 300 | } |
| 301 | |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 302 | static int ti_tscadc_remove(struct platform_device *pdev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 303 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame] | 304 | struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 305 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 306 | regmap_write(tscadc->regmap, REG_SE, 0x00); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 307 | |
| 308 | pm_runtime_put_sync(&pdev->dev); |
| 309 | pm_runtime_disable(&pdev->dev); |
| 310 | |
| 311 | mfd_remove_devices(tscadc->dev); |
| 312 | |
| 313 | return 0; |
| 314 | } |
| 315 | |
Vignesh R | c974ac7 | 2018-06-30 16:03:16 +0530 | [diff] [blame] | 316 | static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data) |
| 317 | { |
| 318 | return device_may_wakeup(dev); |
| 319 | } |
| 320 | |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 321 | static int __maybe_unused tscadc_suspend(struct device *dev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 322 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame] | 323 | struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 324 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 325 | regmap_write(tscadc->regmap, REG_SE, 0x00); |
Vignesh R | c974ac7 | 2018-06-30 16:03:16 +0530 | [diff] [blame] | 326 | if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) { |
| 327 | u32 ctrl; |
| 328 | |
| 329 | regmap_read(tscadc->regmap, REG_CTRL, &ctrl); |
| 330 | ctrl &= ~(CNTRLREG_POWERDOWN); |
Miquel Raynal | c3e36b5d0 | 2021-10-15 10:14:48 +0200 | [diff] [blame] | 331 | ctrl |= CNTRLREG_SSENB; |
Vignesh R | c974ac7 | 2018-06-30 16:03:16 +0530 | [diff] [blame] | 332 | regmap_write(tscadc->regmap, REG_CTRL, ctrl); |
| 333 | } |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 334 | pm_runtime_put_sync(dev); |
| 335 | |
| 336 | return 0; |
| 337 | } |
| 338 | |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 339 | static int __maybe_unused tscadc_resume(struct device *dev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 340 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame] | 341 | struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 342 | |
| 343 | pm_runtime_get_sync(dev); |
| 344 | |
Miquel Raynal | 3dafbe9 | 2021-10-15 10:14:39 +0200 | [diff] [blame] | 345 | regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); |
Miquel Raynal | b813f32 | 2021-10-15 10:14:40 +0200 | [diff] [blame] | 346 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); |
Miquel Raynal | 25b15d0 | 2021-10-15 10:14:38 +0200 | [diff] [blame] | 347 | tscadc_idle_config(tscadc); |
Miquel Raynal | c3e36b5d0 | 2021-10-15 10:14:48 +0200 | [diff] [blame] | 348 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 349 | |
| 350 | return 0; |
| 351 | } |
| 352 | |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 353 | static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 354 | |
Miquel Raynal | f783484 | 2021-10-15 10:14:35 +0200 | [diff] [blame] | 355 | static const struct ti_tscadc_data tscdata = { |
| 356 | .adc_feature_name = "TI-am335x-adc", |
| 357 | .adc_feature_compatible = "ti,am3359-adc", |
| 358 | .secondary_feature_name = "TI-am335x-tsc", |
| 359 | .secondary_feature_compatible = "ti,am3359-tsc", |
Miquel Raynal | 2f89c26 | 2021-10-15 10:14:49 +0200 | [diff] [blame] | 360 | .target_clk_rate = TSC_ADC_CLK, |
Miquel Raynal | f783484 | 2021-10-15 10:14:35 +0200 | [diff] [blame] | 361 | }; |
| 362 | |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 363 | static const struct ti_tscadc_data magdata = { |
| 364 | .adc_feature_name = "TI-am43xx-adc", |
| 365 | .adc_feature_compatible = "ti,am4372-adc", |
| 366 | .secondary_feature_name = "TI-am43xx-mag", |
| 367 | .secondary_feature_compatible = "ti,am4372-mag", |
| 368 | .target_clk_rate = MAG_ADC_CLK, |
| 369 | }; |
| 370 | |
Patil, Rachna | a6543a1 | 2013-01-24 03:45:09 +0000 | [diff] [blame] | 371 | static const struct of_device_id ti_tscadc_dt_ids[] = { |
Miquel Raynal | f783484 | 2021-10-15 10:14:35 +0200 | [diff] [blame] | 372 | { .compatible = "ti,am3359-tscadc", .data = &tscdata }, |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 373 | { .compatible = "ti,am4372-magadc", .data = &magdata }, |
Patil, Rachna | a6543a1 | 2013-01-24 03:45:09 +0000 | [diff] [blame] | 374 | { } |
| 375 | }; |
| 376 | MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); |
| 377 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 378 | static struct platform_driver ti_tscadc_driver = { |
| 379 | .driver = { |
Patil, Rachna | a6543a1 | 2013-01-24 03:45:09 +0000 | [diff] [blame] | 380 | .name = "ti_am3359-tscadc", |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 381 | .pm = &tscadc_pm_ops, |
Sachin Kamat | 131221b | 2013-10-15 09:18:49 +0530 | [diff] [blame] | 382 | .of_match_table = ti_tscadc_dt_ids, |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 383 | }, |
| 384 | .probe = ti_tscadc_probe, |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 385 | .remove = ti_tscadc_remove, |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 386 | |
| 387 | }; |
| 388 | |
| 389 | module_platform_driver(ti_tscadc_driver); |
| 390 | |
Miquel Raynal | 0a12330 | 2021-10-15 10:14:54 +0200 | [diff] [blame] | 391 | MODULE_DESCRIPTION("TI touchscreen/magnetic stripe reader/ADC MFD controller driver"); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 392 | MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); |
| 393 | MODULE_LICENSE("GPL"); |