blob: a211b35ad1067a42b2d610060d2af810696b1d84 [file] [log] [blame]
Miquel Raynal3bda7592021-10-15 10:14:27 +02001// SPDX-License-Identifier: GPL-2.0-only
Patil, Rachna01636eb2012-10-16 12:55:43 +05302/*
3 * TI Touch Screen / ADC MFD driver
4 *
Alexander A. Klimov4f4ed4542020-07-22 21:24:54 +02005 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
Patil, Rachna01636eb2012-10-16 12:55:43 +05306 */
7
8#include <linux/module.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +05309#include <linux/slab.h>
10#include <linux/err.h>
11#include <linux/io.h>
12#include <linux/clk.h>
13#include <linux/regmap.h>
14#include <linux/mfd/core.h>
15#include <linux/pm_runtime.h>
Patil, Rachnaa6543a12013-01-24 03:45:09 +000016#include <linux/of.h>
17#include <linux/of_device.h>
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010018#include <linux/sched.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +053019
20#include <linux/mfd/ti_am335x_tscadc.h>
21
Patil, Rachna01636eb2012-10-16 12:55:43 +053022static const struct regmap_config tscadc_regmap_config = {
23 .name = "ti_tscadc",
24 .reg_bits = 32,
25 .reg_stride = 4,
26 .val_bits = 32,
27};
28
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050029void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
Patil, Rachnaabeccee2013-01-24 03:45:05 +000030{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +020031 unsigned long flags;
32
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050033 spin_lock_irqsave(&tscadc->reg_lock, flags);
34 tscadc->reg_se_cache |= val;
35 if (tscadc->adc_waiting)
36 wake_up(&tscadc->reg_se_wait);
37 else if (!tscadc->adc_in_use)
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050038 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010039
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050040 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +000041}
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010042EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
43
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050044static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010045{
46 DEFINE_WAIT(wait);
47 u32 reg;
48
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050049 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010050 if (reg & SEQ_STATUS) {
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050051 tscadc->adc_waiting = true;
52 prepare_to_wait(&tscadc->reg_se_wait, &wait,
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010053 TASK_UNINTERRUPTIBLE);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050054 spin_unlock_irq(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010055
56 schedule();
57
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050058 spin_lock_irq(&tscadc->reg_lock);
59 finish_wait(&tscadc->reg_se_wait, &wait);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010060
Vignesh Rb10848e2015-01-07 11:19:36 +053061 /*
62 * Sequencer should either be idle or
63 * busy applying the charge step.
64 */
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050065 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
Vignesh Rb10848e2015-01-07 11:19:36 +053066 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050067 tscadc->adc_waiting = false;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010068 }
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050069 tscadc->adc_in_use = true;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010070}
71
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050072void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010073{
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050074 spin_lock_irq(&tscadc->reg_lock);
75 am335x_tscadc_need_adc(tscadc);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010076
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050077 regmap_write(tscadc->regmap, REG_SE, val);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050078 spin_unlock_irq(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010079}
80EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
81
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050082void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010083{
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010084 unsigned long flags;
85
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050086 spin_lock_irqsave(&tscadc->reg_lock, flags);
87 tscadc->adc_in_use = false;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050088 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050089 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010090}
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010091EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
Patil, Rachnaabeccee2013-01-24 03:45:05 +000092
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050093void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
Patil, Rachnaabeccee2013-01-24 03:45:05 +000094{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +020095 unsigned long flags;
96
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050097 spin_lock_irqsave(&tscadc->reg_lock, flags);
98 tscadc->reg_se_cache &= ~val;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050099 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500100 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000101}
102EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
103
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500104static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530105{
106 unsigned int idleconfig;
107
108 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
109 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
110
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500111 regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530112}
113
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800114static int ti_tscadc_probe(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530115{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200116 struct ti_tscadc_dev *tscadc;
117 struct resource *res;
118 struct clk *clk;
119 struct device_node *node;
120 struct mfd_cell *cell;
121 struct property *prop;
122 const __be32 *cur;
123 u32 val;
124 int err, ctrl;
125 int clock_rate;
126 int tsc_wires = 0, adc_channels = 0, total_channels;
127 int readouts = 0;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530128
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200129 if (!pdev->dev.of_node) {
130 dev_err(&pdev->dev, "Could not find valid DT data.\n");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530131 return -EINVAL;
132 }
133
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200134 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
135 of_property_read_u32(node, "ti,wires", &tsc_wires);
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200136 of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
Miquel Raynal29f95e82021-10-15 10:14:26 +0200137 of_node_put(node);
Patil, Rachna5e53a692012-10-16 12:55:45 +0530138
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200139 node = of_get_child_by_name(pdev->dev.of_node, "adc");
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200140 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
141 adc_channels++;
142 if (val > 7) {
143 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
Miquel Raynal243e3cb2021-10-15 10:14:28 +0200144 val);
Miquel Raynal29f95e82021-10-15 10:14:26 +0200145 of_node_put(node);
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200146 return -EINVAL;
147 }
148 }
Miquel Raynal29f95e82021-10-15 10:14:26 +0200149
150 of_node_put(node);
151
Patil, Rachna5e53a692012-10-16 12:55:45 +0530152 total_channels = tsc_wires + adc_channels;
Patil, Rachna5e53a692012-10-16 12:55:45 +0530153 if (total_channels > 8) {
154 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
155 return -EINVAL;
156 }
Miquel Raynal243e3cb2021-10-15 10:14:28 +0200157
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300158 if (total_channels == 0) {
159 dev_err(&pdev->dev, "Need atleast one channel.\n");
160 return -EINVAL;
161 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530162
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200163 if (readouts * 2 + 2 + adc_channels > 16) {
164 dev_err(&pdev->dev, "Too many step configurations requested\n");
165 return -EINVAL;
166 }
167
Patil, Rachna01636eb2012-10-16 12:55:43 +0530168 /* Allocate memory for device */
Andrew F. Davisdea1c702016-06-08 10:54:36 -0500169 tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
Markus Elfringa2e87fe2018-03-08 15:15:51 +0100170 if (!tscadc)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530171 return -ENOMEM;
Markus Elfringa2e87fe2018-03-08 15:15:51 +0100172
Patil, Rachna01636eb2012-10-16 12:55:43 +0530173 tscadc->dev = &pdev->dev;
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530174
175 err = platform_get_irq(pdev, 0);
Tang Binbc239d82021-08-11 20:19:34 +0800176 if (err < 0)
Miquel Raynal287ee122021-10-15 10:14:30 +0200177 return err;
Tang Binbc239d82021-08-11 20:19:34 +0800178 else
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530179 tscadc->irq = err;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530180
Jingoo Han924ff912014-02-12 14:31:49 +0900181 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
182 tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
183 if (IS_ERR(tscadc->tscadc_base))
184 return PTR_ERR(tscadc->tscadc_base);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530185
Vignesh Raghavendrade98a432019-11-09 10:36:18 +0530186 tscadc->tscadc_phys_base = res->start;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500187 tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
Miquel Raynal243e3cb2021-10-15 10:14:28 +0200188 tscadc->tscadc_base,
189 &tscadc_regmap_config);
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500190 if (IS_ERR(tscadc->regmap)) {
Patil, Rachna01636eb2012-10-16 12:55:43 +0530191 dev_err(&pdev->dev, "regmap init failed\n");
Miquel Raynal287ee122021-10-15 10:14:30 +0200192 return PTR_ERR(tscadc->regmap);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530193 }
194
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000195 spin_lock_init(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100196 init_waitqueue_head(&tscadc->reg_se_wait);
197
Patil, Rachna01636eb2012-10-16 12:55:43 +0530198 pm_runtime_enable(&pdev->dev);
199 pm_runtime_get_sync(&pdev->dev);
200
201 /*
202 * The TSC_ADC_Subsystem has 2 clock domains
203 * OCP_CLK and ADC_CLK.
204 * The ADC clock is expected to run at target of 3MHz,
205 * and expected to capture 12-bit data at a rate of 200 KSPS.
206 * The TSC_ADC_SS controller design assumes the OCP clock is
207 * at least 6x faster than the ADC clock.
208 */
Zumeng Chenc2b15092018-07-04 12:35:29 +0800209 clk = devm_clk_get(&pdev->dev, "adc_tsc_fck");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530210 if (IS_ERR(clk)) {
211 dev_err(&pdev->dev, "failed to get TSC fck\n");
212 err = PTR_ERR(clk);
213 goto err_disable_clk;
214 }
215 clock_rate = clk_get_rate(clk);
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200216 tscadc->clk_div = clock_rate / ADC_CLK;
Patil, Rachnaefe31262013-07-20 17:27:35 +0100217
Patil, Rachna01636eb2012-10-16 12:55:43 +0530218 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200219 tscadc->clk_div--;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500220 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530221
222 /* Set the control register bits */
Jeff Lancef0933a62014-09-04 19:01:57 +0200223 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500224 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530225
226 /* Set register bits for Idle Config Mode */
Jeff Lancef0933a62014-09-04 19:01:57 +0200227 if (tsc_wires > 0) {
228 tscadc->tsc_wires = tsc_wires;
229 if (tsc_wires == 5)
230 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
231 else
232 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100233 tscadc_idle_config(tscadc);
Jeff Lancef0933a62014-09-04 19:01:57 +0200234 }
Patil, Rachna01636eb2012-10-16 12:55:43 +0530235
236 /* Enable the TSC module enable bit */
Patil, Rachna01636eb2012-10-16 12:55:43 +0530237 ctrl |= CNTRLREG_TSCSSENB;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500238 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530239
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300240 tscadc->used_cells = 0;
241 tscadc->tsc_cell = -1;
242 tscadc->adc_cell = -1;
243
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530244 /* TSC Cell */
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300245 if (tsc_wires > 0) {
246 tscadc->tsc_cell = tscadc->used_cells;
247 cell = &tscadc->cells[tscadc->used_cells++];
Sebastian Andrzej Siewior5f184e62013-05-27 17:08:28 +0200248 cell->name = "TI-am335x-tsc";
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300249 cell->of_compatible = "ti,am3359-tsc";
250 cell->platform_data = &tscadc;
251 cell->pdata_size = sizeof(tscadc);
252 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530253
Patil, Rachna5e53a692012-10-16 12:55:45 +0530254 /* ADC Cell */
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300255 if (adc_channels > 0) {
256 tscadc->adc_cell = tscadc->used_cells;
257 cell = &tscadc->cells[tscadc->used_cells++];
Sebastian Andrzej Siewior9f999282013-05-27 17:12:52 +0200258 cell->name = "TI-am335x-adc";
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300259 cell->of_compatible = "ti,am3359-adc";
260 cell->platform_data = &tscadc;
261 cell->pdata_size = sizeof(tscadc);
262 }
Patil, Rachna5e53a692012-10-16 12:55:45 +0530263
Vignesh Rb40ee002018-12-03 13:31:17 +0530264 err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
265 tscadc->cells, tscadc->used_cells, NULL,
266 0, NULL);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530267 if (err < 0)
268 goto err_disable_clk;
269
Patil, Rachna01636eb2012-10-16 12:55:43 +0530270 platform_set_drvdata(pdev, tscadc);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530271 return 0;
272
273err_disable_clk:
274 pm_runtime_put_sync(&pdev->dev);
275 pm_runtime_disable(&pdev->dev);
Miquel Raynal287ee122021-10-15 10:14:30 +0200276
Patil, Rachna01636eb2012-10-16 12:55:43 +0530277 return err;
278}
279
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800280static int ti_tscadc_remove(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530281{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200282 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530283
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500284 regmap_write(tscadc->regmap, REG_SE, 0x00);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530285
286 pm_runtime_put_sync(&pdev->dev);
287 pm_runtime_disable(&pdev->dev);
288
289 mfd_remove_devices(tscadc->dev);
290
291 return 0;
292}
293
Vignesh Rc974ac72018-06-30 16:03:16 +0530294static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
295{
296 return device_may_wakeup(dev);
297}
298
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500299static int __maybe_unused tscadc_suspend(struct device *dev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530300{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200301 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530302
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500303 regmap_write(tscadc->regmap, REG_SE, 0x00);
Vignesh Rc974ac72018-06-30 16:03:16 +0530304 if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
305 u32 ctrl;
306
307 regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
308 ctrl &= ~(CNTRLREG_POWERDOWN);
309 ctrl |= CNTRLREG_TSCSSENB;
310 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
311 }
Patil, Rachna01636eb2012-10-16 12:55:43 +0530312 pm_runtime_put_sync(dev);
313
314 return 0;
315}
316
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500317static int __maybe_unused tscadc_resume(struct device *dev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530318{
Miquel Raynal36e48f02021-10-15 10:14:29 +0200319 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
Jeff Lancef0933a62014-09-04 19:01:57 +0200320 u32 ctrl;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530321
322 pm_runtime_get_sync(dev);
323
324 /* context restore */
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100325 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500326 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100327
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500328 if (tscadc->tsc_cell != -1) {
329 if (tscadc->tsc_wires == 5)
Jeff Lancef0933a62014-09-04 19:01:57 +0200330 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
331 else
332 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500333 tscadc_idle_config(tscadc);
Jeff Lancef0933a62014-09-04 19:01:57 +0200334 }
335 ctrl |= CNTRLREG_TSCSSENB;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500336 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530337
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500338 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200339
Patil, Rachna01636eb2012-10-16 12:55:43 +0530340 return 0;
341}
342
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500343static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530344
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000345static const struct of_device_id ti_tscadc_dt_ids[] = {
346 { .compatible = "ti,am3359-tscadc", },
347 { }
348};
349MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
350
Patil, Rachna01636eb2012-10-16 12:55:43 +0530351static struct platform_driver ti_tscadc_driver = {
352 .driver = {
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000353 .name = "ti_am3359-tscadc",
Andrew F. Davisdae936a2016-06-08 10:54:32 -0500354 .pm = &tscadc_pm_ops,
Sachin Kamat131221b2013-10-15 09:18:49 +0530355 .of_match_table = ti_tscadc_dt_ids,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530356 },
357 .probe = ti_tscadc_probe,
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800358 .remove = ti_tscadc_remove,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530359
360};
361
362module_platform_driver(ti_tscadc_driver);
363
364MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
365MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
366MODULE_LICENSE("GPL");