Miquel Raynal | 3bda759 | 2021-10-15 10:14:27 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 2 | /* |
| 3 | * TI Touch Screen / ADC MFD driver |
| 4 | * |
Alexander A. Klimov | 4f4ed454 | 2020-07-22 21:24:54 +0200 | [diff] [blame] | 5 | * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/module.h> |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 9 | #include <linux/slab.h> |
| 10 | #include <linux/err.h> |
| 11 | #include <linux/io.h> |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/regmap.h> |
| 14 | #include <linux/mfd/core.h> |
| 15 | #include <linux/pm_runtime.h> |
Patil, Rachna | a6543a1 | 2013-01-24 03:45:09 +0000 | [diff] [blame] | 16 | #include <linux/of.h> |
| 17 | #include <linux/of_device.h> |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 18 | #include <linux/sched.h> |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 19 | |
| 20 | #include <linux/mfd/ti_am335x_tscadc.h> |
| 21 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 22 | static const struct regmap_config tscadc_regmap_config = { |
| 23 | .name = "ti_tscadc", |
| 24 | .reg_bits = 32, |
| 25 | .reg_stride = 4, |
| 26 | .val_bits = 32, |
| 27 | }; |
| 28 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 29 | void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val) |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 30 | { |
Sebastian Andrzej Siewior | 317b209 | 2013-10-22 16:12:39 +0200 | [diff] [blame] | 31 | unsigned long flags; |
| 32 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 33 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
| 34 | tscadc->reg_se_cache |= val; |
| 35 | if (tscadc->adc_waiting) |
| 36 | wake_up(&tscadc->reg_se_wait); |
| 37 | else if (!tscadc->adc_in_use) |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 38 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 39 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 40 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 41 | } |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 42 | EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache); |
| 43 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 44 | static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc) |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 45 | { |
| 46 | DEFINE_WAIT(wait); |
| 47 | u32 reg; |
| 48 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 49 | regmap_read(tscadc->regmap, REG_ADCFSM, ®); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 50 | if (reg & SEQ_STATUS) { |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 51 | tscadc->adc_waiting = true; |
| 52 | prepare_to_wait(&tscadc->reg_se_wait, &wait, |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 53 | TASK_UNINTERRUPTIBLE); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 54 | spin_unlock_irq(&tscadc->reg_lock); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 55 | |
| 56 | schedule(); |
| 57 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 58 | spin_lock_irq(&tscadc->reg_lock); |
| 59 | finish_wait(&tscadc->reg_se_wait, &wait); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 60 | |
Vignesh R | b10848e | 2015-01-07 11:19:36 +0530 | [diff] [blame] | 61 | /* |
| 62 | * Sequencer should either be idle or |
| 63 | * busy applying the charge step. |
| 64 | */ |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 65 | regmap_read(tscadc->regmap, REG_ADCFSM, ®); |
Vignesh R | b10848e | 2015-01-07 11:19:36 +0530 | [diff] [blame] | 66 | WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP)); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 67 | tscadc->adc_waiting = false; |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 68 | } |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 69 | tscadc->adc_in_use = true; |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 70 | } |
| 71 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 72 | void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val) |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 73 | { |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 74 | spin_lock_irq(&tscadc->reg_lock); |
| 75 | am335x_tscadc_need_adc(tscadc); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 76 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 77 | regmap_write(tscadc->regmap, REG_SE, val); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 78 | spin_unlock_irq(&tscadc->reg_lock); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 79 | } |
| 80 | EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once); |
| 81 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 82 | void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc) |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 83 | { |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 84 | unsigned long flags; |
| 85 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 86 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
| 87 | tscadc->adc_in_use = false; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 88 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 89 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
Sebastian Andrzej Siewior | 7e170c6 | 2013-12-19 16:28:29 +0100 | [diff] [blame] | 90 | } |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 91 | EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done); |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 92 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 93 | void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val) |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 94 | { |
Sebastian Andrzej Siewior | 317b209 | 2013-10-22 16:12:39 +0200 | [diff] [blame] | 95 | unsigned long flags; |
| 96 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 97 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
| 98 | tscadc->reg_se_cache &= ~val; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 99 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 100 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 101 | } |
| 102 | EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); |
| 103 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 104 | static void tscadc_idle_config(struct ti_tscadc_dev *tscadc) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 105 | { |
| 106 | unsigned int idleconfig; |
| 107 | |
| 108 | idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM | |
| 109 | STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN; |
| 110 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 111 | regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 112 | } |
| 113 | |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 114 | static int ti_tscadc_probe(struct platform_device *pdev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 115 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame^] | 116 | struct ti_tscadc_dev *tscadc; |
| 117 | struct resource *res; |
| 118 | struct clk *clk; |
| 119 | struct device_node *node; |
| 120 | struct mfd_cell *cell; |
| 121 | struct property *prop; |
| 122 | const __be32 *cur; |
| 123 | u32 val; |
| 124 | int err, ctrl; |
| 125 | int clock_rate; |
| 126 | int tsc_wires = 0, adc_channels = 0, total_channels; |
| 127 | int readouts = 0; |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 128 | |
Sebastian Andrzej Siewior | 9e5775f | 2013-05-21 17:56:49 +0200 | [diff] [blame] | 129 | if (!pdev->dev.of_node) { |
| 130 | dev_err(&pdev->dev, "Could not find valid DT data.\n"); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 131 | return -EINVAL; |
| 132 | } |
| 133 | |
Sebastian Andrzej Siewior | 9e5775f | 2013-05-21 17:56:49 +0200 | [diff] [blame] | 134 | node = of_get_child_by_name(pdev->dev.of_node, "tsc"); |
| 135 | of_property_read_u32(node, "ti,wires", &tsc_wires); |
Sebastian Andrzej Siewior | 18926ed | 2013-05-29 17:39:02 +0200 | [diff] [blame] | 136 | of_property_read_u32(node, "ti,coordiante-readouts", &readouts); |
Miquel Raynal | 29f95e8 | 2021-10-15 10:14:26 +0200 | [diff] [blame] | 137 | of_node_put(node); |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 138 | |
Sebastian Andrzej Siewior | 9e5775f | 2013-05-21 17:56:49 +0200 | [diff] [blame] | 139 | node = of_get_child_by_name(pdev->dev.of_node, "adc"); |
Sebastian Andrzej Siewior | 18926ed | 2013-05-29 17:39:02 +0200 | [diff] [blame] | 140 | of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { |
| 141 | adc_channels++; |
| 142 | if (val > 7) { |
| 143 | dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", |
Miquel Raynal | 243e3cb | 2021-10-15 10:14:28 +0200 | [diff] [blame] | 144 | val); |
Miquel Raynal | 29f95e8 | 2021-10-15 10:14:26 +0200 | [diff] [blame] | 145 | of_node_put(node); |
Sebastian Andrzej Siewior | 18926ed | 2013-05-29 17:39:02 +0200 | [diff] [blame] | 146 | return -EINVAL; |
| 147 | } |
| 148 | } |
Miquel Raynal | 29f95e8 | 2021-10-15 10:14:26 +0200 | [diff] [blame] | 149 | |
| 150 | of_node_put(node); |
| 151 | |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 152 | total_channels = tsc_wires + adc_channels; |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 153 | if (total_channels > 8) { |
| 154 | dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); |
| 155 | return -EINVAL; |
| 156 | } |
Miquel Raynal | 243e3cb | 2021-10-15 10:14:28 +0200 | [diff] [blame] | 157 | |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 158 | if (total_channels == 0) { |
| 159 | dev_err(&pdev->dev, "Need atleast one channel.\n"); |
| 160 | return -EINVAL; |
| 161 | } |
Patil, Rachna | 2b99baf | 2012-10-16 12:55:44 +0530 | [diff] [blame] | 162 | |
Sebastian Andrzej Siewior | 18926ed | 2013-05-29 17:39:02 +0200 | [diff] [blame] | 163 | if (readouts * 2 + 2 + adc_channels > 16) { |
| 164 | dev_err(&pdev->dev, "Too many step configurations requested\n"); |
| 165 | return -EINVAL; |
| 166 | } |
| 167 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 168 | /* Allocate memory for device */ |
Andrew F. Davis | dea1c70 | 2016-06-08 10:54:36 -0500 | [diff] [blame] | 169 | tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL); |
Markus Elfring | a2e87fe | 2018-03-08 15:15:51 +0100 | [diff] [blame] | 170 | if (!tscadc) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 171 | return -ENOMEM; |
Markus Elfring | a2e87fe | 2018-03-08 15:15:51 +0100 | [diff] [blame] | 172 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 173 | tscadc->dev = &pdev->dev; |
Patil, Rachna | 3c39c9c | 2012-11-06 13:39:03 +0530 | [diff] [blame] | 174 | |
| 175 | err = platform_get_irq(pdev, 0); |
Tang Bin | bc239d8 | 2021-08-11 20:19:34 +0800 | [diff] [blame] | 176 | if (err < 0) |
Miquel Raynal | 287ee12 | 2021-10-15 10:14:30 +0200 | [diff] [blame] | 177 | return err; |
Tang Bin | bc239d8 | 2021-08-11 20:19:34 +0800 | [diff] [blame] | 178 | else |
Patil, Rachna | 3c39c9c | 2012-11-06 13:39:03 +0530 | [diff] [blame] | 179 | tscadc->irq = err; |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 180 | |
Jingoo Han | 924ff91 | 2014-02-12 14:31:49 +0900 | [diff] [blame] | 181 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 182 | tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res); |
| 183 | if (IS_ERR(tscadc->tscadc_base)) |
| 184 | return PTR_ERR(tscadc->tscadc_base); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 185 | |
Vignesh Raghavendra | de98a43 | 2019-11-09 10:36:18 +0530 | [diff] [blame] | 186 | tscadc->tscadc_phys_base = res->start; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 187 | tscadc->regmap = devm_regmap_init_mmio(&pdev->dev, |
Miquel Raynal | 243e3cb | 2021-10-15 10:14:28 +0200 | [diff] [blame] | 188 | tscadc->tscadc_base, |
| 189 | &tscadc_regmap_config); |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 190 | if (IS_ERR(tscadc->regmap)) { |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 191 | dev_err(&pdev->dev, "regmap init failed\n"); |
Miquel Raynal | 287ee12 | 2021-10-15 10:14:30 +0200 | [diff] [blame] | 192 | return PTR_ERR(tscadc->regmap); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 193 | } |
| 194 | |
Patil, Rachna | abeccee | 2013-01-24 03:45:05 +0000 | [diff] [blame] | 195 | spin_lock_init(&tscadc->reg_lock); |
Sebastian Andrzej Siewior | 7ca6740 | 2013-12-19 16:28:31 +0100 | [diff] [blame] | 196 | init_waitqueue_head(&tscadc->reg_se_wait); |
| 197 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 198 | pm_runtime_enable(&pdev->dev); |
| 199 | pm_runtime_get_sync(&pdev->dev); |
| 200 | |
| 201 | /* |
| 202 | * The TSC_ADC_Subsystem has 2 clock domains |
| 203 | * OCP_CLK and ADC_CLK. |
| 204 | * The ADC clock is expected to run at target of 3MHz, |
| 205 | * and expected to capture 12-bit data at a rate of 200 KSPS. |
| 206 | * The TSC_ADC_SS controller design assumes the OCP clock is |
| 207 | * at least 6x faster than the ADC clock. |
| 208 | */ |
Zumeng Chen | c2b1509 | 2018-07-04 12:35:29 +0800 | [diff] [blame] | 209 | clk = devm_clk_get(&pdev->dev, "adc_tsc_fck"); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 210 | if (IS_ERR(clk)) { |
| 211 | dev_err(&pdev->dev, "failed to get TSC fck\n"); |
| 212 | err = PTR_ERR(clk); |
| 213 | goto err_disable_clk; |
| 214 | } |
| 215 | clock_rate = clk_get_rate(clk); |
Matthias Kaehlcke | e90f875 | 2013-09-23 22:43:29 +0200 | [diff] [blame] | 216 | tscadc->clk_div = clock_rate / ADC_CLK; |
Patil, Rachna | efe3126 | 2013-07-20 17:27:35 +0100 | [diff] [blame] | 217 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 218 | /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ |
Matthias Kaehlcke | e90f875 | 2013-09-23 22:43:29 +0200 | [diff] [blame] | 219 | tscadc->clk_div--; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 220 | regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 221 | |
| 222 | /* Set the control register bits */ |
Jeff Lance | f0933a6 | 2014-09-04 19:01:57 +0200 | [diff] [blame] | 223 | ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 224 | regmap_write(tscadc->regmap, REG_CTRL, ctrl); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 225 | |
| 226 | /* Set register bits for Idle Config Mode */ |
Jeff Lance | f0933a6 | 2014-09-04 19:01:57 +0200 | [diff] [blame] | 227 | if (tsc_wires > 0) { |
| 228 | tscadc->tsc_wires = tsc_wires; |
| 229 | if (tsc_wires == 5) |
| 230 | ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; |
| 231 | else |
| 232 | ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; |
Patil, Rachna | b5f8b76 | 2013-07-20 17:27:34 +0100 | [diff] [blame] | 233 | tscadc_idle_config(tscadc); |
Jeff Lance | f0933a6 | 2014-09-04 19:01:57 +0200 | [diff] [blame] | 234 | } |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 235 | |
| 236 | /* Enable the TSC module enable bit */ |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 237 | ctrl |= CNTRLREG_TSCSSENB; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 238 | regmap_write(tscadc->regmap, REG_CTRL, ctrl); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 239 | |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 240 | tscadc->used_cells = 0; |
| 241 | tscadc->tsc_cell = -1; |
| 242 | tscadc->adc_cell = -1; |
| 243 | |
Patil, Rachna | 2b99baf | 2012-10-16 12:55:44 +0530 | [diff] [blame] | 244 | /* TSC Cell */ |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 245 | if (tsc_wires > 0) { |
| 246 | tscadc->tsc_cell = tscadc->used_cells; |
| 247 | cell = &tscadc->cells[tscadc->used_cells++]; |
Sebastian Andrzej Siewior | 5f184e6 | 2013-05-27 17:08:28 +0200 | [diff] [blame] | 248 | cell->name = "TI-am335x-tsc"; |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 249 | cell->of_compatible = "ti,am3359-tsc"; |
| 250 | cell->platform_data = &tscadc; |
| 251 | cell->pdata_size = sizeof(tscadc); |
| 252 | } |
Patil, Rachna | 2b99baf | 2012-10-16 12:55:44 +0530 | [diff] [blame] | 253 | |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 254 | /* ADC Cell */ |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 255 | if (adc_channels > 0) { |
| 256 | tscadc->adc_cell = tscadc->used_cells; |
| 257 | cell = &tscadc->cells[tscadc->used_cells++]; |
Sebastian Andrzej Siewior | 9f99928 | 2013-05-27 17:12:52 +0200 | [diff] [blame] | 258 | cell->name = "TI-am335x-adc"; |
Pantelis Antoniou | 24d5c82 | 2012-10-13 16:37:24 +0300 | [diff] [blame] | 259 | cell->of_compatible = "ti,am3359-adc"; |
| 260 | cell->platform_data = &tscadc; |
| 261 | cell->pdata_size = sizeof(tscadc); |
| 262 | } |
Patil, Rachna | 5e53a69 | 2012-10-16 12:55:45 +0530 | [diff] [blame] | 263 | |
Vignesh R | b40ee00 | 2018-12-03 13:31:17 +0530 | [diff] [blame] | 264 | err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, |
| 265 | tscadc->cells, tscadc->used_cells, NULL, |
| 266 | 0, NULL); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 267 | if (err < 0) |
| 268 | goto err_disable_clk; |
| 269 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 270 | platform_set_drvdata(pdev, tscadc); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 271 | return 0; |
| 272 | |
| 273 | err_disable_clk: |
| 274 | pm_runtime_put_sync(&pdev->dev); |
| 275 | pm_runtime_disable(&pdev->dev); |
Miquel Raynal | 287ee12 | 2021-10-15 10:14:30 +0200 | [diff] [blame] | 276 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 277 | return err; |
| 278 | } |
| 279 | |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 280 | static int ti_tscadc_remove(struct platform_device *pdev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 281 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame^] | 282 | struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 283 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 284 | regmap_write(tscadc->regmap, REG_SE, 0x00); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 285 | |
| 286 | pm_runtime_put_sync(&pdev->dev); |
| 287 | pm_runtime_disable(&pdev->dev); |
| 288 | |
| 289 | mfd_remove_devices(tscadc->dev); |
| 290 | |
| 291 | return 0; |
| 292 | } |
| 293 | |
Vignesh R | c974ac7 | 2018-06-30 16:03:16 +0530 | [diff] [blame] | 294 | static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data) |
| 295 | { |
| 296 | return device_may_wakeup(dev); |
| 297 | } |
| 298 | |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 299 | static int __maybe_unused tscadc_suspend(struct device *dev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 300 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame^] | 301 | struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 302 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 303 | regmap_write(tscadc->regmap, REG_SE, 0x00); |
Vignesh R | c974ac7 | 2018-06-30 16:03:16 +0530 | [diff] [blame] | 304 | if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) { |
| 305 | u32 ctrl; |
| 306 | |
| 307 | regmap_read(tscadc->regmap, REG_CTRL, &ctrl); |
| 308 | ctrl &= ~(CNTRLREG_POWERDOWN); |
| 309 | ctrl |= CNTRLREG_TSCSSENB; |
| 310 | regmap_write(tscadc->regmap, REG_CTRL, ctrl); |
| 311 | } |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 312 | pm_runtime_put_sync(dev); |
| 313 | |
| 314 | return 0; |
| 315 | } |
| 316 | |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 317 | static int __maybe_unused tscadc_resume(struct device *dev) |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 318 | { |
Miquel Raynal | 36e48f0 | 2021-10-15 10:14:29 +0200 | [diff] [blame^] | 319 | struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); |
Jeff Lance | f0933a6 | 2014-09-04 19:01:57 +0200 | [diff] [blame] | 320 | u32 ctrl; |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 321 | |
| 322 | pm_runtime_get_sync(dev); |
| 323 | |
| 324 | /* context restore */ |
Patil, Rachna | b5f8b76 | 2013-07-20 17:27:34 +0100 | [diff] [blame] | 325 | ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 326 | regmap_write(tscadc->regmap, REG_CTRL, ctrl); |
Patil, Rachna | b5f8b76 | 2013-07-20 17:27:34 +0100 | [diff] [blame] | 327 | |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 328 | if (tscadc->tsc_cell != -1) { |
| 329 | if (tscadc->tsc_wires == 5) |
Jeff Lance | f0933a6 | 2014-09-04 19:01:57 +0200 | [diff] [blame] | 330 | ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; |
| 331 | else |
| 332 | ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; |
Andrew F. Davis | a318b7d | 2016-06-08 10:54:34 -0500 | [diff] [blame] | 333 | tscadc_idle_config(tscadc); |
Jeff Lance | f0933a6 | 2014-09-04 19:01:57 +0200 | [diff] [blame] | 334 | } |
| 335 | ctrl |= CNTRLREG_TSCSSENB; |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 336 | regmap_write(tscadc->regmap, REG_CTRL, ctrl); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 337 | |
Andrew F. Davis | 0d3a7cc | 2016-06-08 10:54:35 -0500 | [diff] [blame] | 338 | regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); |
Matthias Kaehlcke | e90f875 | 2013-09-23 22:43:29 +0200 | [diff] [blame] | 339 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 340 | return 0; |
| 341 | } |
| 342 | |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 343 | static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume); |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 344 | |
Patil, Rachna | a6543a1 | 2013-01-24 03:45:09 +0000 | [diff] [blame] | 345 | static const struct of_device_id ti_tscadc_dt_ids[] = { |
| 346 | { .compatible = "ti,am3359-tscadc", }, |
| 347 | { } |
| 348 | }; |
| 349 | MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); |
| 350 | |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 351 | static struct platform_driver ti_tscadc_driver = { |
| 352 | .driver = { |
Patil, Rachna | a6543a1 | 2013-01-24 03:45:09 +0000 | [diff] [blame] | 353 | .name = "ti_am3359-tscadc", |
Andrew F. Davis | dae936a | 2016-06-08 10:54:32 -0500 | [diff] [blame] | 354 | .pm = &tscadc_pm_ops, |
Sachin Kamat | 131221b | 2013-10-15 09:18:49 +0530 | [diff] [blame] | 355 | .of_match_table = ti_tscadc_dt_ids, |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 356 | }, |
| 357 | .probe = ti_tscadc_probe, |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 358 | .remove = ti_tscadc_remove, |
Patil, Rachna | 01636eb | 2012-10-16 12:55:43 +0530 | [diff] [blame] | 359 | |
| 360 | }; |
| 361 | |
| 362 | module_platform_driver(ti_tscadc_driver); |
| 363 | |
| 364 | MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver"); |
| 365 | MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); |
| 366 | MODULE_LICENSE("GPL"); |