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Anson Huang5eed8002020-02-29 11:44:20 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2020 NXP.
4 *
5 * Author: Anson Huang <Anson.Huang@nxp.com>
6 */
7
Anson Huang2b8f1f02020-03-20 11:26:30 +08008#include <linux/bitfield.h>
Anson Huang5eed8002020-02-29 11:44:20 +08009#include <linux/clk.h>
10#include <linux/err.h>
11#include <linux/io.h>
12#include <linux/module.h>
13#include <linux/of.h>
Anson Huang2b8f1f02020-03-20 11:26:30 +080014#include <linux/of_device.h>
Anson Huang5eed8002020-02-29 11:44:20 +080015#include <linux/platform_device.h>
16#include <linux/thermal.h>
17
18#include "thermal_core.h"
19
20#define TER 0x0 /* TMU enable */
Anson Huang2b8f1f02020-03-20 11:26:30 +080021#define TPS 0x4
Anson Huang5eed8002020-02-29 11:44:20 +080022#define TRITSR 0x20 /* TMU immediate temp */
23
24#define TER_EN BIT(31)
Anson Huang2b8f1f02020-03-20 11:26:30 +080025#define TRITSR_TEMP0_VAL_MASK 0xff
26#define TRITSR_TEMP1_VAL_MASK 0xff0000
Anson Huang5eed8002020-02-29 11:44:20 +080027
Anson Huang2b8f1f02020-03-20 11:26:30 +080028#define PROBE_SEL_ALL GENMASK(31, 30)
29
30#define probe_status_offset(x) (30 + x)
31#define SIGN_BIT BIT(7)
32#define TEMP_VAL_MASK GENMASK(6, 0)
33
34#define VER1_TEMP_LOW_LIMIT 10000
35#define VER2_TEMP_LOW_LIMIT -40000
36#define VER2_TEMP_HIGH_LIMIT 125000
37
38#define TMU_VER1 0x1
39#define TMU_VER2 0x2
40
41struct thermal_soc_data {
42 u32 num_sensors;
43 u32 version;
44 int (*get_temp)(void *, int *);
45};
46
47struct tmu_sensor {
48 struct imx8mm_tmu *priv;
49 u32 hw_id;
50 struct thermal_zone_device *tzd;
51};
Anson Huang5eed8002020-02-29 11:44:20 +080052
53struct imx8mm_tmu {
Anson Huang5eed8002020-02-29 11:44:20 +080054 void __iomem *base;
55 struct clk *clk;
Anson Huang2b8f1f02020-03-20 11:26:30 +080056 const struct thermal_soc_data *socdata;
Gustavo A. R. Silvaf740e642020-05-07 14:25:17 -050057 struct tmu_sensor sensors[];
Anson Huang5eed8002020-02-29 11:44:20 +080058};
59
Anson Huang2b8f1f02020-03-20 11:26:30 +080060static int imx8mm_tmu_get_temp(void *data, int *temp)
61{
62 struct tmu_sensor *sensor = data;
63 struct imx8mm_tmu *tmu = sensor->priv;
64 u32 val;
65
66 val = readl_relaxed(tmu->base + TRITSR) & TRITSR_TEMP0_VAL_MASK;
67 *temp = val * 1000;
68 if (*temp < VER1_TEMP_LOW_LIMIT)
69 return -EAGAIN;
70
71 return 0;
72}
73
74static int imx8mp_tmu_get_temp(void *data, int *temp)
75{
76 struct tmu_sensor *sensor = data;
77 struct imx8mm_tmu *tmu = sensor->priv;
Anson Huang76a5c402020-03-23 22:19:16 +080078 unsigned long val;
Anson Huang2b8f1f02020-03-20 11:26:30 +080079 bool ready;
Anson Huang2b8f1f02020-03-20 11:26:30 +080080
Anson Huang76a5c402020-03-23 22:19:16 +080081 val = readl_relaxed(tmu->base + TRITSR);
82 ready = test_bit(probe_status_offset(sensor->hw_id), &val);
Anson Huang2b8f1f02020-03-20 11:26:30 +080083 if (!ready)
84 return -EAGAIN;
85
Anson Huang2b8f1f02020-03-20 11:26:30 +080086 val = sensor->hw_id ? FIELD_GET(TRITSR_TEMP1_VAL_MASK, val) :
87 FIELD_GET(TRITSR_TEMP0_VAL_MASK, val);
88 if (val & SIGN_BIT) /* negative */
89 val = (~(val & TEMP_VAL_MASK) + 1);
90
91 *temp = val * 1000;
92 if (*temp < VER2_TEMP_LOW_LIMIT || *temp > VER2_TEMP_HIGH_LIMIT)
93 return -EAGAIN;
94
95 return 0;
96}
97
Anson Huang5eed8002020-02-29 11:44:20 +080098static int tmu_get_temp(void *data, int *temp)
99{
Anson Huang2b8f1f02020-03-20 11:26:30 +0800100 struct tmu_sensor *sensor = data;
101 struct imx8mm_tmu *tmu = sensor->priv;
Anson Huang5eed8002020-02-29 11:44:20 +0800102
Anson Huang2b8f1f02020-03-20 11:26:30 +0800103 return tmu->socdata->get_temp(data, temp);
Anson Huang5eed8002020-02-29 11:44:20 +0800104}
105
106static struct thermal_zone_of_device_ops tmu_tz_ops = {
107 .get_temp = tmu_get_temp,
108};
109
Anson Huang2b8f1f02020-03-20 11:26:30 +0800110static void imx8mm_tmu_enable(struct imx8mm_tmu *tmu, bool enable)
111{
112 u32 val;
113
114 val = readl_relaxed(tmu->base + TER);
115 val = enable ? (val | TER_EN) : (val & ~TER_EN);
116 writel_relaxed(val, tmu->base + TER);
117}
118
119static void imx8mm_tmu_probe_sel_all(struct imx8mm_tmu *tmu)
120{
121 u32 val;
122
123 val = readl_relaxed(tmu->base + TPS);
124 val |= PROBE_SEL_ALL;
125 writel_relaxed(val, tmu->base + TPS);
126}
127
Anson Huang5eed8002020-02-29 11:44:20 +0800128static int imx8mm_tmu_probe(struct platform_device *pdev)
129{
Anson Huang2b8f1f02020-03-20 11:26:30 +0800130 const struct thermal_soc_data *data;
Anson Huang5eed8002020-02-29 11:44:20 +0800131 struct imx8mm_tmu *tmu;
Anson Huang5eed8002020-02-29 11:44:20 +0800132 int ret;
Anson Huang2b8f1f02020-03-20 11:26:30 +0800133 int i;
Anson Huang5eed8002020-02-29 11:44:20 +0800134
Anson Huang2b8f1f02020-03-20 11:26:30 +0800135 data = of_device_get_match_data(&pdev->dev);
136
137 tmu = devm_kzalloc(&pdev->dev, struct_size(tmu, sensors,
138 data->num_sensors), GFP_KERNEL);
Anson Huang5eed8002020-02-29 11:44:20 +0800139 if (!tmu)
140 return -ENOMEM;
141
Anson Huang2b8f1f02020-03-20 11:26:30 +0800142 tmu->socdata = data;
143
Anson Huang5eed8002020-02-29 11:44:20 +0800144 tmu->base = devm_platform_ioremap_resource(pdev, 0);
145 if (IS_ERR(tmu->base))
146 return PTR_ERR(tmu->base);
147
148 tmu->clk = devm_clk_get(&pdev->dev, NULL);
Anson Huang87907102020-08-11 14:59:45 +0800149 if (IS_ERR(tmu->clk))
150 return dev_err_probe(&pdev->dev, PTR_ERR(tmu->clk),
151 "failed to get tmu clock\n");
Anson Huang5eed8002020-02-29 11:44:20 +0800152
153 ret = clk_prepare_enable(tmu->clk);
154 if (ret) {
155 dev_err(&pdev->dev, "failed to enable tmu clock: %d\n", ret);
156 return ret;
157 }
158
Anson Huang2b8f1f02020-03-20 11:26:30 +0800159 /* disable the monitor during initialization */
160 imx8mm_tmu_enable(tmu, false);
161
162 for (i = 0; i < data->num_sensors; i++) {
163 tmu->sensors[i].priv = tmu;
164 tmu->sensors[i].tzd =
165 devm_thermal_zone_of_sensor_register(&pdev->dev, i,
166 &tmu->sensors[i],
167 &tmu_tz_ops);
168 if (IS_ERR(tmu->sensors[i].tzd)) {
169 dev_err(&pdev->dev,
170 "failed to register thermal zone sensor[%d]: %d\n",
171 i, ret);
172 return PTR_ERR(tmu->sensors[i].tzd);
173 }
174 tmu->sensors[i].hw_id = i;
Anson Huang5eed8002020-02-29 11:44:20 +0800175 }
176
177 platform_set_drvdata(pdev, tmu);
178
Anson Huang2b8f1f02020-03-20 11:26:30 +0800179 /* enable all the probes for V2 TMU */
180 if (tmu->socdata->version == TMU_VER2)
181 imx8mm_tmu_probe_sel_all(tmu);
182
Anson Huang5eed8002020-02-29 11:44:20 +0800183 /* enable the monitor */
Anson Huang2b8f1f02020-03-20 11:26:30 +0800184 imx8mm_tmu_enable(tmu, true);
Anson Huang5eed8002020-02-29 11:44:20 +0800185
186 return 0;
187}
188
189static int imx8mm_tmu_remove(struct platform_device *pdev)
190{
191 struct imx8mm_tmu *tmu = platform_get_drvdata(pdev);
Anson Huang5eed8002020-02-29 11:44:20 +0800192
193 /* disable TMU */
Anson Huang2b8f1f02020-03-20 11:26:30 +0800194 imx8mm_tmu_enable(tmu, false);
Anson Huang5eed8002020-02-29 11:44:20 +0800195
196 clk_disable_unprepare(tmu->clk);
197 platform_set_drvdata(pdev, NULL);
198
199 return 0;
200}
201
Anson Huang2b8f1f02020-03-20 11:26:30 +0800202static struct thermal_soc_data imx8mm_tmu_data = {
203 .num_sensors = 1,
204 .version = TMU_VER1,
205 .get_temp = imx8mm_tmu_get_temp,
206};
207
208static struct thermal_soc_data imx8mp_tmu_data = {
209 .num_sensors = 2,
210 .version = TMU_VER2,
211 .get_temp = imx8mp_tmu_get_temp,
212};
213
Anson Huang5eed8002020-02-29 11:44:20 +0800214static const struct of_device_id imx8mm_tmu_table[] = {
Anson Huang2b8f1f02020-03-20 11:26:30 +0800215 { .compatible = "fsl,imx8mm-tmu", .data = &imx8mm_tmu_data, },
216 { .compatible = "fsl,imx8mp-tmu", .data = &imx8mp_tmu_data, },
Anson Huang5eed8002020-02-29 11:44:20 +0800217 { },
218};
Anson Huang4b9e3732020-06-17 15:47:54 +0800219MODULE_DEVICE_TABLE(of, imx8mm_tmu_table);
Anson Huang5eed8002020-02-29 11:44:20 +0800220
221static struct platform_driver imx8mm_tmu = {
222 .driver = {
223 .name = "i.mx8mm_thermal",
224 .of_match_table = imx8mm_tmu_table,
225 },
226 .probe = imx8mm_tmu_probe,
227 .remove = imx8mm_tmu_remove,
228};
229module_platform_driver(imx8mm_tmu);
230
231MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
232MODULE_DESCRIPTION("i.MX8MM Thermal Monitor Unit driver");
233MODULE_LICENSE("GPL v2");