Dirk Hohndel (VMware) | dff9688 | 2018-05-07 01:16:26 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 OR MIT |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 2 | /************************************************************************** |
| 3 | * |
Dirk Hohndel (VMware) | dff9688 | 2018-05-07 01:16:26 +0200 | [diff] [blame] | 4 | * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the |
| 8 | * "Software"), to deal in the Software without restriction, including |
| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
| 10 | * distribute, sub license, and/or sell copies of the Software, and to |
| 11 | * permit persons to whom the Software is furnished to do so, subject to |
| 12 | * the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice (including the |
| 15 | * next paragraph) shall be included in all copies or substantial portions |
| 16 | * of the Software. |
| 17 | * |
| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 25 | * |
| 26 | **************************************************************************/ |
| 27 | |
Masahiro Yamada | 008be68 | 2017-04-24 13:50:35 +0900 | [diff] [blame] | 28 | #include <drm/ttm/ttm_placement.h> |
| 29 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 30 | #include "vmwgfx_drv.h" |
| 31 | #include "vmwgfx_resource_priv.h" |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 32 | #include "vmwgfx_binding.h" |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 33 | |
| 34 | struct vmw_shader { |
| 35 | struct vmw_resource res; |
| 36 | SVGA3dShaderType type; |
| 37 | uint32_t size; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 38 | uint8_t num_input_sig; |
| 39 | uint8_t num_output_sig; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 40 | }; |
| 41 | |
| 42 | struct vmw_user_shader { |
| 43 | struct ttm_base_object base; |
| 44 | struct vmw_shader shader; |
| 45 | }; |
| 46 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 47 | struct vmw_dx_shader { |
| 48 | struct vmw_resource res; |
| 49 | struct vmw_resource *ctx; |
| 50 | struct vmw_resource *cotable; |
| 51 | u32 id; |
| 52 | bool committed; |
| 53 | struct list_head cotable_head; |
| 54 | }; |
| 55 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 56 | static uint64_t vmw_user_shader_size; |
| 57 | static uint64_t vmw_shader_size; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 58 | static size_t vmw_shader_dx_size; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 59 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 60 | static void vmw_user_shader_free(struct vmw_resource *res); |
| 61 | static struct vmw_resource * |
| 62 | vmw_user_shader_base_to_res(struct ttm_base_object *base); |
| 63 | |
| 64 | static int vmw_gb_shader_create(struct vmw_resource *res); |
| 65 | static int vmw_gb_shader_bind(struct vmw_resource *res, |
| 66 | struct ttm_validate_buffer *val_buf); |
| 67 | static int vmw_gb_shader_unbind(struct vmw_resource *res, |
| 68 | bool readback, |
| 69 | struct ttm_validate_buffer *val_buf); |
| 70 | static int vmw_gb_shader_destroy(struct vmw_resource *res); |
| 71 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 72 | static int vmw_dx_shader_create(struct vmw_resource *res); |
| 73 | static int vmw_dx_shader_bind(struct vmw_resource *res, |
| 74 | struct ttm_validate_buffer *val_buf); |
| 75 | static int vmw_dx_shader_unbind(struct vmw_resource *res, |
| 76 | bool readback, |
| 77 | struct ttm_validate_buffer *val_buf); |
| 78 | static void vmw_dx_shader_commit_notify(struct vmw_resource *res, |
| 79 | enum vmw_cmdbuf_res_state state); |
| 80 | static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type); |
| 81 | static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type); |
| 82 | static uint64_t vmw_user_shader_size; |
| 83 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 84 | static const struct vmw_user_resource_conv user_shader_conv = { |
| 85 | .object_type = VMW_RES_SHADER, |
| 86 | .base_obj_to_res = vmw_user_shader_base_to_res, |
| 87 | .res_free = vmw_user_shader_free |
| 88 | }; |
| 89 | |
| 90 | const struct vmw_user_resource_conv *user_shader_converter = |
| 91 | &user_shader_conv; |
| 92 | |
| 93 | |
| 94 | static const struct vmw_res_func vmw_gb_shader_func = { |
| 95 | .res_type = vmw_res_shader, |
| 96 | .needs_backup = true, |
| 97 | .may_evict = true, |
Thomas Hellstrom | a0a6394 | 2019-03-04 19:37:40 +0100 | [diff] [blame] | 98 | .prio = 3, |
| 99 | .dirty_prio = 3, |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 100 | .type_name = "guest backed shaders", |
| 101 | .backup_placement = &vmw_mob_placement, |
| 102 | .create = vmw_gb_shader_create, |
| 103 | .destroy = vmw_gb_shader_destroy, |
| 104 | .bind = vmw_gb_shader_bind, |
| 105 | .unbind = vmw_gb_shader_unbind |
| 106 | }; |
| 107 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 108 | static const struct vmw_res_func vmw_dx_shader_func = { |
| 109 | .res_type = vmw_res_shader, |
| 110 | .needs_backup = true, |
Thomas Hellstrom | a0a6394 | 2019-03-04 19:37:40 +0100 | [diff] [blame] | 111 | .may_evict = true, |
| 112 | .prio = 3, |
| 113 | .dirty_prio = 3, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 114 | .type_name = "dx shaders", |
| 115 | .backup_placement = &vmw_mob_placement, |
| 116 | .create = vmw_dx_shader_create, |
| 117 | /* |
| 118 | * The destroy callback is only called with a committed resource on |
| 119 | * context destroy, in which case we destroy the cotable anyway, |
| 120 | * so there's no need to destroy DX shaders separately. |
| 121 | */ |
| 122 | .destroy = NULL, |
| 123 | .bind = vmw_dx_shader_bind, |
| 124 | .unbind = vmw_dx_shader_unbind, |
| 125 | .commit_notify = vmw_dx_shader_commit_notify, |
| 126 | }; |
| 127 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 128 | /** |
| 129 | * Shader management: |
| 130 | */ |
| 131 | |
| 132 | static inline struct vmw_shader * |
| 133 | vmw_res_to_shader(struct vmw_resource *res) |
| 134 | { |
| 135 | return container_of(res, struct vmw_shader, res); |
| 136 | } |
| 137 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 138 | /** |
| 139 | * vmw_res_to_dx_shader - typecast a struct vmw_resource to a |
| 140 | * struct vmw_dx_shader |
| 141 | * |
| 142 | * @res: Pointer to the struct vmw_resource. |
| 143 | */ |
| 144 | static inline struct vmw_dx_shader * |
| 145 | vmw_res_to_dx_shader(struct vmw_resource *res) |
| 146 | { |
| 147 | return container_of(res, struct vmw_dx_shader, res); |
| 148 | } |
| 149 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 150 | static void vmw_hw_shader_destroy(struct vmw_resource *res) |
| 151 | { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 152 | if (likely(res->func->destroy)) |
| 153 | (void) res->func->destroy(res); |
| 154 | else |
| 155 | res->id = -1; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 156 | } |
| 157 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 158 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 159 | static int vmw_gb_shader_init(struct vmw_private *dev_priv, |
| 160 | struct vmw_resource *res, |
| 161 | uint32_t size, |
| 162 | uint64_t offset, |
| 163 | SVGA3dShaderType type, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 164 | uint8_t num_input_sig, |
| 165 | uint8_t num_output_sig, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 166 | struct vmw_buffer_object *byte_code, |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 167 | void (*res_free) (struct vmw_resource *res)) |
| 168 | { |
| 169 | struct vmw_shader *shader = vmw_res_to_shader(res); |
| 170 | int ret; |
| 171 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 172 | ret = vmw_resource_init(dev_priv, res, true, res_free, |
| 173 | &vmw_gb_shader_func); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 174 | |
| 175 | if (unlikely(ret != 0)) { |
| 176 | if (res_free) |
| 177 | res_free(res); |
| 178 | else |
| 179 | kfree(res); |
| 180 | return ret; |
| 181 | } |
| 182 | |
| 183 | res->backup_size = size; |
| 184 | if (byte_code) { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 185 | res->backup = vmw_bo_reference(byte_code); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 186 | res->backup_offset = offset; |
| 187 | } |
| 188 | shader->size = size; |
| 189 | shader->type = type; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 190 | shader->num_input_sig = num_input_sig; |
| 191 | shader->num_output_sig = num_output_sig; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 192 | |
Thomas Hellstrom | 1328924 | 2018-09-26 15:41:52 +0200 | [diff] [blame] | 193 | res->hw_destroy = vmw_hw_shader_destroy; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 194 | return 0; |
| 195 | } |
| 196 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 197 | /* |
| 198 | * GB shader code: |
| 199 | */ |
| 200 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 201 | static int vmw_gb_shader_create(struct vmw_resource *res) |
| 202 | { |
| 203 | struct vmw_private *dev_priv = res->dev_priv; |
| 204 | struct vmw_shader *shader = vmw_res_to_shader(res); |
| 205 | int ret; |
| 206 | struct { |
| 207 | SVGA3dCmdHeader header; |
| 208 | SVGA3dCmdDefineGBShader body; |
| 209 | } *cmd; |
| 210 | |
| 211 | if (likely(res->id != -1)) |
| 212 | return 0; |
| 213 | |
| 214 | ret = vmw_resource_alloc_id(res); |
| 215 | if (unlikely(ret != 0)) { |
| 216 | DRM_ERROR("Failed to allocate a shader id.\n"); |
| 217 | goto out_no_id; |
| 218 | } |
| 219 | |
| 220 | if (unlikely(res->id >= VMWGFX_NUM_GB_SHADER)) { |
| 221 | ret = -EBUSY; |
| 222 | goto out_no_fifo; |
| 223 | } |
| 224 | |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 225 | cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 226 | if (unlikely(cmd == NULL)) { |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 227 | ret = -ENOMEM; |
| 228 | goto out_no_fifo; |
| 229 | } |
| 230 | |
| 231 | cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SHADER; |
| 232 | cmd->header.size = sizeof(cmd->body); |
| 233 | cmd->body.shid = res->id; |
| 234 | cmd->body.type = shader->type; |
| 235 | cmd->body.sizeInBytes = shader->size; |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 236 | vmw_cmd_commit(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | 153b3d5 | 2015-06-25 10:47:43 -0700 | [diff] [blame] | 237 | vmw_fifo_resource_inc(dev_priv); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 238 | |
| 239 | return 0; |
| 240 | |
| 241 | out_no_fifo: |
| 242 | vmw_resource_release_id(res); |
| 243 | out_no_id: |
| 244 | return ret; |
| 245 | } |
| 246 | |
| 247 | static int vmw_gb_shader_bind(struct vmw_resource *res, |
| 248 | struct ttm_validate_buffer *val_buf) |
| 249 | { |
| 250 | struct vmw_private *dev_priv = res->dev_priv; |
| 251 | struct { |
| 252 | SVGA3dCmdHeader header; |
| 253 | SVGA3dCmdBindGBShader body; |
| 254 | } *cmd; |
| 255 | struct ttm_buffer_object *bo = val_buf->bo; |
| 256 | |
| 257 | BUG_ON(bo->mem.mem_type != VMW_PL_MOB); |
| 258 | |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 259 | cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); |
Deepak Rawat | 11c4541 | 2019-02-14 16:15:39 -0800 | [diff] [blame] | 260 | if (unlikely(cmd == NULL)) |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 261 | return -ENOMEM; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 262 | |
| 263 | cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER; |
| 264 | cmd->header.size = sizeof(cmd->body); |
| 265 | cmd->body.shid = res->id; |
| 266 | cmd->body.mobid = bo->mem.start; |
Thomas Hellstrom | b8ccd1e | 2014-12-02 03:41:01 -0800 | [diff] [blame] | 267 | cmd->body.offsetInBytes = res->backup_offset; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 268 | res->backup_dirty = false; |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 269 | vmw_cmd_commit(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 270 | |
| 271 | return 0; |
| 272 | } |
| 273 | |
| 274 | static int vmw_gb_shader_unbind(struct vmw_resource *res, |
| 275 | bool readback, |
| 276 | struct ttm_validate_buffer *val_buf) |
| 277 | { |
| 278 | struct vmw_private *dev_priv = res->dev_priv; |
| 279 | struct { |
| 280 | SVGA3dCmdHeader header; |
| 281 | SVGA3dCmdBindGBShader body; |
| 282 | } *cmd; |
| 283 | struct vmw_fence_obj *fence; |
| 284 | |
| 285 | BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB); |
| 286 | |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 287 | cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); |
Deepak Rawat | 11c4541 | 2019-02-14 16:15:39 -0800 | [diff] [blame] | 288 | if (unlikely(cmd == NULL)) |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 289 | return -ENOMEM; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 290 | |
| 291 | cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER; |
| 292 | cmd->header.size = sizeof(cmd->body); |
| 293 | cmd->body.shid = res->id; |
| 294 | cmd->body.mobid = SVGA3D_INVALID_ID; |
| 295 | cmd->body.offsetInBytes = 0; |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 296 | vmw_cmd_commit(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 297 | |
| 298 | /* |
| 299 | * Create a fence object and fence the backup buffer. |
| 300 | */ |
| 301 | |
| 302 | (void) vmw_execbuf_fence_commands(NULL, dev_priv, |
| 303 | &fence, NULL); |
| 304 | |
Thomas Hellstrom | e9431ea | 2018-06-19 15:33:53 +0200 | [diff] [blame] | 305 | vmw_bo_fence_single(val_buf->bo, fence); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 306 | |
| 307 | if (likely(fence != NULL)) |
| 308 | vmw_fence_obj_unreference(&fence); |
| 309 | |
| 310 | return 0; |
| 311 | } |
| 312 | |
| 313 | static int vmw_gb_shader_destroy(struct vmw_resource *res) |
| 314 | { |
| 315 | struct vmw_private *dev_priv = res->dev_priv; |
| 316 | struct { |
| 317 | SVGA3dCmdHeader header; |
| 318 | SVGA3dCmdDestroyGBShader body; |
| 319 | } *cmd; |
| 320 | |
| 321 | if (likely(res->id == -1)) |
| 322 | return 0; |
| 323 | |
Thomas Hellstrom | 173fb7d | 2013-10-08 02:32:36 -0700 | [diff] [blame] | 324 | mutex_lock(&dev_priv->binding_mutex); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 325 | vmw_binding_res_list_scrub(&res->binding_head); |
Thomas Hellstrom | 173fb7d | 2013-10-08 02:32:36 -0700 | [diff] [blame] | 326 | |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 327 | cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 328 | if (unlikely(cmd == NULL)) { |
Thomas Hellstrom | 3e894a6 | 2014-01-20 11:33:04 +0100 | [diff] [blame] | 329 | mutex_unlock(&dev_priv->binding_mutex); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 330 | return -ENOMEM; |
| 331 | } |
| 332 | |
| 333 | cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SHADER; |
| 334 | cmd->header.size = sizeof(cmd->body); |
| 335 | cmd->body.shid = res->id; |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 336 | vmw_cmd_commit(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | 173fb7d | 2013-10-08 02:32:36 -0700 | [diff] [blame] | 337 | mutex_unlock(&dev_priv->binding_mutex); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 338 | vmw_resource_release_id(res); |
Thomas Hellstrom | 153b3d5 | 2015-06-25 10:47:43 -0700 | [diff] [blame] | 339 | vmw_fifo_resource_dec(dev_priv); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 340 | |
| 341 | return 0; |
| 342 | } |
| 343 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 344 | /* |
| 345 | * DX shader code: |
| 346 | */ |
| 347 | |
| 348 | /** |
| 349 | * vmw_dx_shader_commit_notify - Notify that a shader operation has been |
| 350 | * committed to hardware from a user-supplied command stream. |
| 351 | * |
| 352 | * @res: Pointer to the shader resource. |
| 353 | * @state: Indicating whether a creation or removal has been committed. |
| 354 | * |
| 355 | */ |
| 356 | static void vmw_dx_shader_commit_notify(struct vmw_resource *res, |
| 357 | enum vmw_cmdbuf_res_state state) |
| 358 | { |
| 359 | struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res); |
| 360 | struct vmw_private *dev_priv = res->dev_priv; |
| 361 | |
| 362 | if (state == VMW_CMDBUF_RES_ADD) { |
| 363 | mutex_lock(&dev_priv->binding_mutex); |
| 364 | vmw_cotable_add_resource(shader->cotable, |
| 365 | &shader->cotable_head); |
| 366 | shader->committed = true; |
| 367 | res->id = shader->id; |
| 368 | mutex_unlock(&dev_priv->binding_mutex); |
| 369 | } else { |
| 370 | mutex_lock(&dev_priv->binding_mutex); |
| 371 | list_del_init(&shader->cotable_head); |
| 372 | shader->committed = false; |
| 373 | res->id = -1; |
| 374 | mutex_unlock(&dev_priv->binding_mutex); |
| 375 | } |
| 376 | } |
| 377 | |
| 378 | /** |
| 379 | * vmw_dx_shader_unscrub - Have the device reattach a MOB to a DX shader. |
| 380 | * |
| 381 | * @res: The shader resource |
| 382 | * |
| 383 | * This function reverts a scrub operation. |
| 384 | */ |
| 385 | static int vmw_dx_shader_unscrub(struct vmw_resource *res) |
| 386 | { |
| 387 | struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res); |
| 388 | struct vmw_private *dev_priv = res->dev_priv; |
| 389 | struct { |
| 390 | SVGA3dCmdHeader header; |
| 391 | SVGA3dCmdDXBindShader body; |
| 392 | } *cmd; |
| 393 | |
| 394 | if (!list_empty(&shader->cotable_head) || !shader->committed) |
| 395 | return 0; |
| 396 | |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 397 | cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), shader->ctx->id); |
Deepak Rawat | 11c4541 | 2019-02-14 16:15:39 -0800 | [diff] [blame] | 398 | if (unlikely(cmd == NULL)) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 399 | return -ENOMEM; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 400 | |
| 401 | cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER; |
| 402 | cmd->header.size = sizeof(cmd->body); |
| 403 | cmd->body.cid = shader->ctx->id; |
| 404 | cmd->body.shid = shader->id; |
| 405 | cmd->body.mobid = res->backup->base.mem.start; |
| 406 | cmd->body.offsetInBytes = res->backup_offset; |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 407 | vmw_cmd_commit(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 408 | |
| 409 | vmw_cotable_add_resource(shader->cotable, &shader->cotable_head); |
| 410 | |
| 411 | return 0; |
| 412 | } |
| 413 | |
| 414 | /** |
| 415 | * vmw_dx_shader_create - The DX shader create callback |
| 416 | * |
| 417 | * @res: The DX shader resource |
| 418 | * |
| 419 | * The create callback is called as part of resource validation and |
| 420 | * makes sure that we unscrub the shader if it's previously been scrubbed. |
| 421 | */ |
| 422 | static int vmw_dx_shader_create(struct vmw_resource *res) |
| 423 | { |
| 424 | struct vmw_private *dev_priv = res->dev_priv; |
| 425 | struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res); |
| 426 | int ret = 0; |
| 427 | |
| 428 | WARN_ON_ONCE(!shader->committed); |
| 429 | |
Thomas Hellstrom | a0a6394 | 2019-03-04 19:37:40 +0100 | [diff] [blame] | 430 | if (vmw_resource_mob_attached(res)) { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 431 | mutex_lock(&dev_priv->binding_mutex); |
| 432 | ret = vmw_dx_shader_unscrub(res); |
| 433 | mutex_unlock(&dev_priv->binding_mutex); |
| 434 | } |
| 435 | |
| 436 | res->id = shader->id; |
| 437 | return ret; |
| 438 | } |
| 439 | |
| 440 | /** |
| 441 | * vmw_dx_shader_bind - The DX shader bind callback |
| 442 | * |
| 443 | * @res: The DX shader resource |
| 444 | * @val_buf: Pointer to the validate buffer. |
| 445 | * |
| 446 | */ |
| 447 | static int vmw_dx_shader_bind(struct vmw_resource *res, |
| 448 | struct ttm_validate_buffer *val_buf) |
| 449 | { |
| 450 | struct vmw_private *dev_priv = res->dev_priv; |
| 451 | struct ttm_buffer_object *bo = val_buf->bo; |
| 452 | |
| 453 | BUG_ON(bo->mem.mem_type != VMW_PL_MOB); |
| 454 | mutex_lock(&dev_priv->binding_mutex); |
| 455 | vmw_dx_shader_unscrub(res); |
| 456 | mutex_unlock(&dev_priv->binding_mutex); |
| 457 | |
| 458 | return 0; |
| 459 | } |
| 460 | |
| 461 | /** |
| 462 | * vmw_dx_shader_scrub - Have the device unbind a MOB from a DX shader. |
| 463 | * |
| 464 | * @res: The shader resource |
| 465 | * |
| 466 | * This function unbinds a MOB from the DX shader without requiring the |
| 467 | * MOB dma_buffer to be reserved. The driver still considers the MOB bound. |
| 468 | * However, once the driver eventually decides to unbind the MOB, it doesn't |
| 469 | * need to access the context. |
| 470 | */ |
| 471 | static int vmw_dx_shader_scrub(struct vmw_resource *res) |
| 472 | { |
| 473 | struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res); |
| 474 | struct vmw_private *dev_priv = res->dev_priv; |
| 475 | struct { |
| 476 | SVGA3dCmdHeader header; |
| 477 | SVGA3dCmdDXBindShader body; |
| 478 | } *cmd; |
| 479 | |
| 480 | if (list_empty(&shader->cotable_head)) |
| 481 | return 0; |
| 482 | |
| 483 | WARN_ON_ONCE(!shader->committed); |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 484 | cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); |
Deepak Rawat | 11c4541 | 2019-02-14 16:15:39 -0800 | [diff] [blame] | 485 | if (unlikely(cmd == NULL)) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 486 | return -ENOMEM; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 487 | |
| 488 | cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER; |
| 489 | cmd->header.size = sizeof(cmd->body); |
| 490 | cmd->body.cid = shader->ctx->id; |
| 491 | cmd->body.shid = res->id; |
| 492 | cmd->body.mobid = SVGA3D_INVALID_ID; |
| 493 | cmd->body.offsetInBytes = 0; |
Zack Rusin | 8426ed9 | 2020-11-18 12:54:19 -0500 | [diff] [blame^] | 494 | vmw_cmd_commit(dev_priv, sizeof(*cmd)); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 495 | res->id = -1; |
| 496 | list_del_init(&shader->cotable_head); |
| 497 | |
| 498 | return 0; |
| 499 | } |
| 500 | |
| 501 | /** |
| 502 | * vmw_dx_shader_unbind - The dx shader unbind callback. |
| 503 | * |
| 504 | * @res: The shader resource |
| 505 | * @readback: Whether this is a readback unbind. Currently unused. |
| 506 | * @val_buf: MOB buffer information. |
| 507 | */ |
| 508 | static int vmw_dx_shader_unbind(struct vmw_resource *res, |
| 509 | bool readback, |
| 510 | struct ttm_validate_buffer *val_buf) |
| 511 | { |
| 512 | struct vmw_private *dev_priv = res->dev_priv; |
| 513 | struct vmw_fence_obj *fence; |
| 514 | int ret; |
| 515 | |
| 516 | BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB); |
| 517 | |
| 518 | mutex_lock(&dev_priv->binding_mutex); |
| 519 | ret = vmw_dx_shader_scrub(res); |
| 520 | mutex_unlock(&dev_priv->binding_mutex); |
| 521 | |
| 522 | if (ret) |
| 523 | return ret; |
| 524 | |
| 525 | (void) vmw_execbuf_fence_commands(NULL, dev_priv, |
| 526 | &fence, NULL); |
Thomas Hellstrom | e9431ea | 2018-06-19 15:33:53 +0200 | [diff] [blame] | 527 | vmw_bo_fence_single(val_buf->bo, fence); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 528 | |
| 529 | if (likely(fence != NULL)) |
| 530 | vmw_fence_obj_unreference(&fence); |
| 531 | |
| 532 | return 0; |
| 533 | } |
| 534 | |
| 535 | /** |
| 536 | * vmw_dx_shader_cotable_list_scrub - The cotable unbind_func callback for |
| 537 | * DX shaders. |
| 538 | * |
| 539 | * @dev_priv: Pointer to device private structure. |
| 540 | * @list: The list of cotable resources. |
| 541 | * @readback: Whether the call was part of a readback unbind. |
| 542 | * |
| 543 | * Scrubs all shader MOBs so that any subsequent shader unbind or shader |
| 544 | * destroy operation won't need to swap in the context. |
| 545 | */ |
| 546 | void vmw_dx_shader_cotable_list_scrub(struct vmw_private *dev_priv, |
| 547 | struct list_head *list, |
| 548 | bool readback) |
| 549 | { |
| 550 | struct vmw_dx_shader *entry, *next; |
| 551 | |
Thomas Hellstrom | d76ce03 | 2018-09-26 15:39:24 +0200 | [diff] [blame] | 552 | lockdep_assert_held_once(&dev_priv->binding_mutex); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 553 | |
| 554 | list_for_each_entry_safe(entry, next, list, cotable_head) { |
| 555 | WARN_ON(vmw_dx_shader_scrub(&entry->res)); |
| 556 | if (!readback) |
| 557 | entry->committed = false; |
| 558 | } |
| 559 | } |
| 560 | |
| 561 | /** |
| 562 | * vmw_dx_shader_res_free - The DX shader free callback |
| 563 | * |
| 564 | * @res: The shader resource |
| 565 | * |
| 566 | * Frees the DX shader resource and updates memory accounting. |
| 567 | */ |
| 568 | static void vmw_dx_shader_res_free(struct vmw_resource *res) |
| 569 | { |
| 570 | struct vmw_private *dev_priv = res->dev_priv; |
| 571 | struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res); |
| 572 | |
| 573 | vmw_resource_unreference(&shader->cotable); |
| 574 | kfree(shader); |
| 575 | ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size); |
| 576 | } |
| 577 | |
| 578 | /** |
| 579 | * vmw_dx_shader_add - Add a shader resource as a command buffer managed |
| 580 | * resource. |
| 581 | * |
| 582 | * @man: The command buffer resource manager. |
| 583 | * @ctx: Pointer to the context resource. |
| 584 | * @user_key: The id used for this shader. |
| 585 | * @shader_type: The shader type. |
| 586 | * @list: The list of staged command buffer managed resources. |
| 587 | */ |
| 588 | int vmw_dx_shader_add(struct vmw_cmdbuf_res_manager *man, |
| 589 | struct vmw_resource *ctx, |
| 590 | u32 user_key, |
| 591 | SVGA3dShaderType shader_type, |
| 592 | struct list_head *list) |
| 593 | { |
| 594 | struct vmw_dx_shader *shader; |
| 595 | struct vmw_resource *res; |
| 596 | struct vmw_private *dev_priv = ctx->dev_priv; |
Roger He | 279c01f | 2017-12-08 15:09:50 +0800 | [diff] [blame] | 597 | struct ttm_operation_ctx ttm_opt_ctx = { |
| 598 | .interruptible = true, |
| 599 | .no_wait_gpu = false |
| 600 | }; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 601 | int ret; |
| 602 | |
| 603 | if (!vmw_shader_dx_size) |
| 604 | vmw_shader_dx_size = ttm_round_pot(sizeof(*shader)); |
| 605 | |
| 606 | if (!vmw_shader_id_ok(user_key, shader_type)) |
| 607 | return -EINVAL; |
| 608 | |
| 609 | ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), vmw_shader_dx_size, |
Roger He | 279c01f | 2017-12-08 15:09:50 +0800 | [diff] [blame] | 610 | &ttm_opt_ctx); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 611 | if (ret) { |
| 612 | if (ret != -ERESTARTSYS) |
| 613 | DRM_ERROR("Out of graphics memory for shader " |
| 614 | "creation.\n"); |
| 615 | return ret; |
| 616 | } |
| 617 | |
| 618 | shader = kmalloc(sizeof(*shader), GFP_KERNEL); |
| 619 | if (!shader) { |
| 620 | ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size); |
| 621 | return -ENOMEM; |
| 622 | } |
| 623 | |
| 624 | res = &shader->res; |
| 625 | shader->ctx = ctx; |
Thomas Hellstrom | 1b9a01d | 2018-09-26 16:29:49 +0200 | [diff] [blame] | 626 | shader->cotable = vmw_resource_reference |
| 627 | (vmw_context_cotable(ctx, SVGA_COTABLE_DXSHADER)); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 628 | shader->id = user_key; |
| 629 | shader->committed = false; |
| 630 | INIT_LIST_HEAD(&shader->cotable_head); |
| 631 | ret = vmw_resource_init(dev_priv, res, true, |
| 632 | vmw_dx_shader_res_free, &vmw_dx_shader_func); |
| 633 | if (ret) |
| 634 | goto out_resource_init; |
| 635 | |
| 636 | /* |
| 637 | * The user_key name-space is not per shader type for DX shaders, |
| 638 | * so when hashing, use a single zero shader type. |
| 639 | */ |
| 640 | ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader, |
| 641 | vmw_shader_key(user_key, 0), |
| 642 | res, list); |
| 643 | if (ret) |
| 644 | goto out_resource_init; |
| 645 | |
| 646 | res->id = shader->id; |
Thomas Hellstrom | 1328924 | 2018-09-26 15:41:52 +0200 | [diff] [blame] | 647 | res->hw_destroy = vmw_hw_shader_destroy; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 648 | |
| 649 | out_resource_init: |
| 650 | vmw_resource_unreference(&res); |
| 651 | |
| 652 | return ret; |
| 653 | } |
| 654 | |
| 655 | |
| 656 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 657 | /** |
| 658 | * User-space shader management: |
| 659 | */ |
| 660 | |
| 661 | static struct vmw_resource * |
| 662 | vmw_user_shader_base_to_res(struct ttm_base_object *base) |
| 663 | { |
| 664 | return &(container_of(base, struct vmw_user_shader, base)-> |
| 665 | shader.res); |
| 666 | } |
| 667 | |
| 668 | static void vmw_user_shader_free(struct vmw_resource *res) |
| 669 | { |
| 670 | struct vmw_user_shader *ushader = |
| 671 | container_of(res, struct vmw_user_shader, shader.res); |
| 672 | struct vmw_private *dev_priv = res->dev_priv; |
| 673 | |
| 674 | ttm_base_object_kfree(ushader, base); |
| 675 | ttm_mem_global_free(vmw_mem_glob(dev_priv), |
| 676 | vmw_user_shader_size); |
| 677 | } |
| 678 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 679 | static void vmw_shader_free(struct vmw_resource *res) |
| 680 | { |
| 681 | struct vmw_shader *shader = vmw_res_to_shader(res); |
| 682 | struct vmw_private *dev_priv = res->dev_priv; |
| 683 | |
| 684 | kfree(shader); |
| 685 | ttm_mem_global_free(vmw_mem_glob(dev_priv), |
| 686 | vmw_shader_size); |
| 687 | } |
| 688 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 689 | /** |
| 690 | * This function is called when user space has no more references on the |
| 691 | * base object. It releases the base-object's reference on the resource object. |
| 692 | */ |
| 693 | |
| 694 | static void vmw_user_shader_base_release(struct ttm_base_object **p_base) |
| 695 | { |
| 696 | struct ttm_base_object *base = *p_base; |
| 697 | struct vmw_resource *res = vmw_user_shader_base_to_res(base); |
| 698 | |
| 699 | *p_base = NULL; |
| 700 | vmw_resource_unreference(&res); |
| 701 | } |
| 702 | |
| 703 | int vmw_shader_destroy_ioctl(struct drm_device *dev, void *data, |
| 704 | struct drm_file *file_priv) |
| 705 | { |
| 706 | struct drm_vmw_shader_arg *arg = (struct drm_vmw_shader_arg *)data; |
| 707 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; |
| 708 | |
| 709 | return ttm_ref_object_base_unref(tfile, arg->handle, |
| 710 | TTM_REF_USAGE); |
| 711 | } |
| 712 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 713 | static int vmw_user_shader_alloc(struct vmw_private *dev_priv, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 714 | struct vmw_buffer_object *buffer, |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 715 | size_t shader_size, |
| 716 | size_t offset, |
| 717 | SVGA3dShaderType shader_type, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 718 | uint8_t num_input_sig, |
| 719 | uint8_t num_output_sig, |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 720 | struct ttm_object_file *tfile, |
| 721 | u32 *handle) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 722 | { |
| 723 | struct vmw_user_shader *ushader; |
| 724 | struct vmw_resource *res, *tmp; |
Roger He | 279c01f | 2017-12-08 15:09:50 +0800 | [diff] [blame] | 725 | struct ttm_operation_ctx ctx = { |
| 726 | .interruptible = true, |
| 727 | .no_wait_gpu = false |
| 728 | }; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 729 | int ret; |
| 730 | |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 731 | if (unlikely(vmw_user_shader_size == 0)) |
| 732 | vmw_user_shader_size = |
Thomas Hellstrom | c7eae62 | 2018-09-26 15:50:13 +0200 | [diff] [blame] | 733 | ttm_round_pot(sizeof(struct vmw_user_shader)) + |
| 734 | VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 735 | |
| 736 | ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), |
| 737 | vmw_user_shader_size, |
Roger He | 279c01f | 2017-12-08 15:09:50 +0800 | [diff] [blame] | 738 | &ctx); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 739 | if (unlikely(ret != 0)) { |
| 740 | if (ret != -ERESTARTSYS) |
| 741 | DRM_ERROR("Out of graphics memory for shader " |
| 742 | "creation.\n"); |
| 743 | goto out; |
| 744 | } |
| 745 | |
| 746 | ushader = kzalloc(sizeof(*ushader), GFP_KERNEL); |
Ravikant B Sharma | 1a4adb0 | 2016-11-08 17:30:31 +0530 | [diff] [blame] | 747 | if (unlikely(!ushader)) { |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 748 | ttm_mem_global_free(vmw_mem_glob(dev_priv), |
| 749 | vmw_user_shader_size); |
| 750 | ret = -ENOMEM; |
| 751 | goto out; |
| 752 | } |
| 753 | |
| 754 | res = &ushader->shader.res; |
| 755 | ushader->base.shareable = false; |
| 756 | ushader->base.tfile = NULL; |
| 757 | |
| 758 | /* |
| 759 | * From here on, the destructor takes over resource freeing. |
| 760 | */ |
| 761 | |
| 762 | ret = vmw_gb_shader_init(dev_priv, res, shader_size, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 763 | offset, shader_type, num_input_sig, |
| 764 | num_output_sig, buffer, |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 765 | vmw_user_shader_free); |
| 766 | if (unlikely(ret != 0)) |
| 767 | goto out; |
| 768 | |
| 769 | tmp = vmw_resource_reference(res); |
| 770 | ret = ttm_base_object_init(tfile, &ushader->base, false, |
| 771 | VMW_RES_SHADER, |
| 772 | &vmw_user_shader_base_release, NULL); |
| 773 | |
| 774 | if (unlikely(ret != 0)) { |
| 775 | vmw_resource_unreference(&tmp); |
| 776 | goto out_err; |
| 777 | } |
| 778 | |
| 779 | if (handle) |
Thomas Hellstrom | c7eae62 | 2018-09-26 15:50:13 +0200 | [diff] [blame] | 780 | *handle = ushader->base.handle; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 781 | out_err: |
| 782 | vmw_resource_unreference(&res); |
| 783 | out: |
| 784 | return ret; |
| 785 | } |
| 786 | |
| 787 | |
Thomas Hellstrom | b9eb1a6 | 2015-04-02 02:39:45 -0700 | [diff] [blame] | 788 | static struct vmw_resource *vmw_shader_alloc(struct vmw_private *dev_priv, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 789 | struct vmw_buffer_object *buffer, |
Thomas Hellstrom | b9eb1a6 | 2015-04-02 02:39:45 -0700 | [diff] [blame] | 790 | size_t shader_size, |
| 791 | size_t offset, |
| 792 | SVGA3dShaderType shader_type) |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 793 | { |
| 794 | struct vmw_shader *shader; |
| 795 | struct vmw_resource *res; |
Roger He | 279c01f | 2017-12-08 15:09:50 +0800 | [diff] [blame] | 796 | struct ttm_operation_ctx ctx = { |
| 797 | .interruptible = true, |
| 798 | .no_wait_gpu = false |
| 799 | }; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 800 | int ret; |
| 801 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 802 | if (unlikely(vmw_shader_size == 0)) |
| 803 | vmw_shader_size = |
Thomas Hellstrom | c7eae62 | 2018-09-26 15:50:13 +0200 | [diff] [blame] | 804 | ttm_round_pot(sizeof(struct vmw_shader)) + |
| 805 | VMW_IDA_ACC_SIZE; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 806 | |
| 807 | ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), |
| 808 | vmw_shader_size, |
Roger He | 279c01f | 2017-12-08 15:09:50 +0800 | [diff] [blame] | 809 | &ctx); |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 810 | if (unlikely(ret != 0)) { |
| 811 | if (ret != -ERESTARTSYS) |
| 812 | DRM_ERROR("Out of graphics memory for shader " |
| 813 | "creation.\n"); |
| 814 | goto out_err; |
| 815 | } |
| 816 | |
| 817 | shader = kzalloc(sizeof(*shader), GFP_KERNEL); |
Ravikant B Sharma | 1a4adb0 | 2016-11-08 17:30:31 +0530 | [diff] [blame] | 818 | if (unlikely(!shader)) { |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 819 | ttm_mem_global_free(vmw_mem_glob(dev_priv), |
| 820 | vmw_shader_size); |
| 821 | ret = -ENOMEM; |
| 822 | goto out_err; |
| 823 | } |
| 824 | |
| 825 | res = &shader->res; |
| 826 | |
| 827 | /* |
| 828 | * From here on, the destructor takes over resource freeing. |
| 829 | */ |
| 830 | ret = vmw_gb_shader_init(dev_priv, res, shader_size, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 831 | offset, shader_type, 0, 0, buffer, |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 832 | vmw_shader_free); |
| 833 | |
| 834 | out_err: |
| 835 | return ret ? ERR_PTR(ret) : res; |
| 836 | } |
| 837 | |
| 838 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 839 | static int vmw_shader_define(struct drm_device *dev, struct drm_file *file_priv, |
| 840 | enum drm_vmw_shader_type shader_type_drm, |
| 841 | u32 buffer_handle, size_t size, size_t offset, |
| 842 | uint8_t num_input_sig, uint8_t num_output_sig, |
| 843 | uint32_t *shader_handle) |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 844 | { |
| 845 | struct vmw_private *dev_priv = vmw_priv(dev); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 846 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 847 | struct vmw_buffer_object *buffer = NULL; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 848 | SVGA3dShaderType shader_type; |
| 849 | int ret; |
| 850 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 851 | if (buffer_handle != SVGA3D_INVALID_ID) { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 852 | ret = vmw_user_bo_lookup(tfile, buffer_handle, |
Thomas Hellstrom | 54c12bc | 2015-09-14 01:13:11 -0700 | [diff] [blame] | 853 | &buffer, NULL); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 854 | if (unlikely(ret != 0)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 855 | VMW_DEBUG_USER("Couldn't find buffer for shader creation.\n"); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 856 | return ret; |
| 857 | } |
| 858 | |
Christian König | e11bfb9 | 2020-12-09 15:07:50 +0100 | [diff] [blame] | 859 | if ((u64)buffer->base.base.size < (u64)size + (u64)offset) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 860 | VMW_DEBUG_USER("Illegal buffer- or shader size.\n"); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 861 | ret = -EINVAL; |
| 862 | goto out_bad_arg; |
| 863 | } |
| 864 | } |
| 865 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 866 | switch (shader_type_drm) { |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 867 | case drm_vmw_shader_type_vs: |
| 868 | shader_type = SVGA3D_SHADERTYPE_VS; |
| 869 | break; |
| 870 | case drm_vmw_shader_type_ps: |
| 871 | shader_type = SVGA3D_SHADERTYPE_PS; |
| 872 | break; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 873 | default: |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 874 | VMW_DEBUG_USER("Illegal shader type.\n"); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 875 | ret = -EINVAL; |
| 876 | goto out_bad_arg; |
| 877 | } |
| 878 | |
Thomas Hellstrom | 294adf7 | 2014-02-27 12:34:51 +0100 | [diff] [blame] | 879 | ret = ttm_read_lock(&dev_priv->reservation_sem, true); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 880 | if (unlikely(ret != 0)) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 881 | goto out_bad_arg; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 882 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 883 | ret = vmw_user_shader_alloc(dev_priv, buffer, size, offset, |
| 884 | shader_type, num_input_sig, |
| 885 | num_output_sig, tfile, shader_handle); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 886 | |
Thomas Hellstrom | 294adf7 | 2014-02-27 12:34:51 +0100 | [diff] [blame] | 887 | ttm_read_unlock(&dev_priv->reservation_sem); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 888 | out_bad_arg: |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 889 | vmw_bo_unreference(&buffer); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 890 | return ret; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 891 | } |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 892 | |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 893 | /** |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 894 | * vmw_shader_id_ok - Check whether a compat shader user key and |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 895 | * shader type are within valid bounds. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 896 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 897 | * @user_key: User space id of the shader. |
| 898 | * @shader_type: Shader type. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 899 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 900 | * Returns true if valid false if not. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 901 | */ |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 902 | static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 903 | { |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 904 | return user_key <= ((1 << 20) - 1) && (unsigned) shader_type < 16; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 905 | } |
| 906 | |
| 907 | /** |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 908 | * vmw_shader_key - Compute a hash key suitable for a compat shader. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 909 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 910 | * @user_key: User space id of the shader. |
| 911 | * @shader_type: Shader type. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 912 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 913 | * Returns a hash key suitable for a command buffer managed resource |
| 914 | * manager hash table. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 915 | */ |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 916 | static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 917 | { |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 918 | return user_key | (shader_type << 20); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 919 | } |
| 920 | |
| 921 | /** |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 922 | * vmw_shader_remove - Stage a compat shader for removal. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 923 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 924 | * @man: Pointer to the compat shader manager identifying the shader namespace. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 925 | * @user_key: The key that is used to identify the shader. The key is |
| 926 | * unique to the shader type. |
| 927 | * @shader_type: Shader type. |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 928 | * @list: Caller's list of staged command buffer resource actions. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 929 | */ |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 930 | int vmw_shader_remove(struct vmw_cmdbuf_res_manager *man, |
| 931 | u32 user_key, SVGA3dShaderType shader_type, |
| 932 | struct list_head *list) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 933 | { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 934 | struct vmw_resource *dummy; |
| 935 | |
| 936 | if (!vmw_shader_id_ok(user_key, shader_type)) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 937 | return -EINVAL; |
| 938 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 939 | return vmw_cmdbuf_res_remove(man, vmw_cmdbuf_res_shader, |
| 940 | vmw_shader_key(user_key, shader_type), |
| 941 | list, &dummy); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 942 | } |
| 943 | |
| 944 | /** |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 945 | * vmw_compat_shader_add - Create a compat shader and stage it for addition |
| 946 | * as a command buffer managed resource. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 947 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 948 | * @man: Pointer to the compat shader manager identifying the shader namespace. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 949 | * @user_key: The key that is used to identify the shader. The key is |
| 950 | * unique to the shader type. |
| 951 | * @bytecode: Pointer to the bytecode of the shader. |
| 952 | * @shader_type: Shader type. |
| 953 | * @tfile: Pointer to a struct ttm_object_file that the guest-backed shader is |
| 954 | * to be created with. |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 955 | * @list: Caller's list of staged command buffer resource actions. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 956 | * |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 957 | */ |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 958 | int vmw_compat_shader_add(struct vmw_private *dev_priv, |
| 959 | struct vmw_cmdbuf_res_manager *man, |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 960 | u32 user_key, const void *bytecode, |
| 961 | SVGA3dShaderType shader_type, |
| 962 | size_t size, |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 963 | struct list_head *list) |
| 964 | { |
Christian König | 19be557 | 2017-04-12 14:24:39 +0200 | [diff] [blame] | 965 | struct ttm_operation_ctx ctx = { false, true }; |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 966 | struct vmw_buffer_object *buf; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 967 | struct ttm_bo_kmap_obj map; |
| 968 | bool is_iomem; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 969 | int ret; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 970 | struct vmw_resource *res; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 971 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 972 | if (!vmw_shader_id_ok(user_key, shader_type)) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 973 | return -EINVAL; |
| 974 | |
| 975 | /* Allocate and pin a DMA buffer */ |
| 976 | buf = kzalloc(sizeof(*buf), GFP_KERNEL); |
Ravikant B Sharma | 1a4adb0 | 2016-11-08 17:30:31 +0530 | [diff] [blame] | 977 | if (unlikely(!buf)) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 978 | return -ENOMEM; |
| 979 | |
Christian König | fbe86ca5 | 2020-09-21 14:37:25 +0200 | [diff] [blame] | 980 | ret = vmw_bo_init(dev_priv, buf, size, &vmw_sys_placement, |
| 981 | true, true, vmw_bo_bo_free); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 982 | if (unlikely(ret != 0)) |
| 983 | goto out; |
| 984 | |
Christian König | dfd5e50 | 2016-04-06 11:12:03 +0200 | [diff] [blame] | 985 | ret = ttm_bo_reserve(&buf->base, false, true, NULL); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 986 | if (unlikely(ret != 0)) |
| 987 | goto no_reserve; |
| 988 | |
| 989 | /* Map and copy shader bytecode. */ |
| 990 | ret = ttm_bo_kmap(&buf->base, 0, PAGE_ALIGN(size) >> PAGE_SHIFT, |
| 991 | &map); |
| 992 | if (unlikely(ret != 0)) { |
| 993 | ttm_bo_unreserve(&buf->base); |
| 994 | goto no_reserve; |
| 995 | } |
| 996 | |
| 997 | memcpy(ttm_kmap_obj_virtual(&map, &is_iomem), bytecode, size); |
| 998 | WARN_ON(is_iomem); |
| 999 | |
| 1000 | ttm_bo_kunmap(&map); |
Christian König | 19be557 | 2017-04-12 14:24:39 +0200 | [diff] [blame] | 1001 | ret = ttm_bo_validate(&buf->base, &vmw_sys_placement, &ctx); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1002 | WARN_ON(ret != 0); |
| 1003 | ttm_bo_unreserve(&buf->base); |
| 1004 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 1005 | res = vmw_shader_alloc(dev_priv, buf, size, 0, shader_type); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1006 | if (unlikely(ret != 0)) |
| 1007 | goto no_reserve; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1008 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1009 | ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader, |
| 1010 | vmw_shader_key(user_key, shader_type), |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 1011 | res, list); |
| 1012 | vmw_resource_unreference(&res); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1013 | no_reserve: |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1014 | vmw_bo_unreference(&buf); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1015 | out: |
| 1016 | return ret; |
| 1017 | } |
| 1018 | |
| 1019 | /** |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1020 | * vmw_shader_lookup - Look up a compat shader |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1021 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 1022 | * @man: Pointer to the command buffer managed resource manager identifying |
| 1023 | * the shader namespace. |
| 1024 | * @user_key: The user space id of the shader. |
| 1025 | * @shader_type: The shader type. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1026 | * |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 1027 | * Returns a refcounted pointer to a struct vmw_resource if the shader was |
| 1028 | * found. An error pointer otherwise. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1029 | */ |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 1030 | struct vmw_resource * |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1031 | vmw_shader_lookup(struct vmw_cmdbuf_res_manager *man, |
| 1032 | u32 user_key, |
| 1033 | SVGA3dShaderType shader_type) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1034 | { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1035 | if (!vmw_shader_id_ok(user_key, shader_type)) |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 1036 | return ERR_PTR(-EINVAL); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1037 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1038 | return vmw_cmdbuf_res_lookup(man, vmw_cmdbuf_res_shader, |
| 1039 | vmw_shader_key(user_key, shader_type)); |
| 1040 | } |
| 1041 | |
| 1042 | int vmw_shader_define_ioctl(struct drm_device *dev, void *data, |
| 1043 | struct drm_file *file_priv) |
| 1044 | { |
| 1045 | struct drm_vmw_shader_create_arg *arg = |
| 1046 | (struct drm_vmw_shader_create_arg *)data; |
| 1047 | |
| 1048 | return vmw_shader_define(dev, file_priv, arg->shader_type, |
| 1049 | arg->buffer_handle, |
| 1050 | arg->size, arg->offset, |
| 1051 | 0, 0, |
| 1052 | &arg->shader_handle); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 1053 | } |