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Dirk Hohndel (VMware)dff96882018-05-07 01:16:26 +02001// SPDX-License-Identifier: GPL-2.0 OR MIT
Thomas Hellstromc74c1622012-11-21 12:10:26 +01002/**************************************************************************
3 *
Dirk Hohndel (VMware)dff96882018-05-07 01:16:26 +02004 * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
Thomas Hellstromc74c1622012-11-21 12:10:26 +01005 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
Masahiro Yamada008be682017-04-24 13:50:35 +090028#include <drm/ttm/ttm_placement.h>
29
Thomas Hellstromc74c1622012-11-21 12:10:26 +010030#include "vmwgfx_drv.h"
31#include "vmwgfx_resource_priv.h"
Thomas Hellstromd80efd52015-08-10 10:39:35 -070032#include "vmwgfx_binding.h"
Thomas Hellstromc74c1622012-11-21 12:10:26 +010033
34struct vmw_shader {
35 struct vmw_resource res;
36 SVGA3dShaderType type;
37 uint32_t size;
Thomas Hellstromd80efd52015-08-10 10:39:35 -070038 uint8_t num_input_sig;
39 uint8_t num_output_sig;
Thomas Hellstromc74c1622012-11-21 12:10:26 +010040};
41
42struct vmw_user_shader {
43 struct ttm_base_object base;
44 struct vmw_shader shader;
45};
46
Thomas Hellstromd80efd52015-08-10 10:39:35 -070047struct vmw_dx_shader {
48 struct vmw_resource res;
49 struct vmw_resource *ctx;
50 struct vmw_resource *cotable;
51 u32 id;
52 bool committed;
53 struct list_head cotable_head;
54};
55
Thomas Hellstrom18e4a462014-06-09 12:39:22 +020056static uint64_t vmw_user_shader_size;
57static uint64_t vmw_shader_size;
Thomas Hellstromd80efd52015-08-10 10:39:35 -070058static size_t vmw_shader_dx_size;
Thomas Hellstromd5bde952014-01-31 10:12:10 +010059
Thomas Hellstromc74c1622012-11-21 12:10:26 +010060static void vmw_user_shader_free(struct vmw_resource *res);
61static struct vmw_resource *
62vmw_user_shader_base_to_res(struct ttm_base_object *base);
63
64static int vmw_gb_shader_create(struct vmw_resource *res);
65static int vmw_gb_shader_bind(struct vmw_resource *res,
66 struct ttm_validate_buffer *val_buf);
67static int vmw_gb_shader_unbind(struct vmw_resource *res,
68 bool readback,
69 struct ttm_validate_buffer *val_buf);
70static int vmw_gb_shader_destroy(struct vmw_resource *res);
71
Thomas Hellstromd80efd52015-08-10 10:39:35 -070072static int vmw_dx_shader_create(struct vmw_resource *res);
73static int vmw_dx_shader_bind(struct vmw_resource *res,
74 struct ttm_validate_buffer *val_buf);
75static int vmw_dx_shader_unbind(struct vmw_resource *res,
76 bool readback,
77 struct ttm_validate_buffer *val_buf);
78static void vmw_dx_shader_commit_notify(struct vmw_resource *res,
79 enum vmw_cmdbuf_res_state state);
80static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type);
81static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type);
82static uint64_t vmw_user_shader_size;
83
Thomas Hellstromc74c1622012-11-21 12:10:26 +010084static const struct vmw_user_resource_conv user_shader_conv = {
85 .object_type = VMW_RES_SHADER,
86 .base_obj_to_res = vmw_user_shader_base_to_res,
87 .res_free = vmw_user_shader_free
88};
89
90const struct vmw_user_resource_conv *user_shader_converter =
91 &user_shader_conv;
92
93
94static const struct vmw_res_func vmw_gb_shader_func = {
95 .res_type = vmw_res_shader,
96 .needs_backup = true,
97 .may_evict = true,
98 .type_name = "guest backed shaders",
99 .backup_placement = &vmw_mob_placement,
100 .create = vmw_gb_shader_create,
101 .destroy = vmw_gb_shader_destroy,
102 .bind = vmw_gb_shader_bind,
103 .unbind = vmw_gb_shader_unbind
104};
105
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700106static const struct vmw_res_func vmw_dx_shader_func = {
107 .res_type = vmw_res_shader,
108 .needs_backup = true,
109 .may_evict = false,
110 .type_name = "dx shaders",
111 .backup_placement = &vmw_mob_placement,
112 .create = vmw_dx_shader_create,
113 /*
114 * The destroy callback is only called with a committed resource on
115 * context destroy, in which case we destroy the cotable anyway,
116 * so there's no need to destroy DX shaders separately.
117 */
118 .destroy = NULL,
119 .bind = vmw_dx_shader_bind,
120 .unbind = vmw_dx_shader_unbind,
121 .commit_notify = vmw_dx_shader_commit_notify,
122};
123
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100124/**
125 * Shader management:
126 */
127
128static inline struct vmw_shader *
129vmw_res_to_shader(struct vmw_resource *res)
130{
131 return container_of(res, struct vmw_shader, res);
132}
133
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700134/**
135 * vmw_res_to_dx_shader - typecast a struct vmw_resource to a
136 * struct vmw_dx_shader
137 *
138 * @res: Pointer to the struct vmw_resource.
139 */
140static inline struct vmw_dx_shader *
141vmw_res_to_dx_shader(struct vmw_resource *res)
142{
143 return container_of(res, struct vmw_dx_shader, res);
144}
145
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100146static void vmw_hw_shader_destroy(struct vmw_resource *res)
147{
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700148 if (likely(res->func->destroy))
149 (void) res->func->destroy(res);
150 else
151 res->id = -1;
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100152}
153
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700154
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100155static int vmw_gb_shader_init(struct vmw_private *dev_priv,
156 struct vmw_resource *res,
157 uint32_t size,
158 uint64_t offset,
159 SVGA3dShaderType type,
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700160 uint8_t num_input_sig,
161 uint8_t num_output_sig,
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200162 struct vmw_buffer_object *byte_code,
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100163 void (*res_free) (struct vmw_resource *res))
164{
165 struct vmw_shader *shader = vmw_res_to_shader(res);
166 int ret;
167
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700168 ret = vmw_resource_init(dev_priv, res, true, res_free,
169 &vmw_gb_shader_func);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100170
171 if (unlikely(ret != 0)) {
172 if (res_free)
173 res_free(res);
174 else
175 kfree(res);
176 return ret;
177 }
178
179 res->backup_size = size;
180 if (byte_code) {
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200181 res->backup = vmw_bo_reference(byte_code);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100182 res->backup_offset = offset;
183 }
184 shader->size = size;
185 shader->type = type;
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700186 shader->num_input_sig = num_input_sig;
187 shader->num_output_sig = num_output_sig;
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100188
Thomas Hellstrom13289242018-09-26 15:41:52 +0200189 res->hw_destroy = vmw_hw_shader_destroy;
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100190 return 0;
191}
192
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700193/*
194 * GB shader code:
195 */
196
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100197static int vmw_gb_shader_create(struct vmw_resource *res)
198{
199 struct vmw_private *dev_priv = res->dev_priv;
200 struct vmw_shader *shader = vmw_res_to_shader(res);
201 int ret;
202 struct {
203 SVGA3dCmdHeader header;
204 SVGA3dCmdDefineGBShader body;
205 } *cmd;
206
207 if (likely(res->id != -1))
208 return 0;
209
210 ret = vmw_resource_alloc_id(res);
211 if (unlikely(ret != 0)) {
212 DRM_ERROR("Failed to allocate a shader id.\n");
213 goto out_no_id;
214 }
215
216 if (unlikely(res->id >= VMWGFX_NUM_GB_SHADER)) {
217 ret = -EBUSY;
218 goto out_no_fifo;
219 }
220
221 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
222 if (unlikely(cmd == NULL)) {
223 DRM_ERROR("Failed reserving FIFO space for shader "
224 "creation.\n");
225 ret = -ENOMEM;
226 goto out_no_fifo;
227 }
228
229 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SHADER;
230 cmd->header.size = sizeof(cmd->body);
231 cmd->body.shid = res->id;
232 cmd->body.type = shader->type;
233 cmd->body.sizeInBytes = shader->size;
234 vmw_fifo_commit(dev_priv, sizeof(*cmd));
Thomas Hellstrom153b3d52015-06-25 10:47:43 -0700235 vmw_fifo_resource_inc(dev_priv);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100236
237 return 0;
238
239out_no_fifo:
240 vmw_resource_release_id(res);
241out_no_id:
242 return ret;
243}
244
245static int vmw_gb_shader_bind(struct vmw_resource *res,
246 struct ttm_validate_buffer *val_buf)
247{
248 struct vmw_private *dev_priv = res->dev_priv;
249 struct {
250 SVGA3dCmdHeader header;
251 SVGA3dCmdBindGBShader body;
252 } *cmd;
253 struct ttm_buffer_object *bo = val_buf->bo;
254
255 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
256
257 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
258 if (unlikely(cmd == NULL)) {
259 DRM_ERROR("Failed reserving FIFO space for shader "
260 "binding.\n");
261 return -ENOMEM;
262 }
263
264 cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER;
265 cmd->header.size = sizeof(cmd->body);
266 cmd->body.shid = res->id;
267 cmd->body.mobid = bo->mem.start;
Thomas Hellstromb8ccd1e2014-12-02 03:41:01 -0800268 cmd->body.offsetInBytes = res->backup_offset;
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100269 res->backup_dirty = false;
270 vmw_fifo_commit(dev_priv, sizeof(*cmd));
271
272 return 0;
273}
274
275static int vmw_gb_shader_unbind(struct vmw_resource *res,
276 bool readback,
277 struct ttm_validate_buffer *val_buf)
278{
279 struct vmw_private *dev_priv = res->dev_priv;
280 struct {
281 SVGA3dCmdHeader header;
282 SVGA3dCmdBindGBShader body;
283 } *cmd;
284 struct vmw_fence_obj *fence;
285
286 BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB);
287
288 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
289 if (unlikely(cmd == NULL)) {
290 DRM_ERROR("Failed reserving FIFO space for shader "
291 "unbinding.\n");
292 return -ENOMEM;
293 }
294
295 cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER;
296 cmd->header.size = sizeof(cmd->body);
297 cmd->body.shid = res->id;
298 cmd->body.mobid = SVGA3D_INVALID_ID;
299 cmd->body.offsetInBytes = 0;
300 vmw_fifo_commit(dev_priv, sizeof(*cmd));
301
302 /*
303 * Create a fence object and fence the backup buffer.
304 */
305
306 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
307 &fence, NULL);
308
Thomas Hellstrome9431ea2018-06-19 15:33:53 +0200309 vmw_bo_fence_single(val_buf->bo, fence);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100310
311 if (likely(fence != NULL))
312 vmw_fence_obj_unreference(&fence);
313
314 return 0;
315}
316
317static int vmw_gb_shader_destroy(struct vmw_resource *res)
318{
319 struct vmw_private *dev_priv = res->dev_priv;
320 struct {
321 SVGA3dCmdHeader header;
322 SVGA3dCmdDestroyGBShader body;
323 } *cmd;
324
325 if (likely(res->id == -1))
326 return 0;
327
Thomas Hellstrom173fb7d2013-10-08 02:32:36 -0700328 mutex_lock(&dev_priv->binding_mutex);
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700329 vmw_binding_res_list_scrub(&res->binding_head);
Thomas Hellstrom173fb7d2013-10-08 02:32:36 -0700330
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100331 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
332 if (unlikely(cmd == NULL)) {
333 DRM_ERROR("Failed reserving FIFO space for shader "
334 "destruction.\n");
Thomas Hellstrom3e894a62014-01-20 11:33:04 +0100335 mutex_unlock(&dev_priv->binding_mutex);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100336 return -ENOMEM;
337 }
338
339 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SHADER;
340 cmd->header.size = sizeof(cmd->body);
341 cmd->body.shid = res->id;
342 vmw_fifo_commit(dev_priv, sizeof(*cmd));
Thomas Hellstrom173fb7d2013-10-08 02:32:36 -0700343 mutex_unlock(&dev_priv->binding_mutex);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100344 vmw_resource_release_id(res);
Thomas Hellstrom153b3d52015-06-25 10:47:43 -0700345 vmw_fifo_resource_dec(dev_priv);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100346
347 return 0;
348}
349
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700350/*
351 * DX shader code:
352 */
353
354/**
355 * vmw_dx_shader_commit_notify - Notify that a shader operation has been
356 * committed to hardware from a user-supplied command stream.
357 *
358 * @res: Pointer to the shader resource.
359 * @state: Indicating whether a creation or removal has been committed.
360 *
361 */
362static void vmw_dx_shader_commit_notify(struct vmw_resource *res,
363 enum vmw_cmdbuf_res_state state)
364{
365 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
366 struct vmw_private *dev_priv = res->dev_priv;
367
368 if (state == VMW_CMDBUF_RES_ADD) {
369 mutex_lock(&dev_priv->binding_mutex);
370 vmw_cotable_add_resource(shader->cotable,
371 &shader->cotable_head);
372 shader->committed = true;
373 res->id = shader->id;
374 mutex_unlock(&dev_priv->binding_mutex);
375 } else {
376 mutex_lock(&dev_priv->binding_mutex);
377 list_del_init(&shader->cotable_head);
378 shader->committed = false;
379 res->id = -1;
380 mutex_unlock(&dev_priv->binding_mutex);
381 }
382}
383
384/**
385 * vmw_dx_shader_unscrub - Have the device reattach a MOB to a DX shader.
386 *
387 * @res: The shader resource
388 *
389 * This function reverts a scrub operation.
390 */
391static int vmw_dx_shader_unscrub(struct vmw_resource *res)
392{
393 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
394 struct vmw_private *dev_priv = res->dev_priv;
395 struct {
396 SVGA3dCmdHeader header;
397 SVGA3dCmdDXBindShader body;
398 } *cmd;
399
400 if (!list_empty(&shader->cotable_head) || !shader->committed)
401 return 0;
402
403 cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd),
404 shader->ctx->id);
405 if (unlikely(cmd == NULL)) {
406 DRM_ERROR("Failed reserving FIFO space for shader "
407 "scrubbing.\n");
408 return -ENOMEM;
409 }
410
411 cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER;
412 cmd->header.size = sizeof(cmd->body);
413 cmd->body.cid = shader->ctx->id;
414 cmd->body.shid = shader->id;
415 cmd->body.mobid = res->backup->base.mem.start;
416 cmd->body.offsetInBytes = res->backup_offset;
417 vmw_fifo_commit(dev_priv, sizeof(*cmd));
418
419 vmw_cotable_add_resource(shader->cotable, &shader->cotable_head);
420
421 return 0;
422}
423
424/**
425 * vmw_dx_shader_create - The DX shader create callback
426 *
427 * @res: The DX shader resource
428 *
429 * The create callback is called as part of resource validation and
430 * makes sure that we unscrub the shader if it's previously been scrubbed.
431 */
432static int vmw_dx_shader_create(struct vmw_resource *res)
433{
434 struct vmw_private *dev_priv = res->dev_priv;
435 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
436 int ret = 0;
437
438 WARN_ON_ONCE(!shader->committed);
439
440 if (!list_empty(&res->mob_head)) {
441 mutex_lock(&dev_priv->binding_mutex);
442 ret = vmw_dx_shader_unscrub(res);
443 mutex_unlock(&dev_priv->binding_mutex);
444 }
445
446 res->id = shader->id;
447 return ret;
448}
449
450/**
451 * vmw_dx_shader_bind - The DX shader bind callback
452 *
453 * @res: The DX shader resource
454 * @val_buf: Pointer to the validate buffer.
455 *
456 */
457static int vmw_dx_shader_bind(struct vmw_resource *res,
458 struct ttm_validate_buffer *val_buf)
459{
460 struct vmw_private *dev_priv = res->dev_priv;
461 struct ttm_buffer_object *bo = val_buf->bo;
462
463 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
464 mutex_lock(&dev_priv->binding_mutex);
465 vmw_dx_shader_unscrub(res);
466 mutex_unlock(&dev_priv->binding_mutex);
467
468 return 0;
469}
470
471/**
472 * vmw_dx_shader_scrub - Have the device unbind a MOB from a DX shader.
473 *
474 * @res: The shader resource
475 *
476 * This function unbinds a MOB from the DX shader without requiring the
477 * MOB dma_buffer to be reserved. The driver still considers the MOB bound.
478 * However, once the driver eventually decides to unbind the MOB, it doesn't
479 * need to access the context.
480 */
481static int vmw_dx_shader_scrub(struct vmw_resource *res)
482{
483 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
484 struct vmw_private *dev_priv = res->dev_priv;
485 struct {
486 SVGA3dCmdHeader header;
487 SVGA3dCmdDXBindShader body;
488 } *cmd;
489
490 if (list_empty(&shader->cotable_head))
491 return 0;
492
493 WARN_ON_ONCE(!shader->committed);
494 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
495 if (unlikely(cmd == NULL)) {
496 DRM_ERROR("Failed reserving FIFO space for shader "
497 "scrubbing.\n");
498 return -ENOMEM;
499 }
500
501 cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER;
502 cmd->header.size = sizeof(cmd->body);
503 cmd->body.cid = shader->ctx->id;
504 cmd->body.shid = res->id;
505 cmd->body.mobid = SVGA3D_INVALID_ID;
506 cmd->body.offsetInBytes = 0;
507 vmw_fifo_commit(dev_priv, sizeof(*cmd));
508 res->id = -1;
509 list_del_init(&shader->cotable_head);
510
511 return 0;
512}
513
514/**
515 * vmw_dx_shader_unbind - The dx shader unbind callback.
516 *
517 * @res: The shader resource
518 * @readback: Whether this is a readback unbind. Currently unused.
519 * @val_buf: MOB buffer information.
520 */
521static int vmw_dx_shader_unbind(struct vmw_resource *res,
522 bool readback,
523 struct ttm_validate_buffer *val_buf)
524{
525 struct vmw_private *dev_priv = res->dev_priv;
526 struct vmw_fence_obj *fence;
527 int ret;
528
529 BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB);
530
531 mutex_lock(&dev_priv->binding_mutex);
532 ret = vmw_dx_shader_scrub(res);
533 mutex_unlock(&dev_priv->binding_mutex);
534
535 if (ret)
536 return ret;
537
538 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
539 &fence, NULL);
Thomas Hellstrome9431ea2018-06-19 15:33:53 +0200540 vmw_bo_fence_single(val_buf->bo, fence);
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700541
542 if (likely(fence != NULL))
543 vmw_fence_obj_unreference(&fence);
544
545 return 0;
546}
547
548/**
549 * vmw_dx_shader_cotable_list_scrub - The cotable unbind_func callback for
550 * DX shaders.
551 *
552 * @dev_priv: Pointer to device private structure.
553 * @list: The list of cotable resources.
554 * @readback: Whether the call was part of a readback unbind.
555 *
556 * Scrubs all shader MOBs so that any subsequent shader unbind or shader
557 * destroy operation won't need to swap in the context.
558 */
559void vmw_dx_shader_cotable_list_scrub(struct vmw_private *dev_priv,
560 struct list_head *list,
561 bool readback)
562{
563 struct vmw_dx_shader *entry, *next;
564
Thomas Hellstromd76ce032018-09-26 15:39:24 +0200565 lockdep_assert_held_once(&dev_priv->binding_mutex);
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700566
567 list_for_each_entry_safe(entry, next, list, cotable_head) {
568 WARN_ON(vmw_dx_shader_scrub(&entry->res));
569 if (!readback)
570 entry->committed = false;
571 }
572}
573
574/**
575 * vmw_dx_shader_res_free - The DX shader free callback
576 *
577 * @res: The shader resource
578 *
579 * Frees the DX shader resource and updates memory accounting.
580 */
581static void vmw_dx_shader_res_free(struct vmw_resource *res)
582{
583 struct vmw_private *dev_priv = res->dev_priv;
584 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
585
586 vmw_resource_unreference(&shader->cotable);
587 kfree(shader);
588 ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size);
589}
590
591/**
592 * vmw_dx_shader_add - Add a shader resource as a command buffer managed
593 * resource.
594 *
595 * @man: The command buffer resource manager.
596 * @ctx: Pointer to the context resource.
597 * @user_key: The id used for this shader.
598 * @shader_type: The shader type.
599 * @list: The list of staged command buffer managed resources.
600 */
601int vmw_dx_shader_add(struct vmw_cmdbuf_res_manager *man,
602 struct vmw_resource *ctx,
603 u32 user_key,
604 SVGA3dShaderType shader_type,
605 struct list_head *list)
606{
607 struct vmw_dx_shader *shader;
608 struct vmw_resource *res;
609 struct vmw_private *dev_priv = ctx->dev_priv;
Roger He279c01f2017-12-08 15:09:50 +0800610 struct ttm_operation_ctx ttm_opt_ctx = {
611 .interruptible = true,
612 .no_wait_gpu = false
613 };
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700614 int ret;
615
616 if (!vmw_shader_dx_size)
617 vmw_shader_dx_size = ttm_round_pot(sizeof(*shader));
618
619 if (!vmw_shader_id_ok(user_key, shader_type))
620 return -EINVAL;
621
622 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), vmw_shader_dx_size,
Roger He279c01f2017-12-08 15:09:50 +0800623 &ttm_opt_ctx);
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700624 if (ret) {
625 if (ret != -ERESTARTSYS)
626 DRM_ERROR("Out of graphics memory for shader "
627 "creation.\n");
628 return ret;
629 }
630
631 shader = kmalloc(sizeof(*shader), GFP_KERNEL);
632 if (!shader) {
633 ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size);
634 return -ENOMEM;
635 }
636
637 res = &shader->res;
638 shader->ctx = ctx;
639 shader->cotable = vmw_context_cotable(ctx, SVGA_COTABLE_DXSHADER);
640 shader->id = user_key;
641 shader->committed = false;
642 INIT_LIST_HEAD(&shader->cotable_head);
643 ret = vmw_resource_init(dev_priv, res, true,
644 vmw_dx_shader_res_free, &vmw_dx_shader_func);
645 if (ret)
646 goto out_resource_init;
647
648 /*
649 * The user_key name-space is not per shader type for DX shaders,
650 * so when hashing, use a single zero shader type.
651 */
652 ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader,
653 vmw_shader_key(user_key, 0),
654 res, list);
655 if (ret)
656 goto out_resource_init;
657
658 res->id = shader->id;
Thomas Hellstrom13289242018-09-26 15:41:52 +0200659 res->hw_destroy = vmw_hw_shader_destroy;
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700660
661out_resource_init:
662 vmw_resource_unreference(&res);
663
664 return ret;
665}
666
667
668
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100669/**
670 * User-space shader management:
671 */
672
673static struct vmw_resource *
674vmw_user_shader_base_to_res(struct ttm_base_object *base)
675{
676 return &(container_of(base, struct vmw_user_shader, base)->
677 shader.res);
678}
679
680static void vmw_user_shader_free(struct vmw_resource *res)
681{
682 struct vmw_user_shader *ushader =
683 container_of(res, struct vmw_user_shader, shader.res);
684 struct vmw_private *dev_priv = res->dev_priv;
685
686 ttm_base_object_kfree(ushader, base);
687 ttm_mem_global_free(vmw_mem_glob(dev_priv),
688 vmw_user_shader_size);
689}
690
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200691static void vmw_shader_free(struct vmw_resource *res)
692{
693 struct vmw_shader *shader = vmw_res_to_shader(res);
694 struct vmw_private *dev_priv = res->dev_priv;
695
696 kfree(shader);
697 ttm_mem_global_free(vmw_mem_glob(dev_priv),
698 vmw_shader_size);
699}
700
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100701/**
702 * This function is called when user space has no more references on the
703 * base object. It releases the base-object's reference on the resource object.
704 */
705
706static void vmw_user_shader_base_release(struct ttm_base_object **p_base)
707{
708 struct ttm_base_object *base = *p_base;
709 struct vmw_resource *res = vmw_user_shader_base_to_res(base);
710
711 *p_base = NULL;
712 vmw_resource_unreference(&res);
713}
714
715int vmw_shader_destroy_ioctl(struct drm_device *dev, void *data,
716 struct drm_file *file_priv)
717{
718 struct drm_vmw_shader_arg *arg = (struct drm_vmw_shader_arg *)data;
719 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
720
721 return ttm_ref_object_base_unref(tfile, arg->handle,
722 TTM_REF_USAGE);
723}
724
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200725static int vmw_user_shader_alloc(struct vmw_private *dev_priv,
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200726 struct vmw_buffer_object *buffer,
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200727 size_t shader_size,
728 size_t offset,
729 SVGA3dShaderType shader_type,
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700730 uint8_t num_input_sig,
731 uint8_t num_output_sig,
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200732 struct ttm_object_file *tfile,
733 u32 *handle)
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100734{
735 struct vmw_user_shader *ushader;
736 struct vmw_resource *res, *tmp;
Roger He279c01f2017-12-08 15:09:50 +0800737 struct ttm_operation_ctx ctx = {
738 .interruptible = true,
739 .no_wait_gpu = false
740 };
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100741 int ret;
742
743 /*
744 * Approximate idr memory usage with 128 bytes. It will be limited
745 * by maximum number_of shaders anyway.
746 */
747 if (unlikely(vmw_user_shader_size == 0))
748 vmw_user_shader_size =
749 ttm_round_pot(sizeof(struct vmw_user_shader)) + 128;
750
751 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
752 vmw_user_shader_size,
Roger He279c01f2017-12-08 15:09:50 +0800753 &ctx);
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100754 if (unlikely(ret != 0)) {
755 if (ret != -ERESTARTSYS)
756 DRM_ERROR("Out of graphics memory for shader "
757 "creation.\n");
758 goto out;
759 }
760
761 ushader = kzalloc(sizeof(*ushader), GFP_KERNEL);
Ravikant B Sharma1a4adb02016-11-08 17:30:31 +0530762 if (unlikely(!ushader)) {
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100763 ttm_mem_global_free(vmw_mem_glob(dev_priv),
764 vmw_user_shader_size);
765 ret = -ENOMEM;
766 goto out;
767 }
768
769 res = &ushader->shader.res;
770 ushader->base.shareable = false;
771 ushader->base.tfile = NULL;
772
773 /*
774 * From here on, the destructor takes over resource freeing.
775 */
776
777 ret = vmw_gb_shader_init(dev_priv, res, shader_size,
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700778 offset, shader_type, num_input_sig,
779 num_output_sig, buffer,
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100780 vmw_user_shader_free);
781 if (unlikely(ret != 0))
782 goto out;
783
784 tmp = vmw_resource_reference(res);
785 ret = ttm_base_object_init(tfile, &ushader->base, false,
786 VMW_RES_SHADER,
787 &vmw_user_shader_base_release, NULL);
788
789 if (unlikely(ret != 0)) {
790 vmw_resource_unreference(&tmp);
791 goto out_err;
792 }
793
794 if (handle)
795 *handle = ushader->base.hash.key;
796out_err:
797 vmw_resource_unreference(&res);
798out:
799 return ret;
800}
801
802
Thomas Hellstromb9eb1a62015-04-02 02:39:45 -0700803static struct vmw_resource *vmw_shader_alloc(struct vmw_private *dev_priv,
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200804 struct vmw_buffer_object *buffer,
Thomas Hellstromb9eb1a62015-04-02 02:39:45 -0700805 size_t shader_size,
806 size_t offset,
807 SVGA3dShaderType shader_type)
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200808{
809 struct vmw_shader *shader;
810 struct vmw_resource *res;
Roger He279c01f2017-12-08 15:09:50 +0800811 struct ttm_operation_ctx ctx = {
812 .interruptible = true,
813 .no_wait_gpu = false
814 };
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200815 int ret;
816
817 /*
818 * Approximate idr memory usage with 128 bytes. It will be limited
819 * by maximum number_of shaders anyway.
820 */
821 if (unlikely(vmw_shader_size == 0))
822 vmw_shader_size =
823 ttm_round_pot(sizeof(struct vmw_shader)) + 128;
824
825 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
826 vmw_shader_size,
Roger He279c01f2017-12-08 15:09:50 +0800827 &ctx);
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200828 if (unlikely(ret != 0)) {
829 if (ret != -ERESTARTSYS)
830 DRM_ERROR("Out of graphics memory for shader "
831 "creation.\n");
832 goto out_err;
833 }
834
835 shader = kzalloc(sizeof(*shader), GFP_KERNEL);
Ravikant B Sharma1a4adb02016-11-08 17:30:31 +0530836 if (unlikely(!shader)) {
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200837 ttm_mem_global_free(vmw_mem_glob(dev_priv),
838 vmw_shader_size);
839 ret = -ENOMEM;
840 goto out_err;
841 }
842
843 res = &shader->res;
844
845 /*
846 * From here on, the destructor takes over resource freeing.
847 */
848 ret = vmw_gb_shader_init(dev_priv, res, shader_size,
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700849 offset, shader_type, 0, 0, buffer,
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200850 vmw_shader_free);
851
852out_err:
853 return ret ? ERR_PTR(ret) : res;
854}
855
856
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700857static int vmw_shader_define(struct drm_device *dev, struct drm_file *file_priv,
858 enum drm_vmw_shader_type shader_type_drm,
859 u32 buffer_handle, size_t size, size_t offset,
860 uint8_t num_input_sig, uint8_t num_output_sig,
861 uint32_t *shader_handle)
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100862{
863 struct vmw_private *dev_priv = vmw_priv(dev);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100864 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200865 struct vmw_buffer_object *buffer = NULL;
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100866 SVGA3dShaderType shader_type;
867 int ret;
868
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700869 if (buffer_handle != SVGA3D_INVALID_ID) {
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200870 ret = vmw_user_bo_lookup(tfile, buffer_handle,
Thomas Hellstrom54c12bc2015-09-14 01:13:11 -0700871 &buffer, NULL);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100872 if (unlikely(ret != 0)) {
873 DRM_ERROR("Could not find buffer for shader "
874 "creation.\n");
875 return ret;
876 }
877
878 if ((u64)buffer->base.num_pages * PAGE_SIZE <
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700879 (u64)size + (u64)offset) {
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100880 DRM_ERROR("Illegal buffer- or shader size.\n");
881 ret = -EINVAL;
882 goto out_bad_arg;
883 }
884 }
885
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700886 switch (shader_type_drm) {
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100887 case drm_vmw_shader_type_vs:
888 shader_type = SVGA3D_SHADERTYPE_VS;
889 break;
890 case drm_vmw_shader_type_ps:
891 shader_type = SVGA3D_SHADERTYPE_PS;
892 break;
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100893 default:
894 DRM_ERROR("Illegal shader type.\n");
895 ret = -EINVAL;
896 goto out_bad_arg;
897 }
898
Thomas Hellstrom294adf72014-02-27 12:34:51 +0100899 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100900 if (unlikely(ret != 0))
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100901 goto out_bad_arg;
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100902
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700903 ret = vmw_user_shader_alloc(dev_priv, buffer, size, offset,
904 shader_type, num_input_sig,
905 num_output_sig, tfile, shader_handle);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100906
Thomas Hellstrom294adf72014-02-27 12:34:51 +0100907 ttm_read_unlock(&dev_priv->reservation_sem);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100908out_bad_arg:
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200909 vmw_bo_unreference(&buffer);
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100910 return ret;
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100911}
Thomas Hellstromc74c1622012-11-21 12:10:26 +0100912
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100913/**
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700914 * vmw_shader_id_ok - Check whether a compat shader user key and
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200915 * shader type are within valid bounds.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100916 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200917 * @user_key: User space id of the shader.
918 * @shader_type: Shader type.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100919 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200920 * Returns true if valid false if not.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100921 */
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700922static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type)
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100923{
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200924 return user_key <= ((1 << 20) - 1) && (unsigned) shader_type < 16;
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100925}
926
927/**
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700928 * vmw_shader_key - Compute a hash key suitable for a compat shader.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100929 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200930 * @user_key: User space id of the shader.
931 * @shader_type: Shader type.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100932 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200933 * Returns a hash key suitable for a command buffer managed resource
934 * manager hash table.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100935 */
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700936static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type)
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100937{
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200938 return user_key | (shader_type << 20);
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100939}
940
941/**
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700942 * vmw_shader_remove - Stage a compat shader for removal.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100943 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200944 * @man: Pointer to the compat shader manager identifying the shader namespace.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100945 * @user_key: The key that is used to identify the shader. The key is
946 * unique to the shader type.
947 * @shader_type: Shader type.
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200948 * @list: Caller's list of staged command buffer resource actions.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100949 */
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700950int vmw_shader_remove(struct vmw_cmdbuf_res_manager *man,
951 u32 user_key, SVGA3dShaderType shader_type,
952 struct list_head *list)
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100953{
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700954 struct vmw_resource *dummy;
955
956 if (!vmw_shader_id_ok(user_key, shader_type))
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100957 return -EINVAL;
958
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700959 return vmw_cmdbuf_res_remove(man, vmw_cmdbuf_res_shader,
960 vmw_shader_key(user_key, shader_type),
961 list, &dummy);
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100962}
963
964/**
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200965 * vmw_compat_shader_add - Create a compat shader and stage it for addition
966 * as a command buffer managed resource.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100967 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200968 * @man: Pointer to the compat shader manager identifying the shader namespace.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100969 * @user_key: The key that is used to identify the shader. The key is
970 * unique to the shader type.
971 * @bytecode: Pointer to the bytecode of the shader.
972 * @shader_type: Shader type.
973 * @tfile: Pointer to a struct ttm_object_file that the guest-backed shader is
974 * to be created with.
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200975 * @list: Caller's list of staged command buffer resource actions.
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100976 *
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100977 */
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200978int vmw_compat_shader_add(struct vmw_private *dev_priv,
979 struct vmw_cmdbuf_res_manager *man,
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100980 u32 user_key, const void *bytecode,
981 SVGA3dShaderType shader_type,
982 size_t size,
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100983 struct list_head *list)
984{
Christian König19be5572017-04-12 14:24:39 +0200985 struct ttm_operation_ctx ctx = { false, true };
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +0200986 struct vmw_buffer_object *buf;
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100987 struct ttm_bo_kmap_obj map;
988 bool is_iomem;
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100989 int ret;
Thomas Hellstrom18e4a462014-06-09 12:39:22 +0200990 struct vmw_resource *res;
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100991
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700992 if (!vmw_shader_id_ok(user_key, shader_type))
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100993 return -EINVAL;
994
995 /* Allocate and pin a DMA buffer */
996 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
Ravikant B Sharma1a4adb02016-11-08 17:30:31 +0530997 if (unlikely(!buf))
Thomas Hellstromd5bde952014-01-31 10:12:10 +0100998 return -ENOMEM;
999
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +02001000 ret = vmw_bo_init(dev_priv, buf, size, &vmw_sys_ne_placement,
1001 true, vmw_bo_bo_free);
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001002 if (unlikely(ret != 0))
1003 goto out;
1004
Christian Königdfd5e502016-04-06 11:12:03 +02001005 ret = ttm_bo_reserve(&buf->base, false, true, NULL);
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001006 if (unlikely(ret != 0))
1007 goto no_reserve;
1008
1009 /* Map and copy shader bytecode. */
1010 ret = ttm_bo_kmap(&buf->base, 0, PAGE_ALIGN(size) >> PAGE_SHIFT,
1011 &map);
1012 if (unlikely(ret != 0)) {
1013 ttm_bo_unreserve(&buf->base);
1014 goto no_reserve;
1015 }
1016
1017 memcpy(ttm_kmap_obj_virtual(&map, &is_iomem), bytecode, size);
1018 WARN_ON(is_iomem);
1019
1020 ttm_bo_kunmap(&map);
Christian König19be5572017-04-12 14:24:39 +02001021 ret = ttm_bo_validate(&buf->base, &vmw_sys_placement, &ctx);
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001022 WARN_ON(ret != 0);
1023 ttm_bo_unreserve(&buf->base);
1024
Thomas Hellstrom18e4a462014-06-09 12:39:22 +02001025 res = vmw_shader_alloc(dev_priv, buf, size, 0, shader_type);
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001026 if (unlikely(ret != 0))
1027 goto no_reserve;
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001028
Thomas Hellstromd80efd52015-08-10 10:39:35 -07001029 ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader,
1030 vmw_shader_key(user_key, shader_type),
Thomas Hellstrom18e4a462014-06-09 12:39:22 +02001031 res, list);
1032 vmw_resource_unreference(&res);
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001033no_reserve:
Thomas Hellstromf1d34bf2018-06-19 15:02:16 +02001034 vmw_bo_unreference(&buf);
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001035out:
1036 return ret;
1037}
1038
1039/**
Thomas Hellstromd80efd52015-08-10 10:39:35 -07001040 * vmw_shader_lookup - Look up a compat shader
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001041 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +02001042 * @man: Pointer to the command buffer managed resource manager identifying
1043 * the shader namespace.
1044 * @user_key: The user space id of the shader.
1045 * @shader_type: The shader type.
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001046 *
Thomas Hellstrom18e4a462014-06-09 12:39:22 +02001047 * Returns a refcounted pointer to a struct vmw_resource if the shader was
1048 * found. An error pointer otherwise.
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001049 */
Thomas Hellstrom18e4a462014-06-09 12:39:22 +02001050struct vmw_resource *
Thomas Hellstromd80efd52015-08-10 10:39:35 -07001051vmw_shader_lookup(struct vmw_cmdbuf_res_manager *man,
1052 u32 user_key,
1053 SVGA3dShaderType shader_type)
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001054{
Thomas Hellstromd80efd52015-08-10 10:39:35 -07001055 if (!vmw_shader_id_ok(user_key, shader_type))
Thomas Hellstrom18e4a462014-06-09 12:39:22 +02001056 return ERR_PTR(-EINVAL);
Thomas Hellstromd5bde952014-01-31 10:12:10 +01001057
Thomas Hellstromd80efd52015-08-10 10:39:35 -07001058 return vmw_cmdbuf_res_lookup(man, vmw_cmdbuf_res_shader,
1059 vmw_shader_key(user_key, shader_type));
1060}
1061
1062int vmw_shader_define_ioctl(struct drm_device *dev, void *data,
1063 struct drm_file *file_priv)
1064{
1065 struct drm_vmw_shader_create_arg *arg =
1066 (struct drm_vmw_shader_create_arg *)data;
1067
1068 return vmw_shader_define(dev, file_priv, arg->shader_type,
1069 arg->buffer_handle,
1070 arg->size, arg->offset,
1071 0, 0,
1072 &arg->shader_handle);
Thomas Hellstromc74c1622012-11-21 12:10:26 +01001073}