Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Sean Wang | e3fd24a | 2017-12-12 14:24:19 +0800 | [diff] [blame] | 2 | menu "MediaTek pinctrl drivers" |
3 | depends on ARCH_MEDIATEK || COMPILE_TEST | ||||
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 4 | |
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 5 | config EINT_MTK |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame^] | 6 | tristate "MediaTek External Interrupt Support" |
Olof Johansson | 7c68024 | 2018-11-01 19:57:28 -0700 | [diff] [blame] | 7 | depends on PINCTRL_MTK || PINCTRL_MTK_MOORE || PINCTRL_MTK_PARIS || COMPILE_TEST |
Arnd Bergmann | 71a9d39 | 2018-10-08 17:57:43 +0200 | [diff] [blame] | 8 | select GPIOLIB |
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 9 | select IRQ_DOMAIN |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame^] | 10 | default y if PINCTRL_MTK || PINCTRL_MTK_MOORE |
11 | default PINCTRL_MTK_PARIS | ||||
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 12 | |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 13 | config PINCTRL_MTK |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 14 | bool |
Linus Walleij | b99e6fb | 2015-04-15 10:00:35 +0200 | [diff] [blame] | 15 | depends on OF |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 16 | select PINMUX |
17 | select GENERIC_PINCONF | ||||
18 | select GPIOLIB | ||||
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 19 | select EINT_MTK |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 20 | select OF_GPIO |
21 | |||||
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame^] | 22 | config PINCTRL_MTK_V2 |
23 | tristate | ||||
24 | |||||
Sean Wang | e78d57b | 2018-09-08 19:07:18 +0800 | [diff] [blame] | 25 | config PINCTRL_MTK_MOORE |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 26 | bool |
Sean Wang | e78d57b | 2018-09-08 19:07:18 +0800 | [diff] [blame] | 27 | depends on OF |
28 | select GENERIC_PINCONF | ||||
29 | select GENERIC_PINCTRL_GROUPS | ||||
30 | select GENERIC_PINMUX_FUNCTIONS | ||||
31 | select GPIOLIB | ||||
32 | select OF_GPIO | ||||
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame^] | 33 | select PINCTRL_MTK_V2 |
Sean Wang | e78d57b | 2018-09-08 19:07:18 +0800 | [diff] [blame] | 34 | |
Zhiyong Tao | 8052509 | 2018-09-08 19:07:33 +0800 | [diff] [blame] | 35 | config PINCTRL_MTK_PARIS |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame^] | 36 | tristate |
Zhiyong Tao | 8052509 | 2018-09-08 19:07:33 +0800 | [diff] [blame] | 37 | depends on OF |
38 | select PINMUX | ||||
39 | select GENERIC_PINCONF | ||||
40 | select GPIOLIB | ||||
41 | select EINT_MTK | ||||
42 | select OF_GPIO | ||||
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame^] | 43 | select PINCTRL_MTK_V2 |
Zhiyong Tao | 8052509 | 2018-09-08 19:07:33 +0800 | [diff] [blame] | 44 | |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 45 | # For ARMv7 SoCs |
Biao Huang | 148b95e | 2016-01-27 09:24:42 +0800 | [diff] [blame] | 46 | config PINCTRL_MT2701 |
Jean Delvare | 79d6208 | 2017-01-25 10:32:09 +0100 | [diff] [blame] | 47 | bool "Mediatek MT2701 pin control" |
Sean Wang | ceba438 | 2017-05-01 15:54:34 +0800 | [diff] [blame] | 48 | depends on MACH_MT7623 || MACH_MT2701 || COMPILE_TEST |
Biao Huang | 148b95e | 2016-01-27 09:24:42 +0800 | [diff] [blame] | 49 | depends on OF |
50 | default MACH_MT2701 | ||||
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 51 | select PINCTRL_MTK |
Biao Huang | 148b95e | 2016-01-27 09:24:42 +0800 | [diff] [blame] | 52 | |
Sean Wang | e7507f5 | 2018-09-08 19:07:28 +0800 | [diff] [blame] | 53 | config PINCTRL_MT7623 |
54 | bool "Mediatek MT7623 pin control with generic binding" | ||||
55 | depends on MACH_MT7623 || COMPILE_TEST | ||||
Ryder Lee | 2d2d478 | 2019-01-09 10:13:55 +0800 | [diff] [blame] | 56 | depends on OF |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 57 | default MACH_MT7623 |
58 | select PINCTRL_MTK_MOORE | ||||
Sean Wang | e7507f5 | 2018-09-08 19:07:28 +0800 | [diff] [blame] | 59 | |
Ryder Lee | b446773 | 2018-11-12 09:45:05 +0800 | [diff] [blame] | 60 | config PINCTRL_MT7629 |
61 | bool "Mediatek MT7629 pin control" | ||||
62 | depends on MACH_MT7629 || COMPILE_TEST | ||||
Ryder Lee | 2d2d478 | 2019-01-09 10:13:55 +0800 | [diff] [blame] | 63 | depends on OF |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 64 | default MACH_MT7629 |
65 | select PINCTRL_MTK_MOORE | ||||
Ryder Lee | b446773 | 2018-11-12 09:45:05 +0800 | [diff] [blame] | 66 | |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 67 | config PINCTRL_MT8135 |
Jean Delvare | 79d6208 | 2017-01-25 10:32:09 +0100 | [diff] [blame] | 68 | bool "Mediatek MT8135 pin control" |
69 | depends on MACH_MT8135 || COMPILE_TEST | ||||
Linus Walleij | b99e6fb | 2015-04-15 10:00:35 +0200 | [diff] [blame] | 70 | depends on OF |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 71 | default MACH_MT8135 |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 72 | select PINCTRL_MTK |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 73 | |
Yingjoe Chen | 6acdee8 | 2015-05-18 20:01:32 -0700 | [diff] [blame] | 74 | config PINCTRL_MT8127 |
Jean Delvare | 79d6208 | 2017-01-25 10:32:09 +0100 | [diff] [blame] | 75 | bool "Mediatek MT8127 pin control" |
76 | depends on MACH_MT8127 || COMPILE_TEST | ||||
Yingjoe Chen | 6acdee8 | 2015-05-18 20:01:32 -0700 | [diff] [blame] | 77 | depends on OF |
78 | default MACH_MT8127 | ||||
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 79 | select PINCTRL_MTK |
Yingjoe Chen | 6acdee8 | 2015-05-18 20:01:32 -0700 | [diff] [blame] | 80 | |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 81 | # For ARMv8 SoCs |
Zhiyong Tao | 8670710 | 2018-03-22 10:58:41 +0800 | [diff] [blame] | 82 | config PINCTRL_MT2712 |
83 | bool "MediaTek MT2712 pin control" | ||||
84 | depends on OF | ||||
85 | depends on ARM64 || COMPILE_TEST | ||||
86 | default ARM64 && ARCH_MEDIATEK | ||||
87 | select PINCTRL_MTK | ||||
88 | |||||
ZH Chen | 477fece | 2018-09-21 12:07:37 +0800 | [diff] [blame] | 89 | config PINCTRL_MT6765 |
90 | bool "Mediatek MT6765 pin control" | ||||
91 | depends on OF | ||||
92 | depends on ARM64 || COMPILE_TEST | ||||
93 | default ARM64 && ARCH_MEDIATEK | ||||
94 | select PINCTRL_MTK_PARIS | ||||
95 | |||||
Manivannan Sadhasivam | f969b7a | 2018-11-07 23:18:44 +0530 | [diff] [blame] | 96 | config PINCTRL_MT6797 |
97 | bool "Mediatek MT6797 pin control" | ||||
98 | depends on OF | ||||
99 | depends on ARM64 || COMPILE_TEST | ||||
100 | default ARM64 && ARCH_MEDIATEK | ||||
101 | select PINCTRL_MTK_PARIS | ||||
102 | |||||
Sean Wang | d6ed935 | 2017-12-12 14:24:20 +0800 | [diff] [blame] | 103 | config PINCTRL_MT7622 |
104 | bool "MediaTek MT7622 pin control" | ||||
Ryder Lee | 2d2d478 | 2019-01-09 10:13:55 +0800 | [diff] [blame] | 105 | depends on OF |
Sean Wang | d6ed935 | 2017-12-12 14:24:20 +0800 | [diff] [blame] | 106 | depends on ARM64 || COMPILE_TEST |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 107 | default ARM64 && ARCH_MEDIATEK |
108 | select PINCTRL_MTK_MOORE | ||||
Sean Wang | d6ed935 | 2017-12-12 14:24:20 +0800 | [diff] [blame] | 109 | |
Hongzhou Yang | 30f010f | 2015-01-27 15:13:55 +0800 | [diff] [blame] | 110 | config PINCTRL_MT8173 |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 111 | bool "Mediatek MT8173 pin control" |
Linus Walleij | b99e6fb | 2015-04-15 10:00:35 +0200 | [diff] [blame] | 112 | depends on OF |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 113 | depends on ARM64 || COMPILE_TEST |
114 | default ARM64 && ARCH_MEDIATEK | ||||
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 115 | select PINCTRL_MTK |
Hongzhou Yang | 30f010f | 2015-01-27 15:13:55 +0800 | [diff] [blame] | 116 | |
Zhiyong Tao | 750cd15 | 2018-09-08 19:07:34 +0800 | [diff] [blame] | 117 | config PINCTRL_MT8183 |
118 | bool "Mediatek MT8183 pin control" | ||||
119 | depends on OF | ||||
120 | depends on ARM64 || COMPILE_TEST | ||||
121 | default ARM64 && ARCH_MEDIATEK | ||||
122 | select PINCTRL_MTK_PARIS | ||||
123 | |||||
Fabien Parent | 2646671 | 2019-04-16 10:33:05 +0200 | [diff] [blame] | 124 | config PINCTRL_MT8516 |
125 | bool "Mediatek MT8516 pin control" | ||||
126 | depends on OF | ||||
127 | depends on ARM64 || COMPILE_TEST | ||||
128 | default ARM64 && ARCH_MEDIATEK | ||||
129 | select PINCTRL_MTK | ||||
130 | |||||
Hongzhou Yang | fc59e66 | 2015-05-18 23:11:17 -0700 | [diff] [blame] | 131 | # For PMIC |
132 | config PINCTRL_MT6397 | ||||
Jean Delvare | 79d6208 | 2017-01-25 10:32:09 +0100 | [diff] [blame] | 133 | bool "Mediatek MT6397 pin control" |
134 | depends on MFD_MT6397 || COMPILE_TEST | ||||
Linus Walleij | a2202a4 | 2015-05-20 09:11:23 +0200 | [diff] [blame] | 135 | depends on OF |
Hongzhou Yang | fc59e66 | 2015-05-18 23:11:17 -0700 | [diff] [blame] | 136 | default MFD_MT6397 |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 137 | select PINCTRL_MTK |
Hongzhou Yang | fc59e66 | 2015-05-18 23:11:17 -0700 | [diff] [blame] | 138 | |
Sean Wang | e3fd24a | 2017-12-12 14:24:19 +0800 | [diff] [blame] | 139 | endmenu |