Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // |
| 3 | // mt8192-mt6359-rt1015-rt5682.c -- |
| 4 | // MT8192-MT6359-RT1015-RT6358 ALSA SoC machine driver |
| 5 | // |
| 6 | // Copyright (c) 2020 MediaTek Inc. |
| 7 | // Author: Jiaxin Yu <jiaxin.yu@mediatek.com> |
| 8 | // |
| 9 | |
| 10 | #include <linux/input.h> |
| 11 | #include <linux/module.h> |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 12 | #include <linux/of_device.h> |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 13 | #include <linux/pm_runtime.h> |
| 14 | #include <sound/jack.h> |
| 15 | #include <sound/pcm_params.h> |
| 16 | #include <sound/rt5682.h> |
| 17 | #include <sound/soc.h> |
| 18 | |
| 19 | #include "../../codecs/mt6359.h" |
| 20 | #include "../../codecs/rt1015.h" |
| 21 | #include "../../codecs/rt5682.h" |
| 22 | #include "../common/mtk-afe-platform-driver.h" |
| 23 | #include "mt8192-afe-common.h" |
| 24 | #include "mt8192-afe-clk.h" |
| 25 | #include "mt8192-afe-gpio.h" |
| 26 | |
| 27 | #define RT1015_CODEC_DAI "rt1015-aif" |
| 28 | #define RT1015_DEV0_NAME "rt1015.1-0028" |
| 29 | #define RT1015_DEV1_NAME "rt1015.1-0029" |
| 30 | |
| 31 | #define RT5682_CODEC_DAI "rt5682-aif1" |
| 32 | #define RT5682_DEV0_NAME "rt5682.1-001a" |
| 33 | |
Tzung-Bi Shih | 4e37528 | 2021-01-20 16:08:46 +0800 | [diff] [blame] | 34 | struct mt8192_mt6359_priv { |
| 35 | struct snd_soc_jack headset_jack; |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 36 | struct snd_soc_jack hdmi_jack; |
Tzung-Bi Shih | 4e37528 | 2021-01-20 16:08:46 +0800 | [diff] [blame] | 37 | }; |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 38 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 39 | static int mt8192_rt1015_i2s_hw_params(struct snd_pcm_substream *substream, |
| 40 | struct snd_pcm_hw_params *params) |
| 41 | { |
Tzung-Bi Shih | 8e59cf9 | 2021-02-03 11:21:59 +0800 | [diff] [blame] | 42 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 43 | struct snd_soc_card *card = rtd->card; |
| 44 | struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); |
| 45 | struct snd_soc_dai *codec_dai; |
| 46 | unsigned int rate = params_rate(params); |
| 47 | unsigned int mclk_fs_ratio = 128; |
| 48 | unsigned int mclk_fs = rate * mclk_fs_ratio; |
| 49 | int ret, i; |
| 50 | |
| 51 | for_each_rtd_codec_dais(rtd, i, codec_dai) { |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 52 | ret = snd_soc_dai_set_pll(codec_dai, 0, |
| 53 | RT1015_PLL_S_BCLK, |
| 54 | params_rate(params) * 64, |
| 55 | params_rate(params) * 256); |
| 56 | if (ret) { |
| 57 | dev_err(card->dev, "failed to set pll\n"); |
| 58 | return ret; |
| 59 | } |
| 60 | |
| 61 | ret = snd_soc_dai_set_sysclk(codec_dai, |
| 62 | RT1015_SCLK_S_PLL, |
| 63 | params_rate(params) * 256, |
| 64 | SND_SOC_CLOCK_IN); |
| 65 | if (ret) { |
| 66 | dev_err(card->dev, "failed to set sysclk\n"); |
| 67 | return ret; |
| 68 | } |
| 69 | } |
| 70 | |
| 71 | return snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_fs, SND_SOC_CLOCK_OUT); |
| 72 | } |
| 73 | |
| 74 | static int mt8192_rt5682_i2s_hw_params(struct snd_pcm_substream *substream, |
| 75 | struct snd_pcm_hw_params *params) |
| 76 | { |
Tzung-Bi Shih | 8e59cf9 | 2021-02-03 11:21:59 +0800 | [diff] [blame] | 77 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 78 | struct snd_soc_card *card = rtd->card; |
| 79 | struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); |
| 80 | struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); |
| 81 | unsigned int rate = params_rate(params); |
| 82 | unsigned int mclk_fs_ratio = 128; |
| 83 | unsigned int mclk_fs = rate * mclk_fs_ratio; |
| 84 | int bitwidth; |
| 85 | int ret; |
| 86 | |
| 87 | bitwidth = snd_pcm_format_width(params_format(params)); |
| 88 | if (bitwidth < 0) { |
| 89 | dev_err(card->dev, "invalid bit width: %d\n", bitwidth); |
| 90 | return bitwidth; |
| 91 | } |
| 92 | |
| 93 | ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth); |
| 94 | if (ret) { |
| 95 | dev_err(card->dev, "failed to set tdm slot\n"); |
| 96 | return ret; |
| 97 | } |
| 98 | |
| 99 | ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1, |
| 100 | RT5682_PLL1_S_BCLK1, |
| 101 | params_rate(params) * 64, |
| 102 | params_rate(params) * 512); |
| 103 | if (ret) { |
| 104 | dev_err(card->dev, "failed to set pll\n"); |
| 105 | return ret; |
| 106 | } |
| 107 | |
| 108 | ret = snd_soc_dai_set_sysclk(codec_dai, |
| 109 | RT5682_SCLK_S_PLL1, |
| 110 | params_rate(params) * 512, |
| 111 | SND_SOC_CLOCK_IN); |
| 112 | if (ret) { |
| 113 | dev_err(card->dev, "failed to set sysclk\n"); |
| 114 | return ret; |
| 115 | } |
| 116 | |
| 117 | return snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_fs, SND_SOC_CLOCK_OUT); |
| 118 | } |
| 119 | |
| 120 | static const struct snd_soc_ops mt8192_rt1015_i2s_ops = { |
| 121 | .hw_params = mt8192_rt1015_i2s_hw_params, |
| 122 | }; |
| 123 | |
| 124 | static const struct snd_soc_ops mt8192_rt5682_i2s_ops = { |
| 125 | .hw_params = mt8192_rt5682_i2s_hw_params, |
| 126 | }; |
| 127 | |
| 128 | static int mt8192_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd) |
| 129 | { |
| 130 | struct snd_soc_component *cmpnt_afe = |
| 131 | snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); |
| 132 | struct snd_soc_component *cmpnt_codec = |
| 133 | asoc_rtd_to_codec(rtd, 0)->component; |
| 134 | struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); |
| 135 | struct mt8192_afe_private *afe_priv = afe->platform_priv; |
| 136 | int phase; |
| 137 | unsigned int monitor; |
| 138 | int test_done_1, test_done_2, test_done_3; |
| 139 | int cycle_1, cycle_2, cycle_3; |
| 140 | int prev_cycle_1, prev_cycle_2, prev_cycle_3; |
| 141 | int chosen_phase_1, chosen_phase_2, chosen_phase_3; |
| 142 | int counter; |
| 143 | int mtkaif_calib_ok; |
| 144 | |
| 145 | dev_info(afe->dev, "%s(), start\n", __func__); |
| 146 | |
| 147 | pm_runtime_get_sync(afe->dev); |
| 148 | mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA, 1); |
| 149 | mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA, 0); |
| 150 | mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA_CH34, 1); |
| 151 | mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA_CH34, 0); |
| 152 | |
| 153 | mt6359_mtkaif_calibration_enable(cmpnt_codec); |
| 154 | |
| 155 | /* set clock protocol 2 */ |
| 156 | regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, 0xff, 0x38); |
| 157 | regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, 0xff, 0x39); |
| 158 | |
| 159 | /* set test type to synchronizer pulse */ |
| 160 | regmap_update_bits(afe_priv->topckgen, |
| 161 | CKSYS_AUD_TOP_CFG, 0xffff, 0x4); |
| 162 | |
| 163 | mtkaif_calib_ok = true; |
| 164 | afe_priv->mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */ |
| 165 | afe_priv->mtkaif_chosen_phase[0] = -1; |
| 166 | afe_priv->mtkaif_chosen_phase[1] = -1; |
| 167 | afe_priv->mtkaif_chosen_phase[2] = -1; |
| 168 | |
| 169 | for (phase = 0; |
| 170 | phase <= afe_priv->mtkaif_calibration_num_phase && |
| 171 | mtkaif_calib_ok; |
| 172 | phase++) { |
| 173 | mt6359_set_mtkaif_calibration_phase(cmpnt_codec, |
| 174 | phase, phase, phase); |
| 175 | |
| 176 | regmap_update_bits(afe_priv->topckgen, |
| 177 | CKSYS_AUD_TOP_CFG, 0x1, 0x1); |
| 178 | |
| 179 | test_done_1 = 0; |
| 180 | test_done_2 = 0; |
| 181 | test_done_3 = 0; |
| 182 | cycle_1 = -1; |
| 183 | cycle_2 = -1; |
| 184 | cycle_3 = -1; |
| 185 | counter = 0; |
| 186 | while (test_done_1 == 0 || |
| 187 | test_done_2 == 0 || |
| 188 | test_done_3 == 0) { |
| 189 | regmap_read(afe_priv->topckgen, |
| 190 | CKSYS_AUD_TOP_MON, &monitor); |
| 191 | |
| 192 | test_done_1 = (monitor >> 28) & 0x1; |
| 193 | test_done_2 = (monitor >> 29) & 0x1; |
| 194 | test_done_3 = (monitor >> 30) & 0x1; |
| 195 | if (test_done_1 == 1) |
| 196 | cycle_1 = monitor & 0xf; |
| 197 | |
| 198 | if (test_done_2 == 1) |
| 199 | cycle_2 = (monitor >> 4) & 0xf; |
| 200 | |
| 201 | if (test_done_3 == 1) |
| 202 | cycle_3 = (monitor >> 8) & 0xf; |
| 203 | |
| 204 | /* handle if never test done */ |
| 205 | if (++counter > 10000) { |
| 206 | dev_err(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n", |
| 207 | __func__, |
| 208 | cycle_1, cycle_2, cycle_3, monitor); |
| 209 | mtkaif_calib_ok = false; |
| 210 | break; |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | if (phase == 0) { |
| 215 | prev_cycle_1 = cycle_1; |
| 216 | prev_cycle_2 = cycle_2; |
| 217 | prev_cycle_3 = cycle_3; |
| 218 | } |
| 219 | |
| 220 | if (cycle_1 != prev_cycle_1 && |
| 221 | afe_priv->mtkaif_chosen_phase[0] < 0) { |
| 222 | afe_priv->mtkaif_chosen_phase[0] = phase - 1; |
| 223 | afe_priv->mtkaif_phase_cycle[0] = prev_cycle_1; |
| 224 | } |
| 225 | |
| 226 | if (cycle_2 != prev_cycle_2 && |
| 227 | afe_priv->mtkaif_chosen_phase[1] < 0) { |
| 228 | afe_priv->mtkaif_chosen_phase[1] = phase - 1; |
| 229 | afe_priv->mtkaif_phase_cycle[1] = prev_cycle_2; |
| 230 | } |
| 231 | |
| 232 | if (cycle_3 != prev_cycle_3 && |
| 233 | afe_priv->mtkaif_chosen_phase[2] < 0) { |
| 234 | afe_priv->mtkaif_chosen_phase[2] = phase - 1; |
| 235 | afe_priv->mtkaif_phase_cycle[2] = prev_cycle_3; |
| 236 | } |
| 237 | |
| 238 | regmap_update_bits(afe_priv->topckgen, |
| 239 | CKSYS_AUD_TOP_CFG, 0x1, 0x0); |
| 240 | |
| 241 | if (afe_priv->mtkaif_chosen_phase[0] >= 0 && |
| 242 | afe_priv->mtkaif_chosen_phase[1] >= 0 && |
| 243 | afe_priv->mtkaif_chosen_phase[2] >= 0) |
| 244 | break; |
| 245 | } |
| 246 | |
| 247 | if (afe_priv->mtkaif_chosen_phase[0] < 0) |
| 248 | chosen_phase_1 = 0; |
| 249 | else |
| 250 | chosen_phase_1 = afe_priv->mtkaif_chosen_phase[0]; |
| 251 | |
| 252 | if (afe_priv->mtkaif_chosen_phase[1] < 0) |
| 253 | chosen_phase_2 = 0; |
| 254 | else |
| 255 | chosen_phase_2 = afe_priv->mtkaif_chosen_phase[1]; |
| 256 | |
| 257 | if (afe_priv->mtkaif_chosen_phase[2] < 0) |
| 258 | chosen_phase_3 = 0; |
| 259 | else |
| 260 | chosen_phase_3 = afe_priv->mtkaif_chosen_phase[2]; |
| 261 | |
| 262 | mt6359_set_mtkaif_calibration_phase(cmpnt_codec, |
| 263 | chosen_phase_1, |
| 264 | chosen_phase_2, |
| 265 | chosen_phase_3); |
| 266 | |
| 267 | /* disable rx fifo */ |
| 268 | regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, 0xff, 0x38); |
| 269 | |
| 270 | mt6359_mtkaif_calibration_disable(cmpnt_codec); |
| 271 | |
| 272 | mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA, 1); |
| 273 | mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA, 0); |
| 274 | mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA_CH34, 1); |
| 275 | mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA_CH34, 0); |
| 276 | pm_runtime_put(afe->dev); |
| 277 | |
| 278 | dev_info(afe->dev, "%s(), mtkaif_chosen_phase[0/1/2]:%d/%d/%d\n", |
| 279 | __func__, |
| 280 | afe_priv->mtkaif_chosen_phase[0], |
| 281 | afe_priv->mtkaif_chosen_phase[1], |
| 282 | afe_priv->mtkaif_chosen_phase[2]); |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | static int mt8192_mt6359_init(struct snd_soc_pcm_runtime *rtd) |
| 288 | { |
| 289 | struct snd_soc_component *cmpnt_afe = |
| 290 | snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); |
| 291 | struct snd_soc_component *cmpnt_codec = |
| 292 | asoc_rtd_to_codec(rtd, 0)->component; |
| 293 | struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); |
| 294 | struct mt8192_afe_private *afe_priv = afe->platform_priv; |
| 295 | |
| 296 | /* set mtkaif protocol */ |
| 297 | mt6359_set_mtkaif_protocol(cmpnt_codec, |
| 298 | MT6359_MTKAIF_PROTOCOL_2_CLK_P2); |
| 299 | afe_priv->mtkaif_protocol = MTKAIF_PROTOCOL_2_CLK_P2; |
| 300 | |
| 301 | /* mtkaif calibration */ |
| 302 | mt8192_mt6359_mtkaif_calibration(rtd); |
| 303 | |
| 304 | return 0; |
| 305 | } |
| 306 | |
| 307 | static int mt8192_rt5682_init(struct snd_soc_pcm_runtime *rtd) |
| 308 | { |
| 309 | struct snd_soc_component *cmpnt_codec = |
| 310 | asoc_rtd_to_codec(rtd, 0)->component; |
Tzung-Bi Shih | 4e37528 | 2021-01-20 16:08:46 +0800 | [diff] [blame] | 311 | struct mt8192_mt6359_priv *priv = snd_soc_card_get_drvdata(rtd->card); |
| 312 | struct snd_soc_jack *jack = &priv->headset_jack; |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 313 | int ret; |
| 314 | |
| 315 | ret = snd_soc_card_jack_new(rtd->card, "Headset Jack", |
| 316 | SND_JACK_HEADSET | SND_JACK_BTN_0 | |
| 317 | SND_JACK_BTN_1 | SND_JACK_BTN_2 | |
| 318 | SND_JACK_BTN_3, |
| 319 | jack, NULL, 0); |
| 320 | if (ret) { |
| 321 | dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret); |
| 322 | return ret; |
| 323 | } |
| 324 | |
| 325 | snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); |
| 326 | snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); |
| 327 | snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); |
| 328 | snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); |
| 329 | |
Tzung-Bi Shih | 12295ef | 2021-01-20 16:08:47 +0800 | [diff] [blame] | 330 | return snd_soc_component_set_jack(cmpnt_codec, jack, NULL); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 331 | }; |
| 332 | |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 333 | static int mt8192_mt6359_hdmi_init(struct snd_soc_pcm_runtime *rtd) |
| 334 | { |
| 335 | struct snd_soc_component *cmpnt_codec = |
| 336 | asoc_rtd_to_codec(rtd, 0)->component; |
| 337 | struct mt8192_mt6359_priv *priv = snd_soc_card_get_drvdata(rtd->card); |
| 338 | int ret; |
| 339 | |
| 340 | ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, |
| 341 | &priv->hdmi_jack, NULL, 0); |
| 342 | if (ret) { |
| 343 | dev_err(rtd->dev, "HDMI Jack creation failed: %d\n", ret); |
| 344 | return ret; |
| 345 | } |
| 346 | |
| 347 | return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); |
| 348 | } |
| 349 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 350 | static int mt8192_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, |
| 351 | struct snd_pcm_hw_params *params) |
| 352 | { |
| 353 | /* fix BE i2s format to 32bit, clean param mask first */ |
| 354 | snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), |
| 355 | 0, SNDRV_PCM_FORMAT_LAST); |
| 356 | |
| 357 | params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); |
| 358 | |
| 359 | return 0; |
| 360 | } |
| 361 | |
| 362 | static int |
Tzung-Bi Shih | 4cceb42 | 2021-02-03 11:22:01 +0800 | [diff] [blame] | 363 | mt8192_mt6359_cap1_startup(struct snd_pcm_substream *substream) |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 364 | { |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 365 | static const unsigned int channels[] = { |
| 366 | 1, 2, 4 |
| 367 | }; |
| 368 | static const struct snd_pcm_hw_constraint_list constraints_channels = { |
| 369 | .count = ARRAY_SIZE(channels), |
| 370 | .list = channels, |
| 371 | .mask = 0, |
| 372 | }; |
| 373 | static const unsigned int rates[] = { |
| 374 | 8000, 16000, 32000, 48000, 96000, 192000 |
| 375 | }; |
| 376 | static const struct snd_pcm_hw_constraint_list constraints_rates = { |
| 377 | .count = ARRAY_SIZE(rates), |
| 378 | .list = rates, |
| 379 | .mask = 0, |
| 380 | }; |
| 381 | |
Tzung-Bi Shih | 4cceb42 | 2021-02-03 11:22:01 +0800 | [diff] [blame] | 382 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 383 | struct snd_pcm_runtime *runtime = substream->runtime; |
Tzung-Bi Shih | 4cceb42 | 2021-02-03 11:22:01 +0800 | [diff] [blame] | 384 | int ret; |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 385 | |
| 386 | ret = snd_pcm_hw_constraint_list(runtime, 0, |
| 387 | SNDRV_PCM_HW_PARAM_CHANNELS, |
| 388 | &constraints_channels); |
| 389 | if (ret < 0) { |
Tzung-Bi Shih | 4cceb42 | 2021-02-03 11:22:01 +0800 | [diff] [blame] | 390 | dev_err(rtd->dev, "hw_constraint_list channels failed\n"); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 391 | return ret; |
| 392 | } |
| 393 | |
| 394 | ret = snd_pcm_hw_constraint_list(runtime, 0, |
| 395 | SNDRV_PCM_HW_PARAM_RATE, |
| 396 | &constraints_rates); |
| 397 | if (ret < 0) { |
Tzung-Bi Shih | 4cceb42 | 2021-02-03 11:22:01 +0800 | [diff] [blame] | 398 | dev_err(rtd->dev, "hw_constraint_list rate failed\n"); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 399 | return ret; |
| 400 | } |
| 401 | |
| 402 | return 0; |
| 403 | } |
| 404 | |
Tzung-Bi Shih | 4cceb42 | 2021-02-03 11:22:01 +0800 | [diff] [blame] | 405 | static const struct snd_soc_ops mt8192_mt6359_capture1_ops = { |
| 406 | .startup = mt8192_mt6359_cap1_startup, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 407 | }; |
| 408 | |
Tzung-Bi Shih | 339f6c73 | 2021-01-25 14:14:53 +0800 | [diff] [blame] | 409 | static int |
| 410 | mt8192_mt6359_rt5682_startup(struct snd_pcm_substream *substream) |
| 411 | { |
| 412 | static const unsigned int channels[] = { |
| 413 | 1, 2 |
| 414 | }; |
| 415 | static const struct snd_pcm_hw_constraint_list constraints_channels = { |
| 416 | .count = ARRAY_SIZE(channels), |
| 417 | .list = channels, |
| 418 | .mask = 0, |
| 419 | }; |
| 420 | static const unsigned int rates[] = { |
| 421 | 48000 |
| 422 | }; |
| 423 | static const struct snd_pcm_hw_constraint_list constraints_rates = { |
| 424 | .count = ARRAY_SIZE(rates), |
| 425 | .list = rates, |
| 426 | .mask = 0, |
| 427 | }; |
| 428 | |
| 429 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
| 430 | struct snd_pcm_runtime *runtime = substream->runtime; |
| 431 | int ret; |
| 432 | |
| 433 | ret = snd_pcm_hw_constraint_list(runtime, 0, |
| 434 | SNDRV_PCM_HW_PARAM_CHANNELS, |
| 435 | &constraints_channels); |
| 436 | if (ret < 0) { |
| 437 | dev_err(rtd->dev, "hw_constraint_list channels failed\n"); |
| 438 | return ret; |
| 439 | } |
| 440 | |
| 441 | ret = snd_pcm_hw_constraint_list(runtime, 0, |
| 442 | SNDRV_PCM_HW_PARAM_RATE, |
| 443 | &constraints_rates); |
| 444 | if (ret < 0) { |
| 445 | dev_err(rtd->dev, "hw_constraint_list rate failed\n"); |
| 446 | return ret; |
| 447 | } |
| 448 | |
| 449 | return 0; |
| 450 | } |
| 451 | |
| 452 | static const struct snd_soc_ops mt8192_mt6359_rt5682_ops = { |
| 453 | .startup = mt8192_mt6359_rt5682_startup, |
| 454 | }; |
| 455 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 456 | /* FE */ |
| 457 | SND_SOC_DAILINK_DEFS(playback1, |
| 458 | DAILINK_COMP_ARRAY(COMP_CPU("DL1")), |
| 459 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 460 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 461 | |
| 462 | SND_SOC_DAILINK_DEFS(playback12, |
| 463 | DAILINK_COMP_ARRAY(COMP_CPU("DL12")), |
| 464 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 465 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 466 | |
| 467 | SND_SOC_DAILINK_DEFS(playback2, |
| 468 | DAILINK_COMP_ARRAY(COMP_CPU("DL2")), |
| 469 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 470 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 471 | |
| 472 | SND_SOC_DAILINK_DEFS(playback3, |
| 473 | DAILINK_COMP_ARRAY(COMP_CPU("DL3")), |
| 474 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 475 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 476 | |
| 477 | SND_SOC_DAILINK_DEFS(playback4, |
| 478 | DAILINK_COMP_ARRAY(COMP_CPU("DL4")), |
| 479 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 480 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 481 | |
| 482 | SND_SOC_DAILINK_DEFS(playback5, |
| 483 | DAILINK_COMP_ARRAY(COMP_CPU("DL5")), |
| 484 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 485 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 486 | |
| 487 | SND_SOC_DAILINK_DEFS(playback6, |
| 488 | DAILINK_COMP_ARRAY(COMP_CPU("DL6")), |
| 489 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 490 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 491 | |
| 492 | SND_SOC_DAILINK_DEFS(playback7, |
| 493 | DAILINK_COMP_ARRAY(COMP_CPU("DL7")), |
| 494 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 495 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 496 | |
| 497 | SND_SOC_DAILINK_DEFS(playback8, |
| 498 | DAILINK_COMP_ARRAY(COMP_CPU("DL8")), |
| 499 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 500 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 501 | |
| 502 | SND_SOC_DAILINK_DEFS(playback9, |
| 503 | DAILINK_COMP_ARRAY(COMP_CPU("DL9")), |
| 504 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 505 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 506 | |
| 507 | SND_SOC_DAILINK_DEFS(capture1, |
| 508 | DAILINK_COMP_ARRAY(COMP_CPU("UL1")), |
| 509 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 510 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 511 | |
| 512 | SND_SOC_DAILINK_DEFS(capture2, |
| 513 | DAILINK_COMP_ARRAY(COMP_CPU("UL2")), |
| 514 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 515 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 516 | |
| 517 | SND_SOC_DAILINK_DEFS(capture3, |
| 518 | DAILINK_COMP_ARRAY(COMP_CPU("UL3")), |
| 519 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 520 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 521 | |
| 522 | SND_SOC_DAILINK_DEFS(capture4, |
| 523 | DAILINK_COMP_ARRAY(COMP_CPU("UL4")), |
| 524 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 525 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 526 | |
| 527 | SND_SOC_DAILINK_DEFS(capture5, |
| 528 | DAILINK_COMP_ARRAY(COMP_CPU("UL5")), |
| 529 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 530 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 531 | |
| 532 | SND_SOC_DAILINK_DEFS(capture6, |
| 533 | DAILINK_COMP_ARRAY(COMP_CPU("UL6")), |
| 534 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 535 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 536 | |
| 537 | SND_SOC_DAILINK_DEFS(capture7, |
| 538 | DAILINK_COMP_ARRAY(COMP_CPU("UL7")), |
| 539 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 540 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 541 | |
| 542 | SND_SOC_DAILINK_DEFS(capture8, |
| 543 | DAILINK_COMP_ARRAY(COMP_CPU("UL8")), |
| 544 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 545 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 546 | |
| 547 | SND_SOC_DAILINK_DEFS(capture_mono1, |
| 548 | DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_1")), |
| 549 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 550 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 551 | |
| 552 | SND_SOC_DAILINK_DEFS(capture_mono2, |
| 553 | DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_2")), |
| 554 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 555 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 556 | |
| 557 | SND_SOC_DAILINK_DEFS(capture_mono3, |
| 558 | DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_3")), |
| 559 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 560 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 561 | |
| 562 | SND_SOC_DAILINK_DEFS(playback_hdmi, |
| 563 | DAILINK_COMP_ARRAY(COMP_CPU("HDMI")), |
| 564 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 565 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 566 | |
| 567 | /* BE */ |
| 568 | SND_SOC_DAILINK_DEFS(primary_codec, |
| 569 | DAILINK_COMP_ARRAY(COMP_CPU("ADDA")), |
| 570 | DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", |
Jiaxin Yu | 2aff94e | 2020-11-11 10:45:22 +0800 | [diff] [blame] | 571 | "mt6359-snd-codec-aif1"), |
| 572 | COMP_CODEC("dmic-codec", |
| 573 | "dmic-hifi")), |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 574 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 575 | |
| 576 | SND_SOC_DAILINK_DEFS(primary_codec_ch34, |
| 577 | DAILINK_COMP_ARRAY(COMP_CPU("ADDA_CH34")), |
| 578 | DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", |
| 579 | "mt6359-snd-codec-aif2")), |
| 580 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 581 | |
| 582 | SND_SOC_DAILINK_DEFS(ap_dmic, |
| 583 | DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC")), |
| 584 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 585 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 586 | |
| 587 | SND_SOC_DAILINK_DEFS(ap_dmic_ch34, |
| 588 | DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC_CH34")), |
| 589 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 590 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 591 | |
| 592 | SND_SOC_DAILINK_DEFS(i2s0, |
| 593 | DAILINK_COMP_ARRAY(COMP_CPU("I2S0")), |
| 594 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 595 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 596 | |
| 597 | SND_SOC_DAILINK_DEFS(i2s1, |
| 598 | DAILINK_COMP_ARRAY(COMP_CPU("I2S1")), |
| 599 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 600 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 601 | |
| 602 | SND_SOC_DAILINK_DEFS(i2s2, |
| 603 | DAILINK_COMP_ARRAY(COMP_CPU("I2S2")), |
| 604 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 605 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 606 | |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 607 | SND_SOC_DAILINK_DEFS(i2s3_rt1015, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 608 | DAILINK_COMP_ARRAY(COMP_CPU("I2S3")), |
| 609 | DAILINK_COMP_ARRAY(COMP_CODEC(RT1015_DEV0_NAME, |
| 610 | RT1015_CODEC_DAI), |
| 611 | COMP_CODEC(RT1015_DEV1_NAME, |
| 612 | RT1015_CODEC_DAI)), |
| 613 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 614 | |
Tzung-Bi Shih | cfd8bb2 | 2020-12-01 21:26:14 +0800 | [diff] [blame] | 615 | SND_SOC_DAILINK_DEFS(i2s3_rt1015p, |
| 616 | DAILINK_COMP_ARRAY(COMP_CPU("I2S3")), |
| 617 | DAILINK_COMP_ARRAY(COMP_CODEC("rt1015p", "HiFi")), |
| 618 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 619 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 620 | SND_SOC_DAILINK_DEFS(i2s5, |
| 621 | DAILINK_COMP_ARRAY(COMP_CPU("I2S5")), |
| 622 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 623 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 624 | |
| 625 | SND_SOC_DAILINK_DEFS(i2s6, |
| 626 | DAILINK_COMP_ARRAY(COMP_CPU("I2S6")), |
| 627 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 628 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 629 | |
| 630 | SND_SOC_DAILINK_DEFS(i2s7, |
| 631 | DAILINK_COMP_ARRAY(COMP_CPU("I2S7")), |
| 632 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 633 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 634 | |
| 635 | SND_SOC_DAILINK_DEFS(i2s8, |
| 636 | DAILINK_COMP_ARRAY(COMP_CPU("I2S8")), |
| 637 | DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME, |
| 638 | RT5682_CODEC_DAI)), |
| 639 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 640 | |
| 641 | SND_SOC_DAILINK_DEFS(i2s9, |
| 642 | DAILINK_COMP_ARRAY(COMP_CPU("I2S9")), |
| 643 | DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME, |
| 644 | RT5682_CODEC_DAI)), |
| 645 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 646 | |
| 647 | SND_SOC_DAILINK_DEFS(connsys_i2s, |
| 648 | DAILINK_COMP_ARRAY(COMP_CPU("CONNSYS_I2S")), |
| 649 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 650 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 651 | |
| 652 | SND_SOC_DAILINK_DEFS(pcm1, |
| 653 | DAILINK_COMP_ARRAY(COMP_CPU("PCM 1")), |
| 654 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 655 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 656 | |
| 657 | SND_SOC_DAILINK_DEFS(pcm2, |
| 658 | DAILINK_COMP_ARRAY(COMP_CPU("PCM 2")), |
| 659 | DAILINK_COMP_ARRAY(COMP_DUMMY()), |
| 660 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 661 | |
| 662 | SND_SOC_DAILINK_DEFS(tdm, |
| 663 | DAILINK_COMP_ARRAY(COMP_CPU("TDM")), |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 664 | DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "i2s-hifi")), |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 665 | DAILINK_COMP_ARRAY(COMP_EMPTY())); |
| 666 | |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 667 | static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 668 | /* Front End DAI links */ |
| 669 | { |
| 670 | .name = "Playback_1", |
| 671 | .stream_name = "Playback_1", |
| 672 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 673 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 674 | .dynamic = 1, |
| 675 | .dpcm_playback = 1, |
| 676 | SND_SOC_DAILINK_REG(playback1), |
| 677 | }, |
| 678 | { |
| 679 | .name = "Playback_12", |
| 680 | .stream_name = "Playback_12", |
| 681 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 682 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 683 | .dynamic = 1, |
| 684 | .dpcm_playback = 1, |
| 685 | SND_SOC_DAILINK_REG(playback12), |
| 686 | }, |
| 687 | { |
| 688 | .name = "Playback_2", |
| 689 | .stream_name = "Playback_2", |
| 690 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 691 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 692 | .dynamic = 1, |
| 693 | .dpcm_playback = 1, |
| 694 | SND_SOC_DAILINK_REG(playback2), |
| 695 | }, |
| 696 | { |
| 697 | .name = "Playback_3", |
| 698 | .stream_name = "Playback_3", |
| 699 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 700 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 701 | .dynamic = 1, |
| 702 | .dpcm_playback = 1, |
Tzung-Bi Shih | 339f6c73 | 2021-01-25 14:14:53 +0800 | [diff] [blame] | 703 | .ops = &mt8192_mt6359_rt5682_ops, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 704 | SND_SOC_DAILINK_REG(playback3), |
| 705 | }, |
| 706 | { |
| 707 | .name = "Playback_4", |
| 708 | .stream_name = "Playback_4", |
| 709 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 710 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 711 | .dynamic = 1, |
| 712 | .dpcm_playback = 1, |
| 713 | SND_SOC_DAILINK_REG(playback4), |
| 714 | }, |
| 715 | { |
| 716 | .name = "Playback_5", |
| 717 | .stream_name = "Playback_5", |
| 718 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 719 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 720 | .dynamic = 1, |
| 721 | .dpcm_playback = 1, |
| 722 | SND_SOC_DAILINK_REG(playback5), |
| 723 | }, |
| 724 | { |
| 725 | .name = "Playback_6", |
| 726 | .stream_name = "Playback_6", |
| 727 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 728 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 729 | .dynamic = 1, |
| 730 | .dpcm_playback = 1, |
| 731 | SND_SOC_DAILINK_REG(playback6), |
| 732 | }, |
| 733 | { |
| 734 | .name = "Playback_7", |
| 735 | .stream_name = "Playback_7", |
| 736 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 737 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 738 | .dynamic = 1, |
| 739 | .dpcm_playback = 1, |
| 740 | SND_SOC_DAILINK_REG(playback7), |
| 741 | }, |
| 742 | { |
| 743 | .name = "Playback_8", |
| 744 | .stream_name = "Playback_8", |
| 745 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 746 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 747 | .dynamic = 1, |
| 748 | .dpcm_playback = 1, |
| 749 | SND_SOC_DAILINK_REG(playback8), |
| 750 | }, |
| 751 | { |
| 752 | .name = "Playback_9", |
| 753 | .stream_name = "Playback_9", |
| 754 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 755 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 756 | .dynamic = 1, |
| 757 | .dpcm_playback = 1, |
| 758 | SND_SOC_DAILINK_REG(playback9), |
| 759 | }, |
| 760 | { |
| 761 | .name = "Capture_1", |
| 762 | .stream_name = "Capture_1", |
| 763 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 764 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 765 | .dynamic = 1, |
| 766 | .dpcm_capture = 1, |
Tzung-Bi Shih | 4cceb42 | 2021-02-03 11:22:01 +0800 | [diff] [blame] | 767 | .ops = &mt8192_mt6359_capture1_ops, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 768 | SND_SOC_DAILINK_REG(capture1), |
| 769 | }, |
| 770 | { |
| 771 | .name = "Capture_2", |
| 772 | .stream_name = "Capture_2", |
| 773 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 774 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 775 | .dynamic = 1, |
| 776 | .dpcm_capture = 1, |
Tzung-Bi Shih | 339f6c73 | 2021-01-25 14:14:53 +0800 | [diff] [blame] | 777 | .ops = &mt8192_mt6359_rt5682_ops, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 778 | SND_SOC_DAILINK_REG(capture2), |
| 779 | }, |
| 780 | { |
| 781 | .name = "Capture_3", |
| 782 | .stream_name = "Capture_3", |
| 783 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 784 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 785 | .dynamic = 1, |
| 786 | .dpcm_capture = 1, |
| 787 | SND_SOC_DAILINK_REG(capture3), |
| 788 | }, |
| 789 | { |
| 790 | .name = "Capture_4", |
| 791 | .stream_name = "Capture_4", |
| 792 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 793 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 794 | .dynamic = 1, |
| 795 | .dpcm_capture = 1, |
| 796 | SND_SOC_DAILINK_REG(capture4), |
| 797 | }, |
| 798 | { |
| 799 | .name = "Capture_5", |
| 800 | .stream_name = "Capture_5", |
| 801 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 802 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 803 | .dynamic = 1, |
| 804 | .dpcm_capture = 1, |
| 805 | SND_SOC_DAILINK_REG(capture5), |
| 806 | }, |
| 807 | { |
| 808 | .name = "Capture_6", |
| 809 | .stream_name = "Capture_6", |
| 810 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 811 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 812 | .dynamic = 1, |
| 813 | .dpcm_capture = 1, |
| 814 | SND_SOC_DAILINK_REG(capture6), |
| 815 | }, |
| 816 | { |
| 817 | .name = "Capture_7", |
| 818 | .stream_name = "Capture_7", |
| 819 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 820 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 821 | .dynamic = 1, |
| 822 | .dpcm_capture = 1, |
| 823 | SND_SOC_DAILINK_REG(capture7), |
| 824 | }, |
| 825 | { |
| 826 | .name = "Capture_8", |
| 827 | .stream_name = "Capture_8", |
| 828 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 829 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 830 | .dynamic = 1, |
| 831 | .dpcm_capture = 1, |
| 832 | SND_SOC_DAILINK_REG(capture8), |
| 833 | }, |
| 834 | { |
| 835 | .name = "Capture_Mono_1", |
| 836 | .stream_name = "Capture_Mono_1", |
| 837 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 838 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 839 | .dynamic = 1, |
| 840 | .dpcm_capture = 1, |
| 841 | SND_SOC_DAILINK_REG(capture_mono1), |
| 842 | }, |
| 843 | { |
| 844 | .name = "Capture_Mono_2", |
| 845 | .stream_name = "Capture_Mono_2", |
| 846 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 847 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 848 | .dynamic = 1, |
| 849 | .dpcm_capture = 1, |
| 850 | SND_SOC_DAILINK_REG(capture_mono2), |
| 851 | }, |
| 852 | { |
| 853 | .name = "Capture_Mono_3", |
| 854 | .stream_name = "Capture_Mono_3", |
| 855 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 856 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 857 | .dynamic = 1, |
| 858 | .dpcm_capture = 1, |
| 859 | SND_SOC_DAILINK_REG(capture_mono3), |
| 860 | }, |
| 861 | { |
| 862 | .name = "playback_hdmi", |
| 863 | .stream_name = "Playback_HDMI", |
| 864 | .trigger = {SND_SOC_DPCM_TRIGGER_PRE, |
| 865 | SND_SOC_DPCM_TRIGGER_PRE}, |
| 866 | .dynamic = 1, |
| 867 | .dpcm_playback = 1, |
| 868 | SND_SOC_DAILINK_REG(playback_hdmi), |
| 869 | }, |
| 870 | /* Back End DAI links */ |
| 871 | { |
| 872 | .name = "Primary Codec", |
| 873 | .no_pcm = 1, |
| 874 | .dpcm_playback = 1, |
| 875 | .dpcm_capture = 1, |
| 876 | .ignore_suspend = 1, |
| 877 | .init = mt8192_mt6359_init, |
| 878 | SND_SOC_DAILINK_REG(primary_codec), |
| 879 | }, |
| 880 | { |
| 881 | .name = "Primary Codec CH34", |
| 882 | .no_pcm = 1, |
| 883 | .dpcm_playback = 1, |
| 884 | .dpcm_capture = 1, |
| 885 | .ignore_suspend = 1, |
| 886 | SND_SOC_DAILINK_REG(primary_codec_ch34), |
| 887 | }, |
| 888 | { |
| 889 | .name = "AP_DMIC", |
| 890 | .no_pcm = 1, |
| 891 | .dpcm_capture = 1, |
| 892 | .ignore_suspend = 1, |
| 893 | SND_SOC_DAILINK_REG(ap_dmic), |
| 894 | }, |
| 895 | { |
| 896 | .name = "AP_DMIC_CH34", |
| 897 | .no_pcm = 1, |
| 898 | .dpcm_capture = 1, |
| 899 | .ignore_suspend = 1, |
| 900 | SND_SOC_DAILINK_REG(ap_dmic_ch34), |
| 901 | }, |
| 902 | { |
| 903 | .name = "I2S0", |
| 904 | .no_pcm = 1, |
| 905 | .dpcm_capture = 1, |
| 906 | .ignore_suspend = 1, |
| 907 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 908 | SND_SOC_DAILINK_REG(i2s0), |
| 909 | }, |
| 910 | { |
| 911 | .name = "I2S1", |
| 912 | .no_pcm = 1, |
| 913 | .dpcm_playback = 1, |
| 914 | .ignore_suspend = 1, |
| 915 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 916 | SND_SOC_DAILINK_REG(i2s1), |
| 917 | }, |
| 918 | { |
| 919 | .name = "I2S2", |
| 920 | .no_pcm = 1, |
| 921 | .dpcm_capture = 1, |
| 922 | .ignore_suspend = 1, |
| 923 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 924 | SND_SOC_DAILINK_REG(i2s2), |
| 925 | }, |
| 926 | { |
| 927 | .name = "I2S3", |
| 928 | .no_pcm = 1, |
| 929 | .dpcm_playback = 1, |
| 930 | .ignore_suspend = 1, |
| 931 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 932 | }, |
| 933 | { |
| 934 | .name = "I2S5", |
| 935 | .no_pcm = 1, |
| 936 | .dpcm_playback = 1, |
| 937 | .ignore_suspend = 1, |
| 938 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 939 | SND_SOC_DAILINK_REG(i2s5), |
| 940 | }, |
| 941 | { |
| 942 | .name = "I2S6", |
| 943 | .no_pcm = 1, |
| 944 | .dpcm_capture = 1, |
| 945 | .ignore_suspend = 1, |
| 946 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 947 | SND_SOC_DAILINK_REG(i2s6), |
| 948 | }, |
| 949 | { |
| 950 | .name = "I2S7", |
| 951 | .no_pcm = 1, |
| 952 | .dpcm_playback = 1, |
| 953 | .ignore_suspend = 1, |
| 954 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 955 | SND_SOC_DAILINK_REG(i2s7), |
| 956 | }, |
| 957 | { |
| 958 | .name = "I2S8", |
| 959 | .no_pcm = 1, |
| 960 | .dpcm_capture = 1, |
| 961 | .ignore_suspend = 1, |
| 962 | .init = mt8192_rt5682_init, |
| 963 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 964 | SND_SOC_DAILINK_REG(i2s8), |
| 965 | .ops = &mt8192_rt5682_i2s_ops, |
| 966 | }, |
| 967 | { |
| 968 | .name = "I2S9", |
| 969 | .no_pcm = 1, |
| 970 | .dpcm_playback = 1, |
| 971 | .ignore_suspend = 1, |
| 972 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 973 | SND_SOC_DAILINK_REG(i2s9), |
| 974 | .ops = &mt8192_rt5682_i2s_ops, |
| 975 | }, |
| 976 | { |
| 977 | .name = "CONNSYS_I2S", |
| 978 | .no_pcm = 1, |
| 979 | .dpcm_capture = 1, |
| 980 | .ignore_suspend = 1, |
| 981 | SND_SOC_DAILINK_REG(connsys_i2s), |
| 982 | }, |
| 983 | { |
| 984 | .name = "PCM 1", |
| 985 | .no_pcm = 1, |
| 986 | .dpcm_playback = 1, |
| 987 | .dpcm_capture = 1, |
| 988 | .ignore_suspend = 1, |
| 989 | SND_SOC_DAILINK_REG(pcm1), |
| 990 | }, |
| 991 | { |
| 992 | .name = "PCM 2", |
| 993 | .no_pcm = 1, |
| 994 | .dpcm_playback = 1, |
| 995 | .dpcm_capture = 1, |
| 996 | .ignore_suspend = 1, |
| 997 | SND_SOC_DAILINK_REG(pcm2), |
| 998 | }, |
| 999 | { |
| 1000 | .name = "TDM", |
| 1001 | .no_pcm = 1, |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 1002 | .dai_fmt = SND_SOC_DAIFMT_DSP_A | |
| 1003 | SND_SOC_DAIFMT_IB_NF | |
| 1004 | SND_SOC_DAIFMT_CBM_CFM, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1005 | .dpcm_playback = 1, |
| 1006 | .ignore_suspend = 1, |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 1007 | .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, |
| 1008 | .ignore = 1, |
| 1009 | .init = mt8192_mt6359_hdmi_init, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1010 | SND_SOC_DAILINK_REG(tdm), |
| 1011 | }, |
| 1012 | }; |
| 1013 | |
Tzung-Bi Shih | ba499c3 | 2020-12-01 21:26:11 +0800 | [diff] [blame] | 1014 | static const struct snd_soc_dapm_widget |
| 1015 | mt8192_mt6359_rt1015_rt5682_widgets[] = { |
| 1016 | SND_SOC_DAPM_SPK("Left Spk", NULL), |
| 1017 | SND_SOC_DAPM_SPK("Right Spk", NULL), |
| 1018 | SND_SOC_DAPM_HP("Headphone Jack", NULL), |
| 1019 | SND_SOC_DAPM_MIC("Headset Mic", NULL), |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 1020 | SND_SOC_DAPM_OUTPUT("TDM Out"), |
Tzung-Bi Shih | ba499c3 | 2020-12-01 21:26:11 +0800 | [diff] [blame] | 1021 | }; |
| 1022 | |
| 1023 | static const struct snd_soc_dapm_route mt8192_mt6359_rt1015_rt5682_routes[] = { |
| 1024 | /* speaker */ |
| 1025 | { "Left Spk", NULL, "Left SPO" }, |
| 1026 | { "Right Spk", NULL, "Right SPO" }, |
| 1027 | /* headset */ |
| 1028 | { "Headphone Jack", NULL, "HPOL" }, |
| 1029 | { "Headphone Jack", NULL, "HPOR" }, |
| 1030 | { "IN1P", NULL, "Headset Mic" }, |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 1031 | /* TDM */ |
| 1032 | { "TDM Out", NULL, "TDM" }, |
Tzung-Bi Shih | ba499c3 | 2020-12-01 21:26:11 +0800 | [diff] [blame] | 1033 | }; |
| 1034 | |
| 1035 | static const struct snd_kcontrol_new mt8192_mt6359_rt1015_rt5682_controls[] = { |
| 1036 | SOC_DAPM_PIN_SWITCH("Left Spk"), |
| 1037 | SOC_DAPM_PIN_SWITCH("Right Spk"), |
| 1038 | SOC_DAPM_PIN_SWITCH("Headphone Jack"), |
| 1039 | SOC_DAPM_PIN_SWITCH("Headset Mic"), |
| 1040 | }; |
| 1041 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1042 | static struct snd_soc_codec_conf rt1015_amp_conf[] = { |
| 1043 | { |
| 1044 | .dlc = COMP_CODEC_CONF(RT1015_DEV0_NAME), |
| 1045 | .name_prefix = "Left", |
| 1046 | }, |
| 1047 | { |
| 1048 | .dlc = COMP_CODEC_CONF(RT1015_DEV1_NAME), |
| 1049 | .name_prefix = "Right", |
| 1050 | }, |
| 1051 | }; |
| 1052 | |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 1053 | static struct snd_soc_card mt8192_mt6359_rt1015_rt5682_card = { |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1054 | .name = "mt8192_mt6359_rt1015_rt5682", |
| 1055 | .owner = THIS_MODULE, |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1056 | .dai_link = mt8192_mt6359_dai_links, |
| 1057 | .num_links = ARRAY_SIZE(mt8192_mt6359_dai_links), |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1058 | .controls = mt8192_mt6359_rt1015_rt5682_controls, |
| 1059 | .num_controls = ARRAY_SIZE(mt8192_mt6359_rt1015_rt5682_controls), |
| 1060 | .dapm_widgets = mt8192_mt6359_rt1015_rt5682_widgets, |
| 1061 | .num_dapm_widgets = ARRAY_SIZE(mt8192_mt6359_rt1015_rt5682_widgets), |
| 1062 | .dapm_routes = mt8192_mt6359_rt1015_rt5682_routes, |
| 1063 | .num_dapm_routes = ARRAY_SIZE(mt8192_mt6359_rt1015_rt5682_routes), |
| 1064 | .codec_conf = rt1015_amp_conf, |
| 1065 | .num_configs = ARRAY_SIZE(rt1015_amp_conf), |
| 1066 | }; |
| 1067 | |
Tzung-Bi Shih | cfd8bb2 | 2020-12-01 21:26:14 +0800 | [diff] [blame] | 1068 | static const struct snd_soc_dapm_widget |
| 1069 | mt8192_mt6359_rt1015p_rt5682_widgets[] = { |
| 1070 | SND_SOC_DAPM_SPK("Speakers", NULL), |
| 1071 | SND_SOC_DAPM_HP("Headphone Jack", NULL), |
| 1072 | SND_SOC_DAPM_MIC("Headset Mic", NULL), |
| 1073 | }; |
| 1074 | |
| 1075 | static const struct snd_soc_dapm_route mt8192_mt6359_rt1015p_rt5682_routes[] = { |
| 1076 | /* speaker */ |
| 1077 | { "Speakers", NULL, "Speaker" }, |
| 1078 | /* headset */ |
| 1079 | { "Headphone Jack", NULL, "HPOL" }, |
| 1080 | { "Headphone Jack", NULL, "HPOR" }, |
| 1081 | { "IN1P", NULL, "Headset Mic" }, |
| 1082 | }; |
| 1083 | |
| 1084 | static const struct snd_kcontrol_new mt8192_mt6359_rt1015p_rt5682_controls[] = { |
| 1085 | SOC_DAPM_PIN_SWITCH("Speakers"), |
| 1086 | SOC_DAPM_PIN_SWITCH("Headphone Jack"), |
| 1087 | SOC_DAPM_PIN_SWITCH("Headset Mic"), |
| 1088 | }; |
| 1089 | |
| 1090 | static struct snd_soc_card mt8192_mt6359_rt1015p_rt5682_card = { |
| 1091 | .name = "mt8192_mt6359_rt1015p_rt5682", |
| 1092 | .owner = THIS_MODULE, |
| 1093 | .dai_link = mt8192_mt6359_dai_links, |
| 1094 | .num_links = ARRAY_SIZE(mt8192_mt6359_dai_links), |
| 1095 | .controls = mt8192_mt6359_rt1015p_rt5682_controls, |
| 1096 | .num_controls = ARRAY_SIZE(mt8192_mt6359_rt1015p_rt5682_controls), |
| 1097 | .dapm_widgets = mt8192_mt6359_rt1015p_rt5682_widgets, |
| 1098 | .num_dapm_widgets = ARRAY_SIZE(mt8192_mt6359_rt1015p_rt5682_widgets), |
| 1099 | .dapm_routes = mt8192_mt6359_rt1015p_rt5682_routes, |
| 1100 | .num_dapm_routes = ARRAY_SIZE(mt8192_mt6359_rt1015p_rt5682_routes), |
| 1101 | }; |
| 1102 | |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1103 | static int mt8192_mt6359_dev_probe(struct platform_device *pdev) |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1104 | { |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 1105 | struct snd_soc_card *card; |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 1106 | struct device_node *platform_node, *hdmi_codec; |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1107 | int ret, i; |
| 1108 | struct snd_soc_dai_link *dai_link; |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 1109 | const struct of_device_id *match; |
Tzung-Bi Shih | 4e37528 | 2021-01-20 16:08:46 +0800 | [diff] [blame] | 1110 | struct mt8192_mt6359_priv *priv; |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1111 | |
| 1112 | platform_node = of_parse_phandle(pdev->dev.of_node, |
| 1113 | "mediatek,platform", 0); |
| 1114 | if (!platform_node) { |
| 1115 | dev_err(&pdev->dev, "Property 'platform' missing or invalid\n"); |
| 1116 | return -EINVAL; |
| 1117 | } |
| 1118 | |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 1119 | match = of_match_device(pdev->dev.driver->of_match_table, &pdev->dev); |
| 1120 | if (!match || !match->data) |
| 1121 | return -EINVAL; |
| 1122 | |
| 1123 | card = (struct snd_soc_card *)match->data; |
| 1124 | card->dev = &pdev->dev; |
| 1125 | |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 1126 | hdmi_codec = of_parse_phandle(pdev->dev.of_node, |
| 1127 | "mediatek,hdmi-codec", 0); |
| 1128 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1129 | for_each_card_prelinks(card, i, dai_link) { |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 1130 | if (strcmp(dai_link->name, "I2S3") == 0) { |
| 1131 | if (card == &mt8192_mt6359_rt1015_rt5682_card) { |
| 1132 | dai_link->ops = &mt8192_rt1015_i2s_ops; |
| 1133 | dai_link->cpus = i2s3_rt1015_cpus; |
| 1134 | dai_link->num_cpus = |
| 1135 | ARRAY_SIZE(i2s3_rt1015_cpus); |
| 1136 | dai_link->codecs = i2s3_rt1015_codecs; |
| 1137 | dai_link->num_codecs = |
| 1138 | ARRAY_SIZE(i2s3_rt1015_codecs); |
| 1139 | dai_link->platforms = i2s3_rt1015_platforms; |
| 1140 | dai_link->num_platforms = |
| 1141 | ARRAY_SIZE(i2s3_rt1015_platforms); |
Tzung-Bi Shih | cfd8bb2 | 2020-12-01 21:26:14 +0800 | [diff] [blame] | 1142 | } else if (card == &mt8192_mt6359_rt1015p_rt5682_card) { |
| 1143 | dai_link->cpus = i2s3_rt1015p_cpus; |
| 1144 | dai_link->num_cpus = |
| 1145 | ARRAY_SIZE(i2s3_rt1015p_cpus); |
| 1146 | dai_link->codecs = i2s3_rt1015p_codecs; |
| 1147 | dai_link->num_codecs = |
| 1148 | ARRAY_SIZE(i2s3_rt1015p_codecs); |
| 1149 | dai_link->platforms = i2s3_rt1015p_platforms; |
| 1150 | dai_link->num_platforms = |
| 1151 | ARRAY_SIZE(i2s3_rt1015p_platforms); |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 1152 | } |
| 1153 | } |
| 1154 | |
Tzung-Bi Shih | 0d80c48 | 2021-01-20 16:08:50 +0800 | [diff] [blame] | 1155 | if (hdmi_codec && strcmp(dai_link->name, "TDM") == 0) { |
| 1156 | dai_link->codecs->of_node = hdmi_codec; |
| 1157 | dai_link->ignore = 0; |
| 1158 | } |
| 1159 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1160 | if (!dai_link->platforms->name) |
| 1161 | dai_link->platforms->of_node = platform_node; |
| 1162 | } |
| 1163 | |
Tzung-Bi Shih | 4e37528 | 2021-01-20 16:08:46 +0800 | [diff] [blame] | 1164 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
| 1165 | if (!priv) |
| 1166 | return -ENOMEM; |
| 1167 | snd_soc_card_set_drvdata(card, priv); |
| 1168 | |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1169 | ret = mt8192_afe_gpio_init(&pdev->dev); |
| 1170 | if (ret) { |
| 1171 | dev_err(&pdev->dev, "init gpio error %d\n", ret); |
| 1172 | return ret; |
| 1173 | } |
| 1174 | |
| 1175 | return devm_snd_soc_register_card(&pdev->dev, card); |
| 1176 | } |
| 1177 | |
| 1178 | #ifdef CONFIG_OF |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1179 | static const struct of_device_id mt8192_mt6359_dt_match[] = { |
Tzung-Bi Shih | 2b53d2e | 2020-12-01 21:26:10 +0800 | [diff] [blame] | 1180 | { |
| 1181 | .compatible = "mediatek,mt8192_mt6359_rt1015_rt5682", |
| 1182 | .data = &mt8192_mt6359_rt1015_rt5682_card, |
| 1183 | }, |
Tzung-Bi Shih | cfd8bb2 | 2020-12-01 21:26:14 +0800 | [diff] [blame] | 1184 | { |
| 1185 | .compatible = "mediatek,mt8192_mt6359_rt1015p_rt5682", |
| 1186 | .data = &mt8192_mt6359_rt1015p_rt5682_card, |
| 1187 | }, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1188 | {} |
| 1189 | }; |
| 1190 | #endif |
| 1191 | |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1192 | static const struct dev_pm_ops mt8192_mt6359_pm_ops = { |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1193 | .poweroff = snd_soc_poweroff, |
| 1194 | .restore = snd_soc_resume, |
| 1195 | }; |
| 1196 | |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1197 | static struct platform_driver mt8192_mt6359_driver = { |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1198 | .driver = { |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1199 | .name = "mt8192_mt6359", |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1200 | #ifdef CONFIG_OF |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1201 | .of_match_table = mt8192_mt6359_dt_match, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1202 | #endif |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1203 | .pm = &mt8192_mt6359_pm_ops, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1204 | }, |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1205 | .probe = mt8192_mt6359_dev_probe, |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1206 | }; |
| 1207 | |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1208 | module_platform_driver(mt8192_mt6359_driver); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1209 | |
| 1210 | /* Module information */ |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1211 | MODULE_DESCRIPTION("MT8192-MT6359 ALSA SoC machine driver"); |
Jiaxin Yu | 18b13ff | 2020-11-03 15:59:37 +0800 | [diff] [blame] | 1212 | MODULE_AUTHOR("Jiaxin Yu <jiaxin.yu@mediatek.com>"); |
| 1213 | MODULE_LICENSE("GPL v2"); |
Tzung-Bi Shih | a5f8037 | 2020-12-01 21:26:09 +0800 | [diff] [blame] | 1214 | MODULE_ALIAS("mt8192_mt6359 soc card"); |