blob: 292cb50236832251651a7875457e5c299da23ec3 [file] [log] [blame]
Dave Airlief453ba02008-11-07 14:05:41 -08001/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
Adam Jackson61e57a82010-03-29 21:43:18 +00005 * Copyright 2010 Red Hat, Inc.
Dave Airlief453ba02008-11-07 14:05:41 -08006 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Thierry Reding10a85122012-11-21 15:31:35 +010032#include <linux/hdmi.h>
Dave Airlief453ba02008-11-07 14:05:41 -080033#include <linux/i2c.h>
Adam Jackson47819ba2012-05-30 16:42:39 -040034#include <linux/module.h>
Lukas Wunner5cb8eaa22016-01-11 20:09:20 +010035#include <linux/vga_switcheroo.h>
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/drmP.h>
37#include <drm/drm_edid.h>
Laurent Pinchart93382032016-11-28 20:51:09 +020038#include <drm/drm_encoder.h>
Dave Airlie40d9b042014-10-20 16:29:33 +100039#include <drm/drm_displayid.h>
Dave Airlief453ba02008-11-07 14:05:41 -080040
Adam Jackson13931572010-08-03 14:38:19 -040041#define version_greater(edid, maj, min) \
42 (((edid)->version > (maj)) || \
43 ((edid)->version == (maj) && (edid)->revision > (min)))
Dave Airlief453ba02008-11-07 14:05:41 -080044
Adam Jacksond1ff6402010-03-29 21:43:26 +000045#define EDID_EST_TIMINGS 16
46#define EDID_STD_TIMINGS 8
47#define EDID_DETAILED_TIMINGS 4
Dave Airlief453ba02008-11-07 14:05:41 -080048
49/*
50 * EDID blocks out in the wild have a variety of bugs, try to collect
51 * them here (note that userspace may work around broken monitors first,
52 * but fixes should make their way here so that the kernel "just works"
53 * on as many displays as possible).
54 */
55
56/* First detailed mode wrong, use largest 60Hz mode */
57#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
58/* Reported 135MHz pixel clock is too high, needs adjustment */
59#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
60/* Prefer the largest mode at 75 Hz */
61#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
62/* Detail timing is in cm not mm */
63#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
64/* Detailed timing descriptors have bogus size values, so just take the
65 * maximum size and use that.
66 */
67#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
68/* Monitor forgot to set the first detailed is preferred bit. */
69#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
70/* use +hsync +vsync for detailed mode */
71#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
Adam Jacksonbc42aab2012-05-23 16:26:54 -040072/* Force reduced-blanking timings for detailed modes */
73#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
Rafał Miłecki49d45a312013-12-07 13:22:42 +010074/* Force 8bpc */
75#define EDID_QUIRK_FORCE_8BPC (1 << 8)
Mario Kleinerbc5b9642014-05-23 21:40:55 +020076/* Force 12bpc */
77#define EDID_QUIRK_FORCE_12BPC (1 << 9)
Mario Kleinere10aec62016-07-06 12:05:44 +020078/* Force 6bpc */
79#define EDID_QUIRK_FORCE_6BPC (1 << 10)
Alex Deucher3c537882010-02-05 04:21:19 -050080
Adam Jackson13931572010-08-03 14:38:19 -040081struct detailed_mode_closure {
82 struct drm_connector *connector;
83 struct edid *edid;
84 bool preferred;
85 u32 quirks;
86 int modes;
87};
Dave Airlief453ba02008-11-07 14:05:41 -080088
Zhao Yakui5c612592009-06-22 13:17:10 +080089#define LEVEL_DMT 0
90#define LEVEL_GTF 1
Adam Jackson7a374352010-03-29 21:43:30 +000091#define LEVEL_GTF2 2
92#define LEVEL_CVT 3
Zhao Yakui5c612592009-06-22 13:17:10 +080093
Jani Nikula23c4cfb2016-12-28 13:06:26 +020094static const struct edid_quirk {
Ian Pilcherc51a3fd62012-04-22 11:40:26 -050095 char vendor[4];
Dave Airlief453ba02008-11-07 14:05:41 -080096 int product_id;
97 u32 quirks;
98} edid_quirk_list[] = {
99 /* Acer AL1706 */
100 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
101 /* Acer F51 */
102 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
103 /* Unknown Acer */
104 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
105
Mario Kleinere10aec62016-07-06 12:05:44 +0200106 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
107 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
108
Dave Airlief453ba02008-11-07 14:05:41 -0800109 /* Belinea 10 15 55 */
110 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
111 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
112
113 /* Envision Peripherals, Inc. EN-7100e */
114 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
Adam Jacksonba1163d2010-04-06 16:11:00 +0000115 /* Envision EN2028 */
116 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
Dave Airlief453ba02008-11-07 14:05:41 -0800117
118 /* Funai Electronics PM36B */
119 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
120 EDID_QUIRK_DETAILED_IN_CM },
121
122 /* LG Philips LCD LP154W01-A5 */
123 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
124 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
125
126 /* Philips 107p5 CRT */
127 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
128
129 /* Proview AY765C */
130 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
131
132 /* Samsung SyncMaster 205BW. Note: irony */
133 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
134 /* Samsung SyncMaster 22[5-6]BW */
135 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
136 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
Adam Jacksonbc42aab2012-05-23 16:26:54 -0400137
Mario Kleinerbc5b9642014-05-23 21:40:55 +0200138 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
139 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
140
Adam Jacksonbc42aab2012-05-23 16:26:54 -0400141 /* ViewSonic VA2026w */
142 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
Alex Deucher118bdbd2013-08-12 11:04:29 -0400143
144 /* Medion MD 30217 PG */
145 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
Rafał Miłecki49d45a312013-12-07 13:22:42 +0100146
147 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
148 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
Dave Airlief453ba02008-11-07 14:05:41 -0800149};
150
Thierry Redinga6b21832012-11-23 15:01:42 +0100151/*
152 * Autogenerated from the DMT spec.
153 * This table is copied from xfree86/modes/xf86EdidModes.c.
154 */
155static const struct drm_display_mode drm_dmt_modes[] = {
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300156 /* 0x01 - 640x350@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100157 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
158 736, 832, 0, 350, 382, 385, 445, 0,
159 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300160 /* 0x02 - 640x400@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100161 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
162 736, 832, 0, 400, 401, 404, 445, 0,
163 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300164 /* 0x03 - 720x400@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100165 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
166 828, 936, 0, 400, 401, 404, 446, 0,
167 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300168 /* 0x04 - 640x480@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100169 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300170 752, 800, 0, 480, 490, 492, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100171 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300172 /* 0x05 - 640x480@72Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100173 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
174 704, 832, 0, 480, 489, 492, 520, 0,
175 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300176 /* 0x06 - 640x480@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100177 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
178 720, 840, 0, 480, 481, 484, 500, 0,
179 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300180 /* 0x07 - 640x480@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100181 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
182 752, 832, 0, 480, 481, 484, 509, 0,
183 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300184 /* 0x08 - 800x600@56Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100185 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
186 896, 1024, 0, 600, 601, 603, 625, 0,
187 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300188 /* 0x09 - 800x600@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100189 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
190 968, 1056, 0, 600, 601, 605, 628, 0,
191 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300192 /* 0x0a - 800x600@72Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100193 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
194 976, 1040, 0, 600, 637, 643, 666, 0,
195 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300196 /* 0x0b - 800x600@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100197 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
198 896, 1056, 0, 600, 601, 604, 625, 0,
199 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300200 /* 0x0c - 800x600@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100201 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
202 896, 1048, 0, 600, 601, 604, 631, 0,
203 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300204 /* 0x0d - 800x600@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100205 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
206 880, 960, 0, 600, 603, 607, 636, 0,
207 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300208 /* 0x0e - 848x480@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100209 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
210 976, 1088, 0, 480, 486, 494, 517, 0,
211 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300212 /* 0x0f - 1024x768@43Hz, interlace */
Thierry Redinga6b21832012-11-23 15:01:42 +0100213 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
Paul Parsons735b1002016-04-04 20:36:34 +0100214 1208, 1264, 0, 768, 768, 776, 817, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100215 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300216 DRM_MODE_FLAG_INTERLACE) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300217 /* 0x10 - 1024x768@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100218 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
219 1184, 1344, 0, 768, 771, 777, 806, 0,
220 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300221 /* 0x11 - 1024x768@70Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100222 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
223 1184, 1328, 0, 768, 771, 777, 806, 0,
224 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300225 /* 0x12 - 1024x768@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100226 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
227 1136, 1312, 0, 768, 769, 772, 800, 0,
228 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300229 /* 0x13 - 1024x768@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100230 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
231 1168, 1376, 0, 768, 769, 772, 808, 0,
232 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300233 /* 0x14 - 1024x768@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100234 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
235 1104, 1184, 0, 768, 771, 775, 813, 0,
236 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300237 /* 0x15 - 1152x864@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100238 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
239 1344, 1600, 0, 864, 865, 868, 900, 0,
240 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300241 /* 0x55 - 1280x720@60Hz */
242 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
243 1430, 1650, 0, 720, 725, 730, 750, 0,
244 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300245 /* 0x16 - 1280x768@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100246 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
247 1360, 1440, 0, 768, 771, 778, 790, 0,
248 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300249 /* 0x17 - 1280x768@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100250 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
251 1472, 1664, 0, 768, 771, 778, 798, 0,
252 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300253 /* 0x18 - 1280x768@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100254 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
255 1488, 1696, 0, 768, 771, 778, 805, 0,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300256 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300257 /* 0x19 - 1280x768@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100258 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
259 1496, 1712, 0, 768, 771, 778, 809, 0,
260 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300261 /* 0x1a - 1280x768@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100262 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
263 1360, 1440, 0, 768, 771, 778, 813, 0,
264 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300265 /* 0x1b - 1280x800@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100266 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
267 1360, 1440, 0, 800, 803, 809, 823, 0,
268 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300269 /* 0x1c - 1280x800@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100270 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
271 1480, 1680, 0, 800, 803, 809, 831, 0,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300272 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300273 /* 0x1d - 1280x800@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100274 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
275 1488, 1696, 0, 800, 803, 809, 838, 0,
276 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300277 /* 0x1e - 1280x800@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100278 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
279 1496, 1712, 0, 800, 803, 809, 843, 0,
280 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300281 /* 0x1f - 1280x800@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100282 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
283 1360, 1440, 0, 800, 803, 809, 847, 0,
284 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300285 /* 0x20 - 1280x960@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100286 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
287 1488, 1800, 0, 960, 961, 964, 1000, 0,
288 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300289 /* 0x21 - 1280x960@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100290 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
291 1504, 1728, 0, 960, 961, 964, 1011, 0,
292 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300293 /* 0x22 - 1280x960@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100294 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
295 1360, 1440, 0, 960, 963, 967, 1017, 0,
296 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300297 /* 0x23 - 1280x1024@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100298 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
299 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
300 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300301 /* 0x24 - 1280x1024@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100302 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
303 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
304 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300305 /* 0x25 - 1280x1024@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100306 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
307 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
308 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300309 /* 0x26 - 1280x1024@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100310 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
311 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
312 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300313 /* 0x27 - 1360x768@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100314 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
315 1536, 1792, 0, 768, 771, 777, 795, 0,
316 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300317 /* 0x28 - 1360x768@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100318 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
319 1440, 1520, 0, 768, 771, 776, 813, 0,
320 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300321 /* 0x51 - 1366x768@60Hz */
322 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
323 1579, 1792, 0, 768, 771, 774, 798, 0,
324 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
325 /* 0x56 - 1366x768@60Hz */
326 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
327 1436, 1500, 0, 768, 769, 772, 800, 0,
328 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300329 /* 0x29 - 1400x1050@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100330 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
331 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
332 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300333 /* 0x2a - 1400x1050@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100334 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
335 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
336 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300337 /* 0x2b - 1400x1050@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100338 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
339 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
340 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300341 /* 0x2c - 1400x1050@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100342 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
343 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
344 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300345 /* 0x2d - 1400x1050@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100346 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
347 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
348 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300349 /* 0x2e - 1440x900@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100350 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
351 1520, 1600, 0, 900, 903, 909, 926, 0,
352 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300353 /* 0x2f - 1440x900@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100354 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
355 1672, 1904, 0, 900, 903, 909, 934, 0,
356 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300357 /* 0x30 - 1440x900@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100358 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
359 1688, 1936, 0, 900, 903, 909, 942, 0,
360 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300361 /* 0x31 - 1440x900@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100362 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
363 1696, 1952, 0, 900, 903, 909, 948, 0,
364 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300365 /* 0x32 - 1440x900@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100366 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
367 1520, 1600, 0, 900, 903, 909, 953, 0,
368 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300369 /* 0x53 - 1600x900@60Hz */
370 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
371 1704, 1800, 0, 900, 901, 904, 1000, 0,
372 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300373 /* 0x33 - 1600x1200@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100374 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
375 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
376 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300377 /* 0x34 - 1600x1200@65Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100378 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
379 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
380 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300381 /* 0x35 - 1600x1200@70Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100382 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
383 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
384 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300385 /* 0x36 - 1600x1200@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100386 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
387 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
388 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300389 /* 0x37 - 1600x1200@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100390 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
391 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
392 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300393 /* 0x38 - 1600x1200@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100394 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
395 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
396 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300397 /* 0x39 - 1680x1050@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100398 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
399 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
400 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300401 /* 0x3a - 1680x1050@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100402 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
403 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
404 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300405 /* 0x3b - 1680x1050@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100406 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
407 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
408 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300409 /* 0x3c - 1680x1050@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100410 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
411 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
412 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300413 /* 0x3d - 1680x1050@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100414 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
415 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
416 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300417 /* 0x3e - 1792x1344@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100418 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
419 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
420 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300421 /* 0x3f - 1792x1344@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100422 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
423 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
424 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300425 /* 0x40 - 1792x1344@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100426 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
427 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
428 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300429 /* 0x41 - 1856x1392@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100430 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
431 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
432 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300433 /* 0x42 - 1856x1392@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100434 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300435 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100436 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300437 /* 0x43 - 1856x1392@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100438 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
439 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300441 /* 0x52 - 1920x1080@60Hz */
442 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
443 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
444 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300445 /* 0x44 - 1920x1200@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100446 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
447 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
448 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300449 /* 0x45 - 1920x1200@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100450 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
451 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
452 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300453 /* 0x46 - 1920x1200@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100454 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
455 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
456 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300457 /* 0x47 - 1920x1200@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100458 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
459 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
460 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300461 /* 0x48 - 1920x1200@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100462 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
463 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300465 /* 0x49 - 1920x1440@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100466 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
467 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
468 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300469 /* 0x4a - 1920x1440@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100470 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
471 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
472 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300473 /* 0x4b - 1920x1440@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100474 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
475 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300477 /* 0x54 - 2048x1152@60Hz */
478 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
479 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300481 /* 0x4c - 2560x1600@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100482 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
483 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300485 /* 0x4d - 2560x1600@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100486 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
487 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
488 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300489 /* 0x4e - 2560x1600@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100490 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
491 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
492 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300493 /* 0x4f - 2560x1600@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100494 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
495 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
496 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300497 /* 0x50 - 2560x1600@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100498 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
499 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300501 /* 0x57 - 4096x2160@60Hz RB */
502 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
503 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
505 /* 0x58 - 4096x2160@59.94Hz RB */
506 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
507 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Thierry Redinga6b21832012-11-23 15:01:42 +0100509};
510
Ville Syrjäläe7bfa5c2013-10-14 16:44:27 +0300511/*
512 * These more or less come from the DMT spec. The 720x400 modes are
513 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
514 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
515 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
516 * mode.
517 *
518 * The DMT modes have been fact-checked; the rest are mild guesses.
519 */
Thierry Redinga6b21832012-11-23 15:01:42 +0100520static const struct drm_display_mode edid_est_modes[] = {
521 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
522 968, 1056, 0, 600, 601, 605, 628, 0,
523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
524 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
525 896, 1024, 0, 600, 601, 603, 625, 0,
526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
527 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
528 720, 840, 0, 480, 481, 484, 500, 0,
529 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
530 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
Paul Parsons87707cf2016-04-02 11:08:06 +0100531 704, 832, 0, 480, 489, 492, 520, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100532 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
533 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
534 768, 864, 0, 480, 483, 486, 525, 0,
535 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
Paul Parsons87707cf2016-04-02 11:08:06 +0100536 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
Thierry Redinga6b21832012-11-23 15:01:42 +0100537 752, 800, 0, 480, 490, 492, 525, 0,
538 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
539 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
540 846, 900, 0, 400, 421, 423, 449, 0,
541 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
542 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
543 846, 900, 0, 400, 412, 414, 449, 0,
544 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
545 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
546 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
547 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
Paul Parsons87707cf2016-04-02 11:08:06 +0100548 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
Thierry Redinga6b21832012-11-23 15:01:42 +0100549 1136, 1312, 0, 768, 769, 772, 800, 0,
550 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
551 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
552 1184, 1328, 0, 768, 771, 777, 806, 0,
553 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
554 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
555 1184, 1344, 0, 768, 771, 777, 806, 0,
556 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
557 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
558 1208, 1264, 0, 768, 768, 776, 817, 0,
559 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
560 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
561 928, 1152, 0, 624, 625, 628, 667, 0,
562 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
563 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
564 896, 1056, 0, 600, 601, 604, 625, 0,
565 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
566 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
567 976, 1040, 0, 600, 637, 643, 666, 0,
568 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
569 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
570 1344, 1600, 0, 864, 865, 868, 900, 0,
571 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
572};
573
574struct minimode {
575 short w;
576 short h;
577 short r;
578 short rb;
579};
580
581static const struct minimode est3_modes[] = {
582 /* byte 6 */
583 { 640, 350, 85, 0 },
584 { 640, 400, 85, 0 },
585 { 720, 400, 85, 0 },
586 { 640, 480, 85, 0 },
587 { 848, 480, 60, 0 },
588 { 800, 600, 85, 0 },
589 { 1024, 768, 85, 0 },
590 { 1152, 864, 75, 0 },
591 /* byte 7 */
592 { 1280, 768, 60, 1 },
593 { 1280, 768, 60, 0 },
594 { 1280, 768, 75, 0 },
595 { 1280, 768, 85, 0 },
596 { 1280, 960, 60, 0 },
597 { 1280, 960, 85, 0 },
598 { 1280, 1024, 60, 0 },
599 { 1280, 1024, 85, 0 },
600 /* byte 8 */
601 { 1360, 768, 60, 0 },
602 { 1440, 900, 60, 1 },
603 { 1440, 900, 60, 0 },
604 { 1440, 900, 75, 0 },
605 { 1440, 900, 85, 0 },
606 { 1400, 1050, 60, 1 },
607 { 1400, 1050, 60, 0 },
608 { 1400, 1050, 75, 0 },
609 /* byte 9 */
610 { 1400, 1050, 85, 0 },
611 { 1680, 1050, 60, 1 },
612 { 1680, 1050, 60, 0 },
613 { 1680, 1050, 75, 0 },
614 { 1680, 1050, 85, 0 },
615 { 1600, 1200, 60, 0 },
616 { 1600, 1200, 65, 0 },
617 { 1600, 1200, 70, 0 },
618 /* byte 10 */
619 { 1600, 1200, 75, 0 },
620 { 1600, 1200, 85, 0 },
621 { 1792, 1344, 60, 0 },
Ville Syrjäläc068b322013-10-14 16:44:25 +0300622 { 1792, 1344, 75, 0 },
Thierry Redinga6b21832012-11-23 15:01:42 +0100623 { 1856, 1392, 60, 0 },
624 { 1856, 1392, 75, 0 },
625 { 1920, 1200, 60, 1 },
626 { 1920, 1200, 60, 0 },
627 /* byte 11 */
628 { 1920, 1200, 75, 0 },
629 { 1920, 1200, 85, 0 },
630 { 1920, 1440, 60, 0 },
631 { 1920, 1440, 75, 0 },
632};
633
634static const struct minimode extra_modes[] = {
635 { 1024, 576, 60, 0 },
636 { 1366, 768, 60, 0 },
637 { 1600, 900, 60, 0 },
638 { 1680, 945, 60, 0 },
639 { 1920, 1080, 60, 0 },
640 { 2048, 1152, 60, 0 },
641 { 2048, 1536, 60, 0 },
642};
643
644/*
645 * Probably taken from CEA-861 spec.
646 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
Jani Nikulad9278b42016-01-08 13:21:51 +0200647 *
648 * Index using the VIC.
Thierry Redinga6b21832012-11-23 15:01:42 +0100649 */
650static const struct drm_display_mode edid_cea_modes[] = {
Jani Nikulad9278b42016-01-08 13:21:51 +0200651 /* 0 - dummy, VICs start at 1 */
652 { },
Thierry Redinga6b21832012-11-23 15:01:42 +0100653 /* 1 - 640x480@60Hz */
654 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
655 752, 800, 0, 480, 490, 492, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300656 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530657 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100658 /* 2 - 720x480@60Hz */
659 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
660 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300661 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530662 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100663 /* 3 - 720x480@60Hz */
664 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
665 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300666 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530667 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100668 /* 4 - 1280x720@60Hz */
669 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
670 1430, 1650, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300671 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530672 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100673 /* 5 - 1920x1080i@60Hz */
674 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
675 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
676 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300677 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530678 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700679 /* 6 - 720(1440)x480i@60Hz */
680 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
681 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100682 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300683 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530684 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700685 /* 7 - 720(1440)x480i@60Hz */
686 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
687 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300689 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530690 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700691 /* 8 - 720(1440)x240@60Hz */
692 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
693 801, 858, 0, 240, 244, 247, 262, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100694 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300695 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530696 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700697 /* 9 - 720(1440)x240@60Hz */
698 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
699 801, 858, 0, 240, 244, 247, 262, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100700 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300701 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530702 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100703 /* 10 - 2880x480i@60Hz */
704 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
705 3204, 3432, 0, 480, 488, 494, 525, 0,
706 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300707 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530708 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100709 /* 11 - 2880x480i@60Hz */
710 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
711 3204, 3432, 0, 480, 488, 494, 525, 0,
712 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300713 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530714 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100715 /* 12 - 2880x240@60Hz */
716 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
717 3204, 3432, 0, 240, 244, 247, 262, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300718 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530719 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100720 /* 13 - 2880x240@60Hz */
721 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
722 3204, 3432, 0, 240, 244, 247, 262, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300723 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530724 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100725 /* 14 - 1440x480@60Hz */
726 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
727 1596, 1716, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300728 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530729 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100730 /* 15 - 1440x480@60Hz */
731 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
732 1596, 1716, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300733 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530734 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100735 /* 16 - 1920x1080@60Hz */
736 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
737 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300738 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530739 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100740 /* 17 - 720x576@50Hz */
741 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
742 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300743 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530744 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100745 /* 18 - 720x576@50Hz */
746 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
747 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300748 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530749 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100750 /* 19 - 1280x720@50Hz */
751 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
752 1760, 1980, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300753 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530754 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100755 /* 20 - 1920x1080i@50Hz */
756 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
757 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
758 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300759 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530760 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700761 /* 21 - 720(1440)x576i@50Hz */
762 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
763 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100764 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300765 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530766 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700767 /* 22 - 720(1440)x576i@50Hz */
768 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
769 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300771 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530772 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700773 /* 23 - 720(1440)x288@50Hz */
774 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
775 795, 864, 0, 288, 290, 293, 312, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100776 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300777 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530778 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700779 /* 24 - 720(1440)x288@50Hz */
780 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
781 795, 864, 0, 288, 290, 293, 312, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300783 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530784 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100785 /* 25 - 2880x576i@50Hz */
786 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
787 3180, 3456, 0, 576, 580, 586, 625, 0,
788 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300789 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530790 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100791 /* 26 - 2880x576i@50Hz */
792 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
793 3180, 3456, 0, 576, 580, 586, 625, 0,
794 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300795 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530796 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100797 /* 27 - 2880x288@50Hz */
798 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
799 3180, 3456, 0, 288, 290, 293, 312, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300800 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530801 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100802 /* 28 - 2880x288@50Hz */
803 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
804 3180, 3456, 0, 288, 290, 293, 312, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300805 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530806 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100807 /* 29 - 1440x576@50Hz */
808 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
809 1592, 1728, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300810 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530811 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100812 /* 30 - 1440x576@50Hz */
813 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
814 1592, 1728, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300815 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530816 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100817 /* 31 - 1920x1080@50Hz */
818 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
819 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300820 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530821 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100822 /* 32 - 1920x1080@24Hz */
823 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
824 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300825 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530826 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100827 /* 33 - 1920x1080@25Hz */
828 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
829 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300830 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530831 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100832 /* 34 - 1920x1080@30Hz */
833 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
834 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300835 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530836 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100837 /* 35 - 2880x480@60Hz */
838 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
839 3192, 3432, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300840 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530841 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100842 /* 36 - 2880x480@60Hz */
843 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
844 3192, 3432, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300845 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530846 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100847 /* 37 - 2880x576@50Hz */
848 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
849 3184, 3456, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300850 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530851 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100852 /* 38 - 2880x576@50Hz */
853 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
854 3184, 3456, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300855 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530856 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100857 /* 39 - 1920x1080i@50Hz */
858 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
859 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
860 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300861 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530862 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100863 /* 40 - 1920x1080i@100Hz */
864 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
865 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
866 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300867 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530868 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100869 /* 41 - 1280x720@100Hz */
870 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
871 1760, 1980, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300872 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530873 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100874 /* 42 - 720x576@100Hz */
875 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
876 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300877 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530878 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100879 /* 43 - 720x576@100Hz */
880 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
881 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300882 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530883 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700884 /* 44 - 720(1440)x576i@100Hz */
885 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
886 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100887 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Clint Taylor5a11f7f2014-09-26 09:55:24 -0700888 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530889 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700890 /* 45 - 720(1440)x576i@100Hz */
891 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
892 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100893 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Clint Taylor5a11f7f2014-09-26 09:55:24 -0700894 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530895 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100896 /* 46 - 1920x1080i@120Hz */
897 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
898 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
899 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300900 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530901 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100902 /* 47 - 1280x720@120Hz */
903 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
904 1430, 1650, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300905 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530906 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100907 /* 48 - 720x480@120Hz */
908 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
909 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300910 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530911 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100912 /* 49 - 720x480@120Hz */
913 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
914 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300915 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530916 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700917 /* 50 - 720(1440)x480i@120Hz */
918 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
919 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100920 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300921 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530922 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700923 /* 51 - 720(1440)x480i@120Hz */
924 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
925 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100926 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300927 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530928 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100929 /* 52 - 720x576@200Hz */
930 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
931 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300932 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530933 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100934 /* 53 - 720x576@200Hz */
935 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
936 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300937 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530938 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700939 /* 54 - 720(1440)x576i@200Hz */
940 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
941 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100942 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300943 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530944 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700945 /* 55 - 720(1440)x576i@200Hz */
946 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
947 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100948 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300949 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530950 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100951 /* 56 - 720x480@240Hz */
952 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
953 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300954 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530955 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100956 /* 57 - 720x480@240Hz */
957 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
958 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300959 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530960 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Ville Syrjäläe5878032016-11-03 14:53:28 +0200961 /* 58 - 720(1440)x480i@240Hz */
Clint Taylorfb01d282014-09-02 17:03:35 -0700962 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
963 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100964 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300965 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530966 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Ville Syrjäläe5878032016-11-03 14:53:28 +0200967 /* 59 - 720(1440)x480i@240Hz */
Clint Taylorfb01d282014-09-02 17:03:35 -0700968 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
969 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100970 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300971 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530972 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100973 /* 60 - 1280x720@24Hz */
974 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
975 3080, 3300, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300976 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530977 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100978 /* 61 - 1280x720@25Hz */
979 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
980 3740, 3960, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300981 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530982 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100983 /* 62 - 1280x720@30Hz */
984 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
985 3080, 3300, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300986 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530987 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100988 /* 63 - 1920x1080@120Hz */
989 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
990 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300991 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530992 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100993 /* 64 - 1920x1080@100Hz */
994 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
Clint Taylor8f0e4902016-08-15 10:31:28 -0700995 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300996 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530997 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100998};
999
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01001000/*
Jani Nikulad9278b42016-01-08 13:21:51 +02001001 * HDMI 1.4 4k modes. Index using the VIC.
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01001002 */
1003static const struct drm_display_mode edid_4k_modes[] = {
Jani Nikulad9278b42016-01-08 13:21:51 +02001004 /* 0 - dummy, VICs start at 1 */
1005 { },
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01001006 /* 1 - 3840x2160@30Hz */
1007 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1008 3840, 4016, 4104, 4400, 0,
1009 2160, 2168, 2178, 2250, 0,
1010 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1011 .vrefresh = 30, },
1012 /* 2 - 3840x2160@25Hz */
1013 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1014 3840, 4896, 4984, 5280, 0,
1015 2160, 2168, 2178, 2250, 0,
1016 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1017 .vrefresh = 25, },
1018 /* 3 - 3840x2160@24Hz */
1019 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1020 3840, 5116, 5204, 5500, 0,
1021 2160, 2168, 2178, 2250, 0,
1022 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1023 .vrefresh = 24, },
1024 /* 4 - 4096x2160@24Hz (SMPTE) */
1025 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1026 4096, 5116, 5204, 5500, 0,
1027 2160, 2168, 2178, 2250, 0,
1028 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1029 .vrefresh = 24, },
1030};
1031
Adam Jackson61e57a82010-03-29 21:43:18 +00001032/*** DDC fetch and block validation ***/
Dave Airlief453ba02008-11-07 14:05:41 -08001033
Adam Jackson083ae052009-09-23 17:30:45 -04001034static const u8 edid_header[] = {
1035 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1036};
Dave Airlief453ba02008-11-07 14:05:41 -08001037
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001038/**
1039 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1040 * @raw_edid: pointer to raw base EDID block
1041 *
1042 * Sanity check the header of the base EDID block.
1043 *
1044 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
Thomas Reim051963d2011-07-29 14:28:57 +00001045 */
1046int drm_edid_header_is_valid(const u8 *raw_edid)
1047{
1048 int i, score = 0;
1049
1050 for (i = 0; i < sizeof(edid_header); i++)
1051 if (raw_edid[i] == edid_header[i])
1052 score++;
1053
1054 return score;
1055}
1056EXPORT_SYMBOL(drm_edid_header_is_valid);
1057
Adam Jackson47819ba2012-05-30 16:42:39 -04001058static int edid_fixup __read_mostly = 6;
1059module_param_named(edid_fixup, edid_fixup, int, 0400);
1060MODULE_PARM_DESC(edid_fixup,
1061 "Minimum number of valid EDID header bytes (0-8, default 6)");
Thomas Reim051963d2011-07-29 14:28:57 +00001062
Dave Airlie40d9b042014-10-20 16:29:33 +10001063static void drm_get_displayid(struct drm_connector *connector,
1064 struct edid *edid);
Dave Airlieda9df2f2014-12-11 10:12:57 +10001065
Stefan Brünsc465bbc2014-11-30 19:57:43 +01001066static int drm_edid_block_checksum(const u8 *raw_edid)
1067{
1068 int i;
1069 u8 csum = 0;
1070 for (i = 0; i < EDID_LENGTH; i++)
1071 csum += raw_edid[i];
1072
1073 return csum;
1074}
1075
Stefan Brünsd6885d62014-11-30 19:57:41 +01001076static bool drm_edid_is_zero(const u8 *in_edid, int length)
1077{
1078 if (memchr_inv(in_edid, 0, length))
1079 return false;
1080
1081 return true;
1082}
1083
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001084/**
1085 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1086 * @raw_edid: pointer to raw EDID block
1087 * @block: type of block to validate (0 for base, extension otherwise)
1088 * @print_bad_edid: if true, dump bad EDID blocks to the console
Todd Previte6ba2bd32015-04-21 11:09:41 -07001089 * @edid_corrupt: if true, the header or checksum is invalid
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001090 *
1091 * Validate a base or extension EDID block and optionally dump bad blocks to
1092 * the console.
1093 *
1094 * Return: True if the block is valid, false otherwise.
Dave Airlief453ba02008-11-07 14:05:41 -08001095 */
Todd Previte6ba2bd32015-04-21 11:09:41 -07001096bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1097 bool *edid_corrupt)
Dave Airlief453ba02008-11-07 14:05:41 -08001098{
Stefan Brünsc465bbc2014-11-30 19:57:43 +01001099 u8 csum;
Adam Jackson61e57a82010-03-29 21:43:18 +00001100 struct edid *edid = (struct edid *)raw_edid;
Dave Airlief453ba02008-11-07 14:05:41 -08001101
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001102 if (WARN_ON(!raw_edid))
1103 return false;
1104
Adam Jackson47819ba2012-05-30 16:42:39 -04001105 if (edid_fixup > 8 || edid_fixup < 0)
1106 edid_fixup = 6;
1107
Adam Jacksonf89ec8a2012-04-16 10:40:08 -04001108 if (block == 0) {
Thomas Reim051963d2011-07-29 14:28:57 +00001109 int score = drm_edid_header_is_valid(raw_edid);
Todd Previte6ba2bd32015-04-21 11:09:41 -07001110 if (score == 8) {
1111 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001112 *edid_corrupt = false;
Todd Previte6ba2bd32015-04-21 11:09:41 -07001113 } else if (score >= edid_fixup) {
1114 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1115 * The corrupt flag needs to be set here otherwise, the
1116 * fix-up code here will correct the problem, the
1117 * checksum is correct and the test fails
1118 */
1119 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001120 *edid_corrupt = true;
Adam Jackson61e57a82010-03-29 21:43:18 +00001121 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1122 memcpy(raw_edid, edid_header, sizeof(edid_header));
1123 } else {
Todd Previte6ba2bd32015-04-21 11:09:41 -07001124 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001125 *edid_corrupt = true;
Adam Jackson61e57a82010-03-29 21:43:18 +00001126 goto bad;
1127 }
1128 }
Dave Airlief453ba02008-11-07 14:05:41 -08001129
Stefan Brünsc465bbc2014-11-30 19:57:43 +01001130 csum = drm_edid_block_checksum(raw_edid);
Dave Airlief453ba02008-11-07 14:05:41 -08001131 if (csum) {
Jerome Glisse0b2443e2012-08-09 11:25:51 -04001132 if (print_bad_edid) {
1133 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1134 }
Adam Jackson4a638b42010-05-25 16:33:09 -04001135
Todd Previte6ba2bd32015-04-21 11:09:41 -07001136 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001137 *edid_corrupt = true;
Todd Previte6ba2bd32015-04-21 11:09:41 -07001138
Adam Jackson4a638b42010-05-25 16:33:09 -04001139 /* allow CEA to slide through, switches mangle this */
1140 if (raw_edid[0] != 0x02)
1141 goto bad;
Dave Airlief453ba02008-11-07 14:05:41 -08001142 }
1143
Adam Jackson61e57a82010-03-29 21:43:18 +00001144 /* per-block-type checks */
1145 switch (raw_edid[0]) {
1146 case 0: /* base */
1147 if (edid->version != 1) {
1148 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1149 goto bad;
1150 }
Adam Jackson862b89c2009-11-23 14:23:06 -05001151
Adam Jackson61e57a82010-03-29 21:43:18 +00001152 if (edid->revision > 4)
1153 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1154 break;
1155
1156 default:
1157 break;
1158 }
Adam Jackson47ee4ccf2009-11-23 14:23:05 -05001159
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001160 return true;
Dave Airlief453ba02008-11-07 14:05:41 -08001161
1162bad:
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001163 if (print_bad_edid) {
Stefan Brünsda4c07b2014-11-30 19:57:42 +01001164 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1165 printk(KERN_ERR "EDID block is all zeroes\n");
1166 } else {
1167 printk(KERN_ERR "Raw EDID:\n");
1168 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
Tormod Volden0aff47f2011-07-05 20:12:53 +00001169 raw_edid, EDID_LENGTH, false);
Stefan Brünsda4c07b2014-11-30 19:57:42 +01001170 }
Dave Airlief453ba02008-11-07 14:05:41 -08001171 }
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001172 return false;
Dave Airlief453ba02008-11-07 14:05:41 -08001173}
Carsten Emdeda0df922012-03-18 22:37:33 +01001174EXPORT_SYMBOL(drm_edid_block_valid);
Adam Jackson61e57a82010-03-29 21:43:18 +00001175
1176/**
1177 * drm_edid_is_valid - sanity check EDID data
1178 * @edid: EDID data
1179 *
1180 * Sanity-check an entire EDID record (including extensions)
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001181 *
1182 * Return: True if the EDID data is valid, false otherwise.
Adam Jackson61e57a82010-03-29 21:43:18 +00001183 */
1184bool drm_edid_is_valid(struct edid *edid)
1185{
1186 int i;
1187 u8 *raw = (u8 *)edid;
1188
1189 if (!edid)
1190 return false;
1191
1192 for (i = 0; i <= edid->extensions; i++)
Todd Previte6ba2bd32015-04-21 11:09:41 -07001193 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
Adam Jackson61e57a82010-03-29 21:43:18 +00001194 return false;
1195
1196 return true;
1197}
Alex Deucher3c537882010-02-05 04:21:19 -05001198EXPORT_SYMBOL(drm_edid_is_valid);
Dave Airlief453ba02008-11-07 14:05:41 -08001199
Adam Jackson61e57a82010-03-29 21:43:18 +00001200#define DDC_SEGMENT_ADDR 0x30
1201/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001202 * drm_do_probe_ddc_edid() - get EDID information via I2C
Thierry Reding7c58e872014-12-03 16:52:18 +01001203 * @data: I2C device adapter
Daniel Vetterfc668112014-01-21 12:02:26 +01001204 * @buf: EDID data buffer to be filled
1205 * @block: 128 byte EDID block to start fetching from
1206 * @len: EDID data buffer length to fetch
1207 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001208 * Try to fetch EDID information by calling I2C driver functions.
Daniel Vetterfc668112014-01-21 12:02:26 +01001209 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001210 * Return: 0 on success or -1 on failure.
Adam Jackson61e57a82010-03-29 21:43:18 +00001211 */
1212static int
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001213drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
Adam Jackson61e57a82010-03-29 21:43:18 +00001214{
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001215 struct i2c_adapter *adapter = data;
Adam Jackson61e57a82010-03-29 21:43:18 +00001216 unsigned char start = block * EDID_LENGTH;
Shirish Scd004b32012-08-30 07:04:06 +00001217 unsigned char segment = block >> 1;
1218 unsigned char xfers = segment ? 3 : 2;
Chris Wilson4819d2e2011-03-15 11:04:41 +00001219 int ret, retries = 5;
Adam Jackson61e57a82010-03-29 21:43:18 +00001220
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001221 /*
1222 * The core I2C driver will automatically retry the transfer if the
Chris Wilson4819d2e2011-03-15 11:04:41 +00001223 * adapter reports EAGAIN. However, we find that bit-banging transfers
1224 * are susceptible to errors under a heavily loaded machine and
1225 * generate spurious NAKs and timeouts. Retrying the transfer
1226 * of the individual block a few times seems to overcome this.
1227 */
1228 do {
1229 struct i2c_msg msgs[] = {
1230 {
Shirish Scd004b32012-08-30 07:04:06 +00001231 .addr = DDC_SEGMENT_ADDR,
1232 .flags = 0,
1233 .len = 1,
1234 .buf = &segment,
1235 }, {
Chris Wilson4819d2e2011-03-15 11:04:41 +00001236 .addr = DDC_ADDR,
1237 .flags = 0,
1238 .len = 1,
1239 .buf = &start,
1240 }, {
1241 .addr = DDC_ADDR,
1242 .flags = I2C_M_RD,
1243 .len = len,
1244 .buf = buf,
1245 }
1246 };
Shirish Scd004b32012-08-30 07:04:06 +00001247
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001248 /*
1249 * Avoid sending the segment addr to not upset non-compliant
1250 * DDC monitors.
1251 */
Shirish Scd004b32012-08-30 07:04:06 +00001252 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1253
Eugeni Dodonov9292f372012-01-05 09:34:28 -02001254 if (ret == -ENXIO) {
1255 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1256 adapter->name);
1257 break;
1258 }
Shirish Scd004b32012-08-30 07:04:06 +00001259 } while (ret != xfers && --retries);
Adam Jackson61e57a82010-03-29 21:43:18 +00001260
Shirish Scd004b32012-08-30 07:04:06 +00001261 return ret == xfers ? 0 : -1;
Adam Jackson61e57a82010-03-29 21:43:18 +00001262}
1263
Chris Wilson14544d02016-10-24 12:38:21 +01001264static void connector_bad_edid(struct drm_connector *connector,
1265 u8 *edid, int num_blocks)
1266{
1267 int i;
1268
1269 if (connector->bad_edid_counter++ && !(drm_debug & DRM_UT_KMS))
1270 return;
1271
1272 dev_warn(connector->dev->dev,
1273 "%s: EDID is invalid:\n",
1274 connector->name);
1275 for (i = 0; i < num_blocks; i++) {
1276 u8 *block = edid + i * EDID_LENGTH;
1277 char prefix[20];
1278
1279 if (drm_edid_is_zero(block, EDID_LENGTH))
1280 sprintf(prefix, "\t[%02x] ZERO ", i);
1281 else if (!drm_edid_block_valid(block, i, false, NULL))
1282 sprintf(prefix, "\t[%02x] BAD ", i);
1283 else
1284 sprintf(prefix, "\t[%02x] GOOD ", i);
1285
1286 print_hex_dump(KERN_WARNING,
1287 prefix, DUMP_PREFIX_NONE, 16, 1,
1288 block, EDID_LENGTH, false);
1289 }
1290}
1291
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001292/**
1293 * drm_do_get_edid - get EDID data using a custom EDID block read function
1294 * @connector: connector we're probing
1295 * @get_edid_block: EDID block read function
1296 * @data: private data passed to the block read function
1297 *
1298 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1299 * exposes a different interface to read EDID blocks this function can be used
1300 * to get EDID data using a custom block read function.
1301 *
1302 * As in the general case the DDC bus is accessible by the kernel at the I2C
1303 * level, drivers must make all reasonable efforts to expose it as an I2C
1304 * adapter and use drm_get_edid() instead of abusing this function.
1305 *
1306 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1307 */
1308struct edid *drm_do_get_edid(struct drm_connector *connector,
1309 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1310 size_t len),
1311 void *data)
Adam Jackson61e57a82010-03-29 21:43:18 +00001312{
Sam Tygier0ea75e22010-09-23 10:11:01 +01001313 int i, j = 0, valid_extensions = 0;
Chris Wilsonf14f3682016-10-17 09:35:12 +01001314 u8 *edid, *new;
Adam Jackson61e57a82010-03-29 21:43:18 +00001315
Chris Wilsonf14f3682016-10-17 09:35:12 +01001316 if ((edid = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
Adam Jackson61e57a82010-03-29 21:43:18 +00001317 return NULL;
1318
1319 /* base block fetch */
1320 for (i = 0; i < 4; i++) {
Chris Wilsonf14f3682016-10-17 09:35:12 +01001321 if (get_edid_block(data, edid, 0, EDID_LENGTH))
Adam Jackson61e57a82010-03-29 21:43:18 +00001322 goto out;
Chris Wilson14544d02016-10-24 12:38:21 +01001323 if (drm_edid_block_valid(edid, 0, false,
Todd Previte6ba2bd32015-04-21 11:09:41 -07001324 &connector->edid_corrupt))
Adam Jackson61e57a82010-03-29 21:43:18 +00001325 break;
Chris Wilsonf14f3682016-10-17 09:35:12 +01001326 if (i == 0 && drm_edid_is_zero(edid, EDID_LENGTH)) {
Dave Airlie4a9a8b72011-06-14 06:13:55 +00001327 connector->null_edid_counter++;
1328 goto carp;
1329 }
Adam Jackson61e57a82010-03-29 21:43:18 +00001330 }
1331 if (i == 4)
1332 goto carp;
1333
1334 /* if there's no extensions, we're done */
Chris Wilson14544d02016-10-24 12:38:21 +01001335 valid_extensions = edid[0x7e];
1336 if (valid_extensions == 0)
Chris Wilsonf14f3682016-10-17 09:35:12 +01001337 return (struct edid *)edid;
Adam Jackson61e57a82010-03-29 21:43:18 +00001338
Chris Wilson14544d02016-10-24 12:38:21 +01001339 new = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
Adam Jackson61e57a82010-03-29 21:43:18 +00001340 if (!new)
1341 goto out;
Chris Wilsonf14f3682016-10-17 09:35:12 +01001342 edid = new;
Adam Jackson61e57a82010-03-29 21:43:18 +00001343
Chris Wilsonf14f3682016-10-17 09:35:12 +01001344 for (j = 1; j <= edid[0x7e]; j++) {
Chris Wilson14544d02016-10-24 12:38:21 +01001345 u8 *block = edid + j * EDID_LENGTH;
Chris Wilsona28187c2016-10-17 09:35:13 +01001346
Adam Jackson61e57a82010-03-29 21:43:18 +00001347 for (i = 0; i < 4; i++) {
Chris Wilsona28187c2016-10-17 09:35:13 +01001348 if (get_edid_block(data, block, j, EDID_LENGTH))
Adam Jackson61e57a82010-03-29 21:43:18 +00001349 goto out;
Chris Wilson14544d02016-10-24 12:38:21 +01001350 if (drm_edid_block_valid(block, j, false, NULL))
Adam Jackson61e57a82010-03-29 21:43:18 +00001351 break;
1352 }
Maarten Lankhorstf934ec8c2013-01-29 14:27:39 +01001353
Chris Wilson14544d02016-10-24 12:38:21 +01001354 if (i == 4)
1355 valid_extensions--;
Sam Tygier0ea75e22010-09-23 10:11:01 +01001356 }
1357
Chris Wilsonf14f3682016-10-17 09:35:12 +01001358 if (valid_extensions != edid[0x7e]) {
Chris Wilson14544d02016-10-24 12:38:21 +01001359 u8 *base;
1360
1361 connector_bad_edid(connector, edid, edid[0x7e] + 1);
1362
Chris Wilsonf14f3682016-10-17 09:35:12 +01001363 edid[EDID_LENGTH-1] += edid[0x7e] - valid_extensions;
1364 edid[0x7e] = valid_extensions;
Chris Wilson14544d02016-10-24 12:38:21 +01001365
1366 new = kmalloc((valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
Sam Tygier0ea75e22010-09-23 10:11:01 +01001367 if (!new)
1368 goto out;
Chris Wilson14544d02016-10-24 12:38:21 +01001369
1370 base = new;
1371 for (i = 0; i <= edid[0x7e]; i++) {
1372 u8 *block = edid + i * EDID_LENGTH;
1373
1374 if (!drm_edid_block_valid(block, i, false, NULL))
1375 continue;
1376
1377 memcpy(base, block, EDID_LENGTH);
1378 base += EDID_LENGTH;
1379 }
1380
1381 kfree(edid);
Chris Wilsonf14f3682016-10-17 09:35:12 +01001382 edid = new;
Adam Jackson61e57a82010-03-29 21:43:18 +00001383 }
1384
Chris Wilsonf14f3682016-10-17 09:35:12 +01001385 return (struct edid *)edid;
Adam Jackson61e57a82010-03-29 21:43:18 +00001386
1387carp:
Chris Wilson14544d02016-10-24 12:38:21 +01001388 connector_bad_edid(connector, edid, 1);
Adam Jackson61e57a82010-03-29 21:43:18 +00001389out:
Chris Wilsonf14f3682016-10-17 09:35:12 +01001390 kfree(edid);
Adam Jackson61e57a82010-03-29 21:43:18 +00001391 return NULL;
1392}
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001393EXPORT_SYMBOL_GPL(drm_do_get_edid);
Adam Jackson61e57a82010-03-29 21:43:18 +00001394
1395/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001396 * drm_probe_ddc() - probe DDC presence
1397 * @adapter: I2C adapter to probe
Adam Jackson61e57a82010-03-29 21:43:18 +00001398 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001399 * Return: True on success, false on failure.
Adam Jackson61e57a82010-03-29 21:43:18 +00001400 */
Adam Jacksonfbff4692012-09-18 10:58:47 -04001401bool
Adam Jackson61e57a82010-03-29 21:43:18 +00001402drm_probe_ddc(struct i2c_adapter *adapter)
1403{
1404 unsigned char out;
1405
1406 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1407}
Adam Jacksonfbff4692012-09-18 10:58:47 -04001408EXPORT_SYMBOL(drm_probe_ddc);
Adam Jackson61e57a82010-03-29 21:43:18 +00001409
1410/**
1411 * drm_get_edid - get EDID data, if available
1412 * @connector: connector we're probing
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001413 * @adapter: I2C adapter to use for DDC
Adam Jackson61e57a82010-03-29 21:43:18 +00001414 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001415 * Poke the given I2C channel to grab EDID data if possible. If found,
Adam Jackson61e57a82010-03-29 21:43:18 +00001416 * attach it to the connector.
1417 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001418 * Return: Pointer to valid EDID or NULL if we couldn't find any.
Adam Jackson61e57a82010-03-29 21:43:18 +00001419 */
1420struct edid *drm_get_edid(struct drm_connector *connector,
1421 struct i2c_adapter *adapter)
1422{
Dave Airlie40d9b042014-10-20 16:29:33 +10001423 struct edid *edid;
1424
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001425 if (!drm_probe_ddc(adapter))
1426 return NULL;
Adam Jackson61e57a82010-03-29 21:43:18 +00001427
Dave Airlie40d9b042014-10-20 16:29:33 +10001428 edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1429 if (edid)
1430 drm_get_displayid(connector, edid);
1431 return edid;
Adam Jackson61e57a82010-03-29 21:43:18 +00001432}
1433EXPORT_SYMBOL(drm_get_edid);
1434
Jani Nikula51f8da52013-09-27 15:08:27 +03001435/**
Lukas Wunner5cb8eaa22016-01-11 20:09:20 +01001436 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1437 * @connector: connector we're probing
1438 * @adapter: I2C adapter to use for DDC
1439 *
1440 * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1441 * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1442 * switch DDC to the GPU which is retrieving EDID.
1443 *
1444 * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1445 */
1446struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
1447 struct i2c_adapter *adapter)
1448{
1449 struct pci_dev *pdev = connector->dev->pdev;
1450 struct edid *edid;
1451
1452 vga_switcheroo_lock_ddc(pdev);
1453 edid = drm_get_edid(connector, adapter);
1454 vga_switcheroo_unlock_ddc(pdev);
1455
1456 return edid;
1457}
1458EXPORT_SYMBOL(drm_get_edid_switcheroo);
1459
1460/**
Jani Nikula51f8da52013-09-27 15:08:27 +03001461 * drm_edid_duplicate - duplicate an EDID and the extensions
1462 * @edid: EDID to duplicate
1463 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001464 * Return: Pointer to duplicated EDID or NULL on allocation failure.
Jani Nikula51f8da52013-09-27 15:08:27 +03001465 */
1466struct edid *drm_edid_duplicate(const struct edid *edid)
1467{
1468 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1469}
1470EXPORT_SYMBOL(drm_edid_duplicate);
1471
Adam Jackson61e57a82010-03-29 21:43:18 +00001472/*** EDID parsing ***/
1473
Dave Airlief453ba02008-11-07 14:05:41 -08001474/**
1475 * edid_vendor - match a string against EDID's obfuscated vendor field
1476 * @edid: EDID to match
1477 * @vendor: vendor string
1478 *
1479 * Returns true if @vendor is in @edid, false otherwise
1480 */
Jani Nikula23c4cfb2016-12-28 13:06:26 +02001481static bool edid_vendor(struct edid *edid, const char *vendor)
Dave Airlief453ba02008-11-07 14:05:41 -08001482{
1483 char edid_vendor[3];
1484
1485 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1486 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1487 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
Dave Airlie16456c82009-04-03 09:10:33 +10001488 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
Dave Airlief453ba02008-11-07 14:05:41 -08001489
1490 return !strncmp(edid_vendor, vendor, 3);
1491}
1492
1493/**
1494 * edid_get_quirks - return quirk flags for a given EDID
1495 * @edid: EDID to process
1496 *
1497 * This tells subsequent routines what fixes they need to apply.
1498 */
1499static u32 edid_get_quirks(struct edid *edid)
1500{
Jani Nikula23c4cfb2016-12-28 13:06:26 +02001501 const struct edid_quirk *quirk;
Dave Airlief453ba02008-11-07 14:05:41 -08001502 int i;
1503
1504 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1505 quirk = &edid_quirk_list[i];
1506
1507 if (edid_vendor(edid, quirk->vendor) &&
1508 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1509 return quirk->quirks;
1510 }
1511
1512 return 0;
1513}
1514
1515#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
Alex Deucher339d2022013-08-15 11:42:14 -04001516#define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
Dave Airlief453ba02008-11-07 14:05:41 -08001517
Dave Airlief453ba02008-11-07 14:05:41 -08001518/**
1519 * edid_fixup_preferred - set preferred modes based on quirk list
1520 * @connector: has mode list to fix up
1521 * @quirks: quirks list
1522 *
1523 * Walk the mode list for @connector, clearing the preferred status
1524 * on existing modes and setting it anew for the right mode ala @quirks.
1525 */
1526static void edid_fixup_preferred(struct drm_connector *connector,
1527 u32 quirks)
1528{
1529 struct drm_display_mode *t, *cur_mode, *preferred_mode;
Dave Airlief8906072008-12-18 16:59:02 +10001530 int target_refresh = 0;
Alex Deucher339d2022013-08-15 11:42:14 -04001531 int cur_vrefresh, preferred_vrefresh;
Dave Airlief453ba02008-11-07 14:05:41 -08001532
1533 if (list_empty(&connector->probed_modes))
1534 return;
1535
1536 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1537 target_refresh = 60;
1538 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1539 target_refresh = 75;
1540
1541 preferred_mode = list_first_entry(&connector->probed_modes,
1542 struct drm_display_mode, head);
1543
1544 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1545 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1546
1547 if (cur_mode == preferred_mode)
1548 continue;
1549
1550 /* Largest mode is preferred */
1551 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1552 preferred_mode = cur_mode;
1553
Alex Deucher339d2022013-08-15 11:42:14 -04001554 cur_vrefresh = cur_mode->vrefresh ?
1555 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1556 preferred_vrefresh = preferred_mode->vrefresh ?
1557 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
Dave Airlief453ba02008-11-07 14:05:41 -08001558 /* At a given size, try to get closest to target refresh */
1559 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
Alex Deucher339d2022013-08-15 11:42:14 -04001560 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1561 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
Dave Airlief453ba02008-11-07 14:05:41 -08001562 preferred_mode = cur_mode;
1563 }
1564 }
1565
1566 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1567}
1568
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001569static bool
1570mode_is_rb(const struct drm_display_mode *mode)
1571{
1572 return (mode->htotal - mode->hdisplay == 160) &&
1573 (mode->hsync_end - mode->hdisplay == 80) &&
1574 (mode->hsync_end - mode->hsync_start == 32) &&
1575 (mode->vsync_start - mode->vdisplay == 3);
1576}
1577
Adam Jackson33c75312012-04-13 16:33:29 -04001578/*
1579 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1580 * @dev: Device to duplicate against
1581 * @hsize: Mode width
1582 * @vsize: Mode height
1583 * @fresh: Mode refresh rate
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001584 * @rb: Mode reduced-blanking-ness
Adam Jackson33c75312012-04-13 16:33:29 -04001585 *
1586 * Walk the DMT mode list looking for a match for the given parameters.
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001587 *
1588 * Return: A newly allocated copy of the mode, or NULL if not found.
Adam Jackson33c75312012-04-13 16:33:29 -04001589 */
Dave Airlie1d42bbc2010-05-07 05:02:30 +00001590struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001591 int hsize, int vsize, int fresh,
1592 bool rb)
Zhao Yakui559ee212009-09-03 09:33:47 +08001593{
Adam Jackson07a5e632009-12-03 17:44:38 -05001594 int i;
Zhao Yakui559ee212009-09-03 09:33:47 +08001595
Thierry Redinga6b21832012-11-23 15:01:42 +01001596 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001597 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
Adam Jacksonf8b46a02012-04-13 16:33:30 -04001598 if (hsize != ptr->hdisplay)
1599 continue;
1600 if (vsize != ptr->vdisplay)
1601 continue;
1602 if (fresh != drm_mode_vrefresh(ptr))
1603 continue;
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001604 if (rb != mode_is_rb(ptr))
1605 continue;
Adam Jacksonf8b46a02012-04-13 16:33:30 -04001606
1607 return drm_mode_duplicate(dev, ptr);
Zhao Yakui559ee212009-09-03 09:33:47 +08001608 }
Adam Jacksonf8b46a02012-04-13 16:33:30 -04001609
1610 return NULL;
Zhao Yakui559ee212009-09-03 09:33:47 +08001611}
Dave Airlie1d42bbc2010-05-07 05:02:30 +00001612EXPORT_SYMBOL(drm_mode_find_dmt);
Adam Jackson23425ca2009-09-23 17:30:58 -04001613
Adam Jacksond1ff6402010-03-29 21:43:26 +00001614typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1615
1616static void
Adam Jackson4d76a222010-08-03 14:38:17 -04001617cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1618{
1619 int i, n = 0;
Christian Schmidt4966b2a2011-12-19 20:03:43 +01001620 u8 d = ext[0x02];
Adam Jackson4d76a222010-08-03 14:38:17 -04001621 u8 *det_base = ext + d;
1622
Christian Schmidt4966b2a2011-12-19 20:03:43 +01001623 n = (127 - d) / 18;
Adam Jackson4d76a222010-08-03 14:38:17 -04001624 for (i = 0; i < n; i++)
1625 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1626}
1627
1628static void
Adam Jacksoncbba98f2010-08-03 14:38:18 -04001629vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1630{
1631 unsigned int i, n = min((int)ext[0x02], 6);
1632 u8 *det_base = ext + 5;
1633
1634 if (ext[0x01] != 1)
1635 return; /* unknown version */
1636
1637 for (i = 0; i < n; i++)
1638 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1639}
1640
1641static void
Adam Jacksond1ff6402010-03-29 21:43:26 +00001642drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1643{
1644 int i;
1645 struct edid *edid = (struct edid *)raw_edid;
1646
1647 if (edid == NULL)
1648 return;
1649
1650 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1651 cb(&(edid->detailed_timings[i]), closure);
1652
Adam Jackson4d76a222010-08-03 14:38:17 -04001653 for (i = 1; i <= raw_edid[0x7e]; i++) {
1654 u8 *ext = raw_edid + (i * EDID_LENGTH);
1655 switch (*ext) {
1656 case CEA_EXT:
1657 cea_for_each_detailed_block(ext, cb, closure);
1658 break;
Adam Jacksoncbba98f2010-08-03 14:38:18 -04001659 case VTB_EXT:
1660 vtb_for_each_detailed_block(ext, cb, closure);
1661 break;
Adam Jackson4d76a222010-08-03 14:38:17 -04001662 default:
1663 break;
1664 }
1665 }
Adam Jacksond1ff6402010-03-29 21:43:26 +00001666}
1667
1668static void
1669is_rb(struct detailed_timing *t, void *data)
1670{
1671 u8 *r = (u8 *)t;
1672 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1673 if (r[15] & 0x10)
1674 *(bool *)data = true;
1675}
1676
1677/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1678static bool
1679drm_monitor_supports_rb(struct edid *edid)
1680{
1681 if (edid->revision >= 4) {
Daniel Vetterb196a492012-06-19 11:33:06 +02001682 bool ret = false;
Adam Jacksond1ff6402010-03-29 21:43:26 +00001683 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1684 return ret;
1685 }
1686
1687 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1688}
1689
Adam Jackson7a374352010-03-29 21:43:30 +00001690static void
1691find_gtf2(struct detailed_timing *t, void *data)
1692{
1693 u8 *r = (u8 *)t;
1694 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1695 *(u8 **)data = r;
1696}
1697
1698/* Secondary GTF curve kicks in above some break frequency */
1699static int
1700drm_gtf2_hbreak(struct edid *edid)
1701{
1702 u8 *r = NULL;
1703 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1704 return r ? (r[12] * 2) : 0;
1705}
1706
1707static int
1708drm_gtf2_2c(struct edid *edid)
1709{
1710 u8 *r = NULL;
1711 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1712 return r ? r[13] : 0;
1713}
1714
1715static int
1716drm_gtf2_m(struct edid *edid)
1717{
1718 u8 *r = NULL;
1719 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1720 return r ? (r[15] << 8) + r[14] : 0;
1721}
1722
1723static int
1724drm_gtf2_k(struct edid *edid)
1725{
1726 u8 *r = NULL;
1727 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1728 return r ? r[16] : 0;
1729}
1730
1731static int
1732drm_gtf2_2j(struct edid *edid)
1733{
1734 u8 *r = NULL;
1735 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1736 return r ? r[17] : 0;
1737}
1738
1739/**
1740 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1741 * @edid: EDID block to scan
1742 */
1743static int standard_timing_level(struct edid *edid)
1744{
1745 if (edid->revision >= 2) {
1746 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1747 return LEVEL_CVT;
1748 if (drm_gtf2_hbreak(edid))
1749 return LEVEL_GTF2;
1750 return LEVEL_GTF;
1751 }
1752 return LEVEL_DMT;
1753}
1754
Adam Jackson23425ca2009-09-23 17:30:58 -04001755/*
1756 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1757 * monitors fill with ascii space (0x20) instead.
1758 */
1759static int
1760bad_std_timing(u8 a, u8 b)
1761{
1762 return (a == 0x00 && b == 0x00) ||
1763 (a == 0x01 && b == 0x01) ||
1764 (a == 0x20 && b == 0x20);
1765}
1766
Dave Airlief453ba02008-11-07 14:05:41 -08001767/**
1768 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
Daniel Vetterfc668112014-01-21 12:02:26 +01001769 * @connector: connector of for the EDID block
1770 * @edid: EDID block to scan
Dave Airlief453ba02008-11-07 14:05:41 -08001771 * @t: standard timing params
1772 *
1773 * Take the standard timing params (in this case width, aspect, and refresh)
Zhao Yakui5c612592009-06-22 13:17:10 +08001774 * and convert them into a real mode using CVT/GTF/DMT.
Dave Airlief453ba02008-11-07 14:05:41 -08001775 */
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001776static struct drm_display_mode *
Adam Jackson7a374352010-03-29 21:43:30 +00001777drm_mode_std(struct drm_connector *connector, struct edid *edid,
Thierry Reding464fdec2014-04-29 11:44:33 +02001778 struct std_timing *t)
Dave Airlief453ba02008-11-07 14:05:41 -08001779{
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001780 struct drm_device *dev = connector->dev;
1781 struct drm_display_mode *m, *mode = NULL;
Zhao Yakui5c612592009-06-22 13:17:10 +08001782 int hsize, vsize;
1783 int vrefresh_rate;
Michel Dänzer0454bea2009-06-15 16:56:07 +02001784 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1785 >> EDID_TIMING_ASPECT_SHIFT;
Zhao Yakui5c612592009-06-22 13:17:10 +08001786 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1787 >> EDID_TIMING_VFREQ_SHIFT;
Adam Jackson7a374352010-03-29 21:43:30 +00001788 int timing_level = standard_timing_level(edid);
Dave Airlief453ba02008-11-07 14:05:41 -08001789
Adam Jackson23425ca2009-09-23 17:30:58 -04001790 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1791 return NULL;
1792
Zhao Yakui5c612592009-06-22 13:17:10 +08001793 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1794 hsize = t->hsize * 8 + 248;
1795 /* vrefresh_rate = vfreq + 60 */
1796 vrefresh_rate = vfreq + 60;
1797 /* the vdisplay is calculated based on the aspect ratio */
Adam Jacksonf066a172009-09-23 17:31:21 -04001798 if (aspect_ratio == 0) {
Thierry Reding464fdec2014-04-29 11:44:33 +02001799 if (edid->revision < 3)
Adam Jacksonf066a172009-09-23 17:31:21 -04001800 vsize = hsize;
1801 else
1802 vsize = (hsize * 10) / 16;
1803 } else if (aspect_ratio == 1)
Dave Airlief453ba02008-11-07 14:05:41 -08001804 vsize = (hsize * 3) / 4;
Michel Dänzer0454bea2009-06-15 16:56:07 +02001805 else if (aspect_ratio == 2)
Dave Airlief453ba02008-11-07 14:05:41 -08001806 vsize = (hsize * 4) / 5;
1807 else
1808 vsize = (hsize * 9) / 16;
Adam Jacksona0910c82010-03-29 21:43:28 +00001809
1810 /* HDTV hack, part 1 */
1811 if (vrefresh_rate == 60 &&
1812 ((hsize == 1360 && vsize == 765) ||
1813 (hsize == 1368 && vsize == 769))) {
1814 hsize = 1366;
1815 vsize = 768;
1816 }
1817
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001818 /*
1819 * If this connector already has a mode for this size and refresh
1820 * rate (because it came from detailed or CVT info), use that
1821 * instead. This way we don't have to guess at interlace or
1822 * reduced blanking.
1823 */
Adam Jackson522032d2010-04-09 16:52:49 +00001824 list_for_each_entry(m, &connector->probed_modes, head)
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001825 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1826 drm_mode_vrefresh(m) == vrefresh_rate)
1827 return NULL;
1828
Adam Jacksona0910c82010-03-29 21:43:28 +00001829 /* HDTV hack, part 2 */
1830 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1831 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
Dave Airlied50ba252009-09-23 14:44:08 +10001832 false);
Zhao Yakui559ee212009-09-03 09:33:47 +08001833 mode->hdisplay = 1366;
Adam Jacksona4967de62010-07-28 07:40:32 +10001834 mode->hsync_start = mode->hsync_start - 1;
1835 mode->hsync_end = mode->hsync_end - 1;
Zhao Yakui559ee212009-09-03 09:33:47 +08001836 return mode;
1837 }
Adam Jacksona0910c82010-03-29 21:43:28 +00001838
Zhao Yakui559ee212009-09-03 09:33:47 +08001839 /* check whether it can be found in default mode table */
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001840 if (drm_monitor_supports_rb(edid)) {
1841 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1842 true);
1843 if (mode)
1844 return mode;
1845 }
1846 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
Zhao Yakui559ee212009-09-03 09:33:47 +08001847 if (mode)
1848 return mode;
1849
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001850 /* okay, generate it */
Zhao Yakui5c612592009-06-22 13:17:10 +08001851 switch (timing_level) {
1852 case LEVEL_DMT:
Zhao Yakui5c612592009-06-22 13:17:10 +08001853 break;
1854 case LEVEL_GTF:
1855 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1856 break;
Adam Jackson7a374352010-03-29 21:43:30 +00001857 case LEVEL_GTF2:
1858 /*
1859 * This is potentially wrong if there's ever a monitor with
1860 * more than one ranges section, each claiming a different
1861 * secondary GTF curve. Please don't do that.
1862 */
1863 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
Takashi Iwaifc48f162012-04-20 12:59:33 +01001864 if (!mode)
1865 return NULL;
Adam Jackson7a374352010-03-29 21:43:30 +00001866 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
Sascha Haueraefd3302012-02-01 11:38:21 +01001867 drm_mode_destroy(dev, mode);
Adam Jackson7a374352010-03-29 21:43:30 +00001868 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1869 vrefresh_rate, 0, 0,
1870 drm_gtf2_m(edid),
1871 drm_gtf2_2c(edid),
1872 drm_gtf2_k(edid),
1873 drm_gtf2_2j(edid));
1874 }
1875 break;
Zhao Yakui5c612592009-06-22 13:17:10 +08001876 case LEVEL_CVT:
Dave Airlied50ba252009-09-23 14:44:08 +10001877 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1878 false);
Zhao Yakui5c612592009-06-22 13:17:10 +08001879 break;
1880 }
Dave Airlief453ba02008-11-07 14:05:41 -08001881 return mode;
1882}
1883
Adam Jacksonb58db2c2010-02-15 22:15:39 +00001884/*
1885 * EDID is delightfully ambiguous about how interlaced modes are to be
1886 * encoded. Our internal representation is of frame height, but some
1887 * HDTV detailed timings are encoded as field height.
1888 *
1889 * The format list here is from CEA, in frame size. Technically we
1890 * should be checking refresh rate too. Whatever.
1891 */
1892static void
1893drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1894 struct detailed_pixel_timing *pt)
1895{
1896 int i;
1897 static const struct {
1898 int w, h;
1899 } cea_interlaced[] = {
1900 { 1920, 1080 },
1901 { 720, 480 },
1902 { 1440, 480 },
1903 { 2880, 480 },
1904 { 720, 576 },
1905 { 1440, 576 },
1906 { 2880, 576 },
1907 };
Adam Jacksonb58db2c2010-02-15 22:15:39 +00001908
1909 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1910 return;
1911
Kulikov Vasiliy3c581412010-06-28 15:54:52 +04001912 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
Adam Jacksonb58db2c2010-02-15 22:15:39 +00001913 if ((mode->hdisplay == cea_interlaced[i].w) &&
1914 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1915 mode->vdisplay *= 2;
1916 mode->vsync_start *= 2;
1917 mode->vsync_end *= 2;
1918 mode->vtotal *= 2;
1919 mode->vtotal |= 1;
1920 }
1921 }
1922
1923 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1924}
1925
Dave Airlief453ba02008-11-07 14:05:41 -08001926/**
1927 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1928 * @dev: DRM device (needed to create new mode)
1929 * @edid: EDID block
1930 * @timing: EDID detailed timing info
1931 * @quirks: quirks to apply
1932 *
1933 * An EDID detailed timing block contains enough info for us to create and
1934 * return a new struct drm_display_mode.
1935 */
1936static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1937 struct edid *edid,
1938 struct detailed_timing *timing,
1939 u32 quirks)
1940{
1941 struct drm_display_mode *mode;
1942 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
Michel Dänzer0454bea2009-06-15 16:56:07 +02001943 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1944 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1945 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1946 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
Michel Dänzere14cbee2009-06-23 12:36:32 +02001947 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1948 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
Torsten Duwe16dad1d2013-03-23 15:38:22 +01001949 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
Michel Dänzere14cbee2009-06-23 12:36:32 +02001950 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
Dave Airlief453ba02008-11-07 14:05:41 -08001951
Adam Jacksonfc438962009-06-04 10:20:34 +10001952 /* ignore tiny modes */
Michel Dänzer0454bea2009-06-15 16:56:07 +02001953 if (hactive < 64 || vactive < 64)
Adam Jacksonfc438962009-06-04 10:20:34 +10001954 return NULL;
1955
Michel Dänzer0454bea2009-06-15 16:56:07 +02001956 if (pt->misc & DRM_EDID_PT_STEREO) {
Egbert Eichc7d015f32013-06-13 21:01:19 +02001957 DRM_DEBUG_KMS("stereo mode not supported\n");
Dave Airlief453ba02008-11-07 14:05:41 -08001958 return NULL;
1959 }
Michel Dänzer0454bea2009-06-15 16:56:07 +02001960 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
Egbert Eichc7d015f32013-06-13 21:01:19 +02001961 DRM_DEBUG_KMS("composite sync not supported\n");
Dave Airlief453ba02008-11-07 14:05:41 -08001962 }
1963
Zhao Yakuifcb45612009-10-14 09:11:25 +08001964 /* it is incorrect if hsync/vsync width is zero */
1965 if (!hsync_pulse_width || !vsync_pulse_width) {
1966 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1967 "Wrong Hsync/Vsync pulse width\n");
1968 return NULL;
1969 }
Adam Jacksonbc42aab2012-05-23 16:26:54 -04001970
1971 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1972 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1973 if (!mode)
1974 return NULL;
1975
1976 goto set_size;
1977 }
1978
Dave Airlief453ba02008-11-07 14:05:41 -08001979 mode = drm_mode_create(dev);
1980 if (!mode)
1981 return NULL;
1982
Dave Airlief453ba02008-11-07 14:05:41 -08001983 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
Michel Dänzer0454bea2009-06-15 16:56:07 +02001984 timing->pixel_clock = cpu_to_le16(1088);
Dave Airlief453ba02008-11-07 14:05:41 -08001985
Michel Dänzer0454bea2009-06-15 16:56:07 +02001986 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
Dave Airlief453ba02008-11-07 14:05:41 -08001987
Michel Dänzer0454bea2009-06-15 16:56:07 +02001988 mode->hdisplay = hactive;
1989 mode->hsync_start = mode->hdisplay + hsync_offset;
1990 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1991 mode->htotal = mode->hdisplay + hblank;
Dave Airlief453ba02008-11-07 14:05:41 -08001992
Michel Dänzer0454bea2009-06-15 16:56:07 +02001993 mode->vdisplay = vactive;
1994 mode->vsync_start = mode->vdisplay + vsync_offset;
1995 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1996 mode->vtotal = mode->vdisplay + vblank;
Dave Airlief453ba02008-11-07 14:05:41 -08001997
Jesse Barnes7064fef2009-11-05 10:12:54 -08001998 /* Some EDIDs have bogus h/vtotal values */
1999 if (mode->hsync_end > mode->htotal)
2000 mode->htotal = mode->hsync_end + 1;
2001 if (mode->vsync_end > mode->vtotal)
2002 mode->vtotal = mode->vsync_end + 1;
2003
Adam Jacksonb58db2c2010-02-15 22:15:39 +00002004 drm_mode_do_interlace_quirk(mode, pt);
Dave Airlief453ba02008-11-07 14:05:41 -08002005
2006 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
Michel Dänzer0454bea2009-06-15 16:56:07 +02002007 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
Dave Airlief453ba02008-11-07 14:05:41 -08002008 }
2009
Michel Dänzer0454bea2009-06-15 16:56:07 +02002010 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
2011 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
2012 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
2013 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
Dave Airlief453ba02008-11-07 14:05:41 -08002014
Adam Jacksonbc42aab2012-05-23 16:26:54 -04002015set_size:
Michel Dänzere14cbee2009-06-23 12:36:32 +02002016 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
2017 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
Dave Airlief453ba02008-11-07 14:05:41 -08002018
2019 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
2020 mode->width_mm *= 10;
2021 mode->height_mm *= 10;
2022 }
2023
2024 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
2025 mode->width_mm = edid->width_cm * 10;
2026 mode->height_mm = edid->height_cm * 10;
2027 }
2028
Adam Jacksonbc42aab2012-05-23 16:26:54 -04002029 mode->type = DRM_MODE_TYPE_DRIVER;
Torsten Duwec19b3b0f2013-03-23 15:39:34 +01002030 mode->vrefresh = drm_mode_vrefresh(mode);
Adam Jacksonbc42aab2012-05-23 16:26:54 -04002031 drm_mode_set_name(mode);
2032
Dave Airlief453ba02008-11-07 14:05:41 -08002033 return mode;
2034}
2035
Adam Jackson07a5e632009-12-03 17:44:38 -05002036static bool
Chris Wilsonb1f559e2011-01-26 09:49:47 +00002037mode_in_hsync_range(const struct drm_display_mode *mode,
2038 struct edid *edid, u8 *t)
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002039{
2040 int hsync, hmin, hmax;
Adam Jackson07a5e632009-12-03 17:44:38 -05002041
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002042 hmin = t[7];
2043 if (edid->revision >= 4)
2044 hmin += ((t[4] & 0x04) ? 255 : 0);
2045 hmax = t[8];
2046 if (edid->revision >= 4)
2047 hmax += ((t[4] & 0x08) ? 255 : 0);
Adam Jackson07a5e632009-12-03 17:44:38 -05002048 hsync = drm_mode_hsync(mode);
Adam Jackson07a5e632009-12-03 17:44:38 -05002049
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002050 return (hsync <= hmax && hsync >= hmin);
2051}
2052
2053static bool
Chris Wilsonb1f559e2011-01-26 09:49:47 +00002054mode_in_vsync_range(const struct drm_display_mode *mode,
2055 struct edid *edid, u8 *t)
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002056{
2057 int vsync, vmin, vmax;
2058
2059 vmin = t[5];
2060 if (edid->revision >= 4)
2061 vmin += ((t[4] & 0x01) ? 255 : 0);
2062 vmax = t[6];
2063 if (edid->revision >= 4)
2064 vmax += ((t[4] & 0x02) ? 255 : 0);
2065 vsync = drm_mode_vrefresh(mode);
2066
2067 return (vsync <= vmax && vsync >= vmin);
2068}
2069
2070static u32
2071range_pixel_clock(struct edid *edid, u8 *t)
2072{
2073 /* unspecified */
2074 if (t[9] == 0 || t[9] == 255)
2075 return 0;
2076
2077 /* 1.4 with CVT support gives us real precision, yay */
2078 if (edid->revision >= 4 && t[10] == 0x04)
2079 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2080
2081 /* 1.3 is pathetic, so fuzz up a bit */
2082 return t[9] * 10000 + 5001;
2083}
2084
Adam Jackson07a5e632009-12-03 17:44:38 -05002085static bool
Chris Wilsonb1f559e2011-01-26 09:49:47 +00002086mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002087 struct detailed_timing *timing)
Adam Jackson07a5e632009-12-03 17:44:38 -05002088{
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002089 u32 max_clock;
2090 u8 *t = (u8 *)timing;
Adam Jackson07a5e632009-12-03 17:44:38 -05002091
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002092 if (!mode_in_hsync_range(mode, edid, t))
Adam Jackson07a5e632009-12-03 17:44:38 -05002093 return false;
2094
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002095 if (!mode_in_vsync_range(mode, edid, t))
Adam Jackson07a5e632009-12-03 17:44:38 -05002096 return false;
2097
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002098 if ((max_clock = range_pixel_clock(edid, t)))
Adam Jackson07a5e632009-12-03 17:44:38 -05002099 if (mode->clock > max_clock)
2100 return false;
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002101
2102 /* 1.4 max horizontal check */
2103 if (edid->revision >= 4 && t[10] == 0x04)
2104 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2105 return false;
2106
2107 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2108 return false;
Adam Jackson07a5e632009-12-03 17:44:38 -05002109
2110 return true;
2111}
2112
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002113static bool valid_inferred_mode(const struct drm_connector *connector,
2114 const struct drm_display_mode *mode)
2115{
Ville Syrjälä85f8fcd2015-09-07 18:22:56 +03002116 const struct drm_display_mode *m;
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002117 bool ok = false;
2118
2119 list_for_each_entry(m, &connector->probed_modes, head) {
2120 if (mode->hdisplay == m->hdisplay &&
2121 mode->vdisplay == m->vdisplay &&
2122 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2123 return false; /* duplicated */
2124 if (mode->hdisplay <= m->hdisplay &&
2125 mode->vdisplay <= m->vdisplay)
2126 ok = true;
2127 }
2128 return ok;
2129}
2130
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002131static int
Adam Jacksoncd4cd3d2012-04-13 16:33:33 -04002132drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002133 struct detailed_timing *timing)
Adam Jackson07a5e632009-12-03 17:44:38 -05002134{
2135 int i, modes = 0;
2136 struct drm_display_mode *newmode;
2137 struct drm_device *dev = connector->dev;
2138
Thierry Redinga6b21832012-11-23 15:01:42 +01002139 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002140 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2141 valid_inferred_mode(connector, drm_dmt_modes + i)) {
Adam Jackson07a5e632009-12-03 17:44:38 -05002142 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2143 if (newmode) {
2144 drm_mode_probed_add(connector, newmode);
2145 modes++;
2146 }
2147 }
2148 }
2149
2150 return modes;
2151}
2152
Takashi Iwaic09dedb2012-04-23 17:40:33 +01002153/* fix up 1366x768 mode from 1368x768;
2154 * GFT/CVT can't express 1366 width which isn't dividable by 8
2155 */
2156static void fixup_mode_1366x768(struct drm_display_mode *mode)
2157{
2158 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2159 mode->hdisplay = 1366;
2160 mode->hsync_start--;
2161 mode->hsync_end--;
2162 drm_mode_set_name(mode);
2163 }
2164}
2165
Adam Jacksonb309bd32012-04-13 16:33:40 -04002166static int
2167drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2168 struct detailed_timing *timing)
2169{
2170 int i, modes = 0;
2171 struct drm_display_mode *newmode;
2172 struct drm_device *dev = connector->dev;
2173
Thierry Redinga6b21832012-11-23 15:01:42 +01002174 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002175 const struct minimode *m = &extra_modes[i];
2176 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
Takashi Iwaifc48f162012-04-20 12:59:33 +01002177 if (!newmode)
2178 return modes;
Adam Jacksonb309bd32012-04-13 16:33:40 -04002179
Takashi Iwaic09dedb2012-04-23 17:40:33 +01002180 fixup_mode_1366x768(newmode);
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002181 if (!mode_in_range(newmode, edid, timing) ||
2182 !valid_inferred_mode(connector, newmode)) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002183 drm_mode_destroy(dev, newmode);
2184 continue;
2185 }
2186
2187 drm_mode_probed_add(connector, newmode);
2188 modes++;
2189 }
2190
2191 return modes;
2192}
2193
2194static int
2195drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2196 struct detailed_timing *timing)
2197{
2198 int i, modes = 0;
2199 struct drm_display_mode *newmode;
2200 struct drm_device *dev = connector->dev;
2201 bool rb = drm_monitor_supports_rb(edid);
2202
Thierry Redinga6b21832012-11-23 15:01:42 +01002203 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002204 const struct minimode *m = &extra_modes[i];
2205 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
Takashi Iwaifc48f162012-04-20 12:59:33 +01002206 if (!newmode)
2207 return modes;
Adam Jacksonb309bd32012-04-13 16:33:40 -04002208
Takashi Iwaic09dedb2012-04-23 17:40:33 +01002209 fixup_mode_1366x768(newmode);
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002210 if (!mode_in_range(newmode, edid, timing) ||
2211 !valid_inferred_mode(connector, newmode)) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002212 drm_mode_destroy(dev, newmode);
2213 continue;
2214 }
2215
2216 drm_mode_probed_add(connector, newmode);
2217 modes++;
2218 }
2219
2220 return modes;
2221}
2222
Adam Jackson13931572010-08-03 14:38:19 -04002223static void
2224do_inferred_modes(struct detailed_timing *timing, void *c)
Adam Jackson9340d8c2009-12-03 17:44:40 -05002225{
Adam Jackson13931572010-08-03 14:38:19 -04002226 struct detailed_mode_closure *closure = c;
2227 struct detailed_non_pixel *data = &timing->data.other_data;
Adam Jacksonb309bd32012-04-13 16:33:40 -04002228 struct detailed_data_monitor_range *range = &data->data.range;
Adam Jackson9340d8c2009-12-03 17:44:40 -05002229
Adam Jacksoncb21aaf2012-04-13 16:33:36 -04002230 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2231 return;
2232
2233 closure->modes += drm_dmt_modes_for_range(closure->connector,
2234 closure->edid,
2235 timing);
Adam Jacksonb309bd32012-04-13 16:33:40 -04002236
2237 if (!version_greater(closure->edid, 1, 1))
2238 return; /* GTF not defined yet */
2239
2240 switch (range->flags) {
2241 case 0x02: /* secondary gtf, XXX could do more */
2242 case 0x00: /* default gtf */
2243 closure->modes += drm_gtf_modes_for_range(closure->connector,
2244 closure->edid,
2245 timing);
2246 break;
2247 case 0x04: /* cvt, only in 1.4+ */
2248 if (!version_greater(closure->edid, 1, 3))
2249 break;
2250
2251 closure->modes += drm_cvt_modes_for_range(closure->connector,
2252 closure->edid,
2253 timing);
2254 break;
2255 case 0x01: /* just the ranges, no formula */
2256 default:
2257 break;
2258 }
Adam Jackson9340d8c2009-12-03 17:44:40 -05002259}
2260
Adam Jackson13931572010-08-03 14:38:19 -04002261static int
2262add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2263{
2264 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002265 .connector = connector,
2266 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002267 };
2268
2269 if (version_greater(edid, 1, 0))
2270 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2271 &closure);
2272
2273 return closure.modes;
2274}
2275
Adam Jackson2255be12010-03-29 21:43:22 +00002276static int
2277drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2278{
2279 int i, j, m, modes = 0;
2280 struct drm_display_mode *mode;
Paul Parsonsf3a32d72016-03-26 13:18:38 +00002281 u8 *est = ((u8 *)timing) + 6;
Adam Jackson2255be12010-03-29 21:43:22 +00002282
2283 for (i = 0; i < 6; i++) {
Ville Syrjälä891a7462013-10-14 16:44:26 +03002284 for (j = 7; j >= 0; j--) {
Adam Jackson2255be12010-03-29 21:43:22 +00002285 m = (i * 8) + (7 - j);
Linus Torvaldsaa9f56b2010-08-12 09:21:39 -07002286 if (m >= ARRAY_SIZE(est3_modes))
Adam Jackson2255be12010-03-29 21:43:22 +00002287 break;
2288 if (est[i] & (1 << j)) {
Dave Airlie1d42bbc2010-05-07 05:02:30 +00002289 mode = drm_mode_find_dmt(connector->dev,
2290 est3_modes[m].w,
2291 est3_modes[m].h,
Adam Jacksonf6e252b2012-04-13 16:33:31 -04002292 est3_modes[m].r,
2293 est3_modes[m].rb);
Adam Jackson2255be12010-03-29 21:43:22 +00002294 if (mode) {
2295 drm_mode_probed_add(connector, mode);
2296 modes++;
2297 }
2298 }
2299 }
2300 }
2301
2302 return modes;
2303}
2304
Adam Jackson13931572010-08-03 14:38:19 -04002305static void
2306do_established_modes(struct detailed_timing *timing, void *c)
Adam Jackson9cf00972009-12-03 17:44:36 -05002307{
Adam Jackson13931572010-08-03 14:38:19 -04002308 struct detailed_mode_closure *closure = c;
Adam Jackson9cf00972009-12-03 17:44:36 -05002309 struct detailed_non_pixel *data = &timing->data.other_data;
Adam Jackson13931572010-08-03 14:38:19 -04002310
2311 if (data->type == EDID_DETAIL_EST_TIMINGS)
2312 closure->modes += drm_est3_modes(closure->connector, timing);
2313}
2314
2315/**
2316 * add_established_modes - get est. modes from EDID and add them
Thierry Redingdb6cf8332014-04-29 11:44:34 +02002317 * @connector: connector to add mode(s) to
Adam Jackson13931572010-08-03 14:38:19 -04002318 * @edid: EDID block to scan
2319 *
2320 * Each EDID block contains a bitmap of the supported "established modes" list
2321 * (defined above). Tease them out and add them to the global modes list.
2322 */
2323static int
2324add_established_modes(struct drm_connector *connector, struct edid *edid)
2325{
Adam Jackson9cf00972009-12-03 17:44:36 -05002326 struct drm_device *dev = connector->dev;
Adam Jackson13931572010-08-03 14:38:19 -04002327 unsigned long est_bits = edid->established_timings.t1 |
2328 (edid->established_timings.t2 << 8) |
2329 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2330 int i, modes = 0;
2331 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002332 .connector = connector,
2333 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002334 };
Adam Jackson9cf00972009-12-03 17:44:36 -05002335
Adam Jackson13931572010-08-03 14:38:19 -04002336 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2337 if (est_bits & (1<<i)) {
2338 struct drm_display_mode *newmode;
2339 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2340 if (newmode) {
2341 drm_mode_probed_add(connector, newmode);
2342 modes++;
2343 }
2344 }
Adam Jackson9cf00972009-12-03 17:44:36 -05002345 }
2346
Adam Jackson13931572010-08-03 14:38:19 -04002347 if (version_greater(edid, 1, 0))
2348 drm_for_each_detailed_block((u8 *)edid,
2349 do_established_modes, &closure);
2350
2351 return modes + closure.modes;
2352}
2353
2354static void
2355do_standard_modes(struct detailed_timing *timing, void *c)
2356{
2357 struct detailed_mode_closure *closure = c;
2358 struct detailed_non_pixel *data = &timing->data.other_data;
2359 struct drm_connector *connector = closure->connector;
2360 struct edid *edid = closure->edid;
2361
2362 if (data->type == EDID_DETAIL_STD_MODES) {
2363 int i;
Adam Jackson9cf00972009-12-03 17:44:36 -05002364 for (i = 0; i < 6; i++) {
2365 struct std_timing *std;
2366 struct drm_display_mode *newmode;
2367
2368 std = &data->data.timings[i];
Thierry Reding464fdec2014-04-29 11:44:33 +02002369 newmode = drm_mode_std(connector, edid, std);
Adam Jackson9cf00972009-12-03 17:44:36 -05002370 if (newmode) {
2371 drm_mode_probed_add(connector, newmode);
Adam Jackson13931572010-08-03 14:38:19 -04002372 closure->modes++;
Adam Jackson9cf00972009-12-03 17:44:36 -05002373 }
2374 }
Adam Jackson13931572010-08-03 14:38:19 -04002375 }
2376}
2377
2378/**
2379 * add_standard_modes - get std. modes from EDID and add them
Thierry Redingdb6cf8332014-04-29 11:44:34 +02002380 * @connector: connector to add mode(s) to
Adam Jackson13931572010-08-03 14:38:19 -04002381 * @edid: EDID block to scan
2382 *
2383 * Standard modes can be calculated using the appropriate standard (DMT,
2384 * GTF or CVT. Grab them from @edid and add them to the list.
2385 */
2386static int
2387add_standard_modes(struct drm_connector *connector, struct edid *edid)
2388{
2389 int i, modes = 0;
2390 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002391 .connector = connector,
2392 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002393 };
2394
2395 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2396 struct drm_display_mode *newmode;
2397
2398 newmode = drm_mode_std(connector, edid,
Thierry Reding464fdec2014-04-29 11:44:33 +02002399 &edid->standard_timings[i]);
Adam Jackson13931572010-08-03 14:38:19 -04002400 if (newmode) {
2401 drm_mode_probed_add(connector, newmode);
2402 modes++;
2403 }
2404 }
2405
2406 if (version_greater(edid, 1, 0))
2407 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2408 &closure);
2409
2410 /* XXX should also look for standard codes in VTB blocks */
2411
2412 return modes + closure.modes;
2413}
2414
Dave Airlief453ba02008-11-07 14:05:41 -08002415static int drm_cvt_modes(struct drm_connector *connector,
2416 struct detailed_timing *timing)
2417{
2418 int i, j, modes = 0;
2419 struct drm_display_mode *newmode;
2420 struct drm_device *dev = connector->dev;
Zhao Yakui5c612592009-06-22 13:17:10 +08002421 struct cvt_timing *cvt;
2422 const int rates[] = { 60, 85, 75, 60, 50 };
2423 const u8 empty[3] = { 0, 0, 0 };
Dave Airlief453ba02008-11-07 14:05:41 -08002424
2425 for (i = 0; i < 4; i++) {
2426 int uninitialized_var(width), height;
2427 cvt = &(timing->data.other_data.data.cvt[i]);
2428
2429 if (!memcmp(cvt->code, empty, 3))
Michel Dänzer0454bea2009-06-15 16:56:07 +02002430 continue;
Dave Airlief453ba02008-11-07 14:05:41 -08002431
2432 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
Zhao Yakui5c612592009-06-22 13:17:10 +08002433 switch (cvt->code[1] & 0x0c) {
Adam Jacksonf066a172009-09-23 17:31:21 -04002434 case 0x00:
Dave Airlief453ba02008-11-07 14:05:41 -08002435 width = height * 4 / 3;
2436 break;
2437 case 0x04:
2438 width = height * 16 / 9;
2439 break;
2440 case 0x08:
2441 width = height * 16 / 10;
2442 break;
2443 case 0x0c:
Dave Airlief453ba02008-11-07 14:05:41 -08002444 width = height * 15 / 9;
2445 break;
2446 }
2447
2448 for (j = 1; j < 5; j++) {
2449 if (cvt->code[2] & (1 << j)) {
2450 newmode = drm_cvt_mode(dev, width, height,
2451 rates[j], j == 0,
2452 false, false);
2453 if (newmode) {
2454 drm_mode_probed_add(connector, newmode);
2455 modes++;
2456 }
2457 }
2458 }
2459 }
2460
2461 return modes;
2462}
2463
Adam Jackson13931572010-08-03 14:38:19 -04002464static void
2465do_cvt_mode(struct detailed_timing *timing, void *c)
2466{
2467 struct detailed_mode_closure *closure = c;
2468 struct detailed_non_pixel *data = &timing->data.other_data;
2469
2470 if (data->type == EDID_DETAIL_CVT_3BYTE)
2471 closure->modes += drm_cvt_modes(closure->connector, timing);
2472}
Adam Jackson9cf00972009-12-03 17:44:36 -05002473
2474static int
Adam Jackson13931572010-08-03 14:38:19 -04002475add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2476{
2477 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002478 .connector = connector,
2479 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002480 };
Adam Jackson9cf00972009-12-03 17:44:36 -05002481
Adam Jackson13931572010-08-03 14:38:19 -04002482 if (version_greater(edid, 1, 2))
2483 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
Dave Airlief453ba02008-11-07 14:05:41 -08002484
Adam Jackson13931572010-08-03 14:38:19 -04002485 /* XXX should also look for CVT codes in VTB blocks */
2486
2487 return closure.modes;
Dave Airlief453ba02008-11-07 14:05:41 -08002488}
2489
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03002490static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2491
Adam Jackson13931572010-08-03 14:38:19 -04002492static void
2493do_detailed_mode(struct detailed_timing *timing, void *c)
Dave Airlief453ba02008-11-07 14:05:41 -08002494{
Adam Jackson13931572010-08-03 14:38:19 -04002495 struct detailed_mode_closure *closure = c;
Dave Airlief453ba02008-11-07 14:05:41 -08002496 struct drm_display_mode *newmode;
Adam Jackson9cf00972009-12-03 17:44:36 -05002497
2498 if (timing->pixel_clock) {
Adam Jackson13931572010-08-03 14:38:19 -04002499 newmode = drm_mode_detailed(closure->connector->dev,
2500 closure->edid, timing,
2501 closure->quirks);
Dave Airlief453ba02008-11-07 14:05:41 -08002502 if (!newmode)
Adam Jackson13931572010-08-03 14:38:19 -04002503 return;
Adam Jackson9cf00972009-12-03 17:44:36 -05002504
Adam Jackson13931572010-08-03 14:38:19 -04002505 if (closure->preferred)
Dave Airlief453ba02008-11-07 14:05:41 -08002506 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2507
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03002508 /*
2509 * Detailed modes are limited to 10kHz pixel clock resolution,
2510 * so fix up anything that looks like CEA/HDMI mode, but the clock
2511 * is just slightly off.
2512 */
2513 fixup_detailed_cea_mode_clock(newmode);
2514
Adam Jackson13931572010-08-03 14:38:19 -04002515 drm_mode_probed_add(closure->connector, newmode);
2516 closure->modes++;
2517 closure->preferred = 0;
Zhao Yakui882f0212009-08-26 18:20:49 +08002518 }
Ma Ling167f3a02009-03-20 14:09:48 +08002519}
2520
Adam Jackson13931572010-08-03 14:38:19 -04002521/*
2522 * add_detailed_modes - Add modes from detailed timings
Dave Airlief453ba02008-11-07 14:05:41 -08002523 * @connector: attached connector
2524 * @edid: EDID block to scan
2525 * @quirks: quirks to apply
Dave Airlief453ba02008-11-07 14:05:41 -08002526 */
Adam Jackson13931572010-08-03 14:38:19 -04002527static int
2528add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2529 u32 quirks)
Dave Airlief453ba02008-11-07 14:05:41 -08002530{
Adam Jackson13931572010-08-03 14:38:19 -04002531 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002532 .connector = connector,
2533 .edid = edid,
2534 .preferred = 1,
2535 .quirks = quirks,
Adam Jackson13931572010-08-03 14:38:19 -04002536 };
Dave Airlief453ba02008-11-07 14:05:41 -08002537
Adam Jackson13931572010-08-03 14:38:19 -04002538 if (closure.preferred && !version_greater(edid, 1, 3))
2539 closure.preferred =
2540 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
Adam Jacksona327f6b2010-03-29 21:43:25 +00002541
Adam Jackson13931572010-08-03 14:38:19 -04002542 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
Dave Airlief453ba02008-11-07 14:05:41 -08002543
Adam Jackson13931572010-08-03 14:38:19 -04002544 return closure.modes;
Zhao Yakui882f0212009-08-26 18:20:49 +08002545}
Dave Airlief453ba02008-11-07 14:05:41 -08002546
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002547#define AUDIO_BLOCK 0x01
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002548#define VIDEO_BLOCK 0x02
Ma Lingf23c20c2009-03-26 19:26:23 +08002549#define VENDOR_BLOCK 0x03
Wu Fengguang76adaa342011-09-05 14:23:20 +08002550#define SPEAKER_BLOCK 0x04
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02002551#define VIDEO_CAPABILITY_BLOCK 0x07
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002552#define EDID_BASIC_AUDIO (1 << 6)
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02002553#define EDID_CEA_YCRCB444 (1 << 5)
2554#define EDID_CEA_YCRCB422 (1 << 4)
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02002555#define EDID_CEA_VCDB_QS (1 << 6)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002556
Lespiau, Damiend4e4a312013-08-19 16:58:52 +01002557/*
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002558 * Search EDID for CEA extension block.
2559 */
Dave Airlie40d9b042014-10-20 16:29:33 +10002560static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002561{
2562 u8 *edid_ext = NULL;
2563 int i;
2564
2565 /* No EDID or EDID extensions */
2566 if (edid == NULL || edid->extensions == 0)
2567 return NULL;
2568
2569 /* Find CEA extension */
2570 for (i = 0; i < edid->extensions; i++) {
2571 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
Dave Airlie40d9b042014-10-20 16:29:33 +10002572 if (edid_ext[0] == ext_id)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002573 break;
2574 }
2575
2576 if (i == edid->extensions)
2577 return NULL;
2578
2579 return edid_ext;
2580}
2581
Dave Airlie40d9b042014-10-20 16:29:33 +10002582static u8 *drm_find_cea_extension(struct edid *edid)
2583{
2584 return drm_find_edid_extension(edid, CEA_EXT);
2585}
2586
2587static u8 *drm_find_displayid_extension(struct edid *edid)
2588{
2589 return drm_find_edid_extension(edid, DISPLAYID_EXT);
2590}
2591
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002592/*
2593 * Calculate the alternate clock for the CEA mode
2594 * (60Hz vs. 59.94Hz etc.)
2595 */
2596static unsigned int
2597cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2598{
2599 unsigned int clock = cea_mode->clock;
2600
2601 if (cea_mode->vrefresh % 6 != 0)
2602 return clock;
2603
2604 /*
2605 * edid_cea_modes contains the 59.94Hz
2606 * variant for 240 and 480 line modes,
2607 * and the 60Hz variant otherwise.
2608 */
2609 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
Ville Syrjälä9afd8082015-10-08 11:43:33 +03002610 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002611 else
Ville Syrjälä9afd8082015-10-08 11:43:33 +03002612 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002613
2614 return clock;
2615}
2616
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002617static bool
2618cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
2619{
2620 /*
2621 * For certain VICs the spec allows the vertical
2622 * front porch to vary by one or two lines.
2623 *
2624 * cea_modes[] stores the variant with the shortest
2625 * vertical front porch. We can adjust the mode to
2626 * get the other variants by simply increasing the
2627 * vertical front porch length.
2628 */
2629 BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
2630 edid_cea_modes[9].vtotal != 262 ||
2631 edid_cea_modes[12].vtotal != 262 ||
2632 edid_cea_modes[13].vtotal != 262 ||
2633 edid_cea_modes[23].vtotal != 312 ||
2634 edid_cea_modes[24].vtotal != 312 ||
2635 edid_cea_modes[27].vtotal != 312 ||
2636 edid_cea_modes[28].vtotal != 312);
2637
2638 if (((vic == 8 || vic == 9 ||
2639 vic == 12 || vic == 13) && mode->vtotal < 263) ||
2640 ((vic == 23 || vic == 24 ||
2641 vic == 27 || vic == 28) && mode->vtotal < 314)) {
2642 mode->vsync_start++;
2643 mode->vsync_end++;
2644 mode->vtotal++;
2645
2646 return true;
2647 }
2648
2649 return false;
2650}
2651
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002652static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2653 unsigned int clock_tolerance)
2654{
Jani Nikulad9278b42016-01-08 13:21:51 +02002655 u8 vic;
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002656
2657 if (!to_match->clock)
2658 return 0;
2659
Jani Nikulad9278b42016-01-08 13:21:51 +02002660 for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002661 struct drm_display_mode cea_mode = edid_cea_modes[vic];
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002662 unsigned int clock1, clock2;
2663
2664 /* Check both 60Hz and 59.94Hz */
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002665 clock1 = cea_mode.clock;
2666 clock2 = cea_mode_alternate_clock(&cea_mode);
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002667
2668 if (abs(to_match->clock - clock1) > clock_tolerance &&
2669 abs(to_match->clock - clock2) > clock_tolerance)
2670 continue;
2671
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002672 do {
2673 if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2674 return vic;
2675 } while (cea_mode_alternate_timings(vic, &cea_mode));
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002676 }
2677
2678 return 0;
2679}
2680
Thierry Reding18316c82012-12-20 15:41:44 +01002681/**
2682 * drm_match_cea_mode - look for a CEA mode matching given mode
2683 * @to_match: display mode
2684 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02002685 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
Thierry Reding18316c82012-12-20 15:41:44 +01002686 * mode.
Stephane Marchesina4799032012-11-09 16:21:05 +00002687 */
Thierry Reding18316c82012-12-20 15:41:44 +01002688u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
Stephane Marchesina4799032012-11-09 16:21:05 +00002689{
Jani Nikulad9278b42016-01-08 13:21:51 +02002690 u8 vic;
Stephane Marchesina4799032012-11-09 16:21:05 +00002691
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002692 if (!to_match->clock)
2693 return 0;
Stephane Marchesina4799032012-11-09 16:21:05 +00002694
Jani Nikulad9278b42016-01-08 13:21:51 +02002695 for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002696 struct drm_display_mode cea_mode = edid_cea_modes[vic];
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002697 unsigned int clock1, clock2;
2698
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002699 /* Check both 60Hz and 59.94Hz */
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002700 clock1 = cea_mode.clock;
2701 clock2 = cea_mode_alternate_clock(&cea_mode);
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002702
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002703 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) &&
2704 KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2))
2705 continue;
2706
2707 do {
2708 if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2709 return vic;
2710 } while (cea_mode_alternate_timings(vic, &cea_mode));
Stephane Marchesina4799032012-11-09 16:21:05 +00002711 }
Ville Syrjäläc45a4e42016-11-03 14:53:29 +02002712
Stephane Marchesina4799032012-11-09 16:21:05 +00002713 return 0;
2714}
2715EXPORT_SYMBOL(drm_match_cea_mode);
2716
Jani Nikulad9278b42016-01-08 13:21:51 +02002717static bool drm_valid_cea_vic(u8 vic)
2718{
2719 return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
2720}
2721
Vandana Kannan0967e6a2014-04-01 16:26:59 +05302722/**
2723 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2724 * the input VIC from the CEA mode list
2725 * @video_code: ID given to each of the CEA modes
2726 *
2727 * Returns picture aspect ratio
2728 */
2729enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2730{
Jani Nikulad9278b42016-01-08 13:21:51 +02002731 return edid_cea_modes[video_code].picture_aspect_ratio;
Vandana Kannan0967e6a2014-04-01 16:26:59 +05302732}
2733EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2734
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002735/*
2736 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2737 * specific block).
2738 *
2739 * It's almost like cea_mode_alternate_clock(), we just need to add an
2740 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2741 * one.
2742 */
2743static unsigned int
2744hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2745{
2746 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2747 return hdmi_mode->clock;
2748
2749 return cea_mode_alternate_clock(hdmi_mode);
2750}
2751
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002752static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
2753 unsigned int clock_tolerance)
2754{
Jani Nikulad9278b42016-01-08 13:21:51 +02002755 u8 vic;
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002756
2757 if (!to_match->clock)
2758 return 0;
2759
Jani Nikulad9278b42016-01-08 13:21:51 +02002760 for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2761 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002762 unsigned int clock1, clock2;
2763
2764 /* Make sure to also match alternate clocks */
2765 clock1 = hdmi_mode->clock;
2766 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2767
2768 if (abs(to_match->clock - clock1) > clock_tolerance &&
2769 abs(to_match->clock - clock2) > clock_tolerance)
2770 continue;
2771
2772 if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
Jani Nikulad9278b42016-01-08 13:21:51 +02002773 return vic;
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002774 }
2775
2776 return 0;
2777}
2778
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002779/*
2780 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2781 * @to_match: display mode
2782 *
2783 * An HDMI mode is one defined in the HDMI vendor specific block.
2784 *
2785 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2786 */
2787static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2788{
Jani Nikulad9278b42016-01-08 13:21:51 +02002789 u8 vic;
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002790
2791 if (!to_match->clock)
2792 return 0;
2793
Jani Nikulad9278b42016-01-08 13:21:51 +02002794 for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2795 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002796 unsigned int clock1, clock2;
2797
2798 /* Make sure to also match alternate clocks */
2799 clock1 = hdmi_mode->clock;
2800 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2801
2802 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2803 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
Damien Lespiauf2ecf2e32013-09-25 16:45:27 +01002804 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
Jani Nikulad9278b42016-01-08 13:21:51 +02002805 return vic;
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002806 }
2807 return 0;
2808}
2809
Jani Nikulad9278b42016-01-08 13:21:51 +02002810static bool drm_valid_hdmi_vic(u8 vic)
2811{
2812 return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
2813}
2814
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002815static int
2816add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2817{
2818 struct drm_device *dev = connector->dev;
2819 struct drm_display_mode *mode, *tmp;
2820 LIST_HEAD(list);
2821 int modes = 0;
2822
2823 /* Don't add CEA modes if the CEA extension block is missing */
2824 if (!drm_find_cea_extension(edid))
2825 return 0;
2826
2827 /*
2828 * Go through all probed modes and create a new mode
2829 * with the alternate clock for certain CEA modes.
2830 */
2831 list_for_each_entry(mode, &connector->probed_modes, head) {
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002832 const struct drm_display_mode *cea_mode = NULL;
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002833 struct drm_display_mode *newmode;
Jani Nikulad9278b42016-01-08 13:21:51 +02002834 u8 vic = drm_match_cea_mode(mode);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002835 unsigned int clock1, clock2;
2836
Jani Nikulad9278b42016-01-08 13:21:51 +02002837 if (drm_valid_cea_vic(vic)) {
2838 cea_mode = &edid_cea_modes[vic];
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002839 clock2 = cea_mode_alternate_clock(cea_mode);
2840 } else {
Jani Nikulad9278b42016-01-08 13:21:51 +02002841 vic = drm_match_hdmi_mode(mode);
2842 if (drm_valid_hdmi_vic(vic)) {
2843 cea_mode = &edid_4k_modes[vic];
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002844 clock2 = hdmi_mode_alternate_clock(cea_mode);
2845 }
2846 }
2847
2848 if (!cea_mode)
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002849 continue;
2850
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002851 clock1 = cea_mode->clock;
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002852
2853 if (clock1 == clock2)
2854 continue;
2855
2856 if (mode->clock != clock1 && mode->clock != clock2)
2857 continue;
2858
2859 newmode = drm_mode_duplicate(dev, cea_mode);
2860 if (!newmode)
2861 continue;
2862
Damien Lespiau27130212013-09-25 16:45:28 +01002863 /* Carry over the stereo flags */
2864 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2865
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002866 /*
2867 * The current mode could be either variant. Make
2868 * sure to pick the "other" clock for the new mode.
2869 */
2870 if (mode->clock != clock1)
2871 newmode->clock = clock1;
2872 else
2873 newmode->clock = clock2;
2874
2875 list_add_tail(&newmode->head, &list);
2876 }
2877
2878 list_for_each_entry_safe(mode, tmp, &list, head) {
2879 list_del(&mode->head);
2880 drm_mode_probed_add(connector, mode);
2881 modes++;
2882 }
2883
2884 return modes;
2885}
Stephane Marchesina4799032012-11-09 16:21:05 +00002886
Thomas Woodaff04ac2013-11-29 15:33:27 +00002887static struct drm_display_mode *
2888drm_display_mode_from_vic_index(struct drm_connector *connector,
2889 const u8 *video_db, u8 video_len,
2890 u8 video_index)
2891{
2892 struct drm_device *dev = connector->dev;
2893 struct drm_display_mode *newmode;
Jani Nikulad9278b42016-01-08 13:21:51 +02002894 u8 vic;
Thomas Woodaff04ac2013-11-29 15:33:27 +00002895
2896 if (video_db == NULL || video_index >= video_len)
2897 return NULL;
2898
2899 /* CEA modes are numbered 1..127 */
Jani Nikulad9278b42016-01-08 13:21:51 +02002900 vic = (video_db[video_index] & 127);
2901 if (!drm_valid_cea_vic(vic))
Thomas Woodaff04ac2013-11-29 15:33:27 +00002902 return NULL;
2903
Jani Nikulad9278b42016-01-08 13:21:51 +02002904 newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
Damien Lespiau409bbf12014-03-03 23:59:07 +00002905 if (!newmode)
2906 return NULL;
2907
Thomas Woodaff04ac2013-11-29 15:33:27 +00002908 newmode->vrefresh = 0;
2909
2910 return newmode;
2911}
2912
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002913static int
Lespiau, Damien13ac3f52013-08-19 16:58:53 +01002914do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002915{
Thomas Woodaff04ac2013-11-29 15:33:27 +00002916 int i, modes = 0;
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002917
Thomas Woodaff04ac2013-11-29 15:33:27 +00002918 for (i = 0; i < len; i++) {
2919 struct drm_display_mode *mode;
2920 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2921 if (mode) {
2922 drm_mode_probed_add(connector, mode);
2923 modes++;
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002924 }
2925 }
2926
2927 return modes;
2928}
2929
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002930struct stereo_mandatory_mode {
2931 int width, height, vrefresh;
2932 unsigned int flags;
2933};
2934
2935static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002936 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2937 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002938 { 1920, 1080, 50,
2939 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2940 { 1920, 1080, 60,
2941 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002942 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2943 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2944 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2945 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002946};
2947
2948static bool
2949stereo_match_mandatory(const struct drm_display_mode *mode,
2950 const struct stereo_mandatory_mode *stereo_mode)
2951{
2952 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2953
2954 return mode->hdisplay == stereo_mode->width &&
2955 mode->vdisplay == stereo_mode->height &&
2956 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2957 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2958}
2959
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002960static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2961{
2962 struct drm_device *dev = connector->dev;
2963 const struct drm_display_mode *mode;
2964 struct list_head stereo_modes;
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002965 int modes = 0, i;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002966
2967 INIT_LIST_HEAD(&stereo_modes);
2968
2969 list_for_each_entry(mode, &connector->probed_modes, head) {
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002970 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2971 const struct stereo_mandatory_mode *mandatory;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002972 struct drm_display_mode *new_mode;
2973
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002974 if (!stereo_match_mandatory(mode,
2975 &stereo_mandatory_modes[i]))
2976 continue;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002977
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002978 mandatory = &stereo_mandatory_modes[i];
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002979 new_mode = drm_mode_duplicate(dev, mode);
2980 if (!new_mode)
2981 continue;
2982
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002983 new_mode->flags |= mandatory->flags;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002984 list_add_tail(&new_mode->head, &stereo_modes);
2985 modes++;
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002986 }
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002987 }
2988
2989 list_splice_tail(&stereo_modes, &connector->probed_modes);
2990
2991 return modes;
2992}
2993
Damien Lespiau1deee8d2013-09-25 16:45:24 +01002994static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2995{
2996 struct drm_device *dev = connector->dev;
2997 struct drm_display_mode *newmode;
2998
Jani Nikulad9278b42016-01-08 13:21:51 +02002999 if (!drm_valid_hdmi_vic(vic)) {
Damien Lespiau1deee8d2013-09-25 16:45:24 +01003000 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
3001 return 0;
3002 }
3003
3004 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
3005 if (!newmode)
3006 return 0;
3007
3008 drm_mode_probed_add(connector, newmode);
3009
3010 return 1;
3011}
3012
Thomas Woodfbf46022013-10-16 15:58:50 +01003013static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
3014 const u8 *video_db, u8 video_len, u8 video_index)
3015{
Thomas Woodfbf46022013-10-16 15:58:50 +01003016 struct drm_display_mode *newmode;
3017 int modes = 0;
Thomas Woodfbf46022013-10-16 15:58:50 +01003018
3019 if (structure & (1 << 0)) {
Thomas Woodaff04ac2013-11-29 15:33:27 +00003020 newmode = drm_display_mode_from_vic_index(connector, video_db,
3021 video_len,
3022 video_index);
Thomas Woodfbf46022013-10-16 15:58:50 +01003023 if (newmode) {
3024 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
3025 drm_mode_probed_add(connector, newmode);
3026 modes++;
3027 }
3028 }
3029 if (structure & (1 << 6)) {
Thomas Woodaff04ac2013-11-29 15:33:27 +00003030 newmode = drm_display_mode_from_vic_index(connector, video_db,
3031 video_len,
3032 video_index);
Thomas Woodfbf46022013-10-16 15:58:50 +01003033 if (newmode) {
3034 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3035 drm_mode_probed_add(connector, newmode);
3036 modes++;
3037 }
3038 }
3039 if (structure & (1 << 8)) {
Thomas Woodaff04ac2013-11-29 15:33:27 +00003040 newmode = drm_display_mode_from_vic_index(connector, video_db,
3041 video_len,
3042 video_index);
Thomas Woodfbf46022013-10-16 15:58:50 +01003043 if (newmode) {
Thomas Wood89570ee2013-11-28 15:35:04 +00003044 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
Thomas Woodfbf46022013-10-16 15:58:50 +01003045 drm_mode_probed_add(connector, newmode);
3046 modes++;
3047 }
3048 }
3049
3050 return modes;
3051}
3052
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003053/*
3054 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
3055 * @connector: connector corresponding to the HDMI sink
3056 * @db: start of the CEA vendor specific block
3057 * @len: length of the CEA block payload, ie. one can access up to db[len]
3058 *
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003059 * Parses the HDMI VSDB looking for modes to add to @connector. This function
3060 * also adds the stereo 3d modes when applicable.
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003061 */
3062static int
Thomas Woodfbf46022013-10-16 15:58:50 +01003063do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
3064 const u8 *video_db, u8 video_len)
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003065{
Thomas Wood0e5083aa2013-11-29 18:18:58 +00003066 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
Thomas Woodfbf46022013-10-16 15:58:50 +01003067 u8 vic_len, hdmi_3d_len = 0;
3068 u16 mask;
3069 u16 structure_all;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003070
3071 if (len < 8)
3072 goto out;
3073
3074 /* no HDMI_Video_Present */
3075 if (!(db[8] & (1 << 5)))
3076 goto out;
3077
3078 /* Latency_Fields_Present */
3079 if (db[8] & (1 << 7))
3080 offset += 2;
3081
3082 /* I_Latency_Fields_Present */
3083 if (db[8] & (1 << 6))
3084 offset += 2;
3085
3086 /* the declared length is not long enough for the 2 first bytes
3087 * of additional video format capabilities */
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003088 if (len < (8 + offset + 2))
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003089 goto out;
3090
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003091 /* 3D_Present */
3092 offset++;
Thomas Woodfbf46022013-10-16 15:58:50 +01003093 if (db[8 + offset] & (1 << 7)) {
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003094 modes += add_hdmi_mandatory_stereo_modes(connector);
3095
Thomas Woodfbf46022013-10-16 15:58:50 +01003096 /* 3D_Multi_present */
3097 multi_present = (db[8 + offset] & 0x60) >> 5;
3098 }
3099
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003100 offset++;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003101 vic_len = db[8 + offset] >> 5;
Thomas Woodfbf46022013-10-16 15:58:50 +01003102 hdmi_3d_len = db[8 + offset] & 0x1f;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003103
3104 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003105 u8 vic;
3106
3107 vic = db[9 + offset + i];
Damien Lespiau1deee8d2013-09-25 16:45:24 +01003108 modes += add_hdmi_mode(connector, vic);
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003109 }
Thomas Woodfbf46022013-10-16 15:58:50 +01003110 offset += 1 + vic_len;
3111
Thomas Wood0e5083aa2013-11-29 18:18:58 +00003112 if (multi_present == 1)
3113 multi_len = 2;
3114 else if (multi_present == 2)
3115 multi_len = 4;
Thomas Woodfbf46022013-10-16 15:58:50 +01003116 else
Thomas Wood0e5083aa2013-11-29 18:18:58 +00003117 multi_len = 0;
Thomas Woodfbf46022013-10-16 15:58:50 +01003118
Thomas Wood0e5083aa2013-11-29 18:18:58 +00003119 if (len < (8 + offset + hdmi_3d_len - 1))
3120 goto out;
3121
3122 if (hdmi_3d_len < multi_len)
3123 goto out;
3124
3125 if (multi_present == 1 || multi_present == 2) {
3126 /* 3D_Structure_ALL */
3127 structure_all = (db[8 + offset] << 8) | db[9 + offset];
3128
3129 /* check if 3D_MASK is present */
3130 if (multi_present == 2)
3131 mask = (db[10 + offset] << 8) | db[11 + offset];
3132 else
3133 mask = 0xffff;
3134
3135 for (i = 0; i < 16; i++) {
3136 if (mask & (1 << i))
3137 modes += add_3d_struct_modes(connector,
3138 structure_all,
3139 video_db,
3140 video_len, i);
3141 }
3142 }
3143
3144 offset += multi_len;
3145
3146 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
3147 int vic_index;
3148 struct drm_display_mode *newmode = NULL;
3149 unsigned int newflag = 0;
3150 bool detail_present;
3151
3152 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
3153
3154 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
3155 break;
3156
3157 /* 2D_VIC_order_X */
3158 vic_index = db[8 + offset + i] >> 4;
3159
3160 /* 3D_Structure_X */
3161 switch (db[8 + offset + i] & 0x0f) {
3162 case 0:
3163 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
3164 break;
3165 case 6:
3166 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3167 break;
3168 case 8:
3169 /* 3D_Detail_X */
3170 if ((db[9 + offset + i] >> 4) == 1)
3171 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3172 break;
3173 }
3174
3175 if (newflag != 0) {
3176 newmode = drm_display_mode_from_vic_index(connector,
3177 video_db,
3178 video_len,
3179 vic_index);
3180
3181 if (newmode) {
3182 newmode->flags |= newflag;
3183 drm_mode_probed_add(connector, newmode);
3184 modes++;
3185 }
3186 }
3187
3188 if (detail_present)
3189 i++;
Thomas Woodfbf46022013-10-16 15:58:50 +01003190 }
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003191
3192out:
3193 return modes;
3194}
3195
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003196static int
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003197cea_db_payload_len(const u8 *db)
3198{
3199 return db[0] & 0x1f;
3200}
3201
3202static int
3203cea_db_tag(const u8 *db)
3204{
3205 return db[0] >> 5;
3206}
3207
3208static int
3209cea_revision(const u8 *cea)
3210{
3211 return cea[1];
3212}
3213
3214static int
3215cea_db_offsets(const u8 *cea, int *start, int *end)
3216{
3217 /* Data block offset in CEA extension block */
3218 *start = 4;
3219 *end = cea[2];
3220 if (*end == 0)
3221 *end = 127;
3222 if (*end < 4 || *end > 127)
3223 return -ERANGE;
3224 return 0;
3225}
3226
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003227static bool cea_db_is_hdmi_vsdb(const u8 *db)
3228{
3229 int hdmi_id;
3230
3231 if (cea_db_tag(db) != VENDOR_BLOCK)
3232 return false;
3233
3234 if (cea_db_payload_len(db) < 5)
3235 return false;
3236
3237 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3238
Lespiau, Damien6cb3b7f2013-08-19 16:59:05 +01003239 return hdmi_id == HDMI_IEEE_OUI;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003240}
3241
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003242#define for_each_cea_db(cea, i, start, end) \
3243 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3244
3245static int
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003246add_cea_modes(struct drm_connector *connector, struct edid *edid)
3247{
Lespiau, Damien13ac3f52013-08-19 16:58:53 +01003248 const u8 *cea = drm_find_cea_extension(edid);
Thomas Woodfbf46022013-10-16 15:58:50 +01003249 const u8 *db, *hdmi = NULL, *video = NULL;
3250 u8 dbl, hdmi_len, video_len = 0;
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003251 int modes = 0;
3252
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003253 if (cea && cea_revision(cea) >= 3) {
3254 int i, start, end;
3255
3256 if (cea_db_offsets(cea, &start, &end))
3257 return 0;
3258
3259 for_each_cea_db(cea, i, start, end) {
3260 db = &cea[i];
3261 dbl = cea_db_payload_len(db);
3262
Thomas Woodfbf46022013-10-16 15:58:50 +01003263 if (cea_db_tag(db) == VIDEO_BLOCK) {
3264 video = db + 1;
3265 video_len = dbl;
3266 modes += do_cea_modes(connector, video, dbl);
3267 }
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003268 else if (cea_db_is_hdmi_vsdb(db)) {
3269 hdmi = db;
3270 hdmi_len = dbl;
3271 }
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003272 }
3273 }
3274
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003275 /*
3276 * We parse the HDMI VSDB after having added the cea modes as we will
3277 * be patching their flags when the sink supports stereo 3D.
3278 */
3279 if (hdmi)
Thomas Woodfbf46022013-10-16 15:58:50 +01003280 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3281 video_len);
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003282
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003283 return modes;
3284}
3285
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003286static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3287{
3288 const struct drm_display_mode *cea_mode;
3289 int clock1, clock2, clock;
Jani Nikulad9278b42016-01-08 13:21:51 +02003290 u8 vic;
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003291 const char *type;
3292
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02003293 /*
3294 * allow 5kHz clock difference either way to account for
3295 * the 10kHz clock resolution limit of detailed timings.
3296 */
Jani Nikulad9278b42016-01-08 13:21:51 +02003297 vic = drm_match_cea_mode_clock_tolerance(mode, 5);
3298 if (drm_valid_cea_vic(vic)) {
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003299 type = "CEA";
Jani Nikulad9278b42016-01-08 13:21:51 +02003300 cea_mode = &edid_cea_modes[vic];
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003301 clock1 = cea_mode->clock;
3302 clock2 = cea_mode_alternate_clock(cea_mode);
3303 } else {
Jani Nikulad9278b42016-01-08 13:21:51 +02003304 vic = drm_match_hdmi_mode_clock_tolerance(mode, 5);
3305 if (drm_valid_hdmi_vic(vic)) {
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003306 type = "HDMI";
Jani Nikulad9278b42016-01-08 13:21:51 +02003307 cea_mode = &edid_4k_modes[vic];
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003308 clock1 = cea_mode->clock;
3309 clock2 = hdmi_mode_alternate_clock(cea_mode);
3310 } else {
3311 return;
3312 }
3313 }
3314
3315 /* pick whichever is closest */
3316 if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3317 clock = clock1;
3318 else
3319 clock = clock2;
3320
3321 if (mode->clock == clock)
3322 return;
3323
3324 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
Jani Nikulad9278b42016-01-08 13:21:51 +02003325 type, vic, mode->clock, clock);
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003326 mode->clock = clock;
3327}
3328
Wu Fengguang76adaa342011-09-05 14:23:20 +08003329static void
Ville Syrjälä23ebf8b2016-09-28 16:51:41 +03003330drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)
Wu Fengguang76adaa342011-09-05 14:23:20 +08003331{
Ville Syrjälä85040722012-08-16 14:55:05 +00003332 u8 len = cea_db_payload_len(db);
Wu Fengguang76adaa342011-09-05 14:23:20 +08003333
Ville Syrjälä23ebf8b2016-09-28 16:51:41 +03003334 if (len >= 6)
Ville Syrjälä85040722012-08-16 14:55:05 +00003335 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
Ville Syrjälä85040722012-08-16 14:55:05 +00003336 if (len >= 8) {
3337 connector->latency_present[0] = db[8] >> 7;
3338 connector->latency_present[1] = (db[8] >> 6) & 1;
3339 }
3340 if (len >= 9)
3341 connector->video_latency[0] = db[9];
3342 if (len >= 10)
3343 connector->audio_latency[0] = db[10];
3344 if (len >= 11)
3345 connector->video_latency[1] = db[11];
3346 if (len >= 12)
3347 connector->audio_latency[1] = db[12];
Wu Fengguang76adaa342011-09-05 14:23:20 +08003348
Ville Syrjälä23ebf8b2016-09-28 16:51:41 +03003349 DRM_DEBUG_KMS("HDMI: latency present %d %d, "
3350 "video latency %d %d, "
3351 "audio latency %d %d\n",
3352 connector->latency_present[0],
3353 connector->latency_present[1],
3354 connector->video_latency[0],
3355 connector->video_latency[1],
3356 connector->audio_latency[0],
3357 connector->audio_latency[1]);
Wu Fengguang76adaa342011-09-05 14:23:20 +08003358}
3359
3360static void
3361monitor_name(struct detailed_timing *t, void *data)
3362{
3363 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3364 *(u8 **)data = t->data.other_data.data.str.str;
3365}
3366
Jim Bride59f7c0f2016-04-14 10:18:35 -07003367static int get_monitor_name(struct edid *edid, char name[13])
3368{
3369 char *edid_name = NULL;
3370 int mnl;
3371
3372 if (!edid || !name)
3373 return 0;
3374
3375 drm_for_each_detailed_block((u8 *)edid, monitor_name, &edid_name);
3376 for (mnl = 0; edid_name && mnl < 13; mnl++) {
3377 if (edid_name[mnl] == 0x0a)
3378 break;
3379
3380 name[mnl] = edid_name[mnl];
3381 }
3382
3383 return mnl;
3384}
3385
3386/**
3387 * drm_edid_get_monitor_name - fetch the monitor name from the edid
3388 * @edid: monitor EDID information
3389 * @name: pointer to a character array to hold the name of the monitor
3390 * @bufsize: The size of the name buffer (should be at least 14 chars.)
3391 *
3392 */
3393void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
3394{
3395 int name_length;
3396 char buf[13];
3397
3398 if (bufsize <= 0)
3399 return;
3400
3401 name_length = min(get_monitor_name(edid, buf), bufsize - 1);
3402 memcpy(name, buf, name_length);
3403 name[name_length] = '\0';
3404}
3405EXPORT_SYMBOL(drm_edid_get_monitor_name);
3406
Wu Fengguang76adaa342011-09-05 14:23:20 +08003407/**
3408 * drm_edid_to_eld - build ELD from EDID
3409 * @connector: connector corresponding to the HDMI/DP sink
3410 * @edid: EDID to parse
3411 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003412 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3413 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3414 * fill in.
Wu Fengguang76adaa342011-09-05 14:23:20 +08003415 */
3416void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3417{
3418 uint8_t *eld = connector->eld;
3419 u8 *cea;
Wu Fengguang76adaa342011-09-05 14:23:20 +08003420 u8 *db;
Ville Syrjälä7c018782016-03-09 22:07:46 +02003421 int total_sad_count = 0;
Wu Fengguang76adaa342011-09-05 14:23:20 +08003422 int mnl;
3423 int dbl;
3424
3425 memset(eld, 0, sizeof(connector->eld));
3426
Ville Syrjälä85c91582016-09-28 16:51:34 +03003427 connector->latency_present[0] = false;
3428 connector->latency_present[1] = false;
3429 connector->video_latency[0] = 0;
3430 connector->audio_latency[0] = 0;
3431 connector->video_latency[1] = 0;
3432 connector->audio_latency[1] = 0;
3433
Wu Fengguang76adaa342011-09-05 14:23:20 +08003434 cea = drm_find_cea_extension(edid);
3435 if (!cea) {
3436 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3437 return;
3438 }
3439
Jim Bride59f7c0f2016-04-14 10:18:35 -07003440 mnl = get_monitor_name(edid, eld + 20);
3441
Wu Fengguang76adaa342011-09-05 14:23:20 +08003442 eld[4] = (cea[1] << 5) | mnl;
3443 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3444
3445 eld[0] = 2 << 3; /* ELD version: 2 */
3446
3447 eld[16] = edid->mfg_id[0];
3448 eld[17] = edid->mfg_id[1];
3449 eld[18] = edid->prod_code[0];
3450 eld[19] = edid->prod_code[1];
3451
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003452 if (cea_revision(cea) >= 3) {
3453 int i, start, end;
3454
3455 if (cea_db_offsets(cea, &start, &end)) {
3456 start = 0;
3457 end = 0;
3458 }
3459
3460 for_each_cea_db(cea, i, start, end) {
3461 db = &cea[i];
3462 dbl = cea_db_payload_len(db);
3463
3464 switch (cea_db_tag(db)) {
Ville Syrjälä7c018782016-03-09 22:07:46 +02003465 int sad_count;
3466
Christian Schmidta0ab7342011-12-19 20:03:38 +01003467 case AUDIO_BLOCK:
3468 /* Audio Data Block, contains SADs */
Ville Syrjälä7c018782016-03-09 22:07:46 +02003469 sad_count = min(dbl / 3, 15 - total_sad_count);
3470 if (sad_count >= 1)
3471 memcpy(eld + 20 + mnl + total_sad_count * 3,
3472 &db[1], sad_count * 3);
3473 total_sad_count += sad_count;
Christian Schmidta0ab7342011-12-19 20:03:38 +01003474 break;
3475 case SPEAKER_BLOCK:
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003476 /* Speaker Allocation Data Block */
3477 if (dbl >= 1)
3478 eld[7] = db[1];
Christian Schmidta0ab7342011-12-19 20:03:38 +01003479 break;
3480 case VENDOR_BLOCK:
3481 /* HDMI Vendor-Specific Data Block */
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003482 if (cea_db_is_hdmi_vsdb(db))
Ville Syrjälä23ebf8b2016-09-28 16:51:41 +03003483 drm_parse_hdmi_vsdb_audio(connector, db);
Christian Schmidta0ab7342011-12-19 20:03:38 +01003484 break;
3485 default:
3486 break;
3487 }
Wu Fengguang76adaa342011-09-05 14:23:20 +08003488 }
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003489 }
Ville Syrjälä7c018782016-03-09 22:07:46 +02003490 eld[5] |= total_sad_count << 4;
Wu Fengguang76adaa342011-09-05 14:23:20 +08003491
Jani Nikula938fd8a2014-10-28 16:20:48 +02003492 eld[DRM_ELD_BASELINE_ELD_LEN] =
3493 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3494
3495 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
Ville Syrjälä7c018782016-03-09 22:07:46 +02003496 drm_eld_size(eld), total_sad_count);
Wu Fengguang76adaa342011-09-05 14:23:20 +08003497}
3498EXPORT_SYMBOL(drm_edid_to_eld);
3499
3500/**
Rafał Miłeckife214162013-04-19 19:01:25 +02003501 * drm_edid_to_sad - extracts SADs from EDID
3502 * @edid: EDID to parse
3503 * @sads: pointer that will be set to the extracted SADs
3504 *
3505 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
Rafał Miłeckife214162013-04-19 19:01:25 +02003506 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003507 * Note: The returned pointer needs to be freed using kfree().
3508 *
3509 * Return: The number of found SADs or negative number on error.
Rafał Miłeckife214162013-04-19 19:01:25 +02003510 */
3511int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3512{
3513 int count = 0;
3514 int i, start, end, dbl;
3515 u8 *cea;
3516
3517 cea = drm_find_cea_extension(edid);
3518 if (!cea) {
3519 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3520 return -ENOENT;
3521 }
3522
3523 if (cea_revision(cea) < 3) {
3524 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3525 return -ENOTSUPP;
3526 }
3527
3528 if (cea_db_offsets(cea, &start, &end)) {
3529 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3530 return -EPROTO;
3531 }
3532
3533 for_each_cea_db(cea, i, start, end) {
3534 u8 *db = &cea[i];
3535
3536 if (cea_db_tag(db) == AUDIO_BLOCK) {
3537 int j;
3538 dbl = cea_db_payload_len(db);
3539
3540 count = dbl / 3; /* SAD is 3B */
3541 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3542 if (!*sads)
3543 return -ENOMEM;
3544 for (j = 0; j < count; j++) {
3545 u8 *sad = &db[1 + j * 3];
3546
3547 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3548 (*sads)[j].channels = sad[0] & 0x7;
3549 (*sads)[j].freq = sad[1] & 0x7F;
3550 (*sads)[j].byte2 = sad[2];
3551 }
3552 break;
3553 }
3554 }
3555
3556 return count;
3557}
3558EXPORT_SYMBOL(drm_edid_to_sad);
3559
3560/**
Alex Deucherd105f472013-07-25 15:55:32 -04003561 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3562 * @edid: EDID to parse
3563 * @sadb: pointer to the speaker block
3564 *
3565 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
Alex Deucherd105f472013-07-25 15:55:32 -04003566 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003567 * Note: The returned pointer needs to be freed using kfree().
3568 *
3569 * Return: The number of found Speaker Allocation Blocks or negative number on
3570 * error.
Alex Deucherd105f472013-07-25 15:55:32 -04003571 */
3572int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3573{
3574 int count = 0;
3575 int i, start, end, dbl;
3576 const u8 *cea;
3577
3578 cea = drm_find_cea_extension(edid);
3579 if (!cea) {
3580 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3581 return -ENOENT;
3582 }
3583
3584 if (cea_revision(cea) < 3) {
3585 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3586 return -ENOTSUPP;
3587 }
3588
3589 if (cea_db_offsets(cea, &start, &end)) {
3590 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3591 return -EPROTO;
3592 }
3593
3594 for_each_cea_db(cea, i, start, end) {
3595 const u8 *db = &cea[i];
3596
3597 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3598 dbl = cea_db_payload_len(db);
3599
3600 /* Speaker Allocation Data Block */
3601 if (dbl == 3) {
Benoit Taine89086bc2014-05-26 17:21:22 +02003602 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
Alex Deucher618e3772013-09-27 18:46:09 -04003603 if (!*sadb)
3604 return -ENOMEM;
Alex Deucherd105f472013-07-25 15:55:32 -04003605 count = dbl;
3606 break;
3607 }
3608 }
3609 }
3610
3611 return count;
3612}
3613EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3614
3615/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003616 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
Wu Fengguang76adaa342011-09-05 14:23:20 +08003617 * @connector: connector associated with the HDMI/DP sink
3618 * @mode: the display mode
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003619 *
3620 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3621 * the sink doesn't support audio or video.
Wu Fengguang76adaa342011-09-05 14:23:20 +08003622 */
3623int drm_av_sync_delay(struct drm_connector *connector,
Ville Syrjälä3a818d32015-09-07 18:22:58 +03003624 const struct drm_display_mode *mode)
Wu Fengguang76adaa342011-09-05 14:23:20 +08003625{
3626 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3627 int a, v;
3628
3629 if (!connector->latency_present[0])
3630 return 0;
3631 if (!connector->latency_present[1])
3632 i = 0;
3633
3634 a = connector->audio_latency[i];
3635 v = connector->video_latency[i];
3636
3637 /*
3638 * HDMI/DP sink doesn't support audio or video?
3639 */
3640 if (a == 255 || v == 255)
3641 return 0;
3642
3643 /*
3644 * Convert raw EDID values to millisecond.
3645 * Treat unknown latency as 0ms.
3646 */
3647 if (a)
3648 a = min(2 * (a - 1), 500);
3649 if (v)
3650 v = min(2 * (v - 1), 500);
3651
3652 return max(v - a, 0);
3653}
3654EXPORT_SYMBOL(drm_av_sync_delay);
3655
3656/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003657 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
Ma Lingf23c20c2009-03-26 19:26:23 +08003658 * @edid: monitor EDID information
3659 *
3660 * Parse the CEA extension according to CEA-861-B.
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003661 *
3662 * Return: True if the monitor is HDMI, false if not or unknown.
Ma Lingf23c20c2009-03-26 19:26:23 +08003663 */
3664bool drm_detect_hdmi_monitor(struct edid *edid)
3665{
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003666 u8 *edid_ext;
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003667 int i;
Ma Lingf23c20c2009-03-26 19:26:23 +08003668 int start_offset, end_offset;
Ma Lingf23c20c2009-03-26 19:26:23 +08003669
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003670 edid_ext = drm_find_cea_extension(edid);
3671 if (!edid_ext)
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003672 return false;
Ma Lingf23c20c2009-03-26 19:26:23 +08003673
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003674 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003675 return false;
Ma Lingf23c20c2009-03-26 19:26:23 +08003676
3677 /*
3678 * Because HDMI identifier is in Vendor Specific Block,
3679 * search it from all data blocks of CEA extension.
3680 */
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003681 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003682 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3683 return true;
Ma Lingf23c20c2009-03-26 19:26:23 +08003684 }
3685
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003686 return false;
Ma Lingf23c20c2009-03-26 19:26:23 +08003687}
3688EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3689
Dave Airlief453ba02008-11-07 14:05:41 -08003690/**
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003691 * drm_detect_monitor_audio - check monitor audio capability
Daniel Vetterfc668112014-01-21 12:02:26 +01003692 * @edid: EDID block to scan
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003693 *
3694 * Monitor should have CEA extension block.
3695 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3696 * audio' only. If there is any audio extension block and supported
3697 * audio format, assume at least 'basic audio' support, even if 'basic
3698 * audio' is not defined in EDID.
3699 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003700 * Return: True if the monitor supports audio, false otherwise.
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003701 */
3702bool drm_detect_monitor_audio(struct edid *edid)
3703{
3704 u8 *edid_ext;
3705 int i, j;
3706 bool has_audio = false;
3707 int start_offset, end_offset;
3708
3709 edid_ext = drm_find_cea_extension(edid);
3710 if (!edid_ext)
3711 goto end;
3712
3713 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3714
3715 if (has_audio) {
3716 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3717 goto end;
3718 }
3719
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003720 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3721 goto end;
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003722
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003723 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3724 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003725 has_audio = true;
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003726 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003727 DRM_DEBUG_KMS("CEA audio format %d\n",
3728 (edid_ext[i + j] >> 3) & 0xf);
3729 goto end;
3730 }
3731 }
3732end:
3733 return has_audio;
3734}
3735EXPORT_SYMBOL(drm_detect_monitor_audio);
3736
3737/**
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02003738 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
Daniel Vetterfc668112014-01-21 12:02:26 +01003739 * @edid: EDID block to scan
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02003740 *
3741 * Check whether the monitor reports the RGB quantization range selection
3742 * as supported. The AVI infoframe can then be used to inform the monitor
3743 * which quantization range (full or limited) is used.
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003744 *
3745 * Return: True if the RGB quantization range is selectable, false otherwise.
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02003746 */
3747bool drm_rgb_quant_range_selectable(struct edid *edid)
3748{
3749 u8 *edid_ext;
3750 int i, start, end;
3751
3752 edid_ext = drm_find_cea_extension(edid);
3753 if (!edid_ext)
3754 return false;
3755
3756 if (cea_db_offsets(edid_ext, &start, &end))
3757 return false;
3758
3759 for_each_cea_db(edid_ext, i, start, end) {
3760 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3761 cea_db_payload_len(&edid_ext[i]) == 2) {
3762 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3763 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3764 }
3765 }
3766
3767 return false;
3768}
3769EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3770
Ville Syrjäläc8127cf02017-01-11 16:18:35 +02003771/**
3772 * drm_default_rgb_quant_range - default RGB quantization range
3773 * @mode: display mode
3774 *
3775 * Determine the default RGB quantization range for the mode,
3776 * as specified in CEA-861.
3777 *
3778 * Return: The default RGB quantization range for the mode
3779 */
3780enum hdmi_quantization_range
3781drm_default_rgb_quant_range(const struct drm_display_mode *mode)
3782{
3783 /* All CEA modes other than VIC 1 use limited quantization range. */
3784 return drm_match_cea_mode(mode) > 1 ?
3785 HDMI_QUANTIZATION_RANGE_LIMITED :
3786 HDMI_QUANTIZATION_RANGE_FULL;
3787}
3788EXPORT_SYMBOL(drm_default_rgb_quant_range);
3789
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003790static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
3791 const u8 *hdmi)
Mario Kleinerd0c94692014-03-27 19:59:39 +01003792{
Ville Syrjälä18267502016-09-28 16:51:38 +03003793 struct drm_display_info *info = &connector->display_info;
Mario Kleinerd0c94692014-03-27 19:59:39 +01003794 unsigned int dc_bpc = 0;
3795
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003796 /* HDMI supports at least 8 bpc */
3797 info->bpc = 8;
3798
3799 if (cea_db_payload_len(hdmi) < 6)
3800 return;
3801
3802 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3803 dc_bpc = 10;
3804 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3805 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3806 connector->name);
3807 }
3808
3809 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3810 dc_bpc = 12;
3811 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3812 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3813 connector->name);
3814 }
3815
3816 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3817 dc_bpc = 16;
3818 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3819 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3820 connector->name);
3821 }
3822
3823 if (dc_bpc == 0) {
3824 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3825 connector->name);
3826 return;
3827 }
3828
3829 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3830 connector->name, dc_bpc);
3831 info->bpc = dc_bpc;
3832
3833 /*
3834 * Deep color support mandates RGB444 support for all video
3835 * modes and forbids YCRCB422 support for all video modes per
3836 * HDMI 1.3 spec.
3837 */
3838 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3839
3840 /* YCRCB444 is optional according to spec. */
3841 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3842 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3843 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3844 connector->name);
3845 }
3846
3847 /*
3848 * Spec says that if any deep color mode is supported at all,
3849 * then deep color 36 bit must be supported.
3850 */
3851 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3852 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3853 connector->name);
3854 }
3855}
3856
Ville Syrjälä23ebf8b2016-09-28 16:51:41 +03003857static void
3858drm_parse_hdmi_vsdb_video(struct drm_connector *connector, const u8 *db)
3859{
3860 struct drm_display_info *info = &connector->display_info;
3861 u8 len = cea_db_payload_len(db);
3862
3863 if (len >= 6)
3864 info->dvi_dual = db[6] & 1;
3865 if (len >= 7)
3866 info->max_tmds_clock = db[7] * 5000;
3867
3868 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3869 "max TMDS clock %d kHz\n",
3870 info->dvi_dual,
3871 info->max_tmds_clock);
3872
3873 drm_parse_hdmi_deep_color_info(connector, db);
3874}
3875
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003876static void drm_parse_cea_ext(struct drm_connector *connector,
3877 struct edid *edid)
3878{
3879 struct drm_display_info *info = &connector->display_info;
3880 const u8 *edid_ext;
3881 int i, start, end;
3882
Mario Kleinerd0c94692014-03-27 19:59:39 +01003883 edid_ext = drm_find_cea_extension(edid);
3884 if (!edid_ext)
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003885 return;
Mario Kleinerd0c94692014-03-27 19:59:39 +01003886
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003887 info->cea_rev = edid_ext[1];
Mario Kleinerd0c94692014-03-27 19:59:39 +01003888
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003889 /* The existence of a CEA block should imply RGB support */
3890 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3891 if (edid_ext[3] & EDID_CEA_YCRCB444)
3892 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3893 if (edid_ext[3] & EDID_CEA_YCRCB422)
3894 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
Mario Kleinerd0c94692014-03-27 19:59:39 +01003895
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003896 if (cea_db_offsets(edid_ext, &start, &end))
3897 return;
Mario Kleinerd0c94692014-03-27 19:59:39 +01003898
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003899 for_each_cea_db(edid_ext, i, start, end) {
3900 const u8 *db = &edid_ext[i];
Mario Kleinerd0c94692014-03-27 19:59:39 +01003901
Ville Syrjälä23ebf8b2016-09-28 16:51:41 +03003902 if (cea_db_is_hdmi_vsdb(db))
3903 drm_parse_hdmi_vsdb_video(connector, db);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003904 }
Mario Kleinerd0c94692014-03-27 19:59:39 +01003905}
3906
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003907static void drm_add_display_info(struct drm_connector *connector,
3908 struct edid *edid)
Jesse Barnes3b112282011-04-15 12:49:23 -07003909{
Ville Syrjälä18267502016-09-28 16:51:38 +03003910 struct drm_display_info *info = &connector->display_info;
Jesse Barnesebec9a7b2011-08-03 09:22:54 -07003911
Jesse Barnes3b112282011-04-15 12:49:23 -07003912 info->width_mm = edid->width_cm * 10;
3913 info->height_mm = edid->height_cm * 10;
3914
3915 /* driver figures it out in this case */
3916 info->bpc = 0;
Jesse Barnesda05a5a72011-04-15 13:48:57 -07003917 info->color_formats = 0;
Ville Syrjälä011acce2016-09-28 16:51:40 +03003918 info->cea_rev = 0;
Ville Syrjälä23ebf8b2016-09-28 16:51:41 +03003919 info->max_tmds_clock = 0;
3920 info->dvi_dual = false;
Jesse Barnes3b112282011-04-15 12:49:23 -07003921
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02003922 if (edid->revision < 3)
Jesse Barnes3b112282011-04-15 12:49:23 -07003923 return;
3924
3925 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3926 return;
3927
Ville Syrjälä1cea1462016-09-28 16:51:39 +03003928 drm_parse_cea_ext(connector, edid);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003929
Mario Kleiner210a0212016-07-06 12:05:48 +02003930 /*
3931 * Digital sink with "DFP 1.x compliant TMDS" according to EDID 1.3?
3932 *
3933 * For such displays, the DFP spec 1.0, section 3.10 "EDID support"
3934 * tells us to assume 8 bpc color depth if the EDID doesn't have
3935 * extensions which tell otherwise.
3936 */
3937 if ((info->bpc == 0) && (edid->revision < 4) &&
3938 (edid->input & DRM_EDID_DIGITAL_TYPE_DVI)) {
3939 info->bpc = 8;
3940 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
3941 connector->name, info->bpc);
3942 }
3943
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02003944 /* Only defined for 1.4 with digital displays */
3945 if (edid->revision < 4)
3946 return;
3947
Jesse Barnes3b112282011-04-15 12:49:23 -07003948 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3949 case DRM_EDID_DIGITAL_DEPTH_6:
3950 info->bpc = 6;
3951 break;
3952 case DRM_EDID_DIGITAL_DEPTH_8:
3953 info->bpc = 8;
3954 break;
3955 case DRM_EDID_DIGITAL_DEPTH_10:
3956 info->bpc = 10;
3957 break;
3958 case DRM_EDID_DIGITAL_DEPTH_12:
3959 info->bpc = 12;
3960 break;
3961 case DRM_EDID_DIGITAL_DEPTH_14:
3962 info->bpc = 14;
3963 break;
3964 case DRM_EDID_DIGITAL_DEPTH_16:
3965 info->bpc = 16;
3966 break;
3967 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3968 default:
3969 info->bpc = 0;
3970 break;
3971 }
Jesse Barnesda05a5a72011-04-15 13:48:57 -07003972
Mario Kleinerd0c94692014-03-27 19:59:39 +01003973 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003974 connector->name, info->bpc);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003975
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02003976 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
Lars-Peter Clausenee588082012-04-16 15:16:18 +02003977 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3978 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3979 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3980 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
Jesse Barnes3b112282011-04-15 12:49:23 -07003981}
3982
Dave Airliec97291772016-05-03 15:38:37 +10003983static int validate_displayid(u8 *displayid, int length, int idx)
3984{
3985 int i;
3986 u8 csum = 0;
3987 struct displayid_hdr *base;
3988
3989 base = (struct displayid_hdr *)&displayid[idx];
3990
3991 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
3992 base->rev, base->bytes, base->prod_id, base->ext_count);
3993
3994 if (base->bytes + 5 > length - idx)
3995 return -EINVAL;
3996 for (i = idx; i <= base->bytes + 5; i++) {
3997 csum += displayid[i];
3998 }
3999 if (csum) {
4000 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
4001 return -EINVAL;
4002 }
4003 return 0;
4004}
4005
Dave Airliea39ed682016-05-02 08:35:05 +10004006static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
4007 struct displayid_detailed_timings_1 *timings)
4008{
4009 struct drm_display_mode *mode;
4010 unsigned pixel_clock = (timings->pixel_clock[0] |
4011 (timings->pixel_clock[1] << 8) |
4012 (timings->pixel_clock[2] << 16));
4013 unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
4014 unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
4015 unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1;
4016 unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
4017 unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1;
4018 unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
4019 unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1;
4020 unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
4021 bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
4022 bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
4023 mode = drm_mode_create(dev);
4024 if (!mode)
4025 return NULL;
4026
4027 mode->clock = pixel_clock * 10;
4028 mode->hdisplay = hactive;
4029 mode->hsync_start = mode->hdisplay + hsync;
4030 mode->hsync_end = mode->hsync_start + hsync_width;
4031 mode->htotal = mode->hdisplay + hblank;
4032
4033 mode->vdisplay = vactive;
4034 mode->vsync_start = mode->vdisplay + vsync;
4035 mode->vsync_end = mode->vsync_start + vsync_width;
4036 mode->vtotal = mode->vdisplay + vblank;
4037
4038 mode->flags = 0;
4039 mode->flags |= hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
4040 mode->flags |= vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
4041 mode->type = DRM_MODE_TYPE_DRIVER;
4042
4043 if (timings->flags & 0x80)
4044 mode->type |= DRM_MODE_TYPE_PREFERRED;
4045 mode->vrefresh = drm_mode_vrefresh(mode);
4046 drm_mode_set_name(mode);
4047
4048 return mode;
4049}
4050
4051static int add_displayid_detailed_1_modes(struct drm_connector *connector,
4052 struct displayid_block *block)
4053{
4054 struct displayid_detailed_timing_block *det = (struct displayid_detailed_timing_block *)block;
4055 int i;
4056 int num_timings;
4057 struct drm_display_mode *newmode;
4058 int num_modes = 0;
4059 /* blocks must be multiple of 20 bytes length */
4060 if (block->num_bytes % 20)
4061 return 0;
4062
4063 num_timings = block->num_bytes / 20;
4064 for (i = 0; i < num_timings; i++) {
4065 struct displayid_detailed_timings_1 *timings = &det->timings[i];
4066
4067 newmode = drm_mode_displayid_detailed(connector->dev, timings);
4068 if (!newmode)
4069 continue;
4070
4071 drm_mode_probed_add(connector, newmode);
4072 num_modes++;
4073 }
4074 return num_modes;
4075}
4076
4077static int add_displayid_detailed_modes(struct drm_connector *connector,
4078 struct edid *edid)
4079{
4080 u8 *displayid;
4081 int ret;
4082 int idx = 1;
4083 int length = EDID_LENGTH;
4084 struct displayid_block *block;
4085 int num_modes = 0;
4086
4087 displayid = drm_find_displayid_extension(edid);
4088 if (!displayid)
4089 return 0;
4090
4091 ret = validate_displayid(displayid, length, idx);
4092 if (ret)
4093 return 0;
4094
4095 idx += sizeof(struct displayid_hdr);
4096 while (block = (struct displayid_block *)&displayid[idx],
4097 idx + sizeof(struct displayid_block) <= length &&
4098 idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4099 block->num_bytes > 0) {
4100 idx += block->num_bytes + sizeof(struct displayid_block);
4101 switch (block->tag) {
4102 case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4103 num_modes += add_displayid_detailed_1_modes(connector, block);
4104 break;
4105 }
4106 }
4107 return num_modes;
4108}
4109
Jesse Barnes3b112282011-04-15 12:49:23 -07004110/**
Dave Airlief453ba02008-11-07 14:05:41 -08004111 * drm_add_edid_modes - add modes from EDID data, if available
4112 * @connector: connector we're probing
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004113 * @edid: EDID data
Dave Airlief453ba02008-11-07 14:05:41 -08004114 *
Daniel Vetterb3c6c8b2016-08-12 22:48:55 +02004115 * Add the specified modes to the connector's mode list. Also fills out the
4116 * &drm_display_info structure in @connector with any information which can be
4117 * derived from the edid.
Dave Airlief453ba02008-11-07 14:05:41 -08004118 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004119 * Return: The number of modes added or 0 if we couldn't find any.
Dave Airlief453ba02008-11-07 14:05:41 -08004120 */
4121int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
4122{
4123 int num_modes = 0;
4124 u32 quirks;
4125
4126 if (edid == NULL) {
4127 return 0;
4128 }
Alex Deucher3c537882010-02-05 04:21:19 -05004129 if (!drm_edid_is_valid(edid)) {
Jordan Crousedcdb1672010-05-27 13:40:25 -06004130 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
Jani Nikula25933822014-06-03 14:56:20 +03004131 connector->name);
Dave Airlief453ba02008-11-07 14:05:41 -08004132 return 0;
4133 }
4134
4135 quirks = edid_get_quirks(edid);
4136
Adam Jacksonc867df72010-03-29 21:43:21 +00004137 /*
4138 * EDID spec says modes should be preferred in this order:
4139 * - preferred detailed mode
4140 * - other detailed modes from base block
4141 * - detailed modes from extension blocks
4142 * - CVT 3-byte code modes
4143 * - standard timing codes
4144 * - established timing codes
4145 * - modes inferred from GTF or CVT range information
4146 *
Adam Jackson13931572010-08-03 14:38:19 -04004147 * We get this pretty much right.
Adam Jacksonc867df72010-03-29 21:43:21 +00004148 *
4149 * XXX order for additional mode types in extension blocks?
4150 */
Adam Jackson13931572010-08-03 14:38:19 -04004151 num_modes += add_detailed_modes(connector, edid, quirks);
4152 num_modes += add_cvt_modes(connector, edid);
Adam Jacksonc867df72010-03-29 21:43:21 +00004153 num_modes += add_standard_modes(connector, edid);
4154 num_modes += add_established_modes(connector, edid);
Christian Schmidt54ac76f2011-12-19 14:53:16 +00004155 num_modes += add_cea_modes(connector, edid);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03004156 num_modes += add_alternate_cea_modes(connector, edid);
Dave Airliea39ed682016-05-02 08:35:05 +10004157 num_modes += add_displayid_detailed_modes(connector, edid);
Ville Syrjälä4d53dc02015-05-08 17:45:07 +03004158 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
4159 num_modes += add_inferred_modes(connector, edid);
Dave Airlief453ba02008-11-07 14:05:41 -08004160
4161 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
4162 edid_fixup_preferred(connector, quirks);
4163
Ville Syrjälä1cea1462016-09-28 16:51:39 +03004164 drm_add_display_info(connector, edid);
Dave Airlief453ba02008-11-07 14:05:41 -08004165
Mario Kleinere10aec62016-07-06 12:05:44 +02004166 if (quirks & EDID_QUIRK_FORCE_6BPC)
4167 connector->display_info.bpc = 6;
4168
Rafał Miłecki49d45a312013-12-07 13:22:42 +01004169 if (quirks & EDID_QUIRK_FORCE_8BPC)
4170 connector->display_info.bpc = 8;
4171
Mario Kleinerbc5b9642014-05-23 21:40:55 +02004172 if (quirks & EDID_QUIRK_FORCE_12BPC)
4173 connector->display_info.bpc = 12;
4174
Dave Airlief453ba02008-11-07 14:05:41 -08004175 return num_modes;
4176}
4177EXPORT_SYMBOL(drm_add_edid_modes);
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004178
4179/**
4180 * drm_add_modes_noedid - add modes for the connectors without EDID
4181 * @connector: connector we're probing
4182 * @hdisplay: the horizontal display limit
4183 * @vdisplay: the vertical display limit
4184 *
4185 * Add the specified modes to the connector's mode list. Only when the
4186 * hdisplay/vdisplay is not beyond the given limit, it will be added.
4187 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004188 * Return: The number of modes added or 0 if we couldn't find any.
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004189 */
4190int drm_add_modes_noedid(struct drm_connector *connector,
4191 int hdisplay, int vdisplay)
4192{
4193 int i, count, num_modes = 0;
Chris Wilsonb1f559e2011-01-26 09:49:47 +00004194 struct drm_display_mode *mode;
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004195 struct drm_device *dev = connector->dev;
4196
Daniel Vetterfbb40b22015-08-10 11:55:37 +02004197 count = ARRAY_SIZE(drm_dmt_modes);
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004198 if (hdisplay < 0)
4199 hdisplay = 0;
4200 if (vdisplay < 0)
4201 vdisplay = 0;
4202
4203 for (i = 0; i < count; i++) {
Chris Wilsonb1f559e2011-01-26 09:49:47 +00004204 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004205 if (hdisplay && vdisplay) {
4206 /*
4207 * Only when two are valid, they will be used to check
4208 * whether the mode should be added to the mode list of
4209 * the connector.
4210 */
4211 if (ptr->hdisplay > hdisplay ||
4212 ptr->vdisplay > vdisplay)
4213 continue;
4214 }
Adam Jacksonf985ded2009-11-23 14:23:04 -05004215 if (drm_mode_vrefresh(ptr) > 61)
4216 continue;
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004217 mode = drm_mode_duplicate(dev, ptr);
4218 if (mode) {
4219 drm_mode_probed_add(connector, mode);
4220 num_modes++;
4221 }
4222 }
4223 return num_modes;
4224}
4225EXPORT_SYMBOL(drm_add_modes_noedid);
Thierry Reding10a85122012-11-21 15:31:35 +01004226
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004227/**
4228 * drm_set_preferred_mode - Sets the preferred mode of a connector
4229 * @connector: connector whose mode list should be processed
4230 * @hpref: horizontal resolution of preferred mode
4231 * @vpref: vertical resolution of preferred mode
4232 *
4233 * Marks a mode as preferred if it matches the resolution specified by @hpref
4234 * and @vpref.
4235 */
Gerd Hoffmann3cf70da2013-10-11 10:01:08 +02004236void drm_set_preferred_mode(struct drm_connector *connector,
4237 int hpref, int vpref)
4238{
4239 struct drm_display_mode *mode;
4240
4241 list_for_each_entry(mode, &connector->probed_modes, head) {
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004242 if (mode->hdisplay == hpref &&
Daniel Vetter9d3de132014-01-23 16:27:56 +01004243 mode->vdisplay == vpref)
Gerd Hoffmann3cf70da2013-10-11 10:01:08 +02004244 mode->type |= DRM_MODE_TYPE_PREFERRED;
4245 }
4246}
4247EXPORT_SYMBOL(drm_set_preferred_mode);
4248
Thierry Reding10a85122012-11-21 15:31:35 +01004249/**
4250 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
4251 * data from a DRM display mode
4252 * @frame: HDMI AVI infoframe
4253 * @mode: DRM display mode
4254 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004255 * Return: 0 on success or a negative error code on failure.
Thierry Reding10a85122012-11-21 15:31:35 +01004256 */
4257int
4258drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
4259 const struct drm_display_mode *mode)
4260{
4261 int err;
4262
4263 if (!frame || !mode)
4264 return -EINVAL;
4265
4266 err = hdmi_avi_infoframe_init(frame);
4267 if (err < 0)
4268 return err;
4269
Damien Lespiaubf02db92013-08-06 20:32:22 +01004270 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
4271 frame->pixel_repeat = 1;
4272
Thierry Reding10a85122012-11-21 15:31:35 +01004273 frame->video_code = drm_match_cea_mode(mode);
Thierry Reding10a85122012-11-21 15:31:35 +01004274
4275 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
Vandana Kannan0967e6a2014-04-01 16:26:59 +05304276
Vandana Kannan69ab6d32014-06-05 14:45:29 +05304277 /*
4278 * Populate picture aspect ratio from either
4279 * user input (if specified) or from the CEA mode list.
4280 */
4281 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
4282 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
4283 frame->picture_aspect = mode->picture_aspect_ratio;
4284 else if (frame->video_code > 0)
Vandana Kannan0967e6a2014-04-01 16:26:59 +05304285 frame->picture_aspect = drm_get_cea_aspect_ratio(
4286 frame->video_code);
4287
Thierry Reding10a85122012-11-21 15:31:35 +01004288 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
Daniel Drake24d018052014-02-27 09:19:30 -06004289 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
Thierry Reding10a85122012-11-21 15:31:35 +01004290
4291 return 0;
4292}
4293EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004294
Ville Syrjäläa2ce26f2017-01-11 14:57:23 +02004295/**
4296 * drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
4297 * quantization range information
4298 * @frame: HDMI AVI infoframe
Ville Syrjälä779c4c22017-01-11 14:57:24 +02004299 * @mode: DRM display mode
Ville Syrjäläa2ce26f2017-01-11 14:57:23 +02004300 * @rgb_quant_range: RGB quantization range (Q)
4301 * @rgb_quant_range_selectable: Sink support selectable RGB quantization range (QS)
4302 */
4303void
4304drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
Ville Syrjälä779c4c22017-01-11 14:57:24 +02004305 const struct drm_display_mode *mode,
Ville Syrjäläa2ce26f2017-01-11 14:57:23 +02004306 enum hdmi_quantization_range rgb_quant_range,
4307 bool rgb_quant_range_selectable)
4308{
4309 /*
4310 * CEA-861:
4311 * "A Source shall not send a non-zero Q value that does not correspond
4312 * to the default RGB Quantization Range for the transmitted Picture
4313 * unless the Sink indicates support for the Q bit in a Video
4314 * Capabilities Data Block."
Ville Syrjälä779c4c22017-01-11 14:57:24 +02004315 *
4316 * HDMI 2.0 recommends sending non-zero Q when it does match the
4317 * default RGB quantization range for the mode, even when QS=0.
Ville Syrjäläa2ce26f2017-01-11 14:57:23 +02004318 */
Ville Syrjälä779c4c22017-01-11 14:57:24 +02004319 if (rgb_quant_range_selectable ||
4320 rgb_quant_range == drm_default_rgb_quant_range(mode))
Ville Syrjäläa2ce26f2017-01-11 14:57:23 +02004321 frame->quantization_range = rgb_quant_range;
4322 else
4323 frame->quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
4324}
4325EXPORT_SYMBOL(drm_hdmi_avi_infoframe_quant_range);
4326
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004327static enum hdmi_3d_structure
4328s3d_structure_from_display_mode(const struct drm_display_mode *mode)
4329{
4330 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
4331
4332 switch (layout) {
4333 case DRM_MODE_FLAG_3D_FRAME_PACKING:
4334 return HDMI_3D_STRUCTURE_FRAME_PACKING;
4335 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
4336 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
4337 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
4338 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
4339 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
4340 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
4341 case DRM_MODE_FLAG_3D_L_DEPTH:
4342 return HDMI_3D_STRUCTURE_L_DEPTH;
4343 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
4344 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
4345 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
4346 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
4347 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
4348 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
4349 default:
4350 return HDMI_3D_STRUCTURE_INVALID;
4351 }
4352}
4353
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004354/**
4355 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
4356 * data from a DRM display mode
4357 * @frame: HDMI vendor infoframe
4358 * @mode: DRM display mode
4359 *
4360 * Note that there's is a need to send HDMI vendor infoframes only when using a
4361 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
4362 * function will return -EINVAL, error that can be safely ignored.
4363 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004364 * Return: 0 on success or a negative error code on failure.
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004365 */
4366int
4367drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
4368 const struct drm_display_mode *mode)
4369{
4370 int err;
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004371 u32 s3d_flags;
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004372 u8 vic;
4373
4374 if (!frame || !mode)
4375 return -EINVAL;
4376
4377 vic = drm_match_hdmi_mode(mode);
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004378 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4379
4380 if (!vic && !s3d_flags)
4381 return -EINVAL;
4382
4383 if (vic && s3d_flags)
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004384 return -EINVAL;
4385
4386 err = hdmi_vendor_infoframe_init(frame);
4387 if (err < 0)
4388 return err;
4389
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004390 if (vic)
4391 frame->vic = vic;
4392 else
4393 frame->s3d_struct = s3d_structure_from_display_mode(mode);
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004394
4395 return 0;
4396}
4397EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
Dave Airlie40d9b042014-10-20 16:29:33 +10004398
Dave Airlie5e546cd2016-05-03 15:31:12 +10004399static int drm_parse_tiled_block(struct drm_connector *connector,
4400 struct displayid_block *block)
4401{
4402 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4403 u16 w, h;
4404 u8 tile_v_loc, tile_h_loc;
4405 u8 num_v_tile, num_h_tile;
4406 struct drm_tile_group *tg;
4407
4408 w = tile->tile_size[0] | tile->tile_size[1] << 8;
4409 h = tile->tile_size[2] | tile->tile_size[3] << 8;
4410
4411 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4412 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4413 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4414 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4415
4416 connector->has_tile = true;
4417 if (tile->tile_cap & 0x80)
4418 connector->tile_is_single_monitor = true;
4419
4420 connector->num_h_tile = num_h_tile + 1;
4421 connector->num_v_tile = num_v_tile + 1;
4422 connector->tile_h_loc = tile_h_loc;
4423 connector->tile_v_loc = tile_v_loc;
4424 connector->tile_h_size = w + 1;
4425 connector->tile_v_size = h + 1;
4426
4427 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4428 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4429 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4430 num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4431 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4432
4433 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4434 if (!tg) {
4435 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4436 }
4437 if (!tg)
4438 return -ENOMEM;
4439
4440 if (connector->tile_group != tg) {
4441 /* if we haven't got a pointer,
4442 take the reference, drop ref to old tile group */
4443 if (connector->tile_group) {
4444 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4445 }
4446 connector->tile_group = tg;
4447 } else
4448 /* if same tile group, then release the ref we just took. */
4449 drm_mode_put_tile_group(connector->dev, tg);
4450 return 0;
4451}
4452
Dave Airlie40d9b042014-10-20 16:29:33 +10004453static int drm_parse_display_id(struct drm_connector *connector,
4454 u8 *displayid, int length,
4455 bool is_edid_extension)
4456{
4457 /* if this is an EDID extension the first byte will be 0x70 */
4458 int idx = 0;
Dave Airlie40d9b042014-10-20 16:29:33 +10004459 struct displayid_block *block;
Dave Airlie5e546cd2016-05-03 15:31:12 +10004460 int ret;
Dave Airlie40d9b042014-10-20 16:29:33 +10004461
4462 if (is_edid_extension)
4463 idx = 1;
4464
Dave Airliec97291772016-05-03 15:38:37 +10004465 ret = validate_displayid(displayid, length, idx);
4466 if (ret)
4467 return ret;
Dave Airlie40d9b042014-10-20 16:29:33 +10004468
Tomas Bzatek3a4a2ea2016-05-01 15:02:45 +02004469 idx += sizeof(struct displayid_hdr);
4470 while (block = (struct displayid_block *)&displayid[idx],
4471 idx + sizeof(struct displayid_block) <= length &&
4472 idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4473 block->num_bytes > 0) {
4474 idx += block->num_bytes + sizeof(struct displayid_block);
4475 DRM_DEBUG_KMS("block id 0x%x, rev %d, len %d\n",
4476 block->tag, block->rev, block->num_bytes);
Dave Airlie40d9b042014-10-20 16:29:33 +10004477
Tomas Bzatek3a4a2ea2016-05-01 15:02:45 +02004478 switch (block->tag) {
4479 case DATA_BLOCK_TILED_DISPLAY:
4480 ret = drm_parse_tiled_block(connector, block);
4481 if (ret)
4482 return ret;
4483 break;
Dave Airliea39ed682016-05-02 08:35:05 +10004484 case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4485 /* handled in mode gathering code. */
4486 break;
Tomas Bzatek3a4a2ea2016-05-01 15:02:45 +02004487 default:
4488 DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block->tag);
4489 break;
4490 }
Dave Airlie40d9b042014-10-20 16:29:33 +10004491 }
4492 return 0;
4493}
4494
4495static void drm_get_displayid(struct drm_connector *connector,
4496 struct edid *edid)
4497{
4498 void *displayid = NULL;
4499 int ret;
4500 connector->has_tile = false;
4501 displayid = drm_find_displayid_extension(edid);
4502 if (!displayid) {
4503 /* drop reference to any tile group we had */
4504 goto out_drop_ref;
4505 }
4506
4507 ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4508 if (ret < 0)
4509 goto out_drop_ref;
4510 if (!connector->has_tile)
4511 goto out_drop_ref;
4512 return;
4513out_drop_ref:
4514 if (connector->tile_group) {
4515 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4516 connector->tile_group = NULL;
4517 }
4518 return;
4519}