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Daniel Mackaff18a62012-07-25 17:56:48 +02001/* The pxa3xx skeleton simply augments the 2xx version */
Robert Jarzmikd96672e2015-02-07 13:13:24 +01002#include "pxa2xx.dtsi"
Daniel Mackaff18a62012-07-25 17:56:48 +02003
4/ {
5 model = "Marvell PXA3xx familiy SoC";
6 compatible = "marvell,pxa3xx";
7
8 pxabus {
Robert Jarzmik0cd49142015-06-20 10:17:26 +02009 pdma: dma-controller@40000000 {
10 compatible = "marvell,pdma-1.0";
11 reg = <0x40000000 0x10000>;
12 interrupts = <25>;
13 #dma-channels = <32>;
14 #dma-cells = <2>;
Robert Jarzmik72b195c2016-02-15 21:57:47 +010015 #dma-requests = <100>;
Robert Jarzmik0cd49142015-06-20 10:17:26 +020016 status = "okay";
17 };
18
Daniel Mackaff18a62012-07-25 17:56:48 +020019 pwri2c: i2c@40f500c0 {
20 compatible = "mrvl,pwri2c";
21 reg = <0x40f500c0 0x30>;
22 interrupts = <6>;
Robert Jarzmikd96672e2015-02-07 13:13:24 +010023 clocks = <&clks CLK_PWRI2C>;
Daniel Mackaff18a62012-07-25 17:56:48 +020024 #address-cells = <0x1>;
25 #size-cells = <0>;
26 status = "disabled";
27 };
28
29 nand0: nand@43100000 {
30 compatible = "marvell,pxa3xx-nand";
31 reg = <0x43100000 90>;
32 interrupts = <45>;
Robert Jarzmikd96672e2015-02-07 13:13:24 +010033 clocks = <&clks CLK_NAND>;
Robert Jarzmikc9436462015-06-20 10:17:27 +020034 dmas = <&pdma 97>;
35 dma-names = "data";
Daniel Mackaff18a62012-07-25 17:56:48 +020036 #address-cells = <1>;
37 #size-cells = <1>;
38 status = "disabled";
39 };
40
41 pxairq: interrupt-controller@40d00000 {
42 marvell,intc-priority;
43 marvell,intc-nr-irqs = <56>;
44 };
Daniel Mack93c5a5b2013-07-11 17:17:57 +020045
46 gpio: gpio@40e00000 {
47 compatible = "intel,pxa3xx-gpio";
48 reg = <0x40e00000 0x10000>;
Robert Jarzmikd96672e2015-02-07 13:13:24 +010049 clocks = <&clks CLK_GPIO>;
Daniel Mack93c5a5b2013-07-11 17:17:57 +020050 interrupt-names = "gpio0", "gpio1", "gpio_mux";
51 interrupts = <8 9 10>;
52 gpio-controller;
53 #gpio-cells = <0x2>;
54 interrupt-controller;
55 #interrupt-cells = <0x2>;
56 };
Robert Jarzmik316c9382015-06-20 10:17:28 +020057
58 mmc0: mmc@41100000 {
59 compatible = "marvell,pxa-mmc";
60 reg = <0x41100000 0x1000>;
61 interrupts = <23>;
62 clocks = <&clks CLK_MMC>;
63 dmas = <&pdma 21 3
64 &pdma 22 3>;
65 dma-names = "rx", "tx";
66 status = "disabled";
67 };
68
69 mmc1: mmc@42000000 {
70 compatible = "marvell,pxa-mmc";
71 reg = <0x42000000 0x1000>;
72 interrupts = <41>;
73 clocks = <&clks CLK_MMC1>;
74 dmas = <&pdma 93 3
75 &pdma 94 3>;
76 dma-names = "rx", "tx";
77 status = "disabled";
78 };
79
80 mmc2: mmc@42500000 {
81 compatible = "marvell,pxa-mmc";
82 reg = <0x42500000 0x1000>;
83 interrupts = <55>;
84 clocks = <&clks CLK_MMC2>;
85 dmas = <&pdma 46 3
86 &pdma 47 3>;
87 dma-names = "rx", "tx";
88 status = "disabled";
89 };
Robert Jarzmik0ec19392015-06-20 10:17:31 +020090
91 pxa3xx_ohci: usb@4c000000 {
92 compatible = "marvell,pxa-ohci";
93 reg = <0x4c000000 0x10000>;
94 interrupts = <3>;
95 clocks = <&clks CLK_USBHOST>;
96 status = "disabled";
97 };
Daniel Mackaff18a62012-07-25 17:56:48 +020098 };
Robert Jarzmikd96672e2015-02-07 13:13:24 +010099
100 clocks {
101 /*
102 * The muxing of external clocks/internal dividers for osc* clock
103 * sources has been hidden under the carpet by now.
104 */
105 #address-cells = <1>;
106 #size-cells = <1>;
107 ranges;
108
109 clks: pxa3xx_clks@41300004 {
110 compatible = "marvell,pxa300-clocks";
111 #clock-cells = <1>;
112 status = "okay";
113 };
114 };
Robert Jarzmik8dd30752014-10-12 22:11:08 +0200115
116 timer@40a00000 {
117 compatible = "marvell,pxa-timer";
118 reg = <0x40a00000 0x20>;
119 interrupts = <26>;
120 clocks = <&clks CLK_OSTIMER>;
121 status = "okay";
122 };
Daniel Mackaff18a62012-07-25 17:56:48 +0200123};