Thomas Gleixner | 2025cf9 | 2019-05-29 07:18:02 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Persistent Memory Driver |
| 4 | * |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 5 | * Copyright (c) 2014-2015, Intel Corporation. |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 6 | * Copyright (c) 2015, Christoph Hellwig <hch@lst.de>. |
| 7 | * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>. |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <asm/cacheflush.h> |
| 11 | #include <linux/blkdev.h> |
| 12 | #include <linux/hdreg.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> |
Dan Williams | c953cc9 | 2018-07-13 21:50:37 -0700 | [diff] [blame] | 15 | #include <linux/set_memory.h> |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 16 | #include <linux/module.h> |
| 17 | #include <linux/moduleparam.h> |
Dan Williams | b95f5f4 | 2016-01-04 23:50:23 -0800 | [diff] [blame] | 18 | #include <linux/badblocks.h> |
Dan Williams | 9476df7 | 2016-01-15 16:56:19 -0800 | [diff] [blame] | 19 | #include <linux/memremap.h> |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 20 | #include <linux/vmalloc.h> |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 21 | #include <linux/blk-mq.h> |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 22 | #include <linux/pfn_t.h> |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 23 | #include <linux/slab.h> |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 24 | #include <linux/uio.h> |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 25 | #include <linux/dax.h> |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 26 | #include <linux/nd.h> |
Minchan Kim | 23c47d2 | 2017-11-15 17:33:00 -0800 | [diff] [blame] | 27 | #include <linux/backing-dev.h> |
Dan Williams | f295e53 | 2016-06-17 11:08:06 -0700 | [diff] [blame] | 28 | #include "pmem.h" |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 29 | #include "pfn.h" |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 30 | #include "nd.h" |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 31 | |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 32 | static struct device *to_dev(struct pmem_device *pmem) |
| 33 | { |
| 34 | /* |
| 35 | * nvdimm bus services need a 'dev' parameter, and we record the device |
| 36 | * at init in bb.dev. |
| 37 | */ |
| 38 | return pmem->bb.dev; |
| 39 | } |
| 40 | |
| 41 | static struct nd_region *to_region(struct pmem_device *pmem) |
| 42 | { |
| 43 | return to_nd_region(to_dev(pmem)->parent); |
| 44 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 45 | |
Dan Williams | c953cc9 | 2018-07-13 21:50:37 -0700 | [diff] [blame] | 46 | static void hwpoison_clear(struct pmem_device *pmem, |
| 47 | phys_addr_t phys, unsigned int len) |
| 48 | { |
| 49 | unsigned long pfn_start, pfn_end, pfn; |
| 50 | |
| 51 | /* only pmem in the linear map supports HWPoison */ |
| 52 | if (is_vmalloc_addr(pmem->virt_addr)) |
| 53 | return; |
| 54 | |
| 55 | pfn_start = PHYS_PFN(phys); |
| 56 | pfn_end = pfn_start + PHYS_PFN(len); |
| 57 | for (pfn = pfn_start; pfn < pfn_end; pfn++) { |
| 58 | struct page *page = pfn_to_page(pfn); |
| 59 | |
| 60 | /* |
| 61 | * Note, no need to hold a get_dev_pagemap() reference |
| 62 | * here since we're in the driver I/O path and |
| 63 | * outstanding I/O requests pin the dev_pagemap. |
| 64 | */ |
| 65 | if (test_and_clear_pmem_poison(page)) |
| 66 | clear_mce_nospec(pfn); |
| 67 | } |
| 68 | } |
| 69 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 70 | static blk_status_t pmem_clear_poison(struct pmem_device *pmem, |
| 71 | phys_addr_t offset, unsigned int len) |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 72 | { |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 73 | struct device *dev = to_dev(pmem); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 74 | sector_t sector; |
| 75 | long cleared; |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 76 | blk_status_t rc = BLK_STS_OK; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 77 | |
| 78 | sector = (offset - pmem->data_offset) / 512; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 79 | |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 80 | cleared = nvdimm_clear_poison(dev, pmem->phys_addr + offset, len); |
| 81 | if (cleared < len) |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 82 | rc = BLK_STS_IOERR; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 83 | if (cleared > 0 && cleared / 512) { |
Dan Williams | c953cc9 | 2018-07-13 21:50:37 -0700 | [diff] [blame] | 84 | hwpoison_clear(pmem, pmem->phys_addr + offset, cleared); |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 85 | cleared /= 512; |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 86 | dev_dbg(dev, "%#llx clear %ld sector%s\n", |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 87 | (unsigned long long) sector, cleared, |
| 88 | cleared > 1 ? "s" : ""); |
Fabian Frederick | 0a3f27b | 2016-12-04 10:48:58 -0800 | [diff] [blame] | 89 | badblocks_clear(&pmem->bb, sector, cleared); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 90 | if (pmem->bb_state) |
| 91 | sysfs_notify_dirent(pmem->bb_state); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 92 | } |
Toshi Kani | 3115bb0 | 2016-10-13 09:54:21 -0600 | [diff] [blame] | 93 | |
Dan Williams | f2b6125 | 2017-05-29 23:00:34 -0700 | [diff] [blame] | 94 | arch_invalidate_pmem(pmem->virt_addr + offset, len); |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 95 | |
| 96 | return rc; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 97 | } |
| 98 | |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 99 | static void write_pmem(void *pmem_addr, struct page *page, |
| 100 | unsigned int off, unsigned int len) |
| 101 | { |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 102 | unsigned int chunk; |
| 103 | void *mem; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 104 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 105 | while (len) { |
| 106 | mem = kmap_atomic(page); |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 107 | chunk = min_t(unsigned int, len, PAGE_SIZE - off); |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 108 | memcpy_flushcache(pmem_addr, mem + off, chunk); |
| 109 | kunmap_atomic(mem); |
| 110 | len -= chunk; |
| 111 | off = 0; |
| 112 | page++; |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 113 | pmem_addr += chunk; |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 114 | } |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 115 | } |
| 116 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 117 | static blk_status_t read_pmem(struct page *page, unsigned int off, |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 118 | void *pmem_addr, unsigned int len) |
| 119 | { |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 120 | unsigned int chunk; |
Dan Williams | 60622d6 | 2018-05-03 17:06:21 -0700 | [diff] [blame] | 121 | unsigned long rem; |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 122 | void *mem; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 123 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 124 | while (len) { |
| 125 | mem = kmap_atomic(page); |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 126 | chunk = min_t(unsigned int, len, PAGE_SIZE - off); |
Dan Williams | 60622d6 | 2018-05-03 17:06:21 -0700 | [diff] [blame] | 127 | rem = memcpy_mcsafe(mem + off, pmem_addr, chunk); |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 128 | kunmap_atomic(mem); |
Dan Williams | 60622d6 | 2018-05-03 17:06:21 -0700 | [diff] [blame] | 129 | if (rem) |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 130 | return BLK_STS_IOERR; |
| 131 | len -= chunk; |
| 132 | off = 0; |
| 133 | page++; |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 134 | pmem_addr += chunk; |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 135 | } |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 136 | return BLK_STS_OK; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 137 | } |
| 138 | |
Vivek Goyal | 5d64efe | 2020-02-28 11:34:51 -0500 | [diff] [blame] | 139 | static blk_status_t pmem_do_read(struct pmem_device *pmem, |
| 140 | struct page *page, unsigned int page_off, |
| 141 | sector_t sector, unsigned int len) |
| 142 | { |
| 143 | blk_status_t rc; |
| 144 | phys_addr_t pmem_off = sector * 512 + pmem->data_offset; |
| 145 | void *pmem_addr = pmem->virt_addr + pmem_off; |
| 146 | |
| 147 | if (unlikely(is_bad_pmem(&pmem->bb, sector, len))) |
| 148 | return BLK_STS_IOERR; |
| 149 | |
| 150 | rc = read_pmem(page, page_off, pmem_addr, len); |
| 151 | flush_dcache_page(page); |
| 152 | return rc; |
| 153 | } |
| 154 | |
| 155 | static blk_status_t pmem_do_write(struct pmem_device *pmem, |
| 156 | struct page *page, unsigned int page_off, |
| 157 | sector_t sector, unsigned int len) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 158 | { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 159 | blk_status_t rc = BLK_STS_OK; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 160 | bool bad_pmem = false; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 161 | phys_addr_t pmem_off = sector * 512 + pmem->data_offset; |
Dan Williams | 7a9eb20 | 2016-06-03 18:06:47 -0700 | [diff] [blame] | 162 | void *pmem_addr = pmem->virt_addr + pmem_off; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 163 | |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 164 | if (unlikely(is_bad_pmem(&pmem->bb, sector, len))) |
| 165 | bad_pmem = true; |
| 166 | |
Vivek Goyal | 5d64efe | 2020-02-28 11:34:51 -0500 | [diff] [blame] | 167 | /* |
| 168 | * Note that we write the data both before and after |
| 169 | * clearing poison. The write before clear poison |
| 170 | * handles situations where the latest written data is |
| 171 | * preserved and the clear poison operation simply marks |
| 172 | * the address range as valid without changing the data. |
| 173 | * In this case application software can assume that an |
| 174 | * interrupted write will either return the new good |
| 175 | * data or an error. |
| 176 | * |
| 177 | * However, if pmem_clear_poison() leaves the data in an |
| 178 | * indeterminate state we need to perform the write |
| 179 | * after clear poison. |
| 180 | */ |
| 181 | flush_dcache_page(page); |
| 182 | write_pmem(pmem_addr, page, page_off, len); |
| 183 | if (unlikely(bad_pmem)) { |
| 184 | rc = pmem_clear_poison(pmem, pmem_off, len); |
| 185 | write_pmem(pmem_addr, page, page_off, len); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 186 | } |
| 187 | |
Dan Williams | b5ebc8e | 2016-03-06 15:20:51 -0800 | [diff] [blame] | 188 | return rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 189 | } |
| 190 | |
Jens Axboe | dece163 | 2015-11-05 10:41:16 -0700 | [diff] [blame] | 191 | static blk_qc_t pmem_make_request(struct request_queue *q, struct bio *bio) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 192 | { |
Pankaj Gupta | c5d4355 | 2019-07-05 19:33:22 +0530 | [diff] [blame] | 193 | int ret = 0; |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 194 | blk_status_t rc = 0; |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 195 | bool do_acct; |
| 196 | unsigned long start; |
Dan Williams | edc870e | 2015-05-16 12:28:51 -0400 | [diff] [blame] | 197 | struct bio_vec bvec; |
| 198 | struct bvec_iter iter; |
Christoph Hellwig | 6ec26b8 | 2020-05-08 18:15:17 +0200 | [diff] [blame^] | 199 | struct pmem_device *pmem = bio->bi_disk->private_data; |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 200 | struct nd_region *nd_region = to_region(pmem); |
| 201 | |
Ross Zwisler | d2d6364 | 2018-06-06 10:45:12 -0600 | [diff] [blame] | 202 | if (bio->bi_opf & REQ_PREFLUSH) |
Pankaj Gupta | c5d4355 | 2019-07-05 19:33:22 +0530 | [diff] [blame] | 203 | ret = nvdimm_flush(nd_region, bio); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 204 | |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 205 | do_acct = nd_iostat_start(bio, &start); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 206 | bio_for_each_segment(bvec, bio, iter) { |
Vivek Goyal | 5d64efe | 2020-02-28 11:34:51 -0500 | [diff] [blame] | 207 | if (op_is_write(bio_op(bio))) |
| 208 | rc = pmem_do_write(pmem, bvec.bv_page, bvec.bv_offset, |
| 209 | iter.bi_sector, bvec.bv_len); |
| 210 | else |
| 211 | rc = pmem_do_read(pmem, bvec.bv_page, bvec.bv_offset, |
| 212 | iter.bi_sector, bvec.bv_len); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 213 | if (rc) { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 214 | bio->bi_status = rc; |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 215 | break; |
| 216 | } |
| 217 | } |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 218 | if (do_acct) |
| 219 | nd_iostat_end(bio, start); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 220 | |
Jens Axboe | 1eff9d3 | 2016-08-05 15:35:16 -0600 | [diff] [blame] | 221 | if (bio->bi_opf & REQ_FUA) |
Pankaj Gupta | c5d4355 | 2019-07-05 19:33:22 +0530 | [diff] [blame] | 222 | ret = nvdimm_flush(nd_region, bio); |
| 223 | |
| 224 | if (ret) |
| 225 | bio->bi_status = errno_to_blk_status(ret); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 226 | |
Christoph Hellwig | 4246a0b | 2015-07-20 15:29:37 +0200 | [diff] [blame] | 227 | bio_endio(bio); |
Jens Axboe | dece163 | 2015-11-05 10:41:16 -0700 | [diff] [blame] | 228 | return BLK_QC_T_NONE; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 229 | } |
| 230 | |
| 231 | static int pmem_rw_page(struct block_device *bdev, sector_t sector, |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 232 | struct page *page, unsigned int op) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 233 | { |
Christoph Hellwig | 6ec26b8 | 2020-05-08 18:15:17 +0200 | [diff] [blame^] | 234 | struct pmem_device *pmem = bdev->bd_disk->private_data; |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 235 | blk_status_t rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 236 | |
Vivek Goyal | 5d64efe | 2020-02-28 11:34:51 -0500 | [diff] [blame] | 237 | if (op_is_write(op)) |
| 238 | rc = pmem_do_write(pmem, page, 0, sector, |
| 239 | hpage_nr_pages(page) * PAGE_SIZE); |
| 240 | else |
| 241 | rc = pmem_do_read(pmem, page, 0, sector, |
| 242 | hpage_nr_pages(page) * PAGE_SIZE); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 243 | /* |
| 244 | * The ->rw_page interface is subtle and tricky. The core |
| 245 | * retries on any error, so we can only invoke page_endio() in |
| 246 | * the successful completion case. Otherwise, we'll see crashes |
| 247 | * caused by double completion. |
| 248 | */ |
| 249 | if (rc == 0) |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 250 | page_endio(page, op_is_write(op), 0); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 251 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 252 | return blk_status_to_errno(rc); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 253 | } |
| 254 | |
Dan Williams | f295e53 | 2016-06-17 11:08:06 -0700 | [diff] [blame] | 255 | /* see "strong" declaration in tools/testing/nvdimm/pmem-dax.c */ |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 256 | __weak long __pmem_direct_access(struct pmem_device *pmem, pgoff_t pgoff, |
| 257 | long nr_pages, void **kaddr, pfn_t *pfn) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 258 | { |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 259 | resource_size_t offset = PFN_PHYS(pgoff) + pmem->data_offset; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 260 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 261 | if (unlikely(is_bad_pmem(&pmem->bb, PFN_PHYS(pgoff) / 512, |
| 262 | PFN_PHYS(nr_pages)))) |
Dan Williams | 0a70bd4 | 2016-02-24 14:02:11 -0800 | [diff] [blame] | 263 | return -EIO; |
Huaisheng Ye | 46a590c | 2018-07-30 15:15:43 +0800 | [diff] [blame] | 264 | |
| 265 | if (kaddr) |
| 266 | *kaddr = pmem->virt_addr + offset; |
| 267 | if (pfn) |
| 268 | *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 269 | |
Dan Williams | 0a70bd4 | 2016-02-24 14:02:11 -0800 | [diff] [blame] | 270 | /* |
| 271 | * If badblocks are present, limit known good range to the |
| 272 | * requested range. |
| 273 | */ |
| 274 | if (unlikely(pmem->bb.count)) |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 275 | return nr_pages; |
| 276 | return PHYS_PFN(pmem->size - pmem->pfn_pad - offset); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | static const struct block_device_operations pmem_fops = { |
| 280 | .owner = THIS_MODULE, |
| 281 | .rw_page = pmem_rw_page, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 282 | .revalidate_disk = nvdimm_revalidate_disk, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 283 | }; |
| 284 | |
Vivek Goyal | f605a26 | 2020-02-28 11:34:52 -0500 | [diff] [blame] | 285 | static int pmem_dax_zero_page_range(struct dax_device *dax_dev, pgoff_t pgoff, |
| 286 | size_t nr_pages) |
| 287 | { |
| 288 | struct pmem_device *pmem = dax_get_private(dax_dev); |
| 289 | |
| 290 | return blk_status_to_errno(pmem_do_write(pmem, ZERO_PAGE(0), 0, |
| 291 | PFN_PHYS(pgoff) >> SECTOR_SHIFT, |
| 292 | PAGE_SIZE)); |
| 293 | } |
| 294 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 295 | static long pmem_dax_direct_access(struct dax_device *dax_dev, |
| 296 | pgoff_t pgoff, long nr_pages, void **kaddr, pfn_t *pfn) |
| 297 | { |
| 298 | struct pmem_device *pmem = dax_get_private(dax_dev); |
| 299 | |
| 300 | return __pmem_direct_access(pmem, pgoff, nr_pages, kaddr, pfn); |
| 301 | } |
| 302 | |
Dan Williams | 52f476a | 2019-05-16 17:05:21 -0700 | [diff] [blame] | 303 | /* |
| 304 | * Use the 'no check' versions of copy_from_iter_flushcache() and |
| 305 | * copy_to_iter_mcsafe() to bypass HARDENED_USERCOPY overhead. Bounds |
| 306 | * checking, both file offset and device offset, is handled by |
| 307 | * dax_iomap_actor() |
| 308 | */ |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 309 | static size_t pmem_copy_from_iter(struct dax_device *dax_dev, pgoff_t pgoff, |
| 310 | void *addr, size_t bytes, struct iov_iter *i) |
| 311 | { |
Dan Williams | 52f476a | 2019-05-16 17:05:21 -0700 | [diff] [blame] | 312 | return _copy_from_iter_flushcache(addr, bytes, i); |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 313 | } |
| 314 | |
Dan Williams | b3a9a0c | 2018-05-02 06:46:33 -0700 | [diff] [blame] | 315 | static size_t pmem_copy_to_iter(struct dax_device *dax_dev, pgoff_t pgoff, |
| 316 | void *addr, size_t bytes, struct iov_iter *i) |
| 317 | { |
Dan Williams | 52f476a | 2019-05-16 17:05:21 -0700 | [diff] [blame] | 318 | return _copy_to_iter_mcsafe(addr, bytes, i); |
Dan Williams | b3a9a0c | 2018-05-02 06:46:33 -0700 | [diff] [blame] | 319 | } |
| 320 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 321 | static const struct dax_operations pmem_dax_ops = { |
| 322 | .direct_access = pmem_dax_direct_access, |
Dan Williams | 7bf7eac | 2019-05-16 13:26:29 -0700 | [diff] [blame] | 323 | .dax_supported = generic_fsdax_supported, |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 324 | .copy_from_iter = pmem_copy_from_iter, |
Dan Williams | b3a9a0c | 2018-05-02 06:46:33 -0700 | [diff] [blame] | 325 | .copy_to_iter = pmem_copy_to_iter, |
Vivek Goyal | f605a26 | 2020-02-28 11:34:52 -0500 | [diff] [blame] | 326 | .zero_page_range = pmem_dax_zero_page_range, |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 327 | }; |
| 328 | |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 329 | static const struct attribute_group *pmem_attribute_groups[] = { |
| 330 | &dax_attribute_group, |
| 331 | NULL, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 332 | }; |
| 333 | |
Christoph Hellwig | d8668bb | 2019-06-26 14:27:09 +0200 | [diff] [blame] | 334 | static void pmem_pagemap_cleanup(struct dev_pagemap *pgmap) |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 335 | { |
Christoph Hellwig | d8668bb | 2019-06-26 14:27:09 +0200 | [diff] [blame] | 336 | struct request_queue *q = |
| 337 | container_of(pgmap->ref, struct request_queue, q_usage_counter); |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame] | 338 | |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 339 | blk_cleanup_queue(q); |
| 340 | } |
| 341 | |
Christoph Hellwig | d8668bb | 2019-06-26 14:27:09 +0200 | [diff] [blame] | 342 | static void pmem_release_queue(void *pgmap) |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame] | 343 | { |
Christoph Hellwig | d8668bb | 2019-06-26 14:27:09 +0200 | [diff] [blame] | 344 | pmem_pagemap_cleanup(pgmap); |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame] | 345 | } |
| 346 | |
Christoph Hellwig | d8668bb | 2019-06-26 14:27:09 +0200 | [diff] [blame] | 347 | static void pmem_pagemap_kill(struct dev_pagemap *pgmap) |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 348 | { |
Christoph Hellwig | d8668bb | 2019-06-26 14:27:09 +0200 | [diff] [blame] | 349 | struct request_queue *q = |
| 350 | container_of(pgmap->ref, struct request_queue, q_usage_counter); |
Dan Williams | a95c90f | 2018-12-28 00:34:57 -0800 | [diff] [blame] | 351 | |
Linus Torvalds | d3b5d35 | 2017-05-01 23:54:56 -0700 | [diff] [blame] | 352 | blk_freeze_queue_start(q); |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 353 | } |
| 354 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 355 | static void pmem_release_disk(void *__pmem) |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 356 | { |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 357 | struct pmem_device *pmem = __pmem; |
| 358 | |
| 359 | kill_dax(pmem->dax_dev); |
| 360 | put_dax(pmem->dax_dev); |
| 361 | del_gendisk(pmem->disk); |
| 362 | put_disk(pmem->disk); |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 363 | } |
| 364 | |
Christoph Hellwig | 1e240e8 | 2019-06-26 14:27:08 +0200 | [diff] [blame] | 365 | static const struct dev_pagemap_ops fsdax_pagemap_ops = { |
Christoph Hellwig | 1e240e8 | 2019-06-26 14:27:08 +0200 | [diff] [blame] | 366 | .kill = pmem_pagemap_kill, |
| 367 | .cleanup = pmem_pagemap_cleanup, |
| 368 | }; |
| 369 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 370 | static int pmem_attach_disk(struct device *dev, |
| 371 | struct nd_namespace_common *ndns) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 372 | { |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 373 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 374 | struct nd_region *nd_region = to_nd_region(dev->parent); |
Ross Zwisler | ce7f11a | 2018-06-06 10:45:13 -0600 | [diff] [blame] | 375 | int nid = dev_to_node(dev), fua; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 376 | struct resource *res = &nsio->res; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 377 | struct resource bb_res; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 378 | struct nd_pfn *nd_pfn = NULL; |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 379 | struct dax_device *dax_dev; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 380 | struct nd_pfn_sb *pfn_sb; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 381 | struct pmem_device *pmem; |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 382 | struct request_queue *q; |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 383 | struct device *gendev; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 384 | struct gendisk *disk; |
| 385 | void *addr; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 386 | int rc; |
Pankaj Gupta | fefc1d9 | 2019-07-05 19:33:24 +0530 | [diff] [blame] | 387 | unsigned long flags = 0UL; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 388 | |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 389 | pmem = devm_kzalloc(dev, sizeof(*pmem), GFP_KERNEL); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 390 | if (!pmem) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 391 | return -ENOMEM; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 392 | |
Aneesh Kumar K.V | 8f4b01f | 2019-10-31 16:27:41 +0530 | [diff] [blame] | 393 | rc = devm_namespace_enable(dev, ndns, nd_info_block_reserve()); |
| 394 | if (rc) |
| 395 | return rc; |
| 396 | |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 397 | /* while nsio_rw_bytes is active, parse a pfn info block if present */ |
| 398 | if (is_nd_pfn(dev)) { |
| 399 | nd_pfn = to_nd_pfn(dev); |
| 400 | rc = nvdimm_setup_pfn(nd_pfn, &pmem->pgmap); |
| 401 | if (rc) |
| 402 | return rc; |
| 403 | } |
| 404 | |
| 405 | /* we're attaching a block device, disable raw namespace access */ |
Aneesh Kumar K.V | 8f4b01f | 2019-10-31 16:27:41 +0530 | [diff] [blame] | 406 | devm_namespace_disable(dev, ndns); |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 407 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 408 | dev_set_drvdata(dev, pmem); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 409 | pmem->phys_addr = res->start; |
| 410 | pmem->size = resource_size(res); |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 411 | fua = nvdimm_has_flush(nd_region); |
| 412 | if (!IS_ENABLED(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) || fua < 0) { |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 413 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 414 | fua = 0; |
| 415 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 416 | |
Dan Williams | 947df02 | 2016-03-21 22:28:40 -0700 | [diff] [blame] | 417 | if (!devm_request_mem_region(dev, res->start, resource_size(res), |
Dan Williams | 450c663 | 2016-11-28 11:15:18 -0800 | [diff] [blame] | 418 | dev_name(&ndns->dev))) { |
Dan Williams | 947df02 | 2016-03-21 22:28:40 -0700 | [diff] [blame] | 419 | dev_warn(dev, "could not reserve region %pR\n", res); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 420 | return -EBUSY; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 421 | } |
| 422 | |
Christoph Hellwig | 3d745ea | 2020-03-27 09:30:11 +0100 | [diff] [blame] | 423 | q = blk_alloc_queue(pmem_make_request, dev_to_node(dev)); |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 424 | if (!q) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 425 | return -ENOMEM; |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 426 | |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 427 | pmem->pfn_flags = PFN_DEV; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 428 | pmem->pgmap.ref = &q->q_usage_counter; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 429 | if (is_nd_pfn(dev)) { |
Christoph Hellwig | f6a55e1 | 2019-06-26 14:27:10 +0200 | [diff] [blame] | 430 | pmem->pgmap.type = MEMORY_DEVICE_FS_DAX; |
| 431 | pmem->pgmap.ops = &fsdax_pagemap_ops; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 432 | addr = devm_memremap_pages(dev, &pmem->pgmap); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 433 | pfn_sb = nd_pfn->pfn_sb; |
| 434 | pmem->data_offset = le64_to_cpu(pfn_sb->dataoff); |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 435 | pmem->pfn_pad = resource_size(res) - |
| 436 | resource_size(&pmem->pgmap.res); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 437 | pmem->pfn_flags |= PFN_MAP; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 438 | memcpy(&bb_res, &pmem->pgmap.res, sizeof(bb_res)); |
| 439 | bb_res.start += pmem->data_offset; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 440 | } else if (pmem_should_map_pages(dev)) { |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 441 | memcpy(&pmem->pgmap.res, &nsio->res, sizeof(pmem->pgmap.res)); |
Christoph Hellwig | f6a55e1 | 2019-06-26 14:27:10 +0200 | [diff] [blame] | 442 | pmem->pgmap.type = MEMORY_DEVICE_FS_DAX; |
| 443 | pmem->pgmap.ops = &fsdax_pagemap_ops; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 444 | addr = devm_memremap_pages(dev, &pmem->pgmap); |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 445 | pmem->pfn_flags |= PFN_MAP; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 446 | memcpy(&bb_res, &pmem->pgmap.res, sizeof(bb_res)); |
Dan Williams | 91ed7ac | 2018-10-04 16:32:08 -0700 | [diff] [blame] | 447 | } else { |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame] | 448 | if (devm_add_action_or_reset(dev, pmem_release_queue, |
Christoph Hellwig | d8668bb | 2019-06-26 14:27:09 +0200 | [diff] [blame] | 449 | &pmem->pgmap)) |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame] | 450 | return -ENOMEM; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 451 | addr = devm_memremap(dev, pmem->phys_addr, |
| 452 | pmem->size, ARCH_MEMREMAP_PMEM); |
Dan Williams | 91ed7ac | 2018-10-04 16:32:08 -0700 | [diff] [blame] | 453 | memcpy(&bb_res, &nsio->res, sizeof(bb_res)); |
| 454 | } |
Dan Williams | b36f476 | 2015-09-15 02:42:20 -0400 | [diff] [blame] | 455 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 456 | if (IS_ERR(addr)) |
| 457 | return PTR_ERR(addr); |
Dan Williams | 7a9eb20 | 2016-06-03 18:06:47 -0700 | [diff] [blame] | 458 | pmem->virt_addr = addr; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 459 | |
Ross Zwisler | ce7f11a | 2018-06-06 10:45:13 -0600 | [diff] [blame] | 460 | blk_queue_write_cache(q, true, fua); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 461 | blk_queue_physical_block_size(q, PAGE_SIZE); |
Dan Williams | f979b13 | 2017-06-04 12:12:07 +0900 | [diff] [blame] | 462 | blk_queue_logical_block_size(q, pmem_sector_size(ndns)); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 463 | blk_queue_max_hw_sectors(q, UINT_MAX); |
Bart Van Assche | 8b904b5 | 2018-03-07 17:10:10 -0800 | [diff] [blame] | 464 | blk_queue_flag_set(QUEUE_FLAG_NONROT, q); |
Ross Zwisler | 4557641 | 2018-06-26 16:30:39 -0600 | [diff] [blame] | 465 | if (pmem->pfn_flags & PFN_MAP) |
| 466 | blk_queue_flag_set(QUEUE_FLAG_DAX, q); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 467 | |
Dan Williams | 538ea4a | 2015-10-05 20:35:56 -0400 | [diff] [blame] | 468 | disk = alloc_disk_node(0, nid); |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 469 | if (!disk) |
| 470 | return -ENOMEM; |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 471 | pmem->disk = disk; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 472 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 473 | disk->fops = &pmem_fops; |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 474 | disk->queue = q; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 475 | disk->flags = GENHD_FL_EXT_DEVT; |
Christoph Hellwig | 6ec26b8 | 2020-05-08 18:15:17 +0200 | [diff] [blame^] | 476 | disk->private_data = pmem; |
Minchan Kim | 23c47d2 | 2017-11-15 17:33:00 -0800 | [diff] [blame] | 477 | disk->queue->backing_dev_info->capabilities |= BDI_CAP_SYNCHRONOUS_IO; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 478 | nvdimm_namespace_disk_name(ndns, disk->disk_name); |
Dan Williams | cfe30b8 | 2016-03-03 09:38:00 -0800 | [diff] [blame] | 479 | set_capacity(disk, (pmem->size - pmem->pfn_pad - pmem->data_offset) |
| 480 | / 512); |
Dan Williams | b95f5f4 | 2016-01-04 23:50:23 -0800 | [diff] [blame] | 481 | if (devm_init_badblocks(dev, &pmem->bb)) |
| 482 | return -ENOMEM; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 483 | nvdimm_badblocks_populate(nd_region, &pmem->bb, &bb_res); |
Dan Williams | 57f7f31 | 2016-01-06 12:03:42 -0800 | [diff] [blame] | 484 | disk->bb = &pmem->bb; |
Dan Williams | f02716d | 2016-06-15 14:59:17 -0700 | [diff] [blame] | 485 | |
Pankaj Gupta | fefc1d9 | 2019-07-05 19:33:24 +0530 | [diff] [blame] | 486 | if (is_nvdimm_sync(nd_region)) |
| 487 | flags = DAXDEV_F_SYNC; |
| 488 | dax_dev = alloc_dax(pmem, disk->disk_name, &pmem_dax_ops, flags); |
Vivek Goyal | 4e4ced9 | 2020-04-01 12:11:25 -0400 | [diff] [blame] | 489 | if (IS_ERR(dax_dev)) { |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 490 | put_disk(disk); |
Vivek Goyal | 4e4ced9 | 2020-04-01 12:11:25 -0400 | [diff] [blame] | 491 | return PTR_ERR(dax_dev); |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 492 | } |
Ross Zwisler | ce7f11a | 2018-06-06 10:45:13 -0600 | [diff] [blame] | 493 | dax_write_cache(dax_dev, nvdimm_has_cache(nd_region)); |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 494 | pmem->dax_dev = dax_dev; |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 495 | gendev = disk_to_dev(disk); |
| 496 | gendev->groups = pmem_attribute_groups; |
| 497 | |
Hannes Reinecke | fef912b | 2018-09-28 08:17:19 +0200 | [diff] [blame] | 498 | device_add_disk(dev, disk, NULL); |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 499 | if (devm_add_action_or_reset(dev, pmem_release_disk, pmem)) |
Dan Williams | f02716d | 2016-06-15 14:59:17 -0700 | [diff] [blame] | 500 | return -ENOMEM; |
| 501 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 502 | revalidate_disk(disk); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 503 | |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 504 | pmem->bb_state = sysfs_get_dirent(disk_to_dev(disk)->kobj.sd, |
| 505 | "badblocks"); |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 506 | if (!pmem->bb_state) |
| 507 | dev_warn(dev, "'badblocks' notification disabled\n"); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 508 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 509 | return 0; |
| 510 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 511 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 512 | static int nd_pmem_probe(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 513 | { |
Aneesh Kumar K.V | 1c97afa | 2019-09-05 21:15:58 +0530 | [diff] [blame] | 514 | int ret; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 515 | struct nd_namespace_common *ndns; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 516 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 517 | ndns = nvdimm_namespace_common_probe(dev); |
| 518 | if (IS_ERR(ndns)) |
| 519 | return PTR_ERR(ndns); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 520 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 521 | if (is_nd_btt(dev)) |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 522 | return nvdimm_namespace_attach_btt(ndns); |
| 523 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 524 | if (is_nd_pfn(dev)) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 525 | return pmem_attach_disk(dev, ndns); |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 526 | |
Aneesh Kumar K.V | 8f4b01f | 2019-10-31 16:27:41 +0530 | [diff] [blame] | 527 | ret = devm_namespace_enable(dev, ndns, nd_info_block_reserve()); |
| 528 | if (ret) |
| 529 | return ret; |
| 530 | |
Aneesh Kumar K.V | 1c97afa | 2019-09-05 21:15:58 +0530 | [diff] [blame] | 531 | ret = nd_btt_probe(dev, ndns); |
| 532 | if (ret == 0) |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 533 | return -ENXIO; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 534 | |
Aneesh Kumar K.V | 1c97afa | 2019-09-05 21:15:58 +0530 | [diff] [blame] | 535 | /* |
| 536 | * We have two failure conditions here, there is no |
| 537 | * info reserver block or we found a valid info reserve block |
| 538 | * but failed to initialize the pfn superblock. |
| 539 | * |
| 540 | * For the first case consider namespace as a raw pmem namespace |
| 541 | * and attach a disk. |
| 542 | * |
| 543 | * For the latter, consider this a success and advance the namespace |
| 544 | * seed. |
| 545 | */ |
| 546 | ret = nd_pfn_probe(dev, ndns); |
| 547 | if (ret == 0) |
| 548 | return -ENXIO; |
| 549 | else if (ret == -EOPNOTSUPP) |
| 550 | return ret; |
| 551 | |
| 552 | ret = nd_dax_probe(dev, ndns); |
| 553 | if (ret == 0) |
| 554 | return -ENXIO; |
| 555 | else if (ret == -EOPNOTSUPP) |
| 556 | return ret; |
Aneesh Kumar K.V | 8f4b01f | 2019-10-31 16:27:41 +0530 | [diff] [blame] | 557 | |
| 558 | /* probe complete, attach handles namespace enabling */ |
| 559 | devm_namespace_disable(dev, ndns); |
| 560 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 561 | return pmem_attach_disk(dev, ndns); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 562 | } |
| 563 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 564 | static int nd_pmem_remove(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 565 | { |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 566 | struct pmem_device *pmem = dev_get_drvdata(dev); |
| 567 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 568 | if (is_nd_btt(dev)) |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 569 | nvdimm_namespace_detach_btt(to_nd_btt(dev)); |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 570 | else { |
| 571 | /* |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 572 | * Note, this assumes nd_device_lock() context to not |
| 573 | * race nd_pmem_notify() |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 574 | */ |
| 575 | sysfs_put(pmem->bb_state); |
| 576 | pmem->bb_state = NULL; |
| 577 | } |
Pankaj Gupta | c5d4355 | 2019-07-05 19:33:22 +0530 | [diff] [blame] | 578 | nvdimm_flush(to_nd_region(dev->parent), NULL); |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 579 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 580 | return 0; |
| 581 | } |
| 582 | |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 583 | static void nd_pmem_shutdown(struct device *dev) |
| 584 | { |
Pankaj Gupta | c5d4355 | 2019-07-05 19:33:22 +0530 | [diff] [blame] | 585 | nvdimm_flush(to_nd_region(dev->parent), NULL); |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 586 | } |
| 587 | |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 588 | static void nd_pmem_notify(struct device *dev, enum nvdimm_event event) |
| 589 | { |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 590 | struct nd_region *nd_region; |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 591 | resource_size_t offset = 0, end_trunc = 0; |
| 592 | struct nd_namespace_common *ndns; |
| 593 | struct nd_namespace_io *nsio; |
| 594 | struct resource res; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 595 | struct badblocks *bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 596 | struct kernfs_node *bb_state; |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 597 | |
| 598 | if (event != NVDIMM_REVALIDATE_POISON) |
| 599 | return; |
| 600 | |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 601 | if (is_nd_btt(dev)) { |
| 602 | struct nd_btt *nd_btt = to_nd_btt(dev); |
| 603 | |
| 604 | ndns = nd_btt->ndns; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 605 | nd_region = to_nd_region(ndns->dev.parent); |
| 606 | nsio = to_nd_namespace_io(&ndns->dev); |
| 607 | bb = &nsio->bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 608 | bb_state = NULL; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 609 | } else { |
| 610 | struct pmem_device *pmem = dev_get_drvdata(dev); |
Dan Williams | a390180 | 2016-04-07 20:02:06 -0700 | [diff] [blame] | 611 | |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 612 | nd_region = to_region(pmem); |
| 613 | bb = &pmem->bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 614 | bb_state = pmem->bb_state; |
Dan Williams | a390180 | 2016-04-07 20:02:06 -0700 | [diff] [blame] | 615 | |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 616 | if (is_nd_pfn(dev)) { |
| 617 | struct nd_pfn *nd_pfn = to_nd_pfn(dev); |
| 618 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 619 | |
| 620 | ndns = nd_pfn->ndns; |
| 621 | offset = pmem->data_offset + |
| 622 | __le32_to_cpu(pfn_sb->start_pad); |
| 623 | end_trunc = __le32_to_cpu(pfn_sb->end_trunc); |
| 624 | } else { |
| 625 | ndns = to_ndns(dev); |
| 626 | } |
| 627 | |
| 628 | nsio = to_nd_namespace_io(&ndns->dev); |
| 629 | } |
| 630 | |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 631 | res.start = nsio->res.start + offset; |
| 632 | res.end = nsio->res.end - end_trunc; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 633 | nvdimm_badblocks_populate(nd_region, bb, &res); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 634 | if (bb_state) |
| 635 | sysfs_notify_dirent(bb_state); |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 636 | } |
| 637 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 638 | MODULE_ALIAS("pmem"); |
| 639 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_IO); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 640 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_PMEM); |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 641 | static struct nd_device_driver nd_pmem_driver = { |
| 642 | .probe = nd_pmem_probe, |
| 643 | .remove = nd_pmem_remove, |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 644 | .notify = nd_pmem_notify, |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 645 | .shutdown = nd_pmem_shutdown, |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 646 | .drv = { |
| 647 | .name = "nd_pmem", |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 648 | }, |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 649 | .type = ND_DRIVER_NAMESPACE_IO | ND_DRIVER_NAMESPACE_PMEM, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 650 | }; |
| 651 | |
Johannes Thumshirn | 03e9084 | 2018-03-14 19:25:07 +0100 | [diff] [blame] | 652 | module_nd_driver(nd_pmem_driver); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 653 | |
| 654 | MODULE_AUTHOR("Ross Zwisler <ross.zwisler@linux.intel.com>"); |
| 655 | MODULE_LICENSE("GPL v2"); |