Thomas Gleixner | 2025cf9 | 2019-05-29 07:18:02 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Persistent Memory Driver |
| 4 | * |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 5 | * Copyright (c) 2014-2015, Intel Corporation. |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 6 | * Copyright (c) 2015, Christoph Hellwig <hch@lst.de>. |
| 7 | * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>. |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <asm/cacheflush.h> |
| 11 | #include <linux/blkdev.h> |
| 12 | #include <linux/hdreg.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> |
Dan Williams | c953cc9 | 2018-07-13 21:50:37 -0700 | [diff] [blame] | 15 | #include <linux/set_memory.h> |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 16 | #include <linux/module.h> |
| 17 | #include <linux/moduleparam.h> |
Dan Williams | b95f5f4 | 2016-01-04 23:50:23 -0800 | [diff] [blame] | 18 | #include <linux/badblocks.h> |
Dan Williams | 9476df7 | 2016-01-15 16:56:19 -0800 | [diff] [blame] | 19 | #include <linux/memremap.h> |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 20 | #include <linux/vmalloc.h> |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 21 | #include <linux/blk-mq.h> |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 22 | #include <linux/pfn_t.h> |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 23 | #include <linux/slab.h> |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 24 | #include <linux/uio.h> |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 25 | #include <linux/dax.h> |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 26 | #include <linux/nd.h> |
Minchan Kim | 23c47d2 | 2017-11-15 17:33:00 -0800 | [diff] [blame] | 27 | #include <linux/backing-dev.h> |
Dan Williams | f295e53 | 2016-06-17 11:08:06 -0700 | [diff] [blame] | 28 | #include "pmem.h" |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 29 | #include "pfn.h" |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 30 | #include "nd.h" |
Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 31 | #include "nd-core.h" |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 32 | |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 33 | static struct device *to_dev(struct pmem_device *pmem) |
| 34 | { |
| 35 | /* |
| 36 | * nvdimm bus services need a 'dev' parameter, and we record the device |
| 37 | * at init in bb.dev. |
| 38 | */ |
| 39 | return pmem->bb.dev; |
| 40 | } |
| 41 | |
| 42 | static struct nd_region *to_region(struct pmem_device *pmem) |
| 43 | { |
| 44 | return to_nd_region(to_dev(pmem)->parent); |
| 45 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 46 | |
Dan Williams | c953cc9 | 2018-07-13 21:50:37 -0700 | [diff] [blame] | 47 | static void hwpoison_clear(struct pmem_device *pmem, |
| 48 | phys_addr_t phys, unsigned int len) |
| 49 | { |
| 50 | unsigned long pfn_start, pfn_end, pfn; |
| 51 | |
| 52 | /* only pmem in the linear map supports HWPoison */ |
| 53 | if (is_vmalloc_addr(pmem->virt_addr)) |
| 54 | return; |
| 55 | |
| 56 | pfn_start = PHYS_PFN(phys); |
| 57 | pfn_end = pfn_start + PHYS_PFN(len); |
| 58 | for (pfn = pfn_start; pfn < pfn_end; pfn++) { |
| 59 | struct page *page = pfn_to_page(pfn); |
| 60 | |
| 61 | /* |
| 62 | * Note, no need to hold a get_dev_pagemap() reference |
| 63 | * here since we're in the driver I/O path and |
| 64 | * outstanding I/O requests pin the dev_pagemap. |
| 65 | */ |
| 66 | if (test_and_clear_pmem_poison(page)) |
| 67 | clear_mce_nospec(pfn); |
| 68 | } |
| 69 | } |
| 70 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 71 | static blk_status_t pmem_clear_poison(struct pmem_device *pmem, |
| 72 | phys_addr_t offset, unsigned int len) |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 73 | { |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 74 | struct device *dev = to_dev(pmem); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 75 | sector_t sector; |
| 76 | long cleared; |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 77 | blk_status_t rc = BLK_STS_OK; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 78 | |
| 79 | sector = (offset - pmem->data_offset) / 512; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 80 | |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 81 | cleared = nvdimm_clear_poison(dev, pmem->phys_addr + offset, len); |
| 82 | if (cleared < len) |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 83 | rc = BLK_STS_IOERR; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 84 | if (cleared > 0 && cleared / 512) { |
Dan Williams | c953cc9 | 2018-07-13 21:50:37 -0700 | [diff] [blame] | 85 | hwpoison_clear(pmem, pmem->phys_addr + offset, cleared); |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 86 | cleared /= 512; |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 87 | dev_dbg(dev, "%#llx clear %ld sector%s\n", |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 88 | (unsigned long long) sector, cleared, |
| 89 | cleared > 1 ? "s" : ""); |
Fabian Frederick | 0a3f27b | 2016-12-04 10:48:58 -0800 | [diff] [blame] | 90 | badblocks_clear(&pmem->bb, sector, cleared); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 91 | if (pmem->bb_state) |
| 92 | sysfs_notify_dirent(pmem->bb_state); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 93 | } |
Toshi Kani | 3115bb0 | 2016-10-13 09:54:21 -0600 | [diff] [blame] | 94 | |
Dan Williams | f2b6125 | 2017-05-29 23:00:34 -0700 | [diff] [blame] | 95 | arch_invalidate_pmem(pmem->virt_addr + offset, len); |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 96 | |
| 97 | return rc; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 98 | } |
| 99 | |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 100 | static void write_pmem(void *pmem_addr, struct page *page, |
| 101 | unsigned int off, unsigned int len) |
| 102 | { |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 103 | unsigned int chunk; |
| 104 | void *mem; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 105 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 106 | while (len) { |
| 107 | mem = kmap_atomic(page); |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 108 | chunk = min_t(unsigned int, len, PAGE_SIZE - off); |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 109 | memcpy_flushcache(pmem_addr, mem + off, chunk); |
| 110 | kunmap_atomic(mem); |
| 111 | len -= chunk; |
| 112 | off = 0; |
| 113 | page++; |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 114 | pmem_addr += chunk; |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 115 | } |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 116 | } |
| 117 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 118 | static blk_status_t read_pmem(struct page *page, unsigned int off, |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 119 | void *pmem_addr, unsigned int len) |
| 120 | { |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 121 | unsigned int chunk; |
Dan Williams | 60622d6 | 2018-05-03 17:06:21 -0700 | [diff] [blame] | 122 | unsigned long rem; |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 123 | void *mem; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 124 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 125 | while (len) { |
| 126 | mem = kmap_atomic(page); |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 127 | chunk = min_t(unsigned int, len, PAGE_SIZE - off); |
Dan Williams | 60622d6 | 2018-05-03 17:06:21 -0700 | [diff] [blame] | 128 | rem = memcpy_mcsafe(mem + off, pmem_addr, chunk); |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 129 | kunmap_atomic(mem); |
Dan Williams | 60622d6 | 2018-05-03 17:06:21 -0700 | [diff] [blame] | 130 | if (rem) |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 131 | return BLK_STS_IOERR; |
| 132 | len -= chunk; |
| 133 | off = 0; |
| 134 | page++; |
Li RongQing | 9dc6488 | 2019-04-04 10:58:01 +0800 | [diff] [blame] | 135 | pmem_addr += chunk; |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 136 | } |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 137 | return BLK_STS_OK; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 138 | } |
| 139 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 140 | static blk_status_t pmem_do_bvec(struct pmem_device *pmem, struct page *page, |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 141 | unsigned int len, unsigned int off, unsigned int op, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 142 | sector_t sector) |
| 143 | { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 144 | blk_status_t rc = BLK_STS_OK; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 145 | bool bad_pmem = false; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 146 | phys_addr_t pmem_off = sector * 512 + pmem->data_offset; |
Dan Williams | 7a9eb20 | 2016-06-03 18:06:47 -0700 | [diff] [blame] | 147 | void *pmem_addr = pmem->virt_addr + pmem_off; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 148 | |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 149 | if (unlikely(is_bad_pmem(&pmem->bb, sector, len))) |
| 150 | bad_pmem = true; |
| 151 | |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 152 | if (!op_is_write(op)) { |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 153 | if (unlikely(bad_pmem)) |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 154 | rc = BLK_STS_IOERR; |
Dan Williams | b5ebc8e | 2016-03-06 15:20:51 -0800 | [diff] [blame] | 155 | else { |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 156 | rc = read_pmem(page, off, pmem_addr, len); |
Dan Williams | b5ebc8e | 2016-03-06 15:20:51 -0800 | [diff] [blame] | 157 | flush_dcache_page(page); |
| 158 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 159 | } else { |
Dan Williams | 0a370d26 | 2016-04-14 19:40:47 -0700 | [diff] [blame] | 160 | /* |
| 161 | * Note that we write the data both before and after |
| 162 | * clearing poison. The write before clear poison |
| 163 | * handles situations where the latest written data is |
| 164 | * preserved and the clear poison operation simply marks |
| 165 | * the address range as valid without changing the data. |
| 166 | * In this case application software can assume that an |
| 167 | * interrupted write will either return the new good |
| 168 | * data or an error. |
| 169 | * |
| 170 | * However, if pmem_clear_poison() leaves the data in an |
| 171 | * indeterminate state we need to perform the write |
| 172 | * after clear poison. |
| 173 | */ |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 174 | flush_dcache_page(page); |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 175 | write_pmem(pmem_addr, page, off, len); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 176 | if (unlikely(bad_pmem)) { |
Toshi Kani | 3115bb0 | 2016-10-13 09:54:21 -0600 | [diff] [blame] | 177 | rc = pmem_clear_poison(pmem, pmem_off, len); |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 178 | write_pmem(pmem_addr, page, off, len); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 179 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 180 | } |
| 181 | |
Dan Williams | b5ebc8e | 2016-03-06 15:20:51 -0800 | [diff] [blame] | 182 | return rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 183 | } |
| 184 | |
Jens Axboe | dece163 | 2015-11-05 10:41:16 -0700 | [diff] [blame] | 185 | static blk_qc_t pmem_make_request(struct request_queue *q, struct bio *bio) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 186 | { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 187 | blk_status_t rc = 0; |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 188 | bool do_acct; |
| 189 | unsigned long start; |
Dan Williams | edc870e | 2015-05-16 12:28:51 -0400 | [diff] [blame] | 190 | struct bio_vec bvec; |
| 191 | struct bvec_iter iter; |
Dan Williams | bd842b8 | 2016-03-18 23:47:43 -0700 | [diff] [blame] | 192 | struct pmem_device *pmem = q->queuedata; |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 193 | struct nd_region *nd_region = to_region(pmem); |
| 194 | |
Ross Zwisler | d2d6364 | 2018-06-06 10:45:12 -0600 | [diff] [blame] | 195 | if (bio->bi_opf & REQ_PREFLUSH) |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 196 | nvdimm_flush(nd_region); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 197 | |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 198 | do_acct = nd_iostat_start(bio, &start); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 199 | bio_for_each_segment(bvec, bio, iter) { |
| 200 | rc = pmem_do_bvec(pmem, bvec.bv_page, bvec.bv_len, |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 201 | bvec.bv_offset, bio_op(bio), iter.bi_sector); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 202 | if (rc) { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 203 | bio->bi_status = rc; |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 204 | break; |
| 205 | } |
| 206 | } |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 207 | if (do_acct) |
| 208 | nd_iostat_end(bio, start); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 209 | |
Jens Axboe | 1eff9d3 | 2016-08-05 15:35:16 -0600 | [diff] [blame] | 210 | if (bio->bi_opf & REQ_FUA) |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 211 | nvdimm_flush(nd_region); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 212 | |
Christoph Hellwig | 4246a0b | 2015-07-20 15:29:37 +0200 | [diff] [blame] | 213 | bio_endio(bio); |
Jens Axboe | dece163 | 2015-11-05 10:41:16 -0700 | [diff] [blame] | 214 | return BLK_QC_T_NONE; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 215 | } |
| 216 | |
| 217 | static int pmem_rw_page(struct block_device *bdev, sector_t sector, |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 218 | struct page *page, unsigned int op) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 219 | { |
Dan Williams | bd842b8 | 2016-03-18 23:47:43 -0700 | [diff] [blame] | 220 | struct pmem_device *pmem = bdev->bd_queue->queuedata; |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 221 | blk_status_t rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 222 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 223 | rc = pmem_do_bvec(pmem, page, hpage_nr_pages(page) * PAGE_SIZE, |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 224 | 0, op, sector); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 225 | |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 226 | /* |
| 227 | * The ->rw_page interface is subtle and tricky. The core |
| 228 | * retries on any error, so we can only invoke page_endio() in |
| 229 | * the successful completion case. Otherwise, we'll see crashes |
| 230 | * caused by double completion. |
| 231 | */ |
| 232 | if (rc == 0) |
Tejun Heo | 3f289dc | 2018-07-18 04:47:36 -0700 | [diff] [blame] | 233 | page_endio(page, op_is_write(op), 0); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 234 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 235 | return blk_status_to_errno(rc); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 236 | } |
| 237 | |
Dan Williams | f295e53 | 2016-06-17 11:08:06 -0700 | [diff] [blame] | 238 | /* see "strong" declaration in tools/testing/nvdimm/pmem-dax.c */ |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 239 | __weak long __pmem_direct_access(struct pmem_device *pmem, pgoff_t pgoff, |
| 240 | long nr_pages, void **kaddr, pfn_t *pfn) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 241 | { |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 242 | resource_size_t offset = PFN_PHYS(pgoff) + pmem->data_offset; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 243 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 244 | if (unlikely(is_bad_pmem(&pmem->bb, PFN_PHYS(pgoff) / 512, |
| 245 | PFN_PHYS(nr_pages)))) |
Dan Williams | 0a70bd4 | 2016-02-24 14:02:11 -0800 | [diff] [blame] | 246 | return -EIO; |
Huaisheng Ye | 46a590c | 2018-07-30 15:15:43 +0800 | [diff] [blame] | 247 | |
| 248 | if (kaddr) |
| 249 | *kaddr = pmem->virt_addr + offset; |
| 250 | if (pfn) |
| 251 | *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 252 | |
Dan Williams | 0a70bd4 | 2016-02-24 14:02:11 -0800 | [diff] [blame] | 253 | /* |
| 254 | * If badblocks are present, limit known good range to the |
| 255 | * requested range. |
| 256 | */ |
| 257 | if (unlikely(pmem->bb.count)) |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 258 | return nr_pages; |
| 259 | return PHYS_PFN(pmem->size - pmem->pfn_pad - offset); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 260 | } |
| 261 | |
| 262 | static const struct block_device_operations pmem_fops = { |
| 263 | .owner = THIS_MODULE, |
| 264 | .rw_page = pmem_rw_page, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 265 | .revalidate_disk = nvdimm_revalidate_disk, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 266 | }; |
| 267 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 268 | static long pmem_dax_direct_access(struct dax_device *dax_dev, |
| 269 | pgoff_t pgoff, long nr_pages, void **kaddr, pfn_t *pfn) |
| 270 | { |
| 271 | struct pmem_device *pmem = dax_get_private(dax_dev); |
| 272 | |
| 273 | return __pmem_direct_access(pmem, pgoff, nr_pages, kaddr, pfn); |
| 274 | } |
| 275 | |
Dan Williams | 52f476a | 2019-05-16 17:05:21 -0700 | [diff] [blame] | 276 | /* |
| 277 | * Use the 'no check' versions of copy_from_iter_flushcache() and |
| 278 | * copy_to_iter_mcsafe() to bypass HARDENED_USERCOPY overhead. Bounds |
| 279 | * checking, both file offset and device offset, is handled by |
| 280 | * dax_iomap_actor() |
| 281 | */ |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 282 | static size_t pmem_copy_from_iter(struct dax_device *dax_dev, pgoff_t pgoff, |
| 283 | void *addr, size_t bytes, struct iov_iter *i) |
| 284 | { |
Dan Williams | 52f476a | 2019-05-16 17:05:21 -0700 | [diff] [blame] | 285 | return _copy_from_iter_flushcache(addr, bytes, i); |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 286 | } |
| 287 | |
Dan Williams | b3a9a0c | 2018-05-02 06:46:33 -0700 | [diff] [blame] | 288 | static size_t pmem_copy_to_iter(struct dax_device *dax_dev, pgoff_t pgoff, |
| 289 | void *addr, size_t bytes, struct iov_iter *i) |
| 290 | { |
Dan Williams | 52f476a | 2019-05-16 17:05:21 -0700 | [diff] [blame] | 291 | return _copy_to_iter_mcsafe(addr, bytes, i); |
Dan Williams | b3a9a0c | 2018-05-02 06:46:33 -0700 | [diff] [blame] | 292 | } |
| 293 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 294 | static const struct dax_operations pmem_dax_ops = { |
| 295 | .direct_access = pmem_dax_direct_access, |
Dan Williams | 7bf7eac | 2019-05-16 13:26:29 -0700 | [diff] [blame] | 296 | .dax_supported = generic_fsdax_supported, |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 297 | .copy_from_iter = pmem_copy_from_iter, |
Dan Williams | b3a9a0c | 2018-05-02 06:46:33 -0700 | [diff] [blame] | 298 | .copy_to_iter = pmem_copy_to_iter, |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 299 | }; |
| 300 | |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 301 | static const struct attribute_group *pmem_attribute_groups[] = { |
| 302 | &dax_attribute_group, |
| 303 | NULL, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 304 | }; |
| 305 | |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame^] | 306 | static void __pmem_release_queue(struct percpu_ref *ref) |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 307 | { |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame^] | 308 | struct request_queue *q; |
| 309 | |
| 310 | q = container_of(ref, typeof(*q), q_usage_counter); |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 311 | blk_cleanup_queue(q); |
| 312 | } |
| 313 | |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame^] | 314 | static void pmem_release_queue(void *ref) |
| 315 | { |
| 316 | __pmem_release_queue(ref); |
| 317 | } |
| 318 | |
Dan Williams | a95c90f | 2018-12-28 00:34:57 -0800 | [diff] [blame] | 319 | static void pmem_freeze_queue(struct percpu_ref *ref) |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 320 | { |
Dan Williams | a95c90f | 2018-12-28 00:34:57 -0800 | [diff] [blame] | 321 | struct request_queue *q; |
| 322 | |
| 323 | q = container_of(ref, typeof(*q), q_usage_counter); |
Linus Torvalds | d3b5d35 | 2017-05-01 23:54:56 -0700 | [diff] [blame] | 324 | blk_freeze_queue_start(q); |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 325 | } |
| 326 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 327 | static void pmem_release_disk(void *__pmem) |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 328 | { |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 329 | struct pmem_device *pmem = __pmem; |
| 330 | |
| 331 | kill_dax(pmem->dax_dev); |
| 332 | put_dax(pmem->dax_dev); |
| 333 | del_gendisk(pmem->disk); |
| 334 | put_disk(pmem->disk); |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 335 | } |
| 336 | |
Dan Williams | e7638488 | 2018-05-16 11:46:08 -0700 | [diff] [blame] | 337 | static void pmem_release_pgmap_ops(void *__pgmap) |
| 338 | { |
| 339 | dev_pagemap_put_ops(); |
| 340 | } |
| 341 | |
| 342 | static void fsdax_pagefree(struct page *page, void *data) |
| 343 | { |
| 344 | wake_up_var(&page->_refcount); |
| 345 | } |
| 346 | |
| 347 | static int setup_pagemap_fsdax(struct device *dev, struct dev_pagemap *pgmap) |
| 348 | { |
| 349 | dev_pagemap_get_ops(); |
| 350 | if (devm_add_action_or_reset(dev, pmem_release_pgmap_ops, pgmap)) |
| 351 | return -ENOMEM; |
| 352 | pgmap->type = MEMORY_DEVICE_FS_DAX; |
| 353 | pgmap->page_free = fsdax_pagefree; |
| 354 | |
| 355 | return 0; |
| 356 | } |
| 357 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 358 | static int pmem_attach_disk(struct device *dev, |
| 359 | struct nd_namespace_common *ndns) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 360 | { |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 361 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 362 | struct nd_region *nd_region = to_nd_region(dev->parent); |
Ross Zwisler | ce7f11a | 2018-06-06 10:45:13 -0600 | [diff] [blame] | 363 | int nid = dev_to_node(dev), fua; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 364 | struct resource *res = &nsio->res; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 365 | struct resource bb_res; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 366 | struct nd_pfn *nd_pfn = NULL; |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 367 | struct dax_device *dax_dev; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 368 | struct nd_pfn_sb *pfn_sb; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 369 | struct pmem_device *pmem; |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 370 | struct request_queue *q; |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 371 | struct device *gendev; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 372 | struct gendisk *disk; |
| 373 | void *addr; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 374 | int rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 375 | |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 376 | pmem = devm_kzalloc(dev, sizeof(*pmem), GFP_KERNEL); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 377 | if (!pmem) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 378 | return -ENOMEM; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 379 | |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 380 | /* while nsio_rw_bytes is active, parse a pfn info block if present */ |
| 381 | if (is_nd_pfn(dev)) { |
| 382 | nd_pfn = to_nd_pfn(dev); |
| 383 | rc = nvdimm_setup_pfn(nd_pfn, &pmem->pgmap); |
| 384 | if (rc) |
| 385 | return rc; |
| 386 | } |
| 387 | |
| 388 | /* we're attaching a block device, disable raw namespace access */ |
| 389 | devm_nsio_disable(dev, nsio); |
| 390 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 391 | dev_set_drvdata(dev, pmem); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 392 | pmem->phys_addr = res->start; |
| 393 | pmem->size = resource_size(res); |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 394 | fua = nvdimm_has_flush(nd_region); |
| 395 | if (!IS_ENABLED(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) || fua < 0) { |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 396 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 397 | fua = 0; |
| 398 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 399 | |
Dan Williams | 947df02 | 2016-03-21 22:28:40 -0700 | [diff] [blame] | 400 | if (!devm_request_mem_region(dev, res->start, resource_size(res), |
Dan Williams | 450c663 | 2016-11-28 11:15:18 -0800 | [diff] [blame] | 401 | dev_name(&ndns->dev))) { |
Dan Williams | 947df02 | 2016-03-21 22:28:40 -0700 | [diff] [blame] | 402 | dev_warn(dev, "could not reserve region %pR\n", res); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 403 | return -EBUSY; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 404 | } |
| 405 | |
Christoph Hellwig | 6d46964 | 2018-11-14 17:02:18 +0100 | [diff] [blame] | 406 | q = blk_alloc_queue_node(GFP_KERNEL, dev_to_node(dev)); |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 407 | if (!q) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 408 | return -ENOMEM; |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 409 | |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 410 | pmem->pfn_flags = PFN_DEV; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 411 | pmem->pgmap.ref = &q->q_usage_counter; |
Dan Williams | a95c90f | 2018-12-28 00:34:57 -0800 | [diff] [blame] | 412 | pmem->pgmap.kill = pmem_freeze_queue; |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame^] | 413 | pmem->pgmap.cleanup = __pmem_release_queue; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 414 | if (is_nd_pfn(dev)) { |
Dan Williams | e7638488 | 2018-05-16 11:46:08 -0700 | [diff] [blame] | 415 | if (setup_pagemap_fsdax(dev, &pmem->pgmap)) |
| 416 | return -ENOMEM; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 417 | addr = devm_memremap_pages(dev, &pmem->pgmap); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 418 | pfn_sb = nd_pfn->pfn_sb; |
| 419 | pmem->data_offset = le64_to_cpu(pfn_sb->dataoff); |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 420 | pmem->pfn_pad = resource_size(res) - |
| 421 | resource_size(&pmem->pgmap.res); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 422 | pmem->pfn_flags |= PFN_MAP; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 423 | memcpy(&bb_res, &pmem->pgmap.res, sizeof(bb_res)); |
| 424 | bb_res.start += pmem->data_offset; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 425 | } else if (pmem_should_map_pages(dev)) { |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 426 | memcpy(&pmem->pgmap.res, &nsio->res, sizeof(pmem->pgmap.res)); |
| 427 | pmem->pgmap.altmap_valid = false; |
Dan Williams | e7638488 | 2018-05-16 11:46:08 -0700 | [diff] [blame] | 428 | if (setup_pagemap_fsdax(dev, &pmem->pgmap)) |
| 429 | return -ENOMEM; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 430 | addr = devm_memremap_pages(dev, &pmem->pgmap); |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 431 | pmem->pfn_flags |= PFN_MAP; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 432 | memcpy(&bb_res, &pmem->pgmap.res, sizeof(bb_res)); |
Dan Williams | 91ed7ac | 2018-10-04 16:32:08 -0700 | [diff] [blame] | 433 | } else { |
Dan Williams | 50f44ee | 2019-06-13 15:56:33 -0700 | [diff] [blame^] | 434 | if (devm_add_action_or_reset(dev, pmem_release_queue, |
| 435 | &q->q_usage_counter)) |
| 436 | return -ENOMEM; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 437 | addr = devm_memremap(dev, pmem->phys_addr, |
| 438 | pmem->size, ARCH_MEMREMAP_PMEM); |
Dan Williams | 91ed7ac | 2018-10-04 16:32:08 -0700 | [diff] [blame] | 439 | memcpy(&bb_res, &nsio->res, sizeof(bb_res)); |
| 440 | } |
Dan Williams | b36f476 | 2015-09-15 02:42:20 -0400 | [diff] [blame] | 441 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 442 | if (IS_ERR(addr)) |
| 443 | return PTR_ERR(addr); |
Dan Williams | 7a9eb20 | 2016-06-03 18:06:47 -0700 | [diff] [blame] | 444 | pmem->virt_addr = addr; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 445 | |
Ross Zwisler | ce7f11a | 2018-06-06 10:45:13 -0600 | [diff] [blame] | 446 | blk_queue_write_cache(q, true, fua); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 447 | blk_queue_make_request(q, pmem_make_request); |
| 448 | blk_queue_physical_block_size(q, PAGE_SIZE); |
Dan Williams | f979b13 | 2017-06-04 12:12:07 +0900 | [diff] [blame] | 449 | blk_queue_logical_block_size(q, pmem_sector_size(ndns)); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 450 | blk_queue_max_hw_sectors(q, UINT_MAX); |
Bart Van Assche | 8b904b5 | 2018-03-07 17:10:10 -0800 | [diff] [blame] | 451 | blk_queue_flag_set(QUEUE_FLAG_NONROT, q); |
Ross Zwisler | 4557641 | 2018-06-26 16:30:39 -0600 | [diff] [blame] | 452 | if (pmem->pfn_flags & PFN_MAP) |
| 453 | blk_queue_flag_set(QUEUE_FLAG_DAX, q); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 454 | q->queuedata = pmem; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 455 | |
Dan Williams | 538ea4a | 2015-10-05 20:35:56 -0400 | [diff] [blame] | 456 | disk = alloc_disk_node(0, nid); |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 457 | if (!disk) |
| 458 | return -ENOMEM; |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 459 | pmem->disk = disk; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 460 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 461 | disk->fops = &pmem_fops; |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 462 | disk->queue = q; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 463 | disk->flags = GENHD_FL_EXT_DEVT; |
Minchan Kim | 23c47d2 | 2017-11-15 17:33:00 -0800 | [diff] [blame] | 464 | disk->queue->backing_dev_info->capabilities |= BDI_CAP_SYNCHRONOUS_IO; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 465 | nvdimm_namespace_disk_name(ndns, disk->disk_name); |
Dan Williams | cfe30b8 | 2016-03-03 09:38:00 -0800 | [diff] [blame] | 466 | set_capacity(disk, (pmem->size - pmem->pfn_pad - pmem->data_offset) |
| 467 | / 512); |
Dan Williams | b95f5f4 | 2016-01-04 23:50:23 -0800 | [diff] [blame] | 468 | if (devm_init_badblocks(dev, &pmem->bb)) |
| 469 | return -ENOMEM; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 470 | nvdimm_badblocks_populate(nd_region, &pmem->bb, &bb_res); |
Dan Williams | 57f7f31 | 2016-01-06 12:03:42 -0800 | [diff] [blame] | 471 | disk->bb = &pmem->bb; |
Dan Williams | f02716d | 2016-06-15 14:59:17 -0700 | [diff] [blame] | 472 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 473 | dax_dev = alloc_dax(pmem, disk->disk_name, &pmem_dax_ops); |
| 474 | if (!dax_dev) { |
| 475 | put_disk(disk); |
| 476 | return -ENOMEM; |
| 477 | } |
Ross Zwisler | ce7f11a | 2018-06-06 10:45:13 -0600 | [diff] [blame] | 478 | dax_write_cache(dax_dev, nvdimm_has_cache(nd_region)); |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 479 | pmem->dax_dev = dax_dev; |
| 480 | |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 481 | gendev = disk_to_dev(disk); |
| 482 | gendev->groups = pmem_attribute_groups; |
| 483 | |
Hannes Reinecke | fef912b | 2018-09-28 08:17:19 +0200 | [diff] [blame] | 484 | device_add_disk(dev, disk, NULL); |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 485 | if (devm_add_action_or_reset(dev, pmem_release_disk, pmem)) |
Dan Williams | f02716d | 2016-06-15 14:59:17 -0700 | [diff] [blame] | 486 | return -ENOMEM; |
| 487 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 488 | revalidate_disk(disk); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 489 | |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 490 | pmem->bb_state = sysfs_get_dirent(disk_to_dev(disk)->kobj.sd, |
| 491 | "badblocks"); |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 492 | if (!pmem->bb_state) |
| 493 | dev_warn(dev, "'badblocks' notification disabled\n"); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 494 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 495 | return 0; |
| 496 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 497 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 498 | static int nd_pmem_probe(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 499 | { |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 500 | struct nd_namespace_common *ndns; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 501 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 502 | ndns = nvdimm_namespace_common_probe(dev); |
| 503 | if (IS_ERR(ndns)) |
| 504 | return PTR_ERR(ndns); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 505 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 506 | if (devm_nsio_enable(dev, to_nd_namespace_io(&ndns->dev))) |
| 507 | return -ENXIO; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 508 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 509 | if (is_nd_btt(dev)) |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 510 | return nvdimm_namespace_attach_btt(ndns); |
| 511 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 512 | if (is_nd_pfn(dev)) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 513 | return pmem_attach_disk(dev, ndns); |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 514 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 515 | /* if we find a valid info-block we'll come back as that personality */ |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 516 | if (nd_btt_probe(dev, ndns) == 0 || nd_pfn_probe(dev, ndns) == 0 |
| 517 | || nd_dax_probe(dev, ndns) == 0) |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 518 | return -ENXIO; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 519 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 520 | /* ...otherwise we're just a raw pmem device */ |
| 521 | return pmem_attach_disk(dev, ndns); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 522 | } |
| 523 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 524 | static int nd_pmem_remove(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 525 | { |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 526 | struct pmem_device *pmem = dev_get_drvdata(dev); |
| 527 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 528 | if (is_nd_btt(dev)) |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 529 | nvdimm_namespace_detach_btt(to_nd_btt(dev)); |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 530 | else { |
| 531 | /* |
| 532 | * Note, this assumes device_lock() context to not race |
| 533 | * nd_pmem_notify() |
| 534 | */ |
| 535 | sysfs_put(pmem->bb_state); |
| 536 | pmem->bb_state = NULL; |
| 537 | } |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 538 | nvdimm_flush(to_nd_region(dev->parent)); |
| 539 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 540 | return 0; |
| 541 | } |
| 542 | |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 543 | static void nd_pmem_shutdown(struct device *dev) |
| 544 | { |
| 545 | nvdimm_flush(to_nd_region(dev->parent)); |
| 546 | } |
| 547 | |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 548 | static void nd_pmem_notify(struct device *dev, enum nvdimm_event event) |
| 549 | { |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 550 | struct nd_region *nd_region; |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 551 | resource_size_t offset = 0, end_trunc = 0; |
| 552 | struct nd_namespace_common *ndns; |
| 553 | struct nd_namespace_io *nsio; |
| 554 | struct resource res; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 555 | struct badblocks *bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 556 | struct kernfs_node *bb_state; |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 557 | |
| 558 | if (event != NVDIMM_REVALIDATE_POISON) |
| 559 | return; |
| 560 | |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 561 | if (is_nd_btt(dev)) { |
| 562 | struct nd_btt *nd_btt = to_nd_btt(dev); |
| 563 | |
| 564 | ndns = nd_btt->ndns; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 565 | nd_region = to_nd_region(ndns->dev.parent); |
| 566 | nsio = to_nd_namespace_io(&ndns->dev); |
| 567 | bb = &nsio->bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 568 | bb_state = NULL; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 569 | } else { |
| 570 | struct pmem_device *pmem = dev_get_drvdata(dev); |
Dan Williams | a390180 | 2016-04-07 20:02:06 -0700 | [diff] [blame] | 571 | |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 572 | nd_region = to_region(pmem); |
| 573 | bb = &pmem->bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 574 | bb_state = pmem->bb_state; |
Dan Williams | a390180 | 2016-04-07 20:02:06 -0700 | [diff] [blame] | 575 | |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 576 | if (is_nd_pfn(dev)) { |
| 577 | struct nd_pfn *nd_pfn = to_nd_pfn(dev); |
| 578 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 579 | |
| 580 | ndns = nd_pfn->ndns; |
| 581 | offset = pmem->data_offset + |
| 582 | __le32_to_cpu(pfn_sb->start_pad); |
| 583 | end_trunc = __le32_to_cpu(pfn_sb->end_trunc); |
| 584 | } else { |
| 585 | ndns = to_ndns(dev); |
| 586 | } |
| 587 | |
| 588 | nsio = to_nd_namespace_io(&ndns->dev); |
| 589 | } |
| 590 | |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 591 | res.start = nsio->res.start + offset; |
| 592 | res.end = nsio->res.end - end_trunc; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 593 | nvdimm_badblocks_populate(nd_region, bb, &res); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 594 | if (bb_state) |
| 595 | sysfs_notify_dirent(bb_state); |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 596 | } |
| 597 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 598 | MODULE_ALIAS("pmem"); |
| 599 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_IO); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 600 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_PMEM); |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 601 | static struct nd_device_driver nd_pmem_driver = { |
| 602 | .probe = nd_pmem_probe, |
| 603 | .remove = nd_pmem_remove, |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 604 | .notify = nd_pmem_notify, |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 605 | .shutdown = nd_pmem_shutdown, |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 606 | .drv = { |
| 607 | .name = "nd_pmem", |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 608 | }, |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 609 | .type = ND_DRIVER_NAMESPACE_IO | ND_DRIVER_NAMESPACE_PMEM, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 610 | }; |
| 611 | |
Johannes Thumshirn | 03e9084 | 2018-03-14 19:25:07 +0100 | [diff] [blame] | 612 | module_nd_driver(nd_pmem_driver); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 613 | |
| 614 | MODULE_AUTHOR("Ross Zwisler <ross.zwisler@linux.intel.com>"); |
| 615 | MODULE_LICENSE("GPL v2"); |