Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Intel Running Average Power Limit (RAPL) Driver via MSR interface |
| 4 | * Copyright (c) 2019, Intel Corporation. |
| 5 | */ |
| 6 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 7 | |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/module.h> |
| 10 | #include <linux/list.h> |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/device.h> |
| 13 | #include <linux/slab.h> |
| 14 | #include <linux/log2.h> |
| 15 | #include <linux/bitmap.h> |
| 16 | #include <linux/delay.h> |
| 17 | #include <linux/sysfs.h> |
| 18 | #include <linux/cpu.h> |
| 19 | #include <linux/powercap.h> |
| 20 | #include <linux/suspend.h> |
| 21 | #include <linux/intel_rapl.h> |
| 22 | #include <linux/processor.h> |
Zhang Rui | abcfaeb | 2019-07-10 21:44:34 +0800 | [diff] [blame] | 23 | #include <linux/platform_device.h> |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 24 | |
| 25 | #include <asm/iosf_mbi.h> |
| 26 | #include <asm/cpu_device_id.h> |
| 27 | #include <asm/intel-family.h> |
| 28 | |
| 29 | /* Local defines */ |
| 30 | #define MSR_PLATFORM_POWER_LIMIT 0x0000065C |
Sumeet Pawnikar | 8365a89 | 2020-07-16 23:14:55 +0530 | [diff] [blame] | 31 | #define MSR_VR_CURRENT_CONFIG 0x00000601 |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 32 | |
| 33 | /* private data for RAPL MSR Interface */ |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 34 | static struct rapl_if_priv *rapl_msr_priv; |
| 35 | |
| 36 | static struct rapl_if_priv rapl_msr_priv_intel = { |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 37 | .reg_unit = MSR_RAPL_POWER_UNIT, |
| 38 | .regs[RAPL_DOMAIN_PACKAGE] = { |
| 39 | MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO }, |
| 40 | .regs[RAPL_DOMAIN_PP0] = { |
| 41 | MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 }, |
| 42 | .regs[RAPL_DOMAIN_PP1] = { |
| 43 | MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 }, |
| 44 | .regs[RAPL_DOMAIN_DRAM] = { |
| 45 | MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO }, |
| 46 | .regs[RAPL_DOMAIN_PLATFORM] = { |
| 47 | MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0}, |
Zhang Rui | 0c2dded | 2019-07-10 21:44:32 +0800 | [diff] [blame] | 48 | .limits[RAPL_DOMAIN_PACKAGE] = 2, |
Zhang Rui | f1e8d75 | 2020-10-13 15:42:41 +0800 | [diff] [blame] | 49 | .limits[RAPL_DOMAIN_PLATFORM] = 2, |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 50 | }; |
| 51 | |
Victor Ding | 43756a2 | 2020-10-27 07:23:56 +0000 | [diff] [blame] | 52 | static struct rapl_if_priv rapl_msr_priv_amd = { |
| 53 | .reg_unit = MSR_AMD_RAPL_POWER_UNIT, |
| 54 | .regs[RAPL_DOMAIN_PACKAGE] = { |
| 55 | 0, MSR_AMD_PKG_ENERGY_STATUS, 0, 0, 0 }, |
| 56 | .regs[RAPL_DOMAIN_PP0] = { |
| 57 | 0, MSR_AMD_CORE_ENERGY_STATUS, 0, 0, 0 }, |
| 58 | }; |
| 59 | |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 60 | /* Handles CPU hotplug on multi-socket systems. |
| 61 | * If a CPU goes online as the first CPU of the physical package |
| 62 | * we add the RAPL package to the system. Similarly, when the last |
| 63 | * CPU of the package is removed, we remove the RAPL package and its |
| 64 | * associated domains. Cooling devices are handled accordingly at |
| 65 | * per-domain level. |
| 66 | */ |
| 67 | static int rapl_cpu_online(unsigned int cpu) |
| 68 | { |
| 69 | struct rapl_package *rp; |
| 70 | |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 71 | rp = rapl_find_package_domain(cpu, rapl_msr_priv); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 72 | if (!rp) { |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 73 | rp = rapl_add_package(cpu, rapl_msr_priv); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 74 | if (IS_ERR(rp)) |
| 75 | return PTR_ERR(rp); |
| 76 | } |
| 77 | cpumask_set_cpu(cpu, &rp->cpumask); |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | static int rapl_cpu_down_prep(unsigned int cpu) |
| 82 | { |
| 83 | struct rapl_package *rp; |
| 84 | int lead_cpu; |
| 85 | |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 86 | rp = rapl_find_package_domain(cpu, rapl_msr_priv); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 87 | if (!rp) |
| 88 | return 0; |
| 89 | |
| 90 | cpumask_clear_cpu(cpu, &rp->cpumask); |
| 91 | lead_cpu = cpumask_first(&rp->cpumask); |
| 92 | if (lead_cpu >= nr_cpu_ids) |
| 93 | rapl_remove_package(rp); |
| 94 | else if (rp->lead_cpu == cpu) |
| 95 | rp->lead_cpu = lead_cpu; |
| 96 | return 0; |
| 97 | } |
| 98 | |
| 99 | static int rapl_msr_read_raw(int cpu, struct reg_action *ra) |
| 100 | { |
Zhang Rui | d978e75 | 2019-07-10 21:44:31 +0800 | [diff] [blame] | 101 | u32 msr = (u32)ra->reg; |
| 102 | |
| 103 | if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) { |
| 104 | pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 105 | return -EIO; |
| 106 | } |
| 107 | ra->value &= ra->mask; |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | static void rapl_msr_update_func(void *info) |
| 112 | { |
| 113 | struct reg_action *ra = info; |
Zhang Rui | d978e75 | 2019-07-10 21:44:31 +0800 | [diff] [blame] | 114 | u32 msr = (u32)ra->reg; |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 115 | u64 val; |
| 116 | |
Zhang Rui | d978e75 | 2019-07-10 21:44:31 +0800 | [diff] [blame] | 117 | ra->err = rdmsrl_safe(msr, &val); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 118 | if (ra->err) |
| 119 | return; |
| 120 | |
| 121 | val &= ~ra->mask; |
| 122 | val |= ra->value; |
| 123 | |
Zhang Rui | d978e75 | 2019-07-10 21:44:31 +0800 | [diff] [blame] | 124 | ra->err = wrmsrl_safe(msr, val); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | static int rapl_msr_write_raw(int cpu, struct reg_action *ra) |
| 128 | { |
| 129 | int ret; |
| 130 | |
| 131 | ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1); |
| 132 | if (WARN_ON_ONCE(ret)) |
| 133 | return ret; |
| 134 | |
| 135 | return ra->err; |
| 136 | } |
| 137 | |
Sumeet Pawnikar | 8365a89 | 2020-07-16 23:14:55 +0530 | [diff] [blame] | 138 | /* List of verified CPUs. */ |
| 139 | static const struct x86_cpu_id pl4_support_ids[] = { |
| 140 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_TIGERLAKE_L, X86_FEATURE_ANY }, |
Sumeet Pawnikar | 1cc5b9a | 2021-08-20 17:22:33 +0530 | [diff] [blame] | 141 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE, X86_FEATURE_ANY }, |
| 142 | { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE_L, X86_FEATURE_ANY }, |
Sumeet Pawnikar | 8365a89 | 2020-07-16 23:14:55 +0530 | [diff] [blame] | 143 | {} |
| 144 | }; |
| 145 | |
Zhang Rui | abcfaeb | 2019-07-10 21:44:34 +0800 | [diff] [blame] | 146 | static int rapl_msr_probe(struct platform_device *pdev) |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 147 | { |
Sumeet Pawnikar | 8365a89 | 2020-07-16 23:14:55 +0530 | [diff] [blame] | 148 | const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 149 | int ret; |
| 150 | |
Victor Ding | 43756a2 | 2020-10-27 07:23:56 +0000 | [diff] [blame] | 151 | switch (boot_cpu_data.x86_vendor) { |
| 152 | case X86_VENDOR_INTEL: |
| 153 | rapl_msr_priv = &rapl_msr_priv_intel; |
| 154 | break; |
Pu Wen | a740561 | 2021-03-02 10:01:08 +0800 | [diff] [blame] | 155 | case X86_VENDOR_HYGON: |
Victor Ding | 43756a2 | 2020-10-27 07:23:56 +0000 | [diff] [blame] | 156 | case X86_VENDOR_AMD: |
| 157 | rapl_msr_priv = &rapl_msr_priv_amd; |
| 158 | break; |
| 159 | default: |
| 160 | pr_err("intel-rapl does not support CPU vendor %d\n", boot_cpu_data.x86_vendor); |
| 161 | return -ENODEV; |
| 162 | } |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 163 | rapl_msr_priv->read_raw = rapl_msr_read_raw; |
| 164 | rapl_msr_priv->write_raw = rapl_msr_write_raw; |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 165 | |
Sumeet Pawnikar | 8365a89 | 2020-07-16 23:14:55 +0530 | [diff] [blame] | 166 | if (id) { |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 167 | rapl_msr_priv->limits[RAPL_DOMAIN_PACKAGE] = 3; |
| 168 | rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] = |
Sumeet Pawnikar | 8365a89 | 2020-07-16 23:14:55 +0530 | [diff] [blame] | 169 | MSR_VR_CURRENT_CONFIG; |
| 170 | pr_info("PL4 support detected.\n"); |
| 171 | } |
| 172 | |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 173 | rapl_msr_priv->control_type = powercap_register_control_type(NULL, "intel-rapl", NULL); |
| 174 | if (IS_ERR(rapl_msr_priv->control_type)) { |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 175 | pr_debug("failed to register powercap control_type.\n"); |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 176 | return PTR_ERR(rapl_msr_priv->control_type); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 177 | } |
| 178 | |
| 179 | ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online", |
| 180 | rapl_cpu_online, rapl_cpu_down_prep); |
| 181 | if (ret < 0) |
| 182 | goto out; |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 183 | rapl_msr_priv->pcap_rapl_online = ret; |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 184 | |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 185 | return 0; |
| 186 | |
| 187 | out: |
| 188 | if (ret) |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 189 | powercap_unregister_control_type(rapl_msr_priv->control_type); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 190 | return ret; |
| 191 | } |
| 192 | |
Zhang Rui | abcfaeb | 2019-07-10 21:44:34 +0800 | [diff] [blame] | 193 | static int rapl_msr_remove(struct platform_device *pdev) |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 194 | { |
Victor Ding | a2c32fa | 2020-10-27 07:23:55 +0000 | [diff] [blame] | 195 | cpuhp_remove_state(rapl_msr_priv->pcap_rapl_online); |
| 196 | powercap_unregister_control_type(rapl_msr_priv->control_type); |
Zhang Rui | abcfaeb | 2019-07-10 21:44:34 +0800 | [diff] [blame] | 197 | return 0; |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 198 | } |
| 199 | |
Zhang Rui | abcfaeb | 2019-07-10 21:44:34 +0800 | [diff] [blame] | 200 | static const struct platform_device_id rapl_msr_ids[] = { |
| 201 | { .name = "intel_rapl_msr", }, |
| 202 | {} |
| 203 | }; |
| 204 | MODULE_DEVICE_TABLE(platform, rapl_msr_ids); |
| 205 | |
| 206 | static struct platform_driver intel_rapl_msr_driver = { |
| 207 | .probe = rapl_msr_probe, |
| 208 | .remove = rapl_msr_remove, |
| 209 | .id_table = rapl_msr_ids, |
| 210 | .driver = { |
| 211 | .name = "intel_rapl_msr", |
| 212 | }, |
| 213 | }; |
| 214 | |
| 215 | module_platform_driver(intel_rapl_msr_driver); |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 216 | |
| 217 | MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface"); |
| 218 | MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>"); |
| 219 | MODULE_LICENSE("GPL v2"); |