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Zhang Rui33823882019-07-10 21:44:30 +08001// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Intel Running Average Power Limit (RAPL) Driver via MSR interface
4 * Copyright (c) 2019, Intel Corporation.
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/list.h>
11#include <linux/types.h>
12#include <linux/device.h>
13#include <linux/slab.h>
14#include <linux/log2.h>
15#include <linux/bitmap.h>
16#include <linux/delay.h>
17#include <linux/sysfs.h>
18#include <linux/cpu.h>
19#include <linux/powercap.h>
20#include <linux/suspend.h>
21#include <linux/intel_rapl.h>
22#include <linux/processor.h>
23
24#include <asm/iosf_mbi.h>
25#include <asm/cpu_device_id.h>
26#include <asm/intel-family.h>
27
28/* Local defines */
29#define MSR_PLATFORM_POWER_LIMIT 0x0000065C
30
31/* private data for RAPL MSR Interface */
32static struct rapl_if_priv rapl_msr_priv = {
33 .reg_unit = MSR_RAPL_POWER_UNIT,
34 .regs[RAPL_DOMAIN_PACKAGE] = {
35 MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },
36 .regs[RAPL_DOMAIN_PP0] = {
37 MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },
38 .regs[RAPL_DOMAIN_PP1] = {
39 MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },
40 .regs[RAPL_DOMAIN_DRAM] = {
41 MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },
42 .regs[RAPL_DOMAIN_PLATFORM] = {
43 MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},
Zhang Rui0c2dded2019-07-10 21:44:32 +080044 .limits[RAPL_DOMAIN_PACKAGE] = 2,
Zhang Rui33823882019-07-10 21:44:30 +080045};
46
47/* Handles CPU hotplug on multi-socket systems.
48 * If a CPU goes online as the first CPU of the physical package
49 * we add the RAPL package to the system. Similarly, when the last
50 * CPU of the package is removed, we remove the RAPL package and its
51 * associated domains. Cooling devices are handled accordingly at
52 * per-domain level.
53 */
54static int rapl_cpu_online(unsigned int cpu)
55{
56 struct rapl_package *rp;
57
58 rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
59 if (!rp) {
60 rp = rapl_add_package(cpu, &rapl_msr_priv);
61 if (IS_ERR(rp))
62 return PTR_ERR(rp);
63 }
64 cpumask_set_cpu(cpu, &rp->cpumask);
65 return 0;
66}
67
68static int rapl_cpu_down_prep(unsigned int cpu)
69{
70 struct rapl_package *rp;
71 int lead_cpu;
72
73 rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
74 if (!rp)
75 return 0;
76
77 cpumask_clear_cpu(cpu, &rp->cpumask);
78 lead_cpu = cpumask_first(&rp->cpumask);
79 if (lead_cpu >= nr_cpu_ids)
80 rapl_remove_package(rp);
81 else if (rp->lead_cpu == cpu)
82 rp->lead_cpu = lead_cpu;
83 return 0;
84}
85
86static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
87{
Zhang Ruid978e752019-07-10 21:44:31 +080088 u32 msr = (u32)ra->reg;
89
90 if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
91 pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
Zhang Rui33823882019-07-10 21:44:30 +080092 return -EIO;
93 }
94 ra->value &= ra->mask;
95 return 0;
96}
97
98static void rapl_msr_update_func(void *info)
99{
100 struct reg_action *ra = info;
Zhang Ruid978e752019-07-10 21:44:31 +0800101 u32 msr = (u32)ra->reg;
Zhang Rui33823882019-07-10 21:44:30 +0800102 u64 val;
103
Zhang Ruid978e752019-07-10 21:44:31 +0800104 ra->err = rdmsrl_safe(msr, &val);
Zhang Rui33823882019-07-10 21:44:30 +0800105 if (ra->err)
106 return;
107
108 val &= ~ra->mask;
109 val |= ra->value;
110
Zhang Ruid978e752019-07-10 21:44:31 +0800111 ra->err = wrmsrl_safe(msr, val);
Zhang Rui33823882019-07-10 21:44:30 +0800112}
113
114static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
115{
116 int ret;
117
118 ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
119 if (WARN_ON_ONCE(ret))
120 return ret;
121
122 return ra->err;
123}
124
125static int __init rapl_msr_init(void)
126{
127 int ret;
128
129 rapl_msr_priv.read_raw = rapl_msr_read_raw;
130 rapl_msr_priv.write_raw = rapl_msr_write_raw;
131
132 rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
133 if (IS_ERR(rapl_msr_priv.control_type)) {
134 pr_debug("failed to register powercap control_type.\n");
135 return PTR_ERR(rapl_msr_priv.control_type);
136 }
137
138 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online",
139 rapl_cpu_online, rapl_cpu_down_prep);
140 if (ret < 0)
141 goto out;
142 rapl_msr_priv.pcap_rapl_online = ret;
143
144 /* Don't bail out if PSys is not supported */
145 rapl_add_platform_domain(&rapl_msr_priv);
146
147 return 0;
148
149out:
150 if (ret)
151 powercap_unregister_control_type(rapl_msr_priv.control_type);
152 return ret;
153}
154
155static void __exit rapl_msr_exit(void)
156{
157 cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
158 rapl_remove_platform_domain(&rapl_msr_priv);
159 powercap_unregister_control_type(rapl_msr_priv.control_type);
160}
161
162module_init(rapl_msr_init);
163module_exit(rapl_msr_exit);
164
165MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface");
166MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>");
167MODULE_LICENSE("GPL v2");