Suman Anna | 50a5228 | 2018-05-11 12:03:19 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 2 | /* |
| 3 | * SIRF hardware spinlock driver |
| 4 | * |
| 5 | * Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company. |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/module.h> |
| 10 | #include <linux/device.h> |
| 11 | #include <linux/io.h> |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 12 | #include <linux/slab.h> |
| 13 | #include <linux/spinlock.h> |
| 14 | #include <linux/hwspinlock.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/of.h> |
| 17 | #include <linux/of_address.h> |
| 18 | |
| 19 | #include "hwspinlock_internal.h" |
| 20 | |
| 21 | struct sirf_hwspinlock { |
| 22 | void __iomem *io_base; |
| 23 | struct hwspinlock_device bank; |
| 24 | }; |
| 25 | |
| 26 | /* Number of Hardware Spinlocks*/ |
| 27 | #define HW_SPINLOCK_NUMBER 30 |
| 28 | |
| 29 | /* Hardware spinlock register offsets */ |
| 30 | #define HW_SPINLOCK_BASE 0x404 |
| 31 | #define HW_SPINLOCK_OFFSET(x) (HW_SPINLOCK_BASE + 0x4 * (x)) |
| 32 | |
| 33 | static int sirf_hwspinlock_trylock(struct hwspinlock *lock) |
| 34 | { |
| 35 | void __iomem *lock_addr = lock->priv; |
| 36 | |
| 37 | /* attempt to acquire the lock by reading value == 1 from it */ |
| 38 | return !!readl(lock_addr); |
| 39 | } |
| 40 | |
| 41 | static void sirf_hwspinlock_unlock(struct hwspinlock *lock) |
| 42 | { |
| 43 | void __iomem *lock_addr = lock->priv; |
| 44 | |
| 45 | /* release the lock by writing 0 to it */ |
| 46 | writel(0, lock_addr); |
| 47 | } |
| 48 | |
| 49 | static const struct hwspinlock_ops sirf_hwspinlock_ops = { |
| 50 | .trylock = sirf_hwspinlock_trylock, |
| 51 | .unlock = sirf_hwspinlock_unlock, |
| 52 | }; |
| 53 | |
| 54 | static int sirf_hwspinlock_probe(struct platform_device *pdev) |
| 55 | { |
| 56 | struct sirf_hwspinlock *hwspin; |
| 57 | struct hwspinlock *hwlock; |
Baolin Wang | 8f2a0dc | 2020-01-08 11:23:45 +0800 | [diff] [blame] | 58 | int idx; |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 59 | |
| 60 | if (!pdev->dev.of_node) |
| 61 | return -ENODEV; |
| 62 | |
Kees Cook | 0ed2dd0 | 2018-05-08 16:08:53 -0700 | [diff] [blame] | 63 | hwspin = devm_kzalloc(&pdev->dev, |
| 64 | struct_size(hwspin, bank.lock, |
| 65 | HW_SPINLOCK_NUMBER), |
| 66 | GFP_KERNEL); |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 67 | if (!hwspin) |
| 68 | return -ENOMEM; |
| 69 | |
| 70 | /* retrieve io base */ |
Baolin Wang | 77d99a6 | 2020-01-08 11:23:44 +0800 | [diff] [blame] | 71 | hwspin->io_base = devm_platform_ioremap_resource(pdev, 0); |
| 72 | if (IS_ERR(hwspin->io_base)) |
| 73 | return PTR_ERR(hwspin->io_base); |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 74 | |
| 75 | for (idx = 0; idx < HW_SPINLOCK_NUMBER; idx++) { |
| 76 | hwlock = &hwspin->bank.lock[idx]; |
| 77 | hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx); |
| 78 | } |
| 79 | |
| 80 | platform_set_drvdata(pdev, hwspin); |
| 81 | |
Baolin Wang | cb36017 | 2020-01-08 11:23:46 +0800 | [diff] [blame] | 82 | return devm_hwspin_lock_register(&pdev->dev, &hwspin->bank, |
| 83 | &sirf_hwspinlock_ops, 0, |
| 84 | HW_SPINLOCK_NUMBER); |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 85 | } |
| 86 | |
| 87 | static const struct of_device_id sirf_hwpinlock_ids[] = { |
| 88 | { .compatible = "sirf,hwspinlock", }, |
| 89 | {}, |
| 90 | }; |
| 91 | MODULE_DEVICE_TABLE(of, sirf_hwpinlock_ids); |
| 92 | |
| 93 | static struct platform_driver sirf_hwspinlock_driver = { |
| 94 | .probe = sirf_hwspinlock_probe, |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 95 | .driver = { |
| 96 | .name = "atlas7_hwspinlock", |
Baolin Wang | c3e9b46 | 2020-06-08 20:20:28 +0800 | [diff] [blame] | 97 | .of_match_table = sirf_hwpinlock_ids, |
Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 98 | }, |
| 99 | }; |
| 100 | |
| 101 | module_platform_driver(sirf_hwspinlock_driver); |
| 102 | |
| 103 | MODULE_LICENSE("GPL v2"); |
| 104 | MODULE_DESCRIPTION("SIRF Hardware spinlock driver"); |
| 105 | MODULE_AUTHOR("Wei Chen <wei.chen@csr.com>"); |