blob: 02ef6e543cd1b8cc0544c55e1d84a4aeb43f1c05 [file] [log] [blame]
Suman Anna50a52282018-05-11 12:03:19 -05001// SPDX-License-Identifier: GPL-2.0
Wei Chencc16d662015-05-26 08:28:29 +00002/*
3 * SIRF hardware spinlock driver
4 *
5 * Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
Wei Chencc16d662015-05-26 08:28:29 +00006 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/device.h>
11#include <linux/io.h>
12#include <linux/pm_runtime.h>
13#include <linux/slab.h>
14#include <linux/spinlock.h>
15#include <linux/hwspinlock.h>
16#include <linux/platform_device.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19
20#include "hwspinlock_internal.h"
21
22struct sirf_hwspinlock {
23 void __iomem *io_base;
24 struct hwspinlock_device bank;
25};
26
27/* Number of Hardware Spinlocks*/
28#define HW_SPINLOCK_NUMBER 30
29
30/* Hardware spinlock register offsets */
31#define HW_SPINLOCK_BASE 0x404
32#define HW_SPINLOCK_OFFSET(x) (HW_SPINLOCK_BASE + 0x4 * (x))
33
34static int sirf_hwspinlock_trylock(struct hwspinlock *lock)
35{
36 void __iomem *lock_addr = lock->priv;
37
38 /* attempt to acquire the lock by reading value == 1 from it */
39 return !!readl(lock_addr);
40}
41
42static void sirf_hwspinlock_unlock(struct hwspinlock *lock)
43{
44 void __iomem *lock_addr = lock->priv;
45
46 /* release the lock by writing 0 to it */
47 writel(0, lock_addr);
48}
49
50static const struct hwspinlock_ops sirf_hwspinlock_ops = {
51 .trylock = sirf_hwspinlock_trylock,
52 .unlock = sirf_hwspinlock_unlock,
53};
54
55static int sirf_hwspinlock_probe(struct platform_device *pdev)
56{
57 struct sirf_hwspinlock *hwspin;
58 struct hwspinlock *hwlock;
59 int idx, ret;
60
61 if (!pdev->dev.of_node)
62 return -ENODEV;
63
64 hwspin = devm_kzalloc(&pdev->dev, sizeof(*hwspin) +
65 sizeof(*hwlock) * HW_SPINLOCK_NUMBER, GFP_KERNEL);
66 if (!hwspin)
67 return -ENOMEM;
68
69 /* retrieve io base */
70 hwspin->io_base = of_iomap(pdev->dev.of_node, 0);
71 if (!hwspin->io_base)
72 return -ENOMEM;
73
74 for (idx = 0; idx < HW_SPINLOCK_NUMBER; idx++) {
75 hwlock = &hwspin->bank.lock[idx];
76 hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx);
77 }
78
79 platform_set_drvdata(pdev, hwspin);
80
81 pm_runtime_enable(&pdev->dev);
82
83 ret = hwspin_lock_register(&hwspin->bank, &pdev->dev,
84 &sirf_hwspinlock_ops, 0,
85 HW_SPINLOCK_NUMBER);
86 if (ret)
87 goto reg_failed;
88
89 return 0;
90
91reg_failed:
92 pm_runtime_disable(&pdev->dev);
93 iounmap(hwspin->io_base);
94
95 return ret;
96}
97
98static int sirf_hwspinlock_remove(struct platform_device *pdev)
99{
100 struct sirf_hwspinlock *hwspin = platform_get_drvdata(pdev);
101 int ret;
102
103 ret = hwspin_lock_unregister(&hwspin->bank);
104 if (ret) {
105 dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
106 return ret;
107 }
108
109 pm_runtime_disable(&pdev->dev);
110
111 iounmap(hwspin->io_base);
112
113 return 0;
114}
115
116static const struct of_device_id sirf_hwpinlock_ids[] = {
117 { .compatible = "sirf,hwspinlock", },
118 {},
119};
120MODULE_DEVICE_TABLE(of, sirf_hwpinlock_ids);
121
122static struct platform_driver sirf_hwspinlock_driver = {
123 .probe = sirf_hwspinlock_probe,
124 .remove = sirf_hwspinlock_remove,
125 .driver = {
126 .name = "atlas7_hwspinlock",
127 .of_match_table = of_match_ptr(sirf_hwpinlock_ids),
128 },
129};
130
131module_platform_driver(sirf_hwspinlock_driver);
132
133MODULE_LICENSE("GPL v2");
134MODULE_DESCRIPTION("SIRF Hardware spinlock driver");
135MODULE_AUTHOR("Wei Chen <wei.chen@csr.com>");