blob: b4e35fbbe693dd0df420c3e76b2b100dc24df970 [file] [log] [blame]
Pierre-Louis Bossarte149ca22020-05-01 09:58:50 -05001// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
Liam Girdwooddd96dac2019-04-12 11:08:47 -05002//
3// This file is provided under a dual BSD/GPLv2 license. When using or
4// redistributing this file, you may do so under either license.
5//
6// Copyright(c) 2018 Intel Corporation. All rights reserved.
7//
8// Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9// Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10// Rander Wang <rander.wang@intel.com>
11// Keyon Jie <yang.jie@linux.intel.com>
12//
13
14/*
15 * Hardware interface for generic Intel audio DSP HDA IP
16 */
17
Liam Girdwooddd96dac2019-04-12 11:08:47 -050018#include <sound/hdaudio_ext.h>
Kai Vehmanenf1fd9d02019-06-12 11:57:03 -050019#include <sound/hda_register.h>
20
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -050021#include <linux/acpi.h>
Liam Girdwooddd96dac2019-04-12 11:08:47 -050022#include <linux/module.h>
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -050023#include <linux/soundwire/sdw.h>
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -050024#include <linux/soundwire/sdw_intel.h>
Pierre-Louis Bossart194fe0f2021-03-01 18:31:22 -060025#include <sound/intel-dsp-config.h>
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -050026#include <sound/intel-nhlt.h>
Liam Girdwooddd96dac2019-04-12 11:08:47 -050027#include <sound/sof.h>
28#include <sound/sof/xtensa.h>
Pierre-Louis Bossartd2c383a2020-03-25 16:50:20 -050029#include "../sof-audio.h"
Pierre-Louis Bossart194fe0f2021-03-01 18:31:22 -060030#include "../sof-pci-dev.h"
Liam Girdwooddd96dac2019-04-12 11:08:47 -050031#include "../ops.h"
32#include "hda.h"
Liam Girdwooddd96dac2019-04-12 11:08:47 -050033
34#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
35#include <sound/soc-acpi-intel-match.h>
36#endif
37
38/* platform specific devices */
39#include "shim.h"
40
Liam Girdwoodff2be862019-09-27 15:05:36 -050041#define EXCEPT_MAX_HDR_SIZE 0x400
Ranjani Sridharan29c8e432020-08-25 16:50:38 -070042#define HDA_EXT_ROM_STATUS_SIZE 8
Liam Girdwoodff2be862019-09-27 15:05:36 -050043
Bard Liao2f1315a2021-07-23 19:54:49 +080044static const struct sof_intel_dsp_desc
45 *get_chip_info(struct snd_sof_pdata *pdata)
46{
47 const struct sof_dev_desc *desc = pdata->desc;
48 const struct sof_intel_dsp_desc *chip_info;
49
50 chip_info = desc->chip_info;
51
52 return chip_info;
53}
54
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -050055#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
56
Pierre-Louis Bossart02df8f42020-03-25 16:50:24 -050057/*
58 * The default for SoundWire clock stop quirks is to power gate the IP
59 * and do a Bus Reset, this will need to be modified when the DSP
60 * needs to remain in D0i3 so that the Master does not lose context
61 * and enumeration is not required on clock restart
62 */
63static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET;
64module_param(sdw_clock_stop_quirks, int, 0444);
65MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks");
66
Pierre-Louis Bossartd2c383a2020-03-25 16:50:20 -050067static int sdw_params_stream(struct device *dev,
68 struct sdw_intel_stream_params_data *params_data)
69{
70 struct snd_sof_dev *sdev = dev_get_drvdata(dev);
71 struct snd_soc_dai *d = params_data->dai;
72 struct sof_ipc_dai_config config;
73 struct sof_ipc_reply reply;
74 int link_id = params_data->link_id;
75 int alh_stream_id = params_data->alh_stream_id;
76 int ret;
77 u32 size = sizeof(config);
78
79 memset(&config, 0, size);
80 config.hdr.size = size;
81 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
82 config.type = SOF_DAI_INTEL_ALH;
83 config.dai_index = (link_id << 8) | (d->id);
84 config.alh.stream_id = alh_stream_id;
85
86 /* send message to DSP */
87 ret = sof_ipc_tx_message(sdev->ipc,
88 config.hdr.cmd, &config, size, &reply,
89 sizeof(reply));
90 if (ret < 0) {
91 dev_err(sdev->dev,
92 "error: failed to set DAI hw_params for link %d dai->id %d ALH %d\n",
93 link_id, d->id, alh_stream_id);
94 }
95
96 return ret;
97}
98
99static int sdw_free_stream(struct device *dev,
100 struct sdw_intel_stream_free_data *free_data)
101{
102 struct snd_sof_dev *sdev = dev_get_drvdata(dev);
103 struct snd_soc_dai *d = free_data->dai;
104 struct sof_ipc_dai_config config;
105 struct sof_ipc_reply reply;
106 int link_id = free_data->link_id;
107 int ret;
108 u32 size = sizeof(config);
109
110 memset(&config, 0, size);
111 config.hdr.size = size;
112 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
113 config.type = SOF_DAI_INTEL_ALH;
114 config.dai_index = (link_id << 8) | d->id;
115 config.alh.stream_id = 0xFFFF; /* invalid value on purpose */
116
117 /* send message to DSP */
118 ret = sof_ipc_tx_message(sdev->ipc,
119 config.hdr.cmd, &config, size, &reply,
120 sizeof(reply));
121 if (ret < 0) {
122 dev_err(sdev->dev,
123 "error: failed to free stream for link %d dai->id %d\n",
124 link_id, d->id);
125 }
126
127 return ret;
128}
129
130static const struct sdw_intel_ops sdw_callback = {
131 .params_stream = sdw_params_stream,
132 .free_stream = sdw_free_stream,
133};
134
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500135void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
136{
137 sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable);
138}
139
140static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
141{
142 struct sof_intel_hda_dev *hdev;
143 acpi_handle handle;
144 int ret;
145
146 handle = ACPI_HANDLE(sdev->dev);
147
148 /* save ACPI info for the probe step */
149 hdev = sdev->pdata->hw_pdata;
150
151 ret = sdw_intel_acpi_scan(handle, &hdev->info);
Pierre-Louis Bossart0d4453e2020-04-09 13:44:14 -0500152 if (ret < 0)
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500153 return -EINVAL;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500154
155 return 0;
156}
157
158static int hda_sdw_probe(struct snd_sof_dev *sdev)
159{
160 struct sof_intel_hda_dev *hdev;
161 struct sdw_intel_res res;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500162 void *sdw;
163
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500164 hdev = sdev->pdata->hw_pdata;
165
166 memset(&res, 0, sizeof(res));
167
168 res.mmio_base = sdev->bar[HDA_DSP_BAR];
Bard Liao60e9feb2021-07-23 19:54:51 +0800169 res.shim_base = hdev->desc->sdw_shim_base;
170 res.alh_base = hdev->desc->sdw_alh_base;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500171 res.irq = sdev->ipc_irq;
172 res.handle = hdev->info.handle;
173 res.parent = sdev->dev;
Pierre-Louis Bossartd2c383a2020-03-25 16:50:20 -0500174 res.ops = &sdw_callback;
175 res.dev = sdev->dev;
Pierre-Louis Bossart02df8f42020-03-25 16:50:24 -0500176 res.clock_stop_quirks = sdw_clock_stop_quirks;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500177
178 /*
179 * ops and arg fields are not populated for now,
180 * they will be needed when the DAI callbacks are
181 * provided
182 */
183
184 /* we could filter links here if needed, e.g for quirks */
185 res.count = hdev->info.count;
186 res.link_mask = hdev->info.link_mask;
187
188 sdw = sdw_intel_probe(&res);
189 if (!sdw) {
190 dev_err(sdev->dev, "error: SoundWire probe failed\n");
191 return -EINVAL;
192 }
193
194 /* save context */
195 hdev->sdw = sdw;
196
197 return 0;
198}
199
200int hda_sdw_startup(struct snd_sof_dev *sdev)
201{
202 struct sof_intel_hda_dev *hdev;
203
204 hdev = sdev->pdata->hw_pdata;
205
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500206 if (!hdev->sdw)
207 return 0;
208
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500209 return sdw_intel_startup(hdev->sdw);
210}
211
212static int hda_sdw_exit(struct snd_sof_dev *sdev)
213{
214 struct sof_intel_hda_dev *hdev;
215
216 hdev = sdev->pdata->hw_pdata;
217
218 hda_sdw_int_enable(sdev, false);
219
220 if (hdev->sdw)
221 sdw_intel_exit(hdev->sdw);
222 hdev->sdw = NULL;
223
224 return 0;
225}
Bard Liao722ba5f2020-03-25 16:50:23 -0500226
Bard Liao198fa4b2021-07-23 19:54:50 +0800227bool hda_common_check_sdw_irq(struct snd_sof_dev *sdev)
Bard Liao722ba5f2020-03-25 16:50:23 -0500228{
229 struct sof_intel_hda_dev *hdev;
230 bool ret = false;
231 u32 irq_status;
232
233 hdev = sdev->pdata->hw_pdata;
234
235 if (!hdev->sdw)
236 return ret;
237
238 /* store status */
239 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2);
240
241 /* invalid message ? */
242 if (irq_status == 0xffffffff)
243 goto out;
244
245 /* SDW message ? */
246 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW)
247 ret = true;
248
249out:
250 return ret;
251}
252
Bard Liao198fa4b2021-07-23 19:54:50 +0800253static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
254{
255 const struct sof_intel_dsp_desc *chip;
256
257 chip = get_chip_info(sdev->pdata);
258 if (chip && chip->check_sdw_irq)
259 return chip->check_sdw_irq(sdev);
260
261 return false;
262}
263
Bard Liao722ba5f2020-03-25 16:50:23 -0500264static irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
265{
266 return sdw_intel_thread(irq, context);
267}
268
Rander Wang90de3282020-03-25 16:50:26 -0500269static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
270{
271 struct sof_intel_hda_dev *hdev;
272
273 hdev = sdev->pdata->hw_pdata;
274 if (hdev->sdw &&
275 snd_sof_dsp_read(sdev, HDA_DSP_BAR,
Bard Liao781dd3c82021-07-23 19:54:48 +0800276 hdev->desc->sdw_shim_base + SDW_SHIM_WAKESTS))
Rander Wang90de3282020-03-25 16:50:26 -0500277 return true;
278
279 return false;
280}
281
Rander Wangbbd19cd2020-03-25 16:50:25 -0500282void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
283{
284 struct sof_intel_hda_dev *hdev;
285
286 hdev = sdev->pdata->hw_pdata;
287 if (!hdev->sdw)
288 return;
289
290 sdw_intel_process_wakeen_event(hdev->sdw);
291}
292
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500293#endif
294
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500295/*
296 * Debug
297 */
298
299struct hda_dsp_msg_code {
300 u32 code;
301 const char *msg;
302};
303
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500304#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
Peter Ujfalusi9d5536e2021-05-21 12:28:04 +0300305static bool hda_use_msi = true;
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500306module_param_named(use_msi, hda_use_msi, bool, 0444);
307MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
Peter Ujfalusi9d5536e2021-05-21 12:28:04 +0300308#else
309#define hda_use_msi (1)
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500310#endif
311
Jaroslav Kyselab8d3ad52020-04-24 11:25:20 +0200312static char *hda_model;
313module_param(hda_model, charp, 0444);
314MODULE_PARM_DESC(hda_model, "Use the given HDA board model.");
315
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600316#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500317static int hda_dmic_num = -1;
318module_param_named(dmic_num, hda_dmic_num, int, 0444);
319MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600320#endif
Kai Vehmanen139c7fe2019-10-29 15:40:13 +0200321
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600322#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
Kai Vehmanen42c67752020-03-12 14:48:53 -0500323static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI);
Kai Vehmanen139c7fe2019-10-29 15:40:13 +0200324module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
325MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver");
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500326#endif
327
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500328static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
329 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
330 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
331 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
332 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
333 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
334 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
335 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
336 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
337 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
338 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
339 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
340 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
Colin Ian King07f80452019-05-01 11:23:08 +0100341 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500342 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
343 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
344 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
345 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
346 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
347 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"},
348};
349
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500350static void hda_dsp_get_status(struct snd_sof_dev *sdev)
351{
352 u32 status;
353 int i;
354
355 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
356 HDA_DSP_SRAM_REG_ROM_STATUS);
357
358 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
359 if (status == hda_dsp_rom_msg[i].code) {
360 dev_err(sdev->dev, "%s - code %8.8x\n",
361 hda_dsp_rom_msg[i].msg, status);
362 return;
363 }
364 }
365
366 /* not for us, must be generic sof message */
367 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
368}
369
370static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
371 struct sof_ipc_dsp_oops_xtensa *xoops,
372 struct sof_ipc_panic_info *panic_info,
373 u32 *stack, size_t stack_words)
374{
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500375 u32 offset = sdev->dsp_oops_offset;
376
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500377 /* first read registers */
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500378 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
379
380 /* note: variable AR register array is not read */
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500381
382 /* then get panic info */
Liam Girdwoodff2be862019-09-27 15:05:36 -0500383 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
384 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
385 xoops->arch_hdr.totalsize);
386 return;
387 }
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500388 offset += xoops->arch_hdr.totalsize;
389 sof_block_read(sdev, sdev->mmio_bar, offset,
390 panic_info, sizeof(*panic_info));
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500391
392 /* then get the stack */
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500393 offset += sizeof(*panic_info);
394 sof_block_read(sdev, sdev->mmio_bar, offset, stack,
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500395 stack_words * sizeof(u32));
396}
397
Ranjani Sridharan29c8e432020-08-25 16:50:38 -0700398/* dump the first 8 dwords representing the extended ROM status */
Ranjani Sridharan8f7ef6f2020-12-11 12:07:43 +0200399static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, u32 flags)
Ranjani Sridharan29c8e432020-08-25 16:50:38 -0700400{
401 char msg[128];
402 int len = 0;
403 u32 value;
404 int i;
405
406 for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) {
407 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_ROM_STATUS + i * 0x4);
408 len += snprintf(msg + len, sizeof(msg) - len, " 0x%x", value);
409 }
410
Ranjani Sridharan8f7ef6f2020-12-11 12:07:43 +0200411 sof_dev_dbg_or_err(sdev->dev, flags & SOF_DBG_DUMP_FORCE_ERR_LEVEL,
Pierre-Louis Bossart776100a2020-09-17 13:56:33 +0300412 "extended rom status: %s", msg);
413
Ranjani Sridharan29c8e432020-08-25 16:50:38 -0700414}
415
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500416void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
417{
418 struct sof_ipc_dsp_oops_xtensa xoops;
419 struct sof_ipc_panic_info panic_info;
420 u32 stack[HDA_DSP_STACK_DUMP_SIZE];
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500421
Ranjani Sridharan7ff562f2021-05-28 19:05:50 +0300422 /* print ROM/FW status */
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500423 hda_dsp_get_status(sdev);
424
Ranjani Sridharan7ff562f2021-05-28 19:05:50 +0300425 /* print panic info if FW boot is complete. Otherwise, print the extended ROM status */
Ranjani Sridharan6ca5cec2019-12-17 18:26:09 -0600426 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
Ranjani Sridharan7ff562f2021-05-28 19:05:50 +0300427 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS);
428 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
429
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500430 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
431 HDA_DSP_STACK_DUMP_SIZE);
432 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
433 stack, HDA_DSP_STACK_DUMP_SIZE);
434 } else {
Ranjani Sridharan8f7ef6f2020-12-11 12:07:43 +0200435 hda_dsp_dump_ext_rom_status(sdev, flags);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500436 }
437}
438
Kai Vehmanenf1fd9d02019-06-12 11:57:03 -0500439void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
440{
441 struct hdac_bus *bus = sof_to_bus(sdev);
442 u32 adspis;
443 u32 intsts;
444 u32 intctl;
445 u32 ppsts;
446 u8 rirbsts;
447
448 /* read key IRQ stats and config registers */
449 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
450 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
451 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
452 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
453 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
454
455 dev_err(sdev->dev,
456 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
457 intsts, intctl, rirbsts);
458 dev_err(sdev->dev,
459 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n",
460 ppsts, adspis);
461}
462
Pan Xiulif3da49f2019-04-30 18:09:33 -0500463void hda_ipc_dump(struct snd_sof_dev *sdev)
464{
465 u32 hipcie;
466 u32 hipct;
467 u32 hipcctl;
468
Kai Vehmanenf1fd9d02019-06-12 11:57:03 -0500469 hda_ipc_irq_dump(sdev);
470
Pan Xiulif3da49f2019-04-30 18:09:33 -0500471 /* read IPC status */
472 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
473 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
474 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
475
476 /* dump the IPC regs */
477 /* TODO: parse the raw msg */
478 dev_err(sdev->dev,
479 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
480 hipcie, hipct, hipcctl);
481}
482
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500483static int hda_init(struct snd_sof_dev *sdev)
484{
485 struct hda_bus *hbus;
486 struct hdac_bus *bus;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500487 struct pci_dev *pci = to_pci_dev(sdev->dev);
488 int ret;
489
490 hbus = sof_to_hbus(sdev);
491 bus = sof_to_bus(sdev);
492
493 /* HDA bus init */
Takashi Iwaid4ff1b32019-08-07 20:50:50 +0200494 sof_hda_bus_init(bus, &pci->dev);
Bard Liao64ca9d92019-05-27 00:58:36 +0800495
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500496 bus->use_posbuf = 1;
497 bus->bdl_pos_adj = 0;
Kai Vehmanenf3416e72019-10-08 11:44:35 -0500498 bus->sync_write = 1;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500499
500 mutex_init(&hbus->prepare_mutex);
501 hbus->pci = pci;
502 hbus->mixer_assigned = -1;
Jaroslav Kyselab8d3ad52020-04-24 11:25:20 +0200503 hbus->modelname = hda_model;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500504
505 /* initialise hdac bus */
506 bus->addr = pci_resource_start(pci, 0);
507 bus->remap_addr = pci_ioremap_bar(pci, 0);
508 if (!bus->remap_addr) {
509 dev_err(bus->dev, "error: ioremap error\n");
510 return -ENXIO;
511 }
512
513 /* HDA base */
514 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
515
Kai Vehmanenaf7aae12020-02-06 22:02:23 +0200516 /* init i915 and HDMI codecs */
517 ret = hda_codec_i915_init(sdev);
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200518 if (ret < 0)
519 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n");
Kai Vehmanenaf7aae12020-02-06 22:02:23 +0200520
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500521 /* get controller capabilities */
522 ret = hda_dsp_ctrl_get_caps(sdev);
523 if (ret < 0)
524 dev_err(sdev->dev, "error: get caps error\n");
525
526 return ret;
527}
528
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600529#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500530
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500531static int check_nhlt_dmic(struct snd_sof_dev *sdev)
532{
533 struct nhlt_acpi_table *nhlt;
534 int dmic_num;
535
536 nhlt = intel_nhlt_init(sdev->dev);
537 if (nhlt) {
538 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
539 intel_nhlt_free(nhlt);
Jaska Uimonen3dca35e2020-08-25 16:50:36 -0700540 if (dmic_num >= 1 && dmic_num <= 4)
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500541 return dmic_num;
542 }
543
544 return 0;
545}
546
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500547static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500548 const char *sof_tplg_filename,
549 const char *idisp_str,
550 const char *dmic_str)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500551{
552 const char *tplg_filename = NULL;
Guennadi Liakhovetskib9088532021-02-08 17:33:35 -0600553 char *filename, *tmp;
554 const char *split_ext;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500555
Guennadi Liakhovetskib9088532021-02-08 17:33:35 -0600556 filename = kstrdup(sof_tplg_filename, GFP_KERNEL);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500557 if (!filename)
558 return NULL;
559
560 /* this assumes a .tplg extension */
Guennadi Liakhovetskib9088532021-02-08 17:33:35 -0600561 tmp = filename;
562 split_ext = strsep(&tmp, ".");
563 if (split_ext)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500564 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500565 "%s%s%s.tplg",
566 split_ext, idisp_str, dmic_str);
Guennadi Liakhovetskib9088532021-02-08 17:33:35 -0600567 kfree(filename);
568
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500569 return tplg_filename;
570}
571
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600572static int dmic_topology_fixup(struct snd_sof_dev *sdev,
573 const char **tplg_filename,
574 const char *idisp_str,
575 int *dmic_found)
576{
577 const char *default_tplg_filename = *tplg_filename;
578 const char *fixed_tplg_filename;
579 const char *dmic_str;
580 int dmic_num;
581
582 /* first check NHLT for DMICs */
583 dmic_num = check_nhlt_dmic(sdev);
584
585 /* allow for module parameter override */
Pierre-Louis Bossart026370c2021-02-08 17:33:36 -0600586 if (hda_dmic_num != -1) {
587 dev_dbg(sdev->dev,
588 "overriding DMICs detected in NHLT tables %d by kernel param %d\n",
589 dmic_num, hda_dmic_num);
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600590 dmic_num = hda_dmic_num;
Pierre-Louis Bossart026370c2021-02-08 17:33:36 -0600591 }
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600592
593 switch (dmic_num) {
594 case 1:
595 dmic_str = "-1ch";
596 break;
597 case 2:
598 dmic_str = "-2ch";
599 break;
600 case 3:
601 dmic_str = "-3ch";
602 break;
603 case 4:
604 dmic_str = "-4ch";
605 break;
606 default:
607 dmic_num = 0;
608 dmic_str = "";
609 break;
610 }
611
612 fixed_tplg_filename = fixup_tplg_name(sdev, default_tplg_filename,
613 idisp_str, dmic_str);
614 if (!fixed_tplg_filename)
615 return -ENOMEM;
616
617 dev_info(sdev->dev, "DMICs detected in NHLT tables: %d\n", dmic_num);
618 *dmic_found = dmic_num;
619 *tplg_filename = fixed_tplg_filename;
620
621 return 0;
622}
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500623#endif
624
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500625static int hda_init_caps(struct snd_sof_dev *sdev)
626{
627 struct hdac_bus *bus = sof_to_bus(sdev);
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500628 struct snd_sof_pdata *pdata = sdev->pdata;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500629#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500630 struct hdac_ext_link *hlink;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500631#endif
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500632 struct sof_intel_hda_dev *hdev = pdata->hw_pdata;
633 u32 link_mask;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500634 int ret = 0;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500635
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500636 /* check if dsp is there */
637 if (bus->ppcap)
638 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
639
Ranjani Sridharancc352732019-08-06 15:19:58 -0700640 /* Init HDA controller after i915 init */
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500641 ret = hda_dsp_ctrl_init_chip(sdev, true);
642 if (ret < 0) {
643 dev_err(bus->dev, "error: init chip failed with ret: %d\n",
644 ret);
645 return ret;
646 }
647
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500648 /* scan SoundWire capabilities exposed by DSDT */
649 ret = hda_sdw_acpi_scan(sdev);
650 if (ret < 0) {
Pierre-Louis Bossart0d4453e2020-04-09 13:44:14 -0500651 dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n");
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500652 goto skip_soundwire;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500653 }
654
655 link_mask = hdev->info.link_mask;
656 if (!link_mask) {
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500657 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n");
658 goto skip_soundwire;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500659 }
660
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500661 /*
662 * probe/allocate SoundWire resources.
663 * The hardware configuration takes place in hda_sdw_startup
664 * after power rails are enabled.
665 * It's entirely possible to have a mix of I2S/DMIC/SoundWire
666 * devices, so we allocate the resources in all cases.
667 */
668 ret = hda_sdw_probe(sdev);
669 if (ret < 0) {
670 dev_err(sdev->dev, "error: SoundWire probe error\n");
671 return ret;
672 }
673
674skip_soundwire:
675
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500676#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500677 if (bus->mlcap)
678 snd_hdac_ext_bus_get_ml_capabilities(bus);
679
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500680 /* create codec instances */
Ranjani Sridharan80acdd42019-12-04 15:15:52 -0600681 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500682
Kai Vehmanen0c754192020-01-20 18:01:16 +0200683 if (!HDA_IDISP_CODEC(bus->codec_mask))
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200684 hda_codec_i915_display_power(sdev, false);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500685
686 /*
687 * we are done probing so decrement link counts
688 */
689 list_for_each_entry(hlink, &bus->hlink_list, list)
690 snd_hdac_ext_bus_link_put(bus, hlink);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500691#endif
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500692 return 0;
693}
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500694
Bard Liao7c11af92019-12-04 15:28:59 -0600695static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context)
696{
697 struct snd_sof_dev *sdev = context;
698
699 /*
700 * Get global interrupt status. It includes all hardware interrupt
701 * sources in the Intel HD Audio controller.
702 */
703 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) &
704 SOF_HDA_INTSTS_GIS) {
705
706 /* disable GIE interrupt */
707 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
708 SOF_HDA_INTCTL,
709 SOF_HDA_INT_GLOBAL_EN,
710 0);
711
712 return IRQ_WAKE_THREAD;
713 }
714
715 return IRQ_NONE;
716}
717
718static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context)
719{
720 struct snd_sof_dev *sdev = context;
Bard Liao722ba5f2020-03-25 16:50:23 -0500721 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
Bard Liao7c11af92019-12-04 15:28:59 -0600722
723 /* deal with streams and controller first */
724 if (hda_dsp_check_stream_irq(sdev))
725 hda_dsp_stream_threaded_handler(irq, sdev);
726
727 if (hda_dsp_check_ipc_irq(sdev))
728 sof_ops(sdev)->irq_thread(irq, sdev);
729
Bard Liao722ba5f2020-03-25 16:50:23 -0500730 if (hda_dsp_check_sdw_irq(sdev))
731 hda_dsp_sdw_thread(irq, hdev->sdw);
732
Rander Wang90de3282020-03-25 16:50:26 -0500733 if (hda_sdw_check_wakeen_irq(sdev))
734 hda_sdw_process_wakeen(sdev);
735
Bard Liao7c11af92019-12-04 15:28:59 -0600736 /* enable GIE interrupt */
737 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
738 SOF_HDA_INTCTL,
739 SOF_HDA_INT_GLOBAL_EN,
740 SOF_HDA_INT_GLOBAL_EN);
741
742 return IRQ_HANDLED;
743}
744
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500745int hda_dsp_probe(struct snd_sof_dev *sdev)
746{
747 struct pci_dev *pci = to_pci_dev(sdev->dev);
748 struct sof_intel_hda_dev *hdev;
749 struct hdac_bus *bus;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500750 const struct sof_intel_dsp_desc *chip;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500751 int ret = 0;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500752
753 /*
754 * detect DSP by checking class/subclass/prog-id information
755 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
756 * class=04 subclass 01 prog-if 00: DSP is present
757 * (and may be required e.g. for DMIC or SSP support)
758 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
759 */
760 if (pci->class == 0x040300) {
761 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
762 return -ENODEV;
763 } else if (pci->class != 0x040100 && pci->class != 0x040380) {
764 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
765 return -ENODEV;
766 }
767 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
768
769 chip = get_chip_info(sdev->pdata);
770 if (!chip) {
771 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
772 pci->device);
773 ret = -EIO;
774 goto err;
775 }
776
777 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
778 if (!hdev)
779 return -ENOMEM;
780 sdev->pdata->hw_pdata = hdev;
781 hdev->desc = chip;
782
783 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
784 PLATFORM_DEVID_NONE,
785 NULL, 0);
786 if (IS_ERR(hdev->dmic_dev)) {
787 dev_err(sdev->dev, "error: failed to create DMIC device\n");
788 return PTR_ERR(hdev->dmic_dev);
789 }
790
791 /*
792 * use position update IPC if either it is forced
793 * or we don't have other choice
794 */
795#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
796 hdev->no_ipc_position = 0;
797#else
798 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
799#endif
800
801 /* set up HDA base */
802 bus = sof_to_bus(sdev);
803 ret = hda_init(sdev);
804 if (ret < 0)
805 goto hdac_bus_unmap;
806
807 /* DSP base */
808 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
809 if (!sdev->bar[HDA_DSP_BAR]) {
810 dev_err(sdev->dev, "error: ioremap error\n");
811 ret = -ENXIO;
812 goto hdac_bus_unmap;
813 }
814
815 sdev->mmio_bar = HDA_DSP_BAR;
816 sdev->mailbox_bar = HDA_DSP_BAR;
817
818 /* allow 64bit DMA address if supported by H/W */
Takashi Iwaiab152af2021-01-14 14:33:36 +0100819 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) {
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500820 dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
Takashi Iwaiab152af2021-01-14 14:33:36 +0100821 dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32));
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500822 }
823
824 /* init streams */
825 ret = hda_dsp_stream_init(sdev);
826 if (ret < 0) {
827 dev_err(sdev->dev, "error: failed to init streams\n");
828 /*
829 * not all errors are due to memory issues, but trying
830 * to free everything does not harm
831 */
832 goto free_streams;
833 }
834
835 /*
836 * register our IRQ
837 * let's try to enable msi firstly
838 * if it fails, use legacy interrupt mode
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500839 * TODO: support msi multiple vectors
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500840 */
Pierre-Louis Bossartbb67dd12019-08-06 12:06:03 -0500841 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500842 dev_info(sdev->dev, "use msi interrupt mode\n");
Bard Liao7c11af92019-12-04 15:28:59 -0600843 sdev->ipc_irq = pci_irq_vector(pci, 0);
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500844 /* initialised to "false" by kzalloc() */
845 sdev->msi_enabled = true;
846 }
847
848 if (!sdev->msi_enabled) {
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500849 dev_info(sdev->dev, "use legacy interrupt mode\n");
850 /*
851 * in IO-APIC mode, hda->irq and ipc_irq are using the same
852 * irq number of pci->irq
853 */
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500854 sdev->ipc_irq = pci->irq;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500855 }
856
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500857 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
Bard Liao7c11af92019-12-04 15:28:59 -0600858 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler,
859 hda_dsp_interrupt_thread,
860 IRQF_SHARED, "AudioDSP", sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500861 if (ret < 0) {
862 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
863 sdev->ipc_irq);
Bard Liao7c11af92019-12-04 15:28:59 -0600864 goto free_irq_vector;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500865 }
866
867 pci_set_master(pci);
868 synchronize_irq(pci->irq);
869
870 /*
871 * clear TCSEL to clear playback on some HD Audio
872 * codecs. PCI TCSEL is defined in the Intel manuals.
873 */
874 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
875
876 /* init HDA capabilities */
877 ret = hda_init_caps(sdev);
878 if (ret < 0)
879 goto free_ipc_irq;
880
Zhu Yingjiang1f5253b2019-05-22 11:21:40 -0500881 /* enable ppcap interrupt */
882 hda_dsp_ctrl_ppcap_enable(sdev, true);
883 hda_dsp_ctrl_ppcap_int_enable(sdev, true);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500884
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500885 /* set default mailbox offset for FW ready message */
886 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
887
Ranjani Sridharan63e51fd32020-01-29 16:07:25 -0600888 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work);
889
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500890 return 0;
891
892free_ipc_irq:
893 free_irq(sdev->ipc_irq, sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500894free_irq_vector:
895 if (sdev->msi_enabled)
896 pci_free_irq_vectors(pci);
897free_streams:
898 hda_dsp_stream_free(sdev);
899/* dsp_unmap: not currently used */
900 iounmap(sdev->bar[HDA_DSP_BAR]);
901hdac_bus_unmap:
Pierre-Louis Bossart5bb0ecd2021-03-01 18:34:10 -0600902 platform_device_unregister(hdev->dmic_dev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500903 iounmap(bus->remap_addr);
Kai Vehmanenaf7aae12020-02-06 22:02:23 +0200904 hda_codec_i915_exit(sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500905err:
906 return ret;
907}
908
909int hda_dsp_remove(struct snd_sof_dev *sdev)
910{
911 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
912 struct hdac_bus *bus = sof_to_bus(sdev);
913 struct pci_dev *pci = to_pci_dev(sdev->dev);
914 const struct sof_intel_dsp_desc *chip = hda->desc;
915
Ranjani Sridharan63e51fd32020-01-29 16:07:25 -0600916 /* cancel any attempt for DSP D0I3 */
917 cancel_delayed_work_sync(&hda->d0i3_work);
918
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500919#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
920 /* codec removal, invoke bus_device_remove */
921 snd_hdac_ext_bus_device_remove(bus);
922#endif
923
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500924 hda_sdw_exit(sdev);
925
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500926 if (!IS_ERR_OR_NULL(hda->dmic_dev))
927 platform_device_unregister(hda->dmic_dev);
928
929 /* disable DSP IRQ */
930 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
931 SOF_HDA_PPCTL_PIE, 0);
932
933 /* disable CIE and GIE interrupts */
934 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
935 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
936
937 /* disable cores */
938 if (chip)
Bard Liaof6c246e2021-01-28 11:38:46 +0200939 snd_sof_dsp_core_power_down(sdev, chip->host_managed_cores_mask);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500940
941 /* disable DSP */
942 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
943 SOF_HDA_PPCTL_GPROCEN, 0);
944
945 free_irq(sdev->ipc_irq, sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500946 if (sdev->msi_enabled)
947 pci_free_irq_vectors(pci);
948
949 hda_dsp_stream_free(sdev);
950#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
951 snd_hdac_link_free_all(bus);
952#endif
953
954 iounmap(sdev->bar[HDA_DSP_BAR]);
955 iounmap(bus->remap_addr);
956
957#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
958 snd_hdac_ext_bus_exit(bus);
959#endif
960 hda_codec_i915_exit(sdev);
961
962 return 0;
963}
964
Daniel Baluta285880a2019-12-04 15:15:53 -0600965#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
966static int hda_generic_machine_select(struct snd_sof_dev *sdev)
967{
968 struct hdac_bus *bus = sof_to_bus(sdev);
969 struct snd_soc_acpi_mach_params *mach_params;
970 struct snd_soc_acpi_mach *hda_mach;
971 struct snd_sof_pdata *pdata = sdev->pdata;
972 const char *tplg_filename;
973 const char *idisp_str;
Daniel Baluta285880a2019-12-04 15:15:53 -0600974 int dmic_num = 0;
975 int codec_num = 0;
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -0600976 int ret;
Daniel Baluta285880a2019-12-04 15:15:53 -0600977 int i;
978
979 /* codec detection */
980 if (!bus->codec_mask) {
981 dev_info(bus->dev, "no hda codecs found!\n");
982 } else {
983 dev_info(bus->dev, "hda codecs found, mask %lx\n",
984 bus->codec_mask);
985
986 for (i = 0; i < HDA_MAX_CODECS; i++) {
987 if (bus->codec_mask & (1 << i))
988 codec_num++;
989 }
990
991 /*
992 * If no machine driver is found, then:
993 *
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200994 * generic hda machine driver can handle:
995 * - one HDMI codec, and/or
996 * - one external HDAudio codec
Daniel Baluta285880a2019-12-04 15:15:53 -0600997 */
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200998 if (!pdata->machine && codec_num <= 2) {
Daniel Baluta285880a2019-12-04 15:15:53 -0600999 hda_mach = snd_soc_acpi_intel_hda_machines;
1000
Daniel Baluta285880a2019-12-04 15:15:53 -06001001 dev_info(bus->dev, "using HDA machine driver %s now\n",
1002 hda_mach->drv_name);
1003
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +02001004 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask))
Daniel Baluta285880a2019-12-04 15:15:53 -06001005 idisp_str = "-idisp";
1006 else
1007 idisp_str = "";
1008
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -06001009 /* topology: use the info from hda_machines */
1010 tplg_filename = hda_mach->sof_tplg_filename;
1011 ret = dmic_topology_fixup(sdev, &tplg_filename, idisp_str, &dmic_num);
1012 if (ret < 0)
1013 return ret;
Daniel Baluta285880a2019-12-04 15:15:53 -06001014
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -06001015 hda_mach->mach_params.dmic_num = dmic_num;
Daniel Baluta285880a2019-12-04 15:15:53 -06001016 pdata->machine = hda_mach;
1017 pdata->tplg_filename = tplg_filename;
1018 }
1019 }
1020
1021 /* used by hda machine driver to create dai links */
1022 if (pdata->machine) {
1023 mach_params = (struct snd_soc_acpi_mach_params *)
1024 &pdata->machine->mach_params;
1025 mach_params->codec_mask = bus->codec_mask;
1026 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi;
Daniel Baluta285880a2019-12-04 15:15:53 -06001027 }
1028
1029 return 0;
1030}
1031#else
1032static int hda_generic_machine_select(struct snd_sof_dev *sdev)
1033{
1034 return 0;
1035}
1036#endif
1037
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001038#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
1039/* Check if all Slaves defined on the link can be found */
1040static bool link_slaves_found(struct snd_sof_dev *sdev,
1041 const struct snd_soc_acpi_link_adr *link,
1042 struct sdw_intel_ctx *sdw)
1043{
1044 struct hdac_bus *bus = sof_to_bus(sdev);
1045 struct sdw_intel_slave_id *ids = sdw->ids;
1046 int num_slaves = sdw->num_slaves;
1047 unsigned int part_id, link_id, unique_id, mfg_id;
Pierre-Louis Bossart6f5d5062021-02-08 17:33:33 -06001048 int i, j, k;
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001049
1050 for (i = 0; i < link->num_adr; i++) {
1051 u64 adr = link->adr_d[i].adr;
Pierre-Louis Bossart6f5d5062021-02-08 17:33:33 -06001052 int reported_part_count = 0;
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001053
1054 mfg_id = SDW_MFG_ID(adr);
1055 part_id = SDW_PART_ID(adr);
1056 link_id = SDW_DISCO_LINK_ID(adr);
Pierre-Louis Bossart6f5d5062021-02-08 17:33:33 -06001057
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001058 for (j = 0; j < num_slaves; j++) {
Pierre-Louis Bossart6f5d5062021-02-08 17:33:33 -06001059 /* find out how many identical parts were reported on that link */
1060 if (ids[j].link_id == link_id &&
1061 ids[j].id.part_id == part_id &&
1062 ids[j].id.mfg_id == mfg_id)
1063 reported_part_count++;
1064 }
1065
1066 for (j = 0; j < num_slaves; j++) {
1067 int expected_part_count = 0;
1068
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001069 if (ids[j].link_id != link_id ||
1070 ids[j].id.part_id != part_id ||
1071 ids[j].id.mfg_id != mfg_id)
1072 continue;
Pierre-Louis Bossart6f5d5062021-02-08 17:33:33 -06001073
1074 /* find out how many identical parts are expected */
1075 for (k = 0; k < link->num_adr; k++) {
Pierre-Louis Bossartad839122021-05-11 16:36:59 -05001076 u64 adr2 = link->adr_d[k].adr;
Pierre-Louis Bossart6f5d5062021-02-08 17:33:33 -06001077 unsigned int part_id2, link_id2, mfg_id2;
1078
1079 mfg_id2 = SDW_MFG_ID(adr2);
1080 part_id2 = SDW_PART_ID(adr2);
1081 link_id2 = SDW_DISCO_LINK_ID(adr2);
1082
1083 if (link_id2 == link_id &&
1084 part_id2 == part_id &&
1085 mfg_id2 == mfg_id)
1086 expected_part_count++;
1087 }
1088
1089 if (reported_part_count == expected_part_count) {
1090 /*
1091 * we have to check unique id
1092 * if there is more than one
1093 * Slave on the link
1094 */
1095 unique_id = SDW_UNIQUE_ID(adr);
1096 if (reported_part_count == 1 ||
1097 ids[j].id.unique_id == unique_id) {
1098 dev_dbg(bus->dev, "found %x at link %d\n",
1099 part_id, link_id);
1100 break;
1101 }
1102 } else {
1103 dev_dbg(bus->dev, "part %x reported %d expected %d on link %d, skipping\n",
1104 part_id, reported_part_count, expected_part_count, link_id);
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001105 }
1106 }
1107 if (j == num_slaves) {
1108 dev_dbg(bus->dev,
1109 "Slave %x not found\n",
1110 part_id);
1111 return false;
1112 }
1113 }
1114 return true;
1115}
1116
1117static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1118{
1119 struct snd_sof_pdata *pdata = sdev->pdata;
1120 const struct snd_soc_acpi_link_adr *link;
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001121 struct snd_soc_acpi_mach *mach;
1122 struct sof_intel_hda_dev *hdev;
1123 u32 link_mask;
1124 int i;
1125
1126 hdev = pdata->hw_pdata;
1127 link_mask = hdev->info.link_mask;
1128
1129 /*
1130 * Select SoundWire machine driver if needed using the
1131 * alternate tables. This case deals with SoundWire-only
1132 * machines, for mixed cases with I2C/I2S the detection relies
1133 * on the HID list.
1134 */
1135 if (link_mask && !pdata->machine) {
1136 for (mach = pdata->desc->alt_machines;
1137 mach && mach->link_mask; mach++) {
randerwang7d1952b2020-05-15 16:59:55 +03001138 /*
1139 * On some platforms such as Up Extreme all links
1140 * are enabled but only one link can be used by
1141 * external codec. Instead of exact match of two masks,
1142 * first check whether link_mask of mach is subset of
1143 * link_mask supported by hw and then go on searching
1144 * link_adr
1145 */
1146 if (~link_mask & mach->link_mask)
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001147 continue;
1148
1149 /* No need to match adr if there is no links defined */
1150 if (!mach->links)
1151 break;
1152
1153 link = mach->links;
1154 for (i = 0; i < hdev->info.count && link->num_adr;
1155 i++, link++) {
1156 /*
1157 * Try next machine if any expected Slaves
1158 * are not found on this link.
1159 */
1160 if (!link_slaves_found(sdev, link, hdev->sdw))
1161 break;
1162 }
1163 /* Found if all Slaves are checked */
1164 if (i == hdev->info.count || !link->num_adr)
1165 break;
1166 }
1167 if (mach && mach->link_mask) {
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -06001168 int dmic_num = 0;
1169
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001170 pdata->machine = mach;
1171 mach->mach_params.links = mach->links;
1172 mach->mach_params.link_mask = mach->link_mask;
1173 mach->mach_params.platform = dev_name(sdev->dev);
Libin Yang7da99ef2021-01-25 09:04:58 +02001174 if (mach->sof_fw_filename)
1175 pdata->fw_filename = mach->sof_fw_filename;
1176 else
1177 pdata->fw_filename = pdata->desc->default_fw_filename;
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001178 pdata->tplg_filename = mach->sof_tplg_filename;
Pierre-Louis Bossart7aecf592021-02-08 17:33:34 -06001179
1180 /*
1181 * DMICs use up to 4 pins and are typically pin-muxed with SoundWire
1182 * link 2 and 3, thus we only try to enable dmics if all conditions
1183 * are true:
1184 * a) link 2 and 3 are not used by SoundWire
1185 * b) the NHLT table reports the presence of microphones
1186 */
1187 if (!(mach->link_mask & GENMASK(3, 2))) {
1188 const char *tplg_filename = mach->sof_tplg_filename;
1189 int ret;
1190
1191 ret = dmic_topology_fixup(sdev, &tplg_filename, "", &dmic_num);
1192
1193 if (ret < 0)
1194 return ret;
1195
1196 pdata->tplg_filename = tplg_filename;
1197 }
1198 mach->mach_params.dmic_num = dmic_num;
1199
1200 dev_dbg(sdev->dev,
1201 "SoundWire machine driver %s topology %s\n",
1202 mach->drv_name,
1203 pdata->tplg_filename);
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001204 } else {
1205 dev_info(sdev->dev,
1206 "No SoundWire machine driver found\n");
1207 }
1208 }
1209
1210 return 0;
1211}
1212#else
1213static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1214{
1215 return 0;
1216}
1217#endif
1218
Daniel Baluta285880a2019-12-04 15:15:53 -06001219void hda_set_mach_params(const struct snd_soc_acpi_mach *mach,
Pierre-Louis Bossart17e9d6b2021-04-09 15:01:18 -07001220 struct snd_sof_dev *sdev)
Daniel Baluta285880a2019-12-04 15:15:53 -06001221{
Pierre-Louis Bossart974cccf2021-04-09 15:01:19 -07001222 struct snd_sof_pdata *pdata = sdev->pdata;
1223 const struct sof_dev_desc *desc = pdata->desc;
Daniel Baluta285880a2019-12-04 15:15:53 -06001224 struct snd_soc_acpi_mach_params *mach_params;
1225
1226 mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params;
Pierre-Louis Bossart17e9d6b2021-04-09 15:01:18 -07001227 mach_params->platform = dev_name(sdev->dev);
Pierre-Louis Bossart974cccf2021-04-09 15:01:19 -07001228 mach_params->num_dai_drivers = desc->ops->num_drv;
1229 mach_params->dai_drivers = desc->ops->drv;
Daniel Baluta285880a2019-12-04 15:15:53 -06001230}
1231
1232void hda_machine_select(struct snd_sof_dev *sdev)
1233{
1234 struct snd_sof_pdata *sof_pdata = sdev->pdata;
1235 const struct sof_dev_desc *desc = sof_pdata->desc;
1236 struct snd_soc_acpi_mach *mach;
1237
1238 mach = snd_soc_acpi_find_machine(desc->machines);
1239 if (mach) {
Sathyanarayana Nujella5253a732020-08-21 14:56:00 -05001240 /*
1241 * If tplg file name is overridden, use it instead of
1242 * the one set in mach table
1243 */
1244 if (!sof_pdata->tplg_filename)
1245 sof_pdata->tplg_filename = mach->sof_tplg_filename;
1246
Daniel Baluta285880a2019-12-04 15:15:53 -06001247 sof_pdata->machine = mach;
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001248
1249 if (mach->link_mask) {
1250 mach->mach_params.links = mach->links;
1251 mach->mach_params.link_mask = mach->link_mask;
1252 }
Daniel Baluta285880a2019-12-04 15:15:53 -06001253 }
1254
1255 /*
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001256 * If I2S fails, try SoundWire
1257 */
1258 hda_sdw_machine_select(sdev);
1259
1260 /*
Daniel Baluta285880a2019-12-04 15:15:53 -06001261 * Choose HDA generic machine driver if mach is NULL.
1262 * Otherwise, set certain mach params.
1263 */
1264 hda_generic_machine_select(sdev);
1265
1266 if (!sof_pdata->machine)
1267 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n");
1268}
1269
Pierre-Louis Bossart194fe0f2021-03-01 18:31:22 -06001270int hda_pci_intel_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1271{
1272 int ret;
1273
1274 ret = snd_intel_dsp_driver_probe(pci);
1275 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) {
1276 dev_dbg(&pci->dev, "SOF PCI driver not selected, aborting probe\n");
1277 return -ENODEV;
1278 }
1279
1280 return sof_pci_probe(pci, pci_id);
1281}
1282EXPORT_SYMBOL_NS(hda_pci_intel_probe, SND_SOC_SOF_INTEL_HDA_COMMON);
1283
Liam Girdwooddd96dac2019-04-12 11:08:47 -05001284MODULE_LICENSE("Dual BSD/GPL");
Pierre-Louis Bossart194fe0f2021-03-01 18:31:22 -06001285MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
Pierre-Louis Bossart5bd216c2019-12-17 14:22:29 -06001286MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC);
1287MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915);
Pierre-Louis Bossart068ac0d2019-12-17 14:22:31 -06001288MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);
Pierre-Louis Bossart08c2a4b2021-03-01 18:31:24 -06001289MODULE_IMPORT_NS(SND_INTEL_SOUNDWIRE_ACPI);
Pierre-Louis Bossart1eb62932020-08-19 20:44:04 +08001290MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT);